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* gas/testsuite/gas/arm/thumb-eabi.d: Add case for divided syntax encoding of movs.

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* gas/testsuite/gas/arm/thumb.d: Likewise.
	* gas/testsuite/gas/arm/thumb.s: Likewise.
	* gas/testsuite/gas/arm/thumb2_it.d: Update for change in lsls/movs disassembly.
	* gas/testsuite/gas/arm/thumb2_it_auto.d: Liekwise.
	* gas/testsuite/gas/arm/thumb32.d: Likewise.
	* ld/testsuite/ld-arm/arm-call.d: Handle change in lsls/movs disassembly.
	* ld/testsuite/ld-arm/farcall-thumb-arm-short.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-m.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
	* ld/testsuite/ld-arm/farcall-thumb-thumb.d: Likewise.
	* ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d: Likewise.
	* ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d: Likewise.
	* ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d: Likewise.
	* ld/testsuite/ld-arm/thumb2-bl-bad.d: Likewise.
	* opcodes/arm-dis.c (thumb-opcodes): Add disassembly for movs.
This commit is contained in:
Matthew Gretton-Dann
2010-06-07 10:43:52 +00:00
parent 16d6b4b7a2
commit 1f4e495053
22 changed files with 54 additions and 25 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
gas/testsuite/ChangeLog
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@ -1,3 +1,11 @@
2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/thumb-eabi.d: Add case for divided syntax encoding of movs.
* gas/arm/thumb.d: Likewise.
* gas/arm/thumb.s: Likewise.
* gas/arm/thumb2_it.d: Update for change in lsls/movs disassembly.
* gas/arm/thumb2_it_auto.d: Liekwise.
* gas/arm/thumb32.d: Likewise.
2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* gas/arm/thumb2_it_auto.d: Update for change in movs encoding. * gas/arm/thumb2_it_auto.d: Update for change in movs encoding.

8
gas/testsuite/gas/arm/thumb-eabi.d
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@ -10,9 +10,9 @@ Disassembly of section \.text:
0+000 <[^>]+> 00ca lsls r2, r1, #3 0+000 <[^>]+> 00ca lsls r2, r1, #3
0+002 <[^>]+> 0fe3 lsrs r3, r4, #31 0+002 <[^>]+> 0fe3 lsrs r3, r4, #31
0+004 <[^>]+> 1147 asrs r7, r0, #5 0+004 <[^>]+> 1147 asrs r7, r0, #5
0+006 <[^>]+> 0011 lsls r1, r2, #0 0+006 <[^>]+> 0011 movs r1, r2
0+008 <[^>]+> 0023 lsls r3, r4, #0 0+008 <[^>]+> 0023 movs r3, r4
0+00a <[^>]+> 002c lsls r4, r5, #0 0+00a <[^>]+> 002c movs r4, r5
0+00c <[^>]+> 083e lsrs r6, r7, #32 0+00c <[^>]+> 083e lsrs r6, r7, #32
0+00e <[^>]+> 1008 asrs r0, r1, #32 0+00e <[^>]+> 1008 asrs r0, r1, #32
0+010 <[^>]+> 18d1 adds r1, r2, r3 0+010 <[^>]+> 18d1 adds r1, r2, r3
@ -161,5 +161,5 @@ Disassembly of section \.text:
0+93e <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+944 <[^>]+>\) 0+93e <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+944 <[^>]+>\)
0+940 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\) 0+940 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\)
0+942 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\) 0+942 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\)
0+944 <[^>]+> 46c0 nop ; \(mov r8, r8\) 0+944 <[^>]+> 1c08 adds r0, r1, #0
0+946 <[^>]+> 46c0 nop ; \(mov r8, r8\) 0+946 <[^>]+> 46c0 nop ; \(mov r8, r8\)

8
gas/testsuite/gas/arm/thumb.d
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@ -11,9 +11,9 @@ Disassembly of section \.text:
0+000 <[^>]+> 00ca lsls r2, r1, #3 0+000 <[^>]+> 00ca lsls r2, r1, #3
0+002 <[^>]+> 0fe3 lsrs r3, r4, #31 0+002 <[^>]+> 0fe3 lsrs r3, r4, #31
0+004 <[^>]+> 1147 asrs r7, r0, #5 0+004 <[^>]+> 1147 asrs r7, r0, #5
0+006 <[^>]+> 0011 lsls r1, r2, #0 0+006 <[^>]+> 0011 movs r1, r2
0+008 <[^>]+> 0023 lsls r3, r4, #0 0+008 <[^>]+> 0023 movs r3, r4
0+00a <[^>]+> 002c lsls r4, r5, #0 0+00a <[^>]+> 002c movs r4, r5
0+00c <[^>]+> 083e lsrs r6, r7, #32 0+00c <[^>]+> 083e lsrs r6, r7, #32
0+00e <[^>]+> 1008 asrs r0, r1, #32 0+00e <[^>]+> 1008 asrs r0, r1, #32
0+010 <[^>]+> 18d1 adds r1, r2, r3 0+010 <[^>]+> 18d1 adds r1, r2, r3
@ -161,5 +161,5 @@ Disassembly of section \.text:
0+93e <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+944 <[^>]+>\) 0+93e <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+944 <[^>]+>\)
0+940 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\) 0+940 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\)
0+942 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\) 0+942 <[^>]+> 4801 ldr r0, \[pc, #4\] ; \(0+948 <[^>]+>\)
0+944 <[^>]+> 46c0 nop ; \(mov r8, r8\) 0+944 <[^>]+> 1c08 adds r0, r1, #0
0+946 <[^>]+> 46c0 nop ; \(mov r8, r8\) 0+946 <[^>]+> 46c0 nop ; \(mov r8, r8\)

3
gas/testsuite/gas/arm/thumb.s
View File

@ -198,5 +198,6 @@ forwardonly:
ldr r0, [pc, #4] ldr r0, [pc, #4]
ldr r0, [pc, #4] ldr r0, [pc, #4]
.target: .target:
nop @ pad for a.out baz:
mov r0, r1
nop nop

2
gas/testsuite/gas/arm/thumb2_it.d
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@ -45,7 +45,7 @@ Disassembly of section .text:
0+062 <[^>]+> bf08 it eq 0+062 <[^>]+> bf08 it eq
0+064 <[^>]+> 4640 moveq r0, r8 0+064 <[^>]+> 4640 moveq r0, r8
0+066 <[^>]+> 4608 mov r0, r1 0+066 <[^>]+> 4608 mov r0, r1
0+068 <[^>]+> 0008 lsls r0, r1, #0 0+068 <[^>]+> 0008 movs r0, r1
0+06a <[^>]+> ea5f 0008 movs.w r0, r8 0+06a <[^>]+> ea5f 0008 movs.w r0, r8
0+06e <[^>]+> bf01 itttt eq 0+06e <[^>]+> bf01 itttt eq
0+070 <[^>]+> 43c8 mvneq r0, r1 0+070 <[^>]+> 43c8 mvneq r0, r1

2
gas/testsuite/gas/arm/thumb2_it_auto.d
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@ -45,7 +45,7 @@ Disassembly of section .text:
0+062 <[^>]+> bf08 it eq 0+062 <[^>]+> bf08 it eq
0+064 <[^>]+> 4640 moveq r0, r8 0+064 <[^>]+> 4640 moveq r0, r8
0+066 <[^>]+> 4608 mov r0, r1 0+066 <[^>]+> 4608 mov r0, r1
0+068 <[^>]+> 0008 lsls r0, r1, #0 0+068 <[^>]+> 0008 movs r0, r1
0+06a <[^>]+> ea5f 0008 movs.w r0, r8 0+06a <[^>]+> ea5f 0008 movs.w r0, r8
0+06e <[^>]+> bf01 itttt eq 0+06e <[^>]+> bf01 itttt eq
0+070 <[^>]+> 43c8 mvneq r0, r1 0+070 <[^>]+> 43c8 mvneq r0, r1

4
gas/testsuite/gas/arm/thumb32.d
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@ -618,9 +618,9 @@ Disassembly of section .text:
0[0-9a-f]+ <[^>]+> eb10 0f09 cmn\.w r0, r9 0[0-9a-f]+ <[^>]+> eb10 0f09 cmn\.w r0, r9
0[0-9a-f]+ <[^>]+> f110 0f81 cmn\.w r0, #129 ; 0x81 0[0-9a-f]+ <[^>]+> f110 0f81 cmn\.w r0, #129 ; 0x81
0[0-9a-f]+ <[^>]+> f115 0f81 cmn\.w r5, #129 ; 0x81 0[0-9a-f]+ <[^>]+> f115 0f81 cmn\.w r5, #129 ; 0x81
0[0-9a-f]+ <[^>]+> 0000 lsls r0, r0, #0 0[0-9a-f]+ <[^>]+> 0000 movs r0, r0
0[0-9a-f]+ <[^>]+> 4600 mov r0, r0 0[0-9a-f]+ <[^>]+> 4600 mov r0, r0
0[0-9a-f]+ <[^>]+> 0005 lsls r5, r0, #0 0[0-9a-f]+ <[^>]+> 0005 movs r5, r0
0[0-9a-f]+ <[^>]+> 4628 mov r0, r5 0[0-9a-f]+ <[^>]+> 4628 mov r0, r5
0[0-9a-f]+ <[^>]+> ea4f 4065 mov\.w r0, r5, asr #17 0[0-9a-f]+ <[^>]+> ea4f 4065 mov\.w r0, r5, asr #17
0[0-9a-f]+ <[^>]+> ea4f 0000 mov\.w r0, r0 0[0-9a-f]+ <[^>]+> ea4f 0000 mov\.w r0, r0

15
ld/testsuite/ChangeLog
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@ -1,3 +1,18 @@
2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* ld-arm/arm-call.d: Handle change in lsls/movs disassembly.
* ld-arm/farcall-thumb-arm-short.d: Likewise.
* ld-arm/farcall-thumb-thumb-blx-pic-veneer.d: Likewise.
* ld-arm/farcall-thumb-thumb-blx.d: Likewise.
* ld-arm/farcall-thumb-thumb-m-pic-veneer.d: Likewise.
* ld-arm/farcall-thumb-thumb-m.d: Likewise.
* ld-arm/farcall-thumb-thumb-pic-veneer.d: Likewise.
* ld-arm/farcall-thumb-thumb.d: Likewise.
* ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d: Likewise.
* ld-arm/thumb2-bl-as-thumb1-bad.d: Likewise.
* ld-arm/thumb2-bl-bad-noeabi.d: Likewise.
* ld-arm/thumb2-bl-bad.d: Likewise.
2010-05-26 H.J. Lu <hongjiu.lu@intel.com> 2010-05-26 H.J. Lu <hongjiu.lu@intel.com>
PR ld/11628 PR ld/11628

2
ld/testsuite/ld-arm/arm-call.d
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@ -46,7 +46,7 @@ Disassembly of section .text:
8050: f7ff fff1 bl 8036 <t3> 8050: f7ff fff1 bl 8036 <t3>
8054: f7ff efd4 blx 8000 <_start> 8054: f7ff efd4 blx 8000 <_start>
8058: f7ff efd2 blx 8000 <_start> 8058: f7ff efd2 blx 8000 <_start>
805c: 0000 lsls r0, r0, #0 805c: 0000 movs r0, r0
... ...
00008060 <__t1_from_arm>: 00008060 <__t1_from_arm>:

2
ld/testsuite/ld-arm/farcall-thumb-arm-short.d
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@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 f802 bl 1008 <__bar_from_thumb> 1000: f000 f802 bl 1008 <__bar_from_thumb>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
\.\.\. \.\.\.
00001008 <__bar_from_thumb>: 00001008 <__bar_from_thumb>:

2
ld/testsuite/ld-arm/farcall-thumb-thumb-blx-pic-veneer.d
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@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 e802 blx 1008 <__bar_veneer> 1000: f000 e802 blx 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
\.\.\. \.\.\.
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

2
ld/testsuite/ld-arm/farcall-thumb-thumb-blx.d
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@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 e802 blx 1008 <__bar_veneer> 1000: f000 e802 blx 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
\.\.\. \.\.\.
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

2
ld/testsuite/ld-arm/farcall-thumb-thumb-m-pic-veneer.d
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@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 f802 bl 1008 <__bar_veneer> 1000: f000 f802 bl 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
... ...
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

2
ld/testsuite/ld-arm/farcall-thumb-thumb-m.d
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@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 f802 bl 1008 <__bar_veneer> 1000: f000 f802 bl 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
\.\.\. \.\.\.
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

2
ld/testsuite/ld-arm/farcall-thumb-thumb-pic-veneer.d
View File

@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 f802 bl 1008 <__bar_veneer> 1000: f000 f802 bl 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
... ...
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

2
ld/testsuite/ld-arm/farcall-thumb-thumb.d
View File

@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 f802 bl 1008 <__bar_veneer> 1000: f000 f802 bl 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
\.\.\. \.\.\.
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

2
ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad-noeabi.d
View File

@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 f802 bl 1008 <__bar_veneer> 1000: f000 f802 bl 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
... ...
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

2
ld/testsuite/ld-arm/thumb2-bl-as-thumb1-bad.d
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@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 e802 blx 1008 <__bar_veneer> 1000: f000 e802 blx 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
\.\.\. \.\.\.
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

2
ld/testsuite/ld-arm/thumb2-bl-bad-noeabi.d
View File

@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 f802 bl 1008 <__bar_veneer> 1000: f000 f802 bl 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
... ...
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

2
ld/testsuite/ld-arm/thumb2-bl-bad.d
View File

@ -4,7 +4,7 @@ Disassembly of section .text:
00001000 <_start>: 00001000 <_start>:
1000: f000 e802 blx 1008 <__bar_veneer> 1000: f000 e802 blx 1008 <__bar_veneer>
1004: 0000 lsls r0, r0, #0 1004: 0000 movs r0, r0
\.\.\. \.\.\.
00001008 <__bar_veneer>: 00001008 <__bar_veneer>:

4
opcodes/ChangeLog
View File

@ -1,3 +1,7 @@
2010-06-07 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (thumb-opcodes): Add disassembly for movs.
2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com> 2010-05-28 Matthew Gretton-Dann <matthew.gretton-dann@arm.com>
* arm-dis.c (print_insn_neon): Ensure disassembly of Neon * arm-dis.c (print_insn_neon): Ensure disassembly of Neon

1
opcodes/arm-dis.c
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@ -1249,6 +1249,7 @@ static const struct opcode16 thumb_opcodes[] =
{ARM_EXT_V4T, 0x5000, 0xFA00, "str%10'b%c\t%0-2r, [%3-5r, %6-8r]"}, {ARM_EXT_V4T, 0x5000, 0xFA00, "str%10'b%c\t%0-2r, [%3-5r, %6-8r]"},
{ARM_EXT_V4T, 0x5800, 0xFA00, "ldr%10'b%c\t%0-2r, [%3-5r, %6-8r]"}, {ARM_EXT_V4T, 0x5800, 0xFA00, "ldr%10'b%c\t%0-2r, [%3-5r, %6-8r]"},
/* format 1 */ /* format 1 */
{ARM_EXT_V4T, 0x0000, 0xFFC0, "mov%C\t%0-2r, %3-5r"},
{ARM_EXT_V4T, 0x0000, 0xF800, "lsl%C\t%0-2r, %3-5r, #%6-10d"}, {ARM_EXT_V4T, 0x0000, 0xF800, "lsl%C\t%0-2r, %3-5r, #%6-10d"},
{ARM_EXT_V4T, 0x0800, 0xF800, "lsr%C\t%0-2r, %3-5r, %s"}, {ARM_EXT_V4T, 0x0800, 0xF800, "lsr%C\t%0-2r, %3-5r, %s"},
{ARM_EXT_V4T, 0x1000, 0xF800, "asr%C\t%0-2r, %3-5r, %s"}, {ARM_EXT_V4T, 0x1000, 0xF800, "asr%C\t%0-2r, %3-5r, %s"},