Remove VexW0 and VexW1. Add VexW.

gas/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
	with vexw.
	(build_modrm_byte): Likewise.

opcodes/

2009-12-15  H.J. Lu  <hongjiu.lu@intel.com>

	* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1.  Add
	VexW.

	* i386-opc.h (VexW0): Removed.
	(VexW1): Likewise.
	(VEXW0): New.
	(VEXW1): Likewise.
	(VexW): Likewise.
	(i386_opcode_modifier): Remove vexw0 and vexw1.  Add vexw.

	* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
	Vex=2.
	* i386-init.h: Regenerated.
	* i386-tbl.h: Likewise.
This commit is contained in:
H.J. Lu
2009-12-16 02:10:45 +00:00
parent 0175442dfa
commit 1ef99a7be9
7 changed files with 3530 additions and 3505 deletions

View File

@ -1,3 +1,9 @@
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* config/tc-i386.c (build_vex_prefix): Replace vexw0/vexw1
with vexw.
(build_modrm_byte): Likewise.
2009-12-15 H.J. Lu <hongjiu.lu@intel.com> 2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* as.h (mempcpy): New. * as.h (mempcpy): New.

View File

@ -2776,12 +2776,12 @@ build_vex_prefix (const insn_template *t)
/* Check the REX.W bit. */ /* Check the REX.W bit. */
w = (i.rex & REX_W) ? 1 : 0; w = (i.rex & REX_W) ? 1 : 0;
if (i.tm.opcode_modifier.vexw0 || i.tm.opcode_modifier.vexw1) if (i.tm.opcode_modifier.vexw)
{ {
if (w) if (w)
abort (); abort ();
if (i.tm.opcode_modifier.vexw1) if (i.tm.opcode_modifier.vexw == VEXW1)
w = 1; w = 1;
} }
@ -4961,7 +4961,7 @@ build_modrm_byte (void)
i.operands++; i.operands++;
/* If VexW1 is set, the first operand is the source and /* If VexW1 is set, the first operand is the source and
the second operand is encoded in the immediate operand. */ the second operand is encoded in the immediate operand. */
if (i.tm.opcode_modifier.vexw1) if (i.tm.opcode_modifier.vexw == VEXW1)
{ {
source = 0; source = 0;
reg_slot = 1; reg_slot = 1;
@ -5319,7 +5319,7 @@ build_modrm_byte (void)
{ {
/* VEX.vvvv encodes one of the sources when the first /* VEX.vvvv encodes one of the sources when the first
operand is not an immediate. */ operand is not an immediate. */
if (i.tm.opcode_modifier.vexw0) if (i.tm.opcode_modifier.vexw == VEXW0)
i.vex.register_specifier = i.op[0].regs; i.vex.register_specifier = i.op[0].regs;
else else
i.vex.register_specifier = i.op[1].regs; i.vex.register_specifier = i.op[1].regs;
@ -5336,7 +5336,7 @@ build_modrm_byte (void)
{ {
i.rm.mode = 3; i.rm.mode = 3;
if (i.tm.opcode_modifier.vexw0) if (i.tm.opcode_modifier.vexw == VEXW0)
i.rm.regmem = i.op[1].regs->reg_num; i.rm.regmem = i.op[1].regs->reg_num;
else else
i.rm.regmem = i.op[0].regs->reg_num; i.rm.regmem = i.op[0].regs->reg_num;

View File

@ -1,3 +1,20 @@
2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-gen.c (opcode_modifiers): Remove VexW0 and VexW1. Add
VexW.
* i386-opc.h (VexW0): Removed.
(VexW1): Likewise.
(VEXW0): New.
(VEXW1): Likewise.
(VexW): Likewise.
(i386_opcode_modifier): Remove vexw0 and vexw1. Add vexw.
* i386-opc.tbl: Replace VexW0 with VexW=1 and VexW1 with
Vex=2.
* i386-init.h: Regenerated.
* i386-tbl.h: Likewise.
2009-12-15 H.J. Lu <hongjiu.lu@intel.com> 2009-12-15 H.J. Lu <hongjiu.lu@intel.com>
* i386-dis.c (VEX_W_3818_P_2_M_0): New. * i386-dis.c (VEX_W_3818_P_2_M_0): New.

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@ -357,8 +357,7 @@ static bitfield opcode_modifiers[] =
BITFIELD (VexNDS), BITFIELD (VexNDS),
BITFIELD (VexNDD), BITFIELD (VexNDD),
BITFIELD (VexLWP), BITFIELD (VexLWP),
BITFIELD (VexW0), BITFIELD (VexW),
BITFIELD (VexW1),
BITFIELD (Vex0F), BITFIELD (Vex0F),
BITFIELD (Vex0F38), BITFIELD (Vex0F38),
BITFIELD (Vex0F3A), BITFIELD (Vex0F3A),

View File

@ -286,10 +286,14 @@ enum
/* insn has VEX NDD. Register destination is encoded in Vex prefix /* insn has VEX NDD. Register destination is encoded in Vex prefix
and one of the operands can access a memory location. */ and one of the operands can access a memory location. */
VexLWP, VexLWP,
/* insn has VEX W0. */ /* How the VEX.W bit is used:
VexW0, 0: Set by the REX.W bit.
/* insn has VEX W1. */ 1: VEX.W0. Should always be 0.
VexW1, 2: VEX.W1. Should always be 1.
*/
#define VEXW0 1
#define VEXW1 2
VexW,
/* insn has VEX 0x0F opcode prefix. */ /* insn has VEX 0x0F opcode prefix. */
Vex0F, Vex0F,
/* insn has VEX 0x0F38 opcode prefix. */ /* insn has VEX 0x0F38 opcode prefix. */
@ -368,8 +372,7 @@ typedef struct i386_opcode_modifier
unsigned int vexnds:1; unsigned int vexnds:1;
unsigned int vexndd:1; unsigned int vexndd:1;
unsigned int vexlwp:1; unsigned int vexlwp:1;
unsigned int vexw0:1; unsigned int vexw:2;
unsigned int vexw1:1;
unsigned int vex0f:1; unsigned int vex0f:1;
unsigned int vex0f38:1; unsigned int vex0f38:1;
unsigned int vex0f3a:1; unsigned int vex0f3a:1;

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