Allow adrCCl. [Patch from Phillip BLundel]

Updated ARM tests.

gas/ChangeLog

@@ -1,3 +1,11 @@
+2001-06-21  Philip Blundell  <philb@gnu.org>
+
+	* config/tc-arm.c (cplong_flag): Rename to long_flag.  All uses
+	updated.
+	(insns): Remove entry for adrl.  Add long_flag for adr.
+	(do_adr): Handle `l' suffix.
+	(do_adrl): Delete.
+
 2001-06-21  Alan Modra  <amodra@bigpond.net.au>
 
 	* config/tc-hppa.c (CHECK_FIELD_WHERE): Define.

gas/config/tc-arm.c

@@ -414,7 +414,7 @@ static CONST struct asm_flg except_flag[] =
   {NULL, 0}
 };
 
-static CONST struct asm_flg cplong_flag[] =
+static CONST struct asm_flg long_flag[] =
 {
   {"l", 0x00400000},
   {NULL, 0}
@@ -760,8 +760,7 @@ static CONST struct asm_opcode insns[] =
 #endif
 
 /* Pseudo ops.  */
-  {"adr",   0x028f0000, NULL,   NULL,        ARM_ANY,      do_adr},
+  {"adr",   0x028f0000, NULL,   long_flag,   ARM_ANY,      do_adr},
-  {"adrl",  0x028f0000, NULL,   NULL,        ARM_ANY,      do_adrl},
   {"nop",   0x01a00000, NULL,   NULL,        ARM_ANY,      do_nop},
 
 /* ARM 2 multiplies.  */
@@ -837,8 +836,8 @@ static CONST struct asm_opcode insns[] =
 
 /* Generic copressor instructions.  */
   {"cdp",   0x0e000000, NULL,  NULL,         ARM_2UP,      do_cdp},
-  {"ldc",   0x0c100000, NULL,  cplong_flag,  ARM_2UP,      do_lstc},
+  {"ldc",   0x0c100000, NULL,  long_flag,    ARM_2UP,      do_lstc},
-  {"stc",   0x0c000000, NULL,  cplong_flag,  ARM_2UP,      do_lstc},
+  {"stc",   0x0c000000, NULL,  long_flag,    ARM_2UP,      do_lstc},
   {"mcr",   0x0e000010, NULL,  NULL,         ARM_2UP,      do_co_reg},
   {"mrc",   0x0e100010, NULL,  NULL,         ARM_2UP,      do_co_reg},
 
@@ -848,8 +847,8 @@ static CONST struct asm_opcode insns[] =
   {"blx",            0, NULL,   NULL,        ARM_EXT_V5, do_blx},
   {"clz",   0x016f0f10, NULL,   NULL,        ARM_EXT_V5, do_clz},
   {"bkpt",  0xe1200070, "",   	NULL,        ARM_EXT_V5, do_bkpt},
-  {"ldc2",  0xfc100000, "",  	cplong_flag, ARM_EXT_V5, do_lstc2},
+  {"ldc2",  0xfc100000, "",  	long_flag,   ARM_EXT_V5, do_lstc2},
-  {"stc2",  0xfc000000, "",  	cplong_flag, ARM_EXT_V5, do_lstc2},
+  {"stc2",  0xfc000000, "",  	long_flag,   ARM_EXT_V5, do_lstc2},
   {"cdp2",  0xfe000000, "",  	NULL,        ARM_EXT_V5, do_cdp2},
   {"mcr2",  0xfe000010, "",  	NULL,        ARM_EXT_V5, do_co_reg2},
   {"mrc2",  0xfe100010, "",  	NULL,        ARM_EXT_V5, do_co_reg2},
@@ -4075,8 +4074,6 @@ do_adr (str, flags)
      char * str;
      unsigned long flags;
 {
-  /* This is a pseudo-op of the form "adr rd, label" to be converted
-     into a relative address of the form "add rd, pc, #label-.-8".  */
   skip_whitespace (str);
 
   if (reg_required_here (&str, 12) == FAIL
@@ -4088,48 +4085,33 @@ do_adr (str, flags)
       return;
     }
 
+  if (flags & 0x00400000)
+    {
+      /* This is a pseudo-op of the form "adrl rd, label" to be converted
+	 into a relative address of the form:
+	 add rd, pc, #low(label-.-8)"
+	 add rd, rd, #high(label-.-8)"  */
+      /* Frag hacking will turn this into a sub instruction if the offset turns
+	 out to be negative.  */
+      inst.reloc.type              = BFD_RELOC_ARM_ADRL_IMMEDIATE;
+      inst.reloc.exp.X_add_number -= 8; /* PC relative adjust  */
+      inst.reloc.pc_rel            = 1;
+      inst.instruction            |= flags & ~0x00400000;
+      inst.size                    = INSN_SIZE * 2;
+    }
+  else
+    {
+      /* This is a pseudo-op of the form "adr rd, label" to be converted
+	 into a relative address of the form "add rd, pc, #label-.-8".  */
       /* Frag hacking will turn this into a sub instruction if the offset turns
 	 out to be negative.  */
       inst.reloc.type = BFD_RELOC_ARM_IMMEDIATE;
       inst.reloc.exp.X_add_number -= 8; /* PC relative adjust.  */
       inst.reloc.pc_rel = 1;
       inst.instruction |= flags;
-
-  end_of_line (str);
-}
-
-static void
-do_adrl (str, flags)
-     char * str;
-     unsigned long flags;
-{
-  /* This is a pseudo-op of the form "adrl rd, label" to be converted
-     into a relative address of the form:
-     	add rd, pc, #low(label-.-8)"
-     	add rd, rd, #high(label-.-8)"  */
-
-  skip_whitespace (str);
-
-  if (reg_required_here (& str, 12) == FAIL
-      || skip_past_comma (& str) == FAIL
-      || my_get_expression (& inst.reloc.exp, & str))
-    {
-      if (!inst.error)
-	inst.error = BAD_ARGS;
-      return;
     }
 
   end_of_line (str);
-
-  /* Frag hacking will turn this into a sub instruction if the offset turns
-     out to be negative.  */
-  inst.reloc.type              = BFD_RELOC_ARM_ADRL_IMMEDIATE;
-  inst.reloc.exp.X_add_number -= 8; /* PC relative adjust  */
-  inst.reloc.pc_rel            = 1;
-  inst.instruction            |= flags;
-  inst.size                    = INSN_SIZE * 2;
-
-  return;
 }
 
 static void

gas/testsuite/ChangeLog

@@ -1,3 +1,14 @@
+2001-06-21  Nick Clifton  <nickc@cambridge.redhat.com>
+
+	* gas/arm/arm.exp: Remove msr-bad.s test.
+	Select processor type for architecture specific instruction tests.
+
+	* gas/arm/adrl.s: Add adrEQl as a test.
+	* gas/arm/adrl.d: Adjusted expected output.
+
+	* gas/arm/arm7dm.s: Add "msr CPSR_x, #0" as a test instruction.
+	* gas/arm/msr-bad.s: Delete.
+
 2001-06-18  Tom Rix  <trix@redhat.com>
 
 	* gas/ppc/aix.exp: New file, aix specific tests.

gas/testsuite/gas/arm/adrl.d

@@ -9,10 +9,12 @@ Disassembly of section .text:
 	...
 0+2000 <.*> e24f0008 	sub	r0, pc, #8	; 0x8
 0+2004 <.*> e2400c20 	sub	r0, r0, #8192	; 0x2000
-0+2008 <.*> e28f0018 	add	r0, pc, #24	; 0x18
+0+2008 <.*> e28f0020 	add	r0, pc, #32	; 0x20
 0+200c <.*> e2800c20 	add	r0, r0, #8192	; 0x2000
 0+2010 <.*> e24f0018 	sub	r0, pc, #24	; 0x18
 0+2014 <.*> e1a00000 	nop			\(mov r0,r0\)
-0+2018 <.*> e28f0000 	add	r0, pc, #0	; 0x0
+0+2018 <.*> e28f0008 	add	r0, pc, #8	; 0x8
 0+201c <.*> e1a00000 	nop			\(mov r0,r0\)
+0+2020 <.*> 028f0000 	addeq	r0, pc, #0	; 0x0
+0+2024 <.*> e1a00000 	nop			\(mov r0,r0\)
 	...

gas/testsuite/gas/arm/adrl.s

@@ -9,6 +9,7 @@ foo:
 	adrl	r0, 1f
         adrl    r0, 2b
 	adrl	r0, 2f
+	adrEQl	r0, 2f
 2:
 	.space 8200
 1:

gas/testsuite/gas/arm/arm.exp

@@ -4,18 +4,17 @@
 if {[istarget *arm*-*-*] || [istarget "xscale-*-*"]} then {
     run_dump_test "inst"
 
-    gas_test "arm3.s" "" $stdoptlist "Arm 3 instructions"
+    gas_test "arm3.s" "-marm3" $stdoptlist "Arm 3 instructions"
 
-    gas_test "arm6.s" "" $stdoptlist "Arm 6 instructions"
+    gas_test "arm6.s" "-marm6" $stdoptlist "Arm 6 instructions"
-    gas_test_error "msr-bad.s" "-marmv3" "immediate value cannot be used to set this field"
 
-    gas_test "arm7dm.s" "" $stdoptlist "Arm 7DM instructions"
+    gas_test "arm7dm.s" "-marm7dm" $stdoptlist "Arm 7DM instructions"
 
     run_dump_test "arm7t"
 
-    gas_test "thumb.s" "" $stdoptlist "Thumb instructions"
+    gas_test "thumb.s" "-marm7t" $stdoptlist "Thumb instructions"
 
-    gas_test "arch4t.s" "" $stdoptlist "Arm architecture 4t instructions"
+    gas_test "arch4t.s" "-marmv4t" $stdoptlist "Arm architecture 4t instructions"
 
     gas_test "copro.s" "" $stdoptlist "Co processor instructions"
 

gas/testsuite/gas/arm/arm7dm.s

@@ -10,3 +10,5 @@
 	smulls	r1, r0, r9, r11
 	umlaleqs r2, r9, r4, r9
 	smlalge r14, r10, r8, r14
+
+	msr	CPSR_x, #0	@ This used to be illegal, but rev 2 of the ARM ARM allows it.

gas/testsuite/gas/arm/msr-bad.s

@@ -1,2 +0,0 @@
-@ illegal set of CPSR from immediate value
-	msr	cpsr, #0