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https://github.com/espressif/binutils-gdb.git
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gas/testsuite/
2005-09-28 Jan Beulich <jbeulich@novell.com> * gas/i386/x86-64-stack.s, gas/i386/x86-64-stack.d, gas/i386/x86-64-stack-suffix.d, gas/i386/x86-64-stack-intel.d: New. * gas/i386/i386.exp: Run new tests. ld/testsuite/ 2005-09-28 Jan Beulich <jbeulich@novell.com> * ld-x86-64/tlspic.dd: Adjust. opcodes/ 2005-09-28 Jan Beulich <jbeulich@novell.com> * i386-dis.c (stack_v_mode): Renamed from branch_v_mode. (indirEv): Use it. (stackEv): New. (Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions. (dis386): Document and use new 'V' meta character. Use it for single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov. (putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark data prefix as used whenever DFLAG was examined. Handle 'V'. (intel_operand_size): Use stack_v_mode. (OP_E): Use stack_v_mode, but handle only the special case of 64-bit mode without operand size override here; fall through to v_mode case otherwise. (OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode and no operand size override is present. (OP_J): Use get32s for obtaining the displacement also when rex64 is present.
This commit is contained in:
Jan Beulich
@ -1,3 +1,23 @@
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2005-09-28 Jan Beulich <jbeulich@novell.com>
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* i386-dis.c (stack_v_mode): Renamed from branch_v_mode.
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(indirEv): Use it.
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(stackEv): New.
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(Ob64, Ov64): Rename to Ob, Ov. Delete unused original definitions.
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(dis386): Document and use new 'V' meta character. Use it for
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single-byte push/pop opcode forms. Use stackEv for mod-r/m push/pop
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opcode forms. Correct typo in 'pop ss'. Replace Ob64/Ov64 by Ob/Ov.
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(putop): 'q' suffix for 'T' and 'U' meta depends on DFLAG. Mark
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data prefix as used whenever DFLAG was examined. Handle 'V'.
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(intel_operand_size): Use stack_v_mode.
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(OP_E): Use stack_v_mode, but handle only the special case of
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64-bit mode without operand size override here; fall through to
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v_mode case otherwise.
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(OP_REG): Special case rAX_reg ... rDI_reg only when 64-bit mode
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and no operand size override is present.
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(OP_J): Use get32s for obtaining the displacement also when rex64
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is present.
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2005-09-08 Paul Brook <paul@codesourcery.com>
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* arm-dis.c (arm_opcodes, thumb32_opcodes): Rename smi to smc.
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@ -200,8 +200,9 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define Eq OP_E, q_mode
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#define Edq OP_E, dq_mode
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#define Edqw OP_E, dqw_mode
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#define indirEv OP_indirE, branch_v_mode
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#define indirEv OP_indirE, stack_v_mode
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#define indirEp OP_indirE, f_mode
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#define stackEv OP_E, stack_v_mode
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#define Em OP_E, m_mode
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#define Ew OP_E, w_mode
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#define Ma OP_E, v_mode
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@ -280,10 +281,8 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define Sw OP_SEG, w_mode
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#define Ap OP_DIR, 0
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#define Ob OP_OFF, b_mode
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#define Ob64 OP_OFF64, b_mode
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#define Ov OP_OFF, v_mode
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#define Ov64 OP_OFF64, v_mode
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#define Ob OP_OFF64, b_mode
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#define Ov OP_OFF64, v_mode
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#define Xb OP_DSreg, eSI_reg
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#define Xv OP_DSreg, eSI_reg
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#define Yb OP_ESreg, eDI_reg
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@ -329,7 +328,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define dqw_mode 12 /* registers like dq_mode, memory like w_mode. */
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#define f_mode 13 /* 4- or 6-byte pointer operand */
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#define const_1_mode 14
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#define branch_v_mode 15 /* v_mode for branch. */
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#define stack_v_mode 15 /* v_mode for stack-related opcodes. */
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#define es_reg 100
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#define cs_reg 101
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@ -479,6 +478,7 @@ struct dis386 {
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'S' => print 'w', 'l' or 'q' if suffix_always is true
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'T' => print 'q' in 64bit mode and behave as 'P' otherwise
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'U' => print 'q' in 64bit mode and behave as 'Q' otherwise
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'V' => print 'q' in 64bit mode and behave as 'S' otherwise
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'W' => print 'b' or 'w' ("w" or "de" in intel mode)
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'X' => print 's', 'd' depending on data16 prefix (for XMM)
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'Y' => 'q' if instruction has an REX 64bit overwrite prefix
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@ -519,7 +519,7 @@ static const struct dis386 dis386[] = {
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{ "adcB", AL, Ib, XX },
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{ "adcS", eAX, Iv, XX },
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{ "push{T|}", ss, XX, XX },
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{ "popT|}", ss, XX, XX },
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{ "pop{T|}", ss, XX, XX },
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/* 18 */
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{ "sbbB", Eb, Gb, XX },
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{ "sbbS", Ev, Gv, XX },
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@ -584,23 +584,23 @@ static const struct dis386 dis386[] = {
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{ "dec{S|}", RMeSI, XX, XX },
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{ "dec{S|}", RMeDI, XX, XX },
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/* 50 */
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{ "pushS", RMrAX, XX, XX },
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{ "pushS", RMrCX, XX, XX },
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{ "pushS", RMrDX, XX, XX },
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{ "pushS", RMrBX, XX, XX },
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{ "pushS", RMrSP, XX, XX },
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{ "pushS", RMrBP, XX, XX },
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{ "pushS", RMrSI, XX, XX },
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{ "pushS", RMrDI, XX, XX },
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{ "pushV", RMrAX, XX, XX },
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{ "pushV", RMrCX, XX, XX },
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{ "pushV", RMrDX, XX, XX },
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{ "pushV", RMrBX, XX, XX },
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{ "pushV", RMrSP, XX, XX },
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{ "pushV", RMrBP, XX, XX },
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{ "pushV", RMrSI, XX, XX },
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{ "pushV", RMrDI, XX, XX },
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/* 58 */
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{ "popS", RMrAX, XX, XX },
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{ "popS", RMrCX, XX, XX },
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{ "popS", RMrDX, XX, XX },
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{ "popS", RMrBX, XX, XX },
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{ "popS", RMrSP, XX, XX },
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{ "popS", RMrBP, XX, XX },
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{ "popS", RMrSI, XX, XX },
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{ "popS", RMrDI, XX, XX },
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{ "popV", RMrAX, XX, XX },
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{ "popV", RMrCX, XX, XX },
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{ "popV", RMrDX, XX, XX },
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{ "popV", RMrBX, XX, XX },
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{ "popV", RMrSP, XX, XX },
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{ "popV", RMrBP, XX, XX },
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{ "popV", RMrSI, XX, XX },
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{ "popV", RMrDI, XX, XX },
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/* 60 */
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{ "pusha{P|}", XX, XX, XX },
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{ "popa{P|}", XX, XX, XX },
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@ -654,7 +654,7 @@ static const struct dis386 dis386[] = {
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{ "movQ", Sv, Sw, XX },
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{ "leaS", Gv, M, XX },
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{ "movQ", Sw, Sv, XX },
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{ "popU", Ev, XX, XX },
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{ "popU", stackEv, XX, XX },
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/* 90 */
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{ "nop", NOP_Fixup, 0, XX, XX },
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{ "xchgS", RMeCX, eAX, XX },
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@ -674,10 +674,10 @@ static const struct dis386 dis386[] = {
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{ "sahf{|}", XX, XX, XX },
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{ "lahf{|}", XX, XX, XX },
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/* a0 */
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{ "movB", AL, Ob64, XX },
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{ "movS", eAX, Ov64, XX },
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{ "movB", Ob64, AL, XX },
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{ "movS", Ov64, eAX, XX },
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{ "movB", AL, Ob, XX },
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{ "movS", eAX, Ov, XX },
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{ "movB", Ob, AL, XX },
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{ "movS", Ov, eAX, XX },
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{ "movs{b||b|}", Yb, Xb, XX },
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{ "movs{R||R|}", Yv, Xv, XX },
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{ "cmps{b||b|}", Xb, Yb, XX },
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@ -1361,7 +1361,7 @@ static const struct dis386 grps[][8] = {
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{ "JcallT", indirEp, XX, XX },
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{ "jmpT", indirEv, XX, XX },
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{ "JjmpT", indirEp, XX, XX },
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{ "pushU", Ev, XX, XX },
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{ "pushU", stackEv, XX, XX },
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{ "(bad)", XX, XX, XX },
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},
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/* GRP6 */
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@ -2860,7 +2860,7 @@ putop (const char *template, int sizeflag)
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case 'T':
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if (intel_syntax)
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break;
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if (mode_64bit)
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if (mode_64bit && (sizeflag & DFLAG))
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{
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*obufp++ = 'q';
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break;
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@ -2882,16 +2882,17 @@ putop (const char *template, int sizeflag)
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*obufp++ = 'l';
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else
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*obufp++ = 'w';
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used_prefixes |= (prefixes & PREFIX_DATA);
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}
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used_prefixes |= (prefixes & PREFIX_DATA);
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}
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break;
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case 'U':
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if (intel_syntax)
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break;
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if (mode_64bit)
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if (mode_64bit && (sizeflag & DFLAG))
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{
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*obufp++ = 'q';
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if (mod != 3 || (sizeflag & SUFFIX_ALWAYS))
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*obufp++ = 'q';
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break;
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}
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/* Fall through. */
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@ -2909,8 +2910,8 @@ putop (const char *template, int sizeflag)
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*obufp++ = intel_syntax ? 'd' : 'l';
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else
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*obufp++ = 'w';
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used_prefixes |= (prefixes & PREFIX_DATA);
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}
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used_prefixes |= (prefixes & PREFIX_DATA);
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}
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break;
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case 'R':
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@ -2945,6 +2946,16 @@ putop (const char *template, int sizeflag)
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if (!(rex & REX_MODE64))
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used_prefixes |= (prefixes & PREFIX_DATA);
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break;
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case 'V':
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if (intel_syntax)
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break;
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if (mode_64bit && (sizeflag & DFLAG))
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{
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if (sizeflag & SUFFIX_ALWAYS)
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*obufp++ = 'q';
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break;
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}
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/* Fall through. */
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case 'S':
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if (intel_syntax)
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break;
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@ -3134,7 +3145,7 @@ intel_operand_size (int bytemode, int sizeflag)
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case dqw_mode:
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oappend ("WORD PTR ");
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break;
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case branch_v_mode:
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case stack_v_mode:
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if (mode_64bit && (sizeflag & DFLAG))
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{
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oappend ("QWORD PTR ");
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@ -3223,18 +3234,15 @@ OP_E (int bytemode, int sizeflag)
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else
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oappend (names32[rm + add]);
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break;
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case branch_v_mode:
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if (mode_64bit)
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oappend (names64[rm + add]);
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else
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case stack_v_mode:
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if (mode_64bit && (sizeflag & DFLAG))
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{
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if ((sizeflag & DFLAG) || bytemode != branch_v_mode)
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oappend (names32[rm + add]);
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else
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oappend (names16[rm + add]);
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oappend (names64[rm + add]);
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used_prefixes |= (prefixes & PREFIX_DATA);
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break;
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}
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break;
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bytemode = v_mode;
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/* FALLTHRU */
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case v_mode:
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case dq_mode:
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case dqw_mode:
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@ -3630,7 +3638,7 @@ OP_REG (int code, int sizeflag)
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break;
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case rAX_reg: case rCX_reg: case rDX_reg: case rBX_reg:
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case rSP_reg: case rBP_reg: case rSI_reg: case rDI_reg:
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if (mode_64bit)
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if (mode_64bit && (sizeflag & DFLAG))
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{
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s = names64[code - rAX_reg + add];
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break;
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@ -3873,7 +3881,7 @@ OP_J (int bytemode, int sizeflag)
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disp -= 0x100;
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break;
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case v_mode:
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if (sizeflag & DFLAG)
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if ((sizeflag & DFLAG) || (rex & REX_MODE64))
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disp = get32s ();
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else
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{
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