mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-08-06 06:45:56 +08:00
General cleanup and simplication of disassembler interface.
* a29k-pinsn.c, arm-pinsn.c, convex-pinsn.c, gould-pinsn.c,
hppa-pinsn.c, i386-pinsn.c, i960-pinsn.c, m68k-pinsn.c,
m88k-pinsn.c, mips-pinsn.c, ns32k-pinsn.c, pyr-pinsn.c,
rs6000-pinsn.c, sparc-pinsn.c, tahoe-pinsn.c, vax-pinsn.c: Remove.
* gould-tdep.c, ns32k-tdep.c, tahoe-tdep.c, vax-tdep.c: New files,
had been -pinsn.c files.
* Makefile.in (ALLDEPFILES): Remove removed files.
(a29k-pinsn.o, arm-pinsn.o, convex-pinsn.o, gould-pinsn.o,
hppa-pinsn.o, i386-pinsn.o, i960-pinsn.o, m68k-pinsn.o,
m88k-pinsn.o, mips-pinsn.o, ns32k-pinsn.o, pyr-pinsn.o,
rs6000-pinsn.o, sparc-pinsn.o, tahoe-pinsn.o, vax-pinsn.o):
Remove compile actions.
* arm-tdep.o, gould-tdep.o, ns32k-tdep.o, tahoe-tdep.o,
vax-tdep.o: Add compile actions.
* defs.h (tm_print_insn): New global.
* a29k-tdep.c (gdb_print_insn_a29k): New function.
(_initialize_a29k_tdep): Rename from _initialize_29k,
set tm_print_insn.
* alpha-tdep.c (print_insn): Remove.
(_initialize_alpha_tdep): Set tm_print_insn.
* arm-tdep.c (arm_print_insn): New function, was print_insn
in arm-pinsn.c.
* convex-tdep.c (convex_print_insn): New function, was print_insn
in convex-pinsn.c.
* h8300-tdep.c (print_insn): Remove.
(gdb_print_insn_h8300): New function.
(_initialize_h8300_tdep): New function.
* h8500-tdep.c (print_insn): Remove.
(_initialize_h8500_tdep): New function.
* hppa-tdep.c (_initialize_hppa_tdep): Set tm_print_insn.
* i386-tdep.c (_initialize_i386_tdep): New function.
* i960-tdep.c (mem, next_insn): New functions, were in
i960-pinsn.c.
(_initialize_i960_tdep): Set tm_print_insn.
* m68k-tdep.c (_initialize_m68k_tdep): New function.
* m88k-tdep.c (_initialize_m88k_tdep): New function.
* mips-tdep.c (gdb_print_insn_mips): New function.
(_initialize_mips_tdep): Set tm_print_insn.
* pyr-tdep.c (pyr_print_insn): New function, was print_insn
in pyr-pinsn.c.
* rs6000-tdep.c (_initialize_rs6000_tdep): New function.
* sh-tdep.c (print_insn): Remove.
(gdb_print_insn_sh): New function.
(_initialize_sh_tdep): Set tm_print_insn.
* sparc-tdep.c (_initialize_sparc_tdep): New function.
* w65-tdep.c (print_insn): Remove.
(_initialize_w65_tdep): New function.
* z8k-tdep.c (print_insn): Remove.
(gdb_print_insn_z8k): New function.
(_initialize_z8k_tdep): Set tm_print_insn.
* printcmd.c (print_insn): New function, generic disassembler.
* config/*/*.mt (TDEPFILES): Remove refs to *-pinsn.o.
* defs.h (query_hook, error_hook): Fix prototypes.
This commit is contained in:
Stan Shebs
@ -857,6 +857,299 @@ psw_info (arg)
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(psw & p->bit) >> p->pos, p->text);
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}
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}
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#include "symtab.h"
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/* reg (fmt_field, inst_field) --
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the {first,second,third} operand of instruction as fmt_field = [ijk]
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gets the value of the field from the [ijk] position of the instruction */
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#define reg(a,b) ((char (*)[3])(op[fmt->a]))[inst.f0.b]
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/* lit (fmt_field) -- field [ijk] is a literal (PSW, VL, eg) */
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#define lit(i) op[fmt->i]
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/* aj[j] -- name for A register j */
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#define aj ((char (*)[3])(op[A]))
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union inst {
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struct {
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unsigned : 7;
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unsigned i : 3;
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unsigned j : 3;
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unsigned k : 3;
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unsigned : 16;
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unsigned : 32;
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} f0;
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struct {
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unsigned : 8;
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unsigned indir : 1;
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unsigned len : 1;
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unsigned j : 3;
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unsigned k : 3;
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unsigned : 16;
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unsigned : 32;
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} f1;
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unsigned char byte[8];
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unsigned short half[4];
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char signed_byte[8];
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short signed_half[4];
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};
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struct opform {
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int mask; /* opcode mask */
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int shift; /* opcode align */
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struct formstr *formstr[3]; /* ST, E0, E1 */
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};
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struct formstr {
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unsigned lop:8, rop:5; /* opcode */
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unsigned fmt:5; /* inst format */
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unsigned i:5, j:5, k:2; /* operand formats */
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};
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#include "opcode/convex.h"
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CONST unsigned char formdecode [] = {
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,9,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,1,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,2,
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3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,3,
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4,4,4,4,4,4,4,4,5,5,5,5,6,6,7,8,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,0,
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};
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CONST struct opform opdecode[] = {
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0x7e00, 9, format0, e0_format0, e1_format0,
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0x3f00, 8, format1, e0_format1, e1_format1,
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0x1fc0, 6, format2, e0_format2, e1_format2,
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0x0fc0, 6, format3, e0_format3, e1_format3,
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0x0700, 8, format4, e0_format4, e1_format4,
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0x03c0, 6, format5, e0_format5, e1_format5,
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0x01f8, 3, format6, e0_format6, e1_format6,
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0x00f8, 3, format7, e0_format7, e1_format7,
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0x0000, 0, formatx, formatx, formatx,
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0x0f80, 7, formatx, formatx, formatx,
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0x0f80, 7, formatx, formatx, formatx,
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};
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/* Print the instruction at address MEMADDR in debugged memory,
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on STREAM. Returns length of the instruction, in bytes. */
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int
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convex_print_insn (memaddr, stream)
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CORE_ADDR memaddr;
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FILE *stream;
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{
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union inst inst;
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struct formstr *fmt;
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register int format, op1, pfx;
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int l;
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read_memory (memaddr, &inst, sizeof inst);
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/* Remove and note prefix, if present */
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pfx = inst.half[0];
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if ((pfx & 0xfff0) == 0x7ef0)
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{
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pfx = ((pfx >> 3) & 1) + 1;
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*(long long *) &inst = *(long long *) &inst.half[1];
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}
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else pfx = 0;
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/* Split opcode into format.op1 and look up in appropriate table */
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format = formdecode[inst.byte[0]];
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op1 = (inst.half[0] & opdecode[format].mask) >> opdecode[format].shift;
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if (format == 9)
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{
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if (pfx)
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fmt = formatx;
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else if (inst.f1.j == 0)
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fmt = &format1a[op1];
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else if (inst.f1.j == 1)
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fmt = &format1b[op1];
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else
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fmt = formatx;
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}
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else
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fmt = &opdecode[format].formstr[pfx][op1];
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/* Print it */
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if (fmt->fmt == xxx)
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{
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/* noninstruction */
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fprintf (stream, "0x%04x", pfx ? pfx : inst.half[0]);
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return 2;
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}
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if (pfx)
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pfx = 2;
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fprintf (stream, "%s%s%s", lop[fmt->lop], rop[fmt->rop],
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&" "[strlen(lop[fmt->lop]) + strlen(rop[fmt->rop])]);
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switch (fmt->fmt)
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{
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case rrr: /* three register */
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fprintf (stream, "%s,%s,%s", reg(i,i), reg(j,j), reg(k,k));
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return pfx + 2;
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case rr: /* two register */
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fprintf (stream, "%s,%s", reg(i,j), reg(j,k));
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return pfx + 2;
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case rxr: /* two register, reversed i and j fields */
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fprintf (stream, "%s,%s", reg(i,k), reg(j,j));
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return pfx + 2;
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case r: /* one register */
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fprintf (stream, "%s", reg(i,k));
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return pfx + 2;
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case nops: /* no operands */
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return pfx + 2;
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case nr: /* short immediate, one register */
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fprintf (stream, "#%d,%s", inst.f0.j, reg(i,k));
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return pfx + 2;
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case pcrel: /* pc relative */
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print_address (memaddr + 2 * inst.signed_byte[1], stream);
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return pfx + 2;
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case lr: /* literal, one register */
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fprintf (stream, "%s,%s", lit(i), reg(j,k));
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return pfx + 2;
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case rxl: /* one register, literal */
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fprintf (stream, "%s,%s", reg(i,k), lit(j));
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return pfx + 2;
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case rlr: /* register, literal, register */
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fprintf (stream, "%s,%s,%s", reg(i,j), lit(j), reg(k,k));
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return pfx + 2;
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case rrl: /* register, register, literal */
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fprintf (stream, "%s,%s,%s", reg(i,j), reg(j,k), lit(k));
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return pfx + 2;
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case iml: /* immediate, literal */
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if (inst.f1.len)
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{
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fprintf (stream, "#%#x,%s",
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(inst.signed_half[1] << 16) + inst.half[2], lit(i));
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return pfx + 6;
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}
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else
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{
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fprintf (stream, "#%d,%s", inst.signed_half[1], lit(i));
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return pfx + 4;
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}
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case imr: /* immediate, register */
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if (inst.f1.len)
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{
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fprintf (stream, "#%#x,%s",
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(inst.signed_half[1] << 16) + inst.half[2], reg(i,k));
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return pfx + 6;
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}
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else
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{
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fprintf (stream, "#%d,%s", inst.signed_half[1], reg(i,k));
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return pfx + 4;
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}
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case a1r: /* memory, register */
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l = print_effa (inst, stream);
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fprintf (stream, ",%s", reg(i,k));
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return pfx + l;
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case a1l: /* memory, literal */
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l = print_effa (inst, stream);
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fprintf (stream, ",%s", lit(i));
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return pfx + l;
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case a2r: /* register, memory */
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fprintf (stream, "%s,", reg(i,k));
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return pfx + print_effa (inst, stream);
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case a2l: /* literal, memory */
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fprintf (stream, "%s,", lit(i));
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return pfx + print_effa (inst, stream);
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case a3: /* memory */
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return pfx + print_effa (inst, stream);
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case a4: /* system call */
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l = 29; goto a4a5;
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case a5: /* trap */
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l = 27;
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a4a5:
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if (inst.f1.len)
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{
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unsigned int m = (inst.signed_half[1] << 16) + inst.half[2];
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fprintf (stream, "#%d,#%d", m >> l, m & (-1 >> (32-l)));
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return pfx + 6;
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}
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else
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{
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unsigned int m = inst.signed_half[1];
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fprintf (stream, "#%d,#%d", m >> l, m & (-1 >> (32-l)));
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return pfx + 4;
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}
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}
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}
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/* print effective address @nnn(aj), return instruction length */
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int print_effa (inst, stream)
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union inst inst;
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FILE *stream;
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{
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int n, l;
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if (inst.f1.len)
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{
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n = (inst.signed_half[1] << 16) + inst.half[2];
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l = 6;
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}
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else
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{
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n = inst.signed_half[1];
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l = 4;
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}
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if (inst.f1.indir)
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printf ("@");
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if (!inst.f1.j)
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{
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print_address (n, stream);
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return l;
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}
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fprintf (stream, (n & 0xf0000000) == 0x80000000 ? "%#x(%s)" : "%d(%s)",
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n, aj[inst.f1.j]);
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return l;
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}
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void
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_initialize_convex_dep ()
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