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* elfxx-ia64.c (elfNN_ia64_check_relocs): Handle IPLT relocs.

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(allocate_dynrel_entries): Likewise.
        (elfNN_ia64_relocate_section): Likewise.  Set REL addends correctly.
        (set_pltoff_entry): Likewise.
        (ia64_howto_table): Remove R_IA64_SEGBASE, and R_IA64_EPLT[ML]SB
        (elfNN_ia64_reloc_type_lookup): Likewise.
        (elfNN_ia64_install_value): Likewise.
        (elfNN_ia64_relocate_section): Likewise.
        * reloc.c (BFD_RELOC_IA64_SEGBASE): Remove.
        (BFD_RELOC_IA64_EPLTMSB, BFD_RELOC_IA64_EPLTLSB): Remove.
This commit is contained in:
Richard Henderson
2000-11-16 22:44:07 +00:00
parent 77e913df42
commit 18b27f179e
5 changed files with 323 additions and 284 deletions
Download Patch File Download Diff File Expand all files Collapse all files

13
bfd/ChangeLog
View File

@ -1,3 +1,16 @@
2000-11-16 Richard Henderson <rth@redhat.com>
* elfxx-ia64.c (elfNN_ia64_check_relocs): Handle IPLT relocs.
(allocate_dynrel_entries): Likewise.
(elfNN_ia64_relocate_section): Likewise. Set REL addends correctly.
(set_pltoff_entry): Likewise.
(ia64_howto_table): Remove R_IA64_SEGBASE, and R_IA64_EPLT[ML]SB
(elfNN_ia64_reloc_type_lookup): Likewise.
(elfNN_ia64_install_value): Likewise.
(elfNN_ia64_relocate_section): Likewise.
* reloc.c (BFD_RELOC_IA64_SEGBASE): Remove.
(BFD_RELOC_IA64_EPLTMSB, BFD_RELOC_IA64_EPLTLSB): Remove.
2000-11-16 Kazu Hirata <kazu@hxi.com> 2000-11-16 Kazu Hirata <kazu@hxi.com>
* cpu-a29k.c: Fix formatting. * cpu-a29k.c: Fix formatting.

319
bfd/bfd-in2.h
View File

@ -804,6 +804,7 @@ bfd_make_writable PARAMS ((bfd *abfd));
boolean boolean
bfd_make_readable PARAMS ((bfd *abfd)); bfd_make_readable PARAMS ((bfd *abfd));
/* Byte swapping macros for user section data. */ /* Byte swapping macros for user section data. */
#define bfd_put_8(abfd, val, ptr) \ #define bfd_put_8(abfd, val, ptr) \
@ -856,6 +857,7 @@ bfd_make_readable PARAMS ((bfd *abfd));
: (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \ : (bits) == 64 ? bfd_put_64 (abfd, val, ptr) \
: (abort (), (void) 0)) : (abort (), (void) 0))
/* Byte swapping macros for file header data. */ /* Byte swapping macros for file header data. */
#define bfd_h_put_8(abfd, val, ptr) \ #define bfd_h_put_8(abfd, val, ptr) \
@ -1127,7 +1129,7 @@ typedef struct sec
/* The load address of the section - where it would be in a /* The load address of the section - where it would be in a
rom image; really only used for writing section header rom image; really only used for writing section header
information. */ information. */
bfd_vma lma; bfd_vma lma;
@ -1353,7 +1355,7 @@ enum bfd_architecture
available to machines with higher numbers. available to machines with higher numbers.
The exception is the "ca", which is The exception is the "ca", which is
incompatible with all other machines except incompatible with all other machines except
"core". */ "core". */
#define bfd_mach_i960_core 1 #define bfd_mach_i960_core 1
#define bfd_mach_i960_ka_sa 2 #define bfd_mach_i960_ka_sa 2
@ -1580,22 +1582,22 @@ typedef enum bfd_reloc_status
/* No errors detected */ /* No errors detected */
bfd_reloc_ok, bfd_reloc_ok,
/* The relocation was performed, but there was an overflow. */ /* The relocation was performed, but there was an overflow. */
bfd_reloc_overflow, bfd_reloc_overflow,
/* The address to relocate was not within the section supplied. */ /* The address to relocate was not within the section supplied. */
bfd_reloc_outofrange, bfd_reloc_outofrange,
/* Used by special functions */ /* Used by special functions */
bfd_reloc_continue, bfd_reloc_continue,
/* Unsupported relocation size requested. */ /* Unsupported relocation size requested. */
bfd_reloc_notsupported, bfd_reloc_notsupported,
/* Unused */ /* Unused */
bfd_reloc_other, bfd_reloc_other,
/* The symbol to relocate against was undefined. */ /* The symbol to relocate against was undefined. */
bfd_reloc_undefined, bfd_reloc_undefined,
/* The relocation was performed, but may not be ok - presently /* The relocation was performed, but may not be ok - presently
@ -1606,6 +1608,7 @@ typedef enum bfd_reloc_status
} }
bfd_reloc_status_type; bfd_reloc_status_type;
typedef struct reloc_cache_entry typedef struct reloc_cache_entry
{ {
/* A pointer into the canonical table of pointers */ /* A pointer into the canonical table of pointers */
@ -1623,19 +1626,19 @@ typedef struct reloc_cache_entry
} arelent; } arelent;
enum complain_overflow enum complain_overflow
{ {
/* Do not complain on overflow. */ /* Do not complain on overflow. */
complain_overflow_dont, complain_overflow_dont,
/* Complain if the bitfield overflows, whether it is considered /* Complain if the bitfield overflows, whether it is considered
as signed or unsigned. */ as signed or unsigned. */
complain_overflow_bitfield, complain_overflow_bitfield,
/* Complain if the value overflows when considered as signed /* Complain if the value overflows when considered as signed
number. */ number. */
complain_overflow_signed, complain_overflow_signed,
/* Complain if the value overflows when considered as an /* Complain if the value overflows when considered as an
unsigned number. */ unsigned number. */
complain_overflow_unsigned complain_overflow_unsigned
}; };
@ -1646,7 +1649,7 @@ struct reloc_howto_struct
external idea of what a reloc number is stored external idea of what a reloc number is stored
in this field. For example, a PC relative word relocation in this field. For example, a PC relative word relocation
in a coff environment has the type 023 - because that's in a coff environment has the type 023 - because that's
what the outside world calls a R_PCRWORD reloc. */ what the outside world calls a R_PCRWORD reloc. */
unsigned int type; unsigned int type;
/* The value the final relocation is shifted right by. This drops /* The value the final relocation is shifted right by. This drops
@ -1665,21 +1668,21 @@ struct reloc_howto_struct
/* Notes that the relocation is relative to the location in the /* Notes that the relocation is relative to the location in the
data section of the addend. The relocation function will data section of the addend. The relocation function will
subtract from the relocation value the address of the location subtract from the relocation value the address of the location
being relocated. */ being relocated. */
boolean pc_relative; boolean pc_relative;
/* The bit position of the reloc value in the destination. /* The bit position of the reloc value in the destination.
The relocated value is left shifted by this amount. */ The relocated value is left shifted by this amount. */
unsigned int bitpos; unsigned int bitpos;
/* What type of overflow error should be checked for when /* What type of overflow error should be checked for when
relocating. */ relocating. */
enum complain_overflow complain_on_overflow; enum complain_overflow complain_on_overflow;
/* If this field is non null, then the supplied function is /* If this field is non null, then the supplied function is
called rather than the normal function. This allows really called rather than the normal function. This allows really
strange relocation methods to be accomodated (e.g., i960 callj strange relocation methods to be accomodated (e.g., i960 callj
instructions). */ instructions). */
bfd_reloc_status_type (*special_function) bfd_reloc_status_type (*special_function)
PARAMS ((bfd *abfd, PARAMS ((bfd *abfd,
arelent *reloc_entry, arelent *reloc_entry,
@ -1689,7 +1692,7 @@ struct reloc_howto_struct
bfd *output_bfd, bfd *output_bfd,
char **error_message)); char **error_message));
/* The textual name of the relocation type. */ /* The textual name of the relocation type. */
char *name; char *name;
/* Some formats record a relocation addend in the section contents /* Some formats record a relocation addend in the section contents
@ -1715,7 +1718,7 @@ struct reloc_howto_struct
0x000000ff. When we have relocs which have an addend, such as 0x000000ff. When we have relocs which have an addend, such as
sun4 extended relocs, the value in the offset part of a sun4 extended relocs, the value in the offset part of a
relocating field is garbage so we never use it. In this case relocating field is garbage so we never use it. In this case
the mask would be 0x00000000. */ the mask would be 0x00000000. */
bfd_vma src_mask; bfd_vma src_mask;
/* The dst_mask selects which parts of the instruction are replaced /* The dst_mask selects which parts of the instruction are replaced
@ -1789,7 +1792,8 @@ bfd_install_relocation
enum bfd_reloc_code_real { enum bfd_reloc_code_real {
_dummy_first_bfd_reloc_code_real, _dummy_first_bfd_reloc_code_real,
/* Basic absolute relocations of N bits. */
/* Basic absolute relocations of N bits. */
BFD_RELOC_64, BFD_RELOC_64,
BFD_RELOC_32, BFD_RELOC_32,
BFD_RELOC_26, BFD_RELOC_26,
@ -1802,7 +1806,7 @@ enum bfd_reloc_code_real {
of the relocation itself; sometimes they are relative to the start of of the relocation itself; sometimes they are relative to the start of
the section containing the relocation. It depends on the specific target. the section containing the relocation. It depends on the specific target.
The 24-bit relocation is used in some Intel 960 configurations. */ The 24-bit relocation is used in some Intel 960 configurations. */
BFD_RELOC_64_PCREL, BFD_RELOC_64_PCREL,
BFD_RELOC_32_PCREL, BFD_RELOC_32_PCREL,
BFD_RELOC_24_PCREL, BFD_RELOC_24_PCREL,
@ -1810,7 +1814,7 @@ The 24-bit relocation is used in some Intel 960 configurations. */
BFD_RELOC_12_PCREL, BFD_RELOC_12_PCREL,
BFD_RELOC_8_PCREL, BFD_RELOC_8_PCREL,
/* For ELF. */ /* For ELF. */
BFD_RELOC_32_GOT_PCREL, BFD_RELOC_32_GOT_PCREL,
BFD_RELOC_16_GOT_PCREL, BFD_RELOC_16_GOT_PCREL,
BFD_RELOC_8_GOT_PCREL, BFD_RELOC_8_GOT_PCREL,
@ -1831,12 +1835,12 @@ The 24-bit relocation is used in some Intel 960 configurations. */
BFD_RELOC_HI16_S_PLTOFF, BFD_RELOC_HI16_S_PLTOFF,
BFD_RELOC_8_PLTOFF, BFD_RELOC_8_PLTOFF,
/* Relocations used by 68K ELF. */ /* Relocations used by 68K ELF. */
BFD_RELOC_68K_GLOB_DAT, BFD_RELOC_68K_GLOB_DAT,
BFD_RELOC_68K_JMP_SLOT, BFD_RELOC_68K_JMP_SLOT,
BFD_RELOC_68K_RELATIVE, BFD_RELOC_68K_RELATIVE,
/* Linkage-table relative. */ /* Linkage-table relative. */
BFD_RELOC_32_BASEREL, BFD_RELOC_32_BASEREL,
BFD_RELOC_16_BASEREL, BFD_RELOC_16_BASEREL,
BFD_RELOC_LO16_BASEREL, BFD_RELOC_LO16_BASEREL,
@ -1845,7 +1849,7 @@ The 24-bit relocation is used in some Intel 960 configurations. */
BFD_RELOC_8_BASEREL, BFD_RELOC_8_BASEREL,
BFD_RELOC_RVA, BFD_RELOC_RVA,
/* Absolute 8-bit relocation, but used to form an address like 0xFFnn. */ /* Absolute 8-bit relocation, but used to form an address like 0xFFnn. */
BFD_RELOC_8_FFnn, BFD_RELOC_8_FFnn,
/* These PC-relative relocations are stored as word displacements -- /* These PC-relative relocations are stored as word displacements --
@ -1853,28 +1857,28 @@ i.e., byte displacements shifted right two bits. The 30-bit word
displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the displacement (<<32_PCREL_S2>> -- 32 bits, shifted 2) is used on the
SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The SPARC. (SPARC tools generally refer to this as <<WDISP30>>.) The
signed 16-bit displacement is used on the MIPS, and the 23-bit signed 16-bit displacement is used on the MIPS, and the 23-bit
displacement is used on the Alpha. */ displacement is used on the Alpha. */
BFD_RELOC_32_PCREL_S2, BFD_RELOC_32_PCREL_S2,
BFD_RELOC_16_PCREL_S2, BFD_RELOC_16_PCREL_S2,
BFD_RELOC_23_PCREL_S2, BFD_RELOC_23_PCREL_S2,
/* High 22 bits and low 10 bits of 32-bit value, placed into lower bits of /* High 22 bits and low 10 bits of 32-bit value, placed into lower bits of
the target word. These are used on the SPARC. */ the target word. These are used on the SPARC. */
BFD_RELOC_HI22, BFD_RELOC_HI22,
BFD_RELOC_LO10, BFD_RELOC_LO10,
/* For systems that allocate a Global Pointer register, these are /* For systems that allocate a Global Pointer register, these are
displacements off that register. These relocation types are displacements off that register. These relocation types are
handled specially, because the value the register will have is handled specially, because the value the register will have is
decided relatively late. */ decided relatively late. */
BFD_RELOC_GPREL16, BFD_RELOC_GPREL16,
BFD_RELOC_GPREL32, BFD_RELOC_GPREL32,
/* Reloc types used for i960/b.out. */ /* Reloc types used for i960/b.out. */
BFD_RELOC_I960_CALLJ, BFD_RELOC_I960_CALLJ,
/* SPARC ELF relocations. There is probably some overlap with other /* SPARC ELF relocations. There is probably some overlap with other
relocation types already defined. */ relocation types already defined. */
BFD_RELOC_NONE, BFD_RELOC_NONE,
BFD_RELOC_SPARC_WDISP22, BFD_RELOC_SPARC_WDISP22,
BFD_RELOC_SPARC22, BFD_RELOC_SPARC22,
@ -1891,7 +1895,7 @@ relocation types already defined. */
BFD_RELOC_SPARC_RELATIVE, BFD_RELOC_SPARC_RELATIVE,
BFD_RELOC_SPARC_UA32, BFD_RELOC_SPARC_UA32,
/* I think these are specific to SPARC a.out (e.g., Sun 4). */ /* I think these are specific to SPARC a.out (e.g., Sun 4). */
BFD_RELOC_SPARC_BASE13, BFD_RELOC_SPARC_BASE13,
BFD_RELOC_SPARC_BASE22, BFD_RELOC_SPARC_BASE22,
@ -1928,18 +1932,18 @@ relocation types already defined. */
For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when For GPDISP_HI16 ("gpdisp") relocations, the symbol is ignored when
writing; when reading, it will be the absolute section symbol. The writing; when reading, it will be the absolute section symbol. The
addend is the displacement in bytes of the "lda" instruction from addend is the displacement in bytes of the "lda" instruction from
the "ldah" instruction (which is at the address of this reloc). */ the "ldah" instruction (which is at the address of this reloc). */
BFD_RELOC_ALPHA_GPDISP_HI16, BFD_RELOC_ALPHA_GPDISP_HI16,
/* For GPDISP_LO16 ("ignore") relocations, the symbol is handled as /* For GPDISP_LO16 ("ignore") relocations, the symbol is handled as
with GPDISP_HI16 relocs. The addend is ignored when writing the with GPDISP_HI16 relocs. The addend is ignored when writing the
relocations out, and is filled in with the file's GP value on relocations out, and is filled in with the file's GP value on
reading, for convenience. */ reading, for convenience. */
BFD_RELOC_ALPHA_GPDISP_LO16, BFD_RELOC_ALPHA_GPDISP_LO16,
/* The ELF GPDISP relocation is exactly the same as the GPDISP_HI16 /* The ELF GPDISP relocation is exactly the same as the GPDISP_HI16
relocation except that there is no accompanying GPDISP_LO16 relocation except that there is no accompanying GPDISP_LO16
relocation. */ relocation. */
BFD_RELOC_ALPHA_GPDISP, BFD_RELOC_ALPHA_GPDISP,
/* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference; /* The Alpha LITERAL/LITUSE relocs are produced by a symbol reference;
@ -1966,14 +1970,14 @@ of instruction using the register:
2 - byte-manipulation (byte offset reg) 2 - byte-manipulation (byte offset reg)
3 - jsr (target of branch) 3 - jsr (target of branch)
The GNU linker currently doesn't do any of this optimizing. */ The GNU linker currently doesn't do any of this optimizing. */
BFD_RELOC_ALPHA_LITERAL, BFD_RELOC_ALPHA_LITERAL,
BFD_RELOC_ALPHA_ELF_LITERAL, BFD_RELOC_ALPHA_ELF_LITERAL,
BFD_RELOC_ALPHA_LITUSE, BFD_RELOC_ALPHA_LITUSE,
/* The BFD_RELOC_ALPHA_USER_* relocations are used by the assembler to /* The BFD_RELOC_ALPHA_USER_* relocations are used by the assembler to
process the explicit !<reloc>!sequence relocations, and are mapped process the explicit !<reloc>!sequence relocations, and are mapped
into the normal relocations at the end of processing. */ into the normal relocations at the end of processing. */
BFD_RELOC_ALPHA_USER_LITERAL, BFD_RELOC_ALPHA_USER_LITERAL,
BFD_RELOC_ALPHA_USER_LITUSE_BASE, BFD_RELOC_ALPHA_USER_LITUSE_BASE,
BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF, BFD_RELOC_ALPHA_USER_LITUSE_BYTOFF,
@ -1984,52 +1988,52 @@ into the normal relocations at the end of processing. */
/* The HINT relocation indicates a value that should be filled into the /* The HINT relocation indicates a value that should be filled into the
"hint" field of a jmp/jsr/ret instruction, for possible branch- "hint" field of a jmp/jsr/ret instruction, for possible branch-
prediction logic which may be provided on some processors. */ prediction logic which may be provided on some processors. */
BFD_RELOC_ALPHA_HINT, BFD_RELOC_ALPHA_HINT,
/* The LINKAGE relocation outputs a linkage pair in the object file, /* The LINKAGE relocation outputs a linkage pair in the object file,
which is filled by the linker. */ which is filled by the linker. */
BFD_RELOC_ALPHA_LINKAGE, BFD_RELOC_ALPHA_LINKAGE,
/* The CODEADDR relocation outputs a STO_CA in the object file, /* The CODEADDR relocation outputs a STO_CA in the object file,
which is filled by the linker. */ which is filled by the linker. */
BFD_RELOC_ALPHA_CODEADDR, BFD_RELOC_ALPHA_CODEADDR,
/* Bits 27..2 of the relocation address shifted right 2 bits; /* Bits 27..2 of the relocation address shifted right 2 bits;
simple reloc otherwise. */ simple reloc otherwise. */
BFD_RELOC_MIPS_JMP, BFD_RELOC_MIPS_JMP,
/* The MIPS16 jump instruction. */ /* The MIPS16 jump instruction. */
BFD_RELOC_MIPS16_JMP, BFD_RELOC_MIPS16_JMP,
/* MIPS16 GP relative reloc. */ /* MIPS16 GP relative reloc. */
BFD_RELOC_MIPS16_GPREL, BFD_RELOC_MIPS16_GPREL,
/* High 16 bits of 32-bit value; simple reloc. */ /* High 16 bits of 32-bit value; simple reloc. */
BFD_RELOC_HI16, BFD_RELOC_HI16,
/* High 16 bits of 32-bit value but the low 16 bits will be sign /* High 16 bits of 32-bit value but the low 16 bits will be sign
extended and added to form the final result. If the low 16 extended and added to form the final result. If the low 16
bits form a negative number, we need to add one to the high value bits form a negative number, we need to add one to the high value
to compensate for the borrow when the low bits are added. */ to compensate for the borrow when the low bits are added. */
BFD_RELOC_HI16_S, BFD_RELOC_HI16_S,
/* Low 16 bits. */ /* Low 16 bits. */
BFD_RELOC_LO16, BFD_RELOC_LO16,
/* Like BFD_RELOC_HI16_S, but PC relative. */ /* Like BFD_RELOC_HI16_S, but PC relative. */
BFD_RELOC_PCREL_HI16_S, BFD_RELOC_PCREL_HI16_S,
/* Like BFD_RELOC_LO16, but PC relative. */ /* Like BFD_RELOC_LO16, but PC relative. */
BFD_RELOC_PCREL_LO16, BFD_RELOC_PCREL_LO16,
/* Relocation relative to the global pointer. */ /* Relocation relative to the global pointer. */
#define BFD_RELOC_MIPS_GPREL BFD_RELOC_GPREL16 #define BFD_RELOC_MIPS_GPREL BFD_RELOC_GPREL16
/* Relocation against a MIPS literal section. */ /* Relocation against a MIPS literal section. */
BFD_RELOC_MIPS_LITERAL, BFD_RELOC_MIPS_LITERAL,
/* MIPS ELF relocations. */ /* MIPS ELF relocations. */
BFD_RELOC_MIPS_GOT16, BFD_RELOC_MIPS_GOT16,
BFD_RELOC_MIPS_CALL16, BFD_RELOC_MIPS_CALL16,
#define BFD_RELOC_MIPS_GPREL32 BFD_RELOC_GPREL32 #define BFD_RELOC_MIPS_GPREL32 BFD_RELOC_GPREL32
@ -2042,6 +2046,7 @@ to compensate for the borrow when the low bits are added. */
BFD_RELOC_MIPS_GOT_OFST, BFD_RELOC_MIPS_GOT_OFST,
BFD_RELOC_MIPS_GOT_DISP, BFD_RELOC_MIPS_GOT_DISP,
/* i386/elf relocations */ /* i386/elf relocations */
BFD_RELOC_386_GOT32, BFD_RELOC_386_GOT32,
BFD_RELOC_386_PLT32, BFD_RELOC_386_PLT32,
@ -2066,7 +2071,7 @@ to compensate for the borrow when the low bits are added. */
BFD_RELOC_NS32K_DISP_16_PCREL, BFD_RELOC_NS32K_DISP_16_PCREL,
BFD_RELOC_NS32K_DISP_32_PCREL, BFD_RELOC_NS32K_DISP_32_PCREL,
/* Picojava relocs. Not all of these appear in object files. */ /* Picojava relocs. Not all of these appear in object files. */
BFD_RELOC_PJ_CODE_HI16, BFD_RELOC_PJ_CODE_HI16,
BFD_RELOC_PJ_CODE_LO16, BFD_RELOC_PJ_CODE_LO16,
BFD_RELOC_PJ_CODE_DIR16, BFD_RELOC_PJ_CODE_DIR16,
@ -2074,7 +2079,7 @@ to compensate for the borrow when the low bits are added. */
BFD_RELOC_PJ_CODE_REL16, BFD_RELOC_PJ_CODE_REL16,
BFD_RELOC_PJ_CODE_REL32, BFD_RELOC_PJ_CODE_REL32,
/* Power(rs6000) and PowerPC relocations. */ /* Power(rs6000) and PowerPC relocations. */
BFD_RELOC_PPC_B26, BFD_RELOC_PPC_B26,
BFD_RELOC_PPC_BA26, BFD_RELOC_PPC_BA26,
BFD_RELOC_PPC_TOC16, BFD_RELOC_PPC_TOC16,
@ -2111,25 +2116,25 @@ to compensate for the borrow when the low bits are added. */
/* The type of reloc used to build a contructor table - at the moment /* The type of reloc used to build a contructor table - at the moment
probably a 32 bit wide absolute relocation, but the target can choose. probably a 32 bit wide absolute relocation, but the target can choose.
It generally does map to one of the other relocation types. */ It generally does map to one of the other relocation types. */
BFD_RELOC_CTOR, BFD_RELOC_CTOR,
/* ARM 26 bit pc-relative branch. The lowest two bits must be zero and are /* ARM 26 bit pc-relative branch. The lowest two bits must be zero and are
not stored in the instruction. */ not stored in the instruction. */
BFD_RELOC_ARM_PCREL_BRANCH, BFD_RELOC_ARM_PCREL_BRANCH,
/* ARM 26 bit pc-relative branch. The lowest bit must be zero and is /* ARM 26 bit pc-relative branch. The lowest bit must be zero and is
not stored in the instruction. The 2nd lowest bit comes from a 1 bit not stored in the instruction. The 2nd lowest bit comes from a 1 bit
field in the instruction. */ field in the instruction. */
BFD_RELOC_ARM_PCREL_BLX, BFD_RELOC_ARM_PCREL_BLX,
/* Thumb 22 bit pc-relative branch. The lowest bit must be zero and is /* Thumb 22 bit pc-relative branch. The lowest bit must be zero and is
not stored in the instruction. The 2nd lowest bit comes from a 1 bit not stored in the instruction. The 2nd lowest bit comes from a 1 bit
field in the instruction. */ field in the instruction. */
BFD_RELOC_THUMB_PCREL_BLX, BFD_RELOC_THUMB_PCREL_BLX,
/* These relocs are only used within the ARM assembler. They are not /* These relocs are only used within the ARM assembler. They are not
(at present) written to any object files. */ (at present) written to any object files. */
BFD_RELOC_ARM_IMMEDIATE, BFD_RELOC_ARM_IMMEDIATE,
BFD_RELOC_ARM_ADRL_IMMEDIATE, BFD_RELOC_ARM_ADRL_IMMEDIATE,
BFD_RELOC_ARM_OFFSET_IMM, BFD_RELOC_ARM_OFFSET_IMM,
@ -2157,7 +2162,7 @@ field in the instruction. */
BFD_RELOC_ARM_GOTOFF, BFD_RELOC_ARM_GOTOFF,
BFD_RELOC_ARM_GOTPC, BFD_RELOC_ARM_GOTPC,
/* Hitachi SH relocs. Not all of these appear in object files. */ /* Hitachi SH relocs. Not all of these appear in object files. */
BFD_RELOC_SH_PCDISP8BY2, BFD_RELOC_SH_PCDISP8BY2,
BFD_RELOC_SH_PCDISP12BY2, BFD_RELOC_SH_PCDISP12BY2,
BFD_RELOC_SH_IMM4, BFD_RELOC_SH_IMM4,
@ -2185,7 +2190,7 @@ field in the instruction. */
BFD_RELOC_SH_GOTPC, BFD_RELOC_SH_GOTPC,
/* Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must /* Thumb 23-, 12- and 9-bit pc-relative branches. The lowest bit must
be zero and is not stored in the instruction. */ be zero and is not stored in the instruction. */
BFD_RELOC_THUMB_PCREL_BRANCH9, BFD_RELOC_THUMB_PCREL_BRANCH9,
BFD_RELOC_THUMB_PCREL_BRANCH12, BFD_RELOC_THUMB_PCREL_BRANCH12,
BFD_RELOC_THUMB_PCREL_BRANCH23, BFD_RELOC_THUMB_PCREL_BRANCH23,
@ -2193,108 +2198,108 @@ be zero and is not stored in the instruction. */
/* Argonaut RISC Core (ARC) relocs. /* Argonaut RISC Core (ARC) relocs.
ARC 22 bit pc-relative branch. The lowest two bits must be zero and are ARC 22 bit pc-relative branch. The lowest two bits must be zero and are
not stored in the instruction. The high 20 bits are installed in bits 26 not stored in the instruction. The high 20 bits are installed in bits 26
through 7 of the instruction. */ through 7 of the instruction. */
BFD_RELOC_ARC_B22_PCREL, BFD_RELOC_ARC_B22_PCREL,
/* ARC 26 bit absolute branch. The lowest two bits must be zero and are not /* ARC 26 bit absolute branch. The lowest two bits must be zero and are not
stored in the instruction. The high 24 bits are installed in bits 23 stored in the instruction. The high 24 bits are installed in bits 23
through 0. */ through 0. */
BFD_RELOC_ARC_B26, BFD_RELOC_ARC_B26,
/* Mitsubishi D10V relocs. /* Mitsubishi D10V relocs.
This is a 10-bit reloc with the right 2 bits This is a 10-bit reloc with the right 2 bits
assumed to be 0. */ assumed to be 0. */
BFD_RELOC_D10V_10_PCREL_R, BFD_RELOC_D10V_10_PCREL_R,
/* Mitsubishi D10V relocs. /* Mitsubishi D10V relocs.
This is a 10-bit reloc with the right 2 bits This is a 10-bit reloc with the right 2 bits
assumed to be 0. This is the same as the previous reloc assumed to be 0. This is the same as the previous reloc
except it is in the left container, i.e., except it is in the left container, i.e.,
shifted left 15 bits. */ shifted left 15 bits. */
BFD_RELOC_D10V_10_PCREL_L, BFD_RELOC_D10V_10_PCREL_L,
/* This is an 18-bit reloc with the right 2 bits /* This is an 18-bit reloc with the right 2 bits
assumed to be 0. */ assumed to be 0. */
BFD_RELOC_D10V_18, BFD_RELOC_D10V_18,
/* This is an 18-bit reloc with the right 2 bits /* This is an 18-bit reloc with the right 2 bits
assumed to be 0. */ assumed to be 0. */
BFD_RELOC_D10V_18_PCREL, BFD_RELOC_D10V_18_PCREL,
/* Mitsubishi D30V relocs. /* Mitsubishi D30V relocs.
This is a 6-bit absolute reloc. */ This is a 6-bit absolute reloc. */
BFD_RELOC_D30V_6, BFD_RELOC_D30V_6,
/* This is a 6-bit pc-relative reloc with /* This is a 6-bit pc-relative reloc with
the right 3 bits assumed to be 0. */ the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_9_PCREL, BFD_RELOC_D30V_9_PCREL,
/* This is a 6-bit pc-relative reloc with /* This is a 6-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side as the previous reloc but on the right side
of the container. */ of the container. */
BFD_RELOC_D30V_9_PCREL_R, BFD_RELOC_D30V_9_PCREL_R,
/* This is a 12-bit absolute reloc with the /* This is a 12-bit absolute reloc with the
right 3 bitsassumed to be 0. */ right 3 bitsassumed to be 0. */
BFD_RELOC_D30V_15, BFD_RELOC_D30V_15,
/* This is a 12-bit pc-relative reloc with /* This is a 12-bit pc-relative reloc with
the right 3 bits assumed to be 0. */ the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_15_PCREL, BFD_RELOC_D30V_15_PCREL,
/* This is a 12-bit pc-relative reloc with /* This is a 12-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side as the previous reloc but on the right side
of the container. */ of the container. */
BFD_RELOC_D30V_15_PCREL_R, BFD_RELOC_D30V_15_PCREL_R,
/* This is an 18-bit absolute reloc with /* This is an 18-bit absolute reloc with
the right 3 bits assumed to be 0. */ the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_21, BFD_RELOC_D30V_21,
/* This is an 18-bit pc-relative reloc with /* This is an 18-bit pc-relative reloc with
the right 3 bits assumed to be 0. */ the right 3 bits assumed to be 0. */
BFD_RELOC_D30V_21_PCREL, BFD_RELOC_D30V_21_PCREL,
/* This is an 18-bit pc-relative reloc with /* This is an 18-bit pc-relative reloc with
the right 3 bits assumed to be 0. Same the right 3 bits assumed to be 0. Same
as the previous reloc but on the right side as the previous reloc but on the right side
of the container. */ of the container. */
BFD_RELOC_D30V_21_PCREL_R, BFD_RELOC_D30V_21_PCREL_R,
/* This is a 32-bit absolute reloc. */ /* This is a 32-bit absolute reloc. */
BFD_RELOC_D30V_32, BFD_RELOC_D30V_32,
/* This is a 32-bit pc-relative reloc. */ /* This is a 32-bit pc-relative reloc. */
BFD_RELOC_D30V_32_PCREL, BFD_RELOC_D30V_32_PCREL,
/* Mitsubishi M32R relocs. /* Mitsubishi M32R relocs.
This is a 24 bit absolute address. */ This is a 24 bit absolute address. */
BFD_RELOC_M32R_24, BFD_RELOC_M32R_24,
/* This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0. */ /* This is a 10-bit pc-relative reloc with the right 2 bits assumed to be 0. */
BFD_RELOC_M32R_10_PCREL, BFD_RELOC_M32R_10_PCREL,
/* This is an 18-bit reloc with the right 2 bits assumed to be 0. */ /* This is an 18-bit reloc with the right 2 bits assumed to be 0. */
BFD_RELOC_M32R_18_PCREL, BFD_RELOC_M32R_18_PCREL,
/* This is a 26-bit reloc with the right 2 bits assumed to be 0. */ /* This is a 26-bit reloc with the right 2 bits assumed to be 0. */
BFD_RELOC_M32R_26_PCREL, BFD_RELOC_M32R_26_PCREL,
/* This is a 16-bit reloc containing the high 16 bits of an address /* This is a 16-bit reloc containing the high 16 bits of an address
used when the lower 16 bits are treated as unsigned. */ used when the lower 16 bits are treated as unsigned. */
BFD_RELOC_M32R_HI16_ULO, BFD_RELOC_M32R_HI16_ULO,
/* This is a 16-bit reloc containing the high 16 bits of an address /* This is a 16-bit reloc containing the high 16 bits of an address
used when the lower 16 bits are treated as signed. */ used when the lower 16 bits are treated as signed. */
BFD_RELOC_M32R_HI16_SLO, BFD_RELOC_M32R_HI16_SLO,
/* This is a 16-bit reloc containing the lower 16 bits of an address. */ /* This is a 16-bit reloc containing the lower 16 bits of an address. */
BFD_RELOC_M32R_LO16, BFD_RELOC_M32R_LO16,
/* This is a 16-bit reloc containing the small data area offset for use in /* This is a 16-bit reloc containing the small data area offset for use in
add3, load, and store instructions. */ add3, load, and store instructions. */
BFD_RELOC_M32R_SDA16, BFD_RELOC_M32R_SDA16,
/* This is a 9-bit reloc */ /* This is a 9-bit reloc */
@ -2303,123 +2308,124 @@ add3, load, and store instructions. */
/* This is a 22-bit reloc */ /* This is a 22-bit reloc */
BFD_RELOC_V850_22_PCREL, BFD_RELOC_V850_22_PCREL,
/* This is a 16 bit offset from the short data area pointer. */ /* This is a 16 bit offset from the short data area pointer. */
BFD_RELOC_V850_SDA_16_16_OFFSET, BFD_RELOC_V850_SDA_16_16_OFFSET,
/* This is a 16 bit offset (of which only 15 bits are used) from the /* This is a 16 bit offset (of which only 15 bits are used) from the
short data area pointer. */ short data area pointer. */
BFD_RELOC_V850_SDA_15_16_OFFSET, BFD_RELOC_V850_SDA_15_16_OFFSET,
/* This is a 16 bit offset from the zero data area pointer. */ /* This is a 16 bit offset from the zero data area pointer. */
BFD_RELOC_V850_ZDA_16_16_OFFSET, BFD_RELOC_V850_ZDA_16_16_OFFSET,
/* This is a 16 bit offset (of which only 15 bits are used) from the /* This is a 16 bit offset (of which only 15 bits are used) from the
zero data area pointer. */ zero data area pointer. */
BFD_RELOC_V850_ZDA_15_16_OFFSET, BFD_RELOC_V850_ZDA_15_16_OFFSET,
/* This is an 8 bit offset (of which only 6 bits are used) from the /* This is an 8 bit offset (of which only 6 bits are used) from the
tiny data area pointer. */ tiny data area pointer. */
BFD_RELOC_V850_TDA_6_8_OFFSET, BFD_RELOC_V850_TDA_6_8_OFFSET,
/* This is an 8bit offset (of which only 7 bits are used) from the tiny /* This is an 8bit offset (of which only 7 bits are used) from the tiny
data area pointer. */ data area pointer. */
BFD_RELOC_V850_TDA_7_8_OFFSET, BFD_RELOC_V850_TDA_7_8_OFFSET,
/* This is a 7 bit offset from the tiny data area pointer. */ /* This is a 7 bit offset from the tiny data area pointer. */
BFD_RELOC_V850_TDA_7_7_OFFSET, BFD_RELOC_V850_TDA_7_7_OFFSET,
/* This is a 16 bit offset from the tiny data area pointer. */ /* This is a 16 bit offset from the tiny data area pointer. */
BFD_RELOC_V850_TDA_16_16_OFFSET, BFD_RELOC_V850_TDA_16_16_OFFSET,
/* This is a 5 bit offset (of which only 4 bits are used) from the tiny /* This is a 5 bit offset (of which only 4 bits are used) from the tiny
data area pointer. */ data area pointer. */
BFD_RELOC_V850_TDA_4_5_OFFSET, BFD_RELOC_V850_TDA_4_5_OFFSET,
/* This is a 4 bit offset from the tiny data area pointer. */ /* This is a 4 bit offset from the tiny data area pointer. */
BFD_RELOC_V850_TDA_4_4_OFFSET, BFD_RELOC_V850_TDA_4_4_OFFSET,
/* This is a 16 bit offset from the short data area pointer, with the /* This is a 16 bit offset from the short data area pointer, with the
bits placed non-contigously in the instruction. */ bits placed non-contigously in the instruction. */
BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET, BFD_RELOC_V850_SDA_16_16_SPLIT_OFFSET,
/* This is a 16 bit offset from the zero data area pointer, with the /* This is a 16 bit offset from the zero data area pointer, with the
bits placed non-contigously in the instruction. */ bits placed non-contigously in the instruction. */
BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET, BFD_RELOC_V850_ZDA_16_16_SPLIT_OFFSET,
/* This is a 6 bit offset from the call table base pointer. */ /* This is a 6 bit offset from the call table base pointer. */
BFD_RELOC_V850_CALLT_6_7_OFFSET, BFD_RELOC_V850_CALLT_6_7_OFFSET,
/* This is a 16 bit offset from the call table base pointer. */ /* This is a 16 bit offset from the call table base pointer. */
BFD_RELOC_V850_CALLT_16_16_OFFSET, BFD_RELOC_V850_CALLT_16_16_OFFSET,
/* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the /* This is a 32bit pcrel reloc for the mn10300, offset by two bytes in the
instruction. */ instruction. */
BFD_RELOC_MN10300_32_PCREL, BFD_RELOC_MN10300_32_PCREL,
/* This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the /* This is a 16bit pcrel reloc for the mn10300, offset by two bytes in the
instruction. */ instruction. */
BFD_RELOC_MN10300_16_PCREL, BFD_RELOC_MN10300_16_PCREL,
/* This is a 8bit DP reloc for the tms320c30, where the most /* This is a 8bit DP reloc for the tms320c30, where the most
significant 8 bits of a 24 bit word are placed into the least significant 8 bits of a 24 bit word are placed into the least
significant 8 bits of the opcode. */ significant 8 bits of the opcode. */
BFD_RELOC_TIC30_LDP, BFD_RELOC_TIC30_LDP,
/* This is a 7bit reloc for the tms320c54x, where the least /* This is a 7bit reloc for the tms320c54x, where the least
significant 7 bits of a 16 bit word are placed into the least significant 7 bits of a 16 bit word are placed into the least
significant 7 bits of the opcode. */ significant 7 bits of the opcode. */
BFD_RELOC_TIC54X_PARTLS7, BFD_RELOC_TIC54X_PARTLS7,
/* This is a 9bit DP reloc for the tms320c54x, where the most /* This is a 9bit DP reloc for the tms320c54x, where the most
significant 9 bits of a 16 bit word are placed into the least significant 9 bits of a 16 bit word are placed into the least
significant 9 bits of the opcode. */ significant 9 bits of the opcode. */
BFD_RELOC_TIC54X_PARTMS9, BFD_RELOC_TIC54X_PARTMS9,
/* This is an extended address 23-bit reloc for the tms320c54x. */ /* This is an extended address 23-bit reloc for the tms320c54x. */
BFD_RELOC_TIC54X_23, BFD_RELOC_TIC54X_23,
/* This is a 16-bit reloc for the tms320c54x, where the least /* This is a 16-bit reloc for the tms320c54x, where the least
significant 16 bits of a 23-bit extended address are placed into significant 16 bits of a 23-bit extended address are placed into
the opcode. */ the opcode. */
BFD_RELOC_TIC54X_16_OF_23, BFD_RELOC_TIC54X_16_OF_23,
/* This is a reloc for the tms320c54x, where the most /* This is a reloc for the tms320c54x, where the most
significant 7 bits of a 23-bit extended address are placed into significant 7 bits of a 23-bit extended address are placed into
the opcode. */ the opcode. */
BFD_RELOC_TIC54X_MS7_OF_23, BFD_RELOC_TIC54X_MS7_OF_23,
/* This is a 48 bit reloc for the FR30 that stores 32 bits. */ /* This is a 48 bit reloc for the FR30 that stores 32 bits. */
BFD_RELOC_FR30_48, BFD_RELOC_FR30_48,
/* This is a 32 bit reloc for the FR30 that stores 20 bits split up into /* This is a 32 bit reloc for the FR30 that stores 20 bits split up into
two sections. */ two sections. */
BFD_RELOC_FR30_20, BFD_RELOC_FR30_20,
/* This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in /* This is a 16 bit reloc for the FR30 that stores a 6 bit word offset in
4 bits. */ 4 bits. */
BFD_RELOC_FR30_6_IN_4, BFD_RELOC_FR30_6_IN_4,
/* This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset /* This is a 16 bit reloc for the FR30 that stores an 8 bit byte offset
into 8 bits. */ into 8 bits. */
BFD_RELOC_FR30_8_IN_8, BFD_RELOC_FR30_8_IN_8,
/* This is a 16 bit reloc for the FR30 that stores a 9 bit short offset /* This is a 16 bit reloc for the FR30 that stores a 9 bit short offset
into 8 bits. */ into 8 bits. */
BFD_RELOC_FR30_9_IN_8, BFD_RELOC_FR30_9_IN_8,
/* This is a 16 bit reloc for the FR30 that stores a 10 bit word offset /* This is a 16 bit reloc for the FR30 that stores a 10 bit word offset
into 8 bits. */ into 8 bits. */
BFD_RELOC_FR30_10_IN_8, BFD_RELOC_FR30_10_IN_8,
/* This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative /* This is a 16 bit reloc for the FR30 that stores a 9 bit pc relative
short offset into 8 bits. */ short offset into 8 bits. */
BFD_RELOC_FR30_9_PCREL, BFD_RELOC_FR30_9_PCREL,
/* This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative /* This is a 16 bit reloc for the FR30 that stores a 12 bit pc relative
short offset into 11 bits. */ short offset into 11 bits. */
BFD_RELOC_FR30_12_PCREL, BFD_RELOC_FR30_12_PCREL,
/* Motorola Mcore relocations. */ /* Motorola Mcore relocations. */
BFD_RELOC_MCORE_PCREL_IMM8BY4, BFD_RELOC_MCORE_PCREL_IMM8BY4,
BFD_RELOC_MCORE_PCREL_IMM11BY2, BFD_RELOC_MCORE_PCREL_IMM11BY2,
BFD_RELOC_MCORE_PCREL_IMM4BY2, BFD_RELOC_MCORE_PCREL_IMM4BY2,
@ -2428,71 +2434,71 @@ short offset into 11 bits. */
BFD_RELOC_MCORE_RVA, BFD_RELOC_MCORE_RVA,
/* This is a 16 bit reloc for the AVR that stores 8 bit pc relative /* This is a 16 bit reloc for the AVR that stores 8 bit pc relative
short offset into 7 bits. */ short offset into 7 bits. */
BFD_RELOC_AVR_7_PCREL, BFD_RELOC_AVR_7_PCREL,
/* This is a 16 bit reloc for the AVR that stores 13 bit pc relative /* This is a 16 bit reloc for the AVR that stores 13 bit pc relative
short offset into 12 bits. */ short offset into 12 bits. */
BFD_RELOC_AVR_13_PCREL, BFD_RELOC_AVR_13_PCREL,
/* This is a 16 bit reloc for the AVR that stores 17 bit value (usually /* This is a 16 bit reloc for the AVR that stores 17 bit value (usually
program memory address) into 16 bits. */ program memory address) into 16 bits. */
BFD_RELOC_AVR_16_PM, BFD_RELOC_AVR_16_PM,
/* This is a 16 bit reloc for the AVR that stores 8 bit value (usually /* This is a 16 bit reloc for the AVR that stores 8 bit value (usually
data memory address) into 8 bit immediate value of LDI insn. */ data memory address) into 8 bit immediate value of LDI insn. */
BFD_RELOC_AVR_LO8_LDI, BFD_RELOC_AVR_LO8_LDI,
/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit /* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
of data memory address) into 8 bit immediate value of LDI insn. */ of data memory address) into 8 bit immediate value of LDI insn. */
BFD_RELOC_AVR_HI8_LDI, BFD_RELOC_AVR_HI8_LDI,
/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit /* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
of program memory address) into 8 bit immediate value of LDI insn. */ of program memory address) into 8 bit immediate value of LDI insn. */
BFD_RELOC_AVR_HH8_LDI, BFD_RELOC_AVR_HH8_LDI,
/* This is a 16 bit reloc for the AVR that stores negated 8 bit value /* This is a 16 bit reloc for the AVR that stores negated 8 bit value
(usually data memory address) into 8 bit immediate value of SUBI insn. */ (usually data memory address) into 8 bit immediate value of SUBI insn. */
BFD_RELOC_AVR_LO8_LDI_NEG, BFD_RELOC_AVR_LO8_LDI_NEG,
/* This is a 16 bit reloc for the AVR that stores negated 8 bit value /* This is a 16 bit reloc for the AVR that stores negated 8 bit value
(high 8 bit of data memory address) into 8 bit immediate value of (high 8 bit of data memory address) into 8 bit immediate value of
SUBI insn. */ SUBI insn. */
BFD_RELOC_AVR_HI8_LDI_NEG, BFD_RELOC_AVR_HI8_LDI_NEG,
/* This is a 16 bit reloc for the AVR that stores negated 8 bit value /* This is a 16 bit reloc for the AVR that stores negated 8 bit value
(most high 8 bit of program memory address) into 8 bit immediate value (most high 8 bit of program memory address) into 8 bit immediate value
of LDI or SUBI insn. */ of LDI or SUBI insn. */
BFD_RELOC_AVR_HH8_LDI_NEG, BFD_RELOC_AVR_HH8_LDI_NEG,
/* This is a 16 bit reloc for the AVR that stores 8 bit value (usually /* This is a 16 bit reloc for the AVR that stores 8 bit value (usually
command address) into 8 bit immediate value of LDI insn. */ command address) into 8 bit immediate value of LDI insn. */
BFD_RELOC_AVR_LO8_LDI_PM, BFD_RELOC_AVR_LO8_LDI_PM,
/* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit /* This is a 16 bit reloc for the AVR that stores 8 bit value (high 8 bit
of command address) into 8 bit immediate value of LDI insn. */ of command address) into 8 bit immediate value of LDI insn. */
BFD_RELOC_AVR_HI8_LDI_PM, BFD_RELOC_AVR_HI8_LDI_PM,
/* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit /* This is a 16 bit reloc for the AVR that stores 8 bit value (most high 8 bit
of command address) into 8 bit immediate value of LDI insn. */ of command address) into 8 bit immediate value of LDI insn. */
BFD_RELOC_AVR_HH8_LDI_PM, BFD_RELOC_AVR_HH8_LDI_PM,
/* This is a 16 bit reloc for the AVR that stores negated 8 bit value /* This is a 16 bit reloc for the AVR that stores negated 8 bit value
(usually command address) into 8 bit immediate value of SUBI insn. */ (usually command address) into 8 bit immediate value of SUBI insn. */
BFD_RELOC_AVR_LO8_LDI_PM_NEG, BFD_RELOC_AVR_LO8_LDI_PM_NEG,
/* This is a 16 bit reloc for the AVR that stores negated 8 bit value /* This is a 16 bit reloc for the AVR that stores negated 8 bit value
(high 8 bit of 16 bit command address) into 8 bit immediate value (high 8 bit of 16 bit command address) into 8 bit immediate value
of SUBI insn. */ of SUBI insn. */
BFD_RELOC_AVR_HI8_LDI_PM_NEG, BFD_RELOC_AVR_HI8_LDI_PM_NEG,
/* This is a 16 bit reloc for the AVR that stores negated 8 bit value /* This is a 16 bit reloc for the AVR that stores negated 8 bit value
(high 6 bit of 22 bit command address) into 8 bit immediate (high 6 bit of 22 bit command address) into 8 bit immediate
value of SUBI insn. */ value of SUBI insn. */
BFD_RELOC_AVR_HH8_LDI_PM_NEG, BFD_RELOC_AVR_HH8_LDI_PM_NEG,
/* This is a 32 bit reloc for the AVR that stores 23 bit value /* This is a 32 bit reloc for the AVR that stores 23 bit value
into 22 bits. */ into 22 bits. */
BFD_RELOC_AVR_CALL, BFD_RELOC_AVR_CALL,
/* These two relocations are used by the linker to determine which of /* These two relocations are used by the linker to determine which of
@ -2511,11 +2517,11 @@ virtual function table entry. The reloc's symbol should refer to the
table of the class mentioned in the code. Off of that base, an offset table of the class mentioned in the code. Off of that base, an offset
describes the entry that is being used. For Rela hosts, this offset describes the entry that is being used. For Rela hosts, this offset
is stored in the reloc's addend. For Rel hosts, we are forced to put is stored in the reloc's addend. For Rel hosts, we are forced to put
this offset in the reloc's section offset. */ this offset in the reloc's section offset. */
BFD_RELOC_VTABLE_INHERIT, BFD_RELOC_VTABLE_INHERIT,
BFD_RELOC_VTABLE_ENTRY, BFD_RELOC_VTABLE_ENTRY,
/* Intel IA64 Relocations. */ /* Intel IA64 Relocations. */
BFD_RELOC_IA64_IMM14, BFD_RELOC_IA64_IMM14,
BFD_RELOC_IA64_IMM22, BFD_RELOC_IA64_IMM22,
BFD_RELOC_IA64_IMM64, BFD_RELOC_IA64_IMM64,
@ -2555,7 +2561,6 @@ this offset in the reloc's section offset. */
BFD_RELOC_IA64_LTOFF_FPTR64I, BFD_RELOC_IA64_LTOFF_FPTR64I,
BFD_RELOC_IA64_LTOFF_FPTR64MSB, BFD_RELOC_IA64_LTOFF_FPTR64MSB,
BFD_RELOC_IA64_LTOFF_FPTR64LSB, BFD_RELOC_IA64_LTOFF_FPTR64LSB,
BFD_RELOC_IA64_SEGBASE,
BFD_RELOC_IA64_SEGREL32MSB, BFD_RELOC_IA64_SEGREL32MSB,
BFD_RELOC_IA64_SEGREL32LSB, BFD_RELOC_IA64_SEGREL32LSB,
BFD_RELOC_IA64_SEGREL64MSB, BFD_RELOC_IA64_SEGREL64MSB,
@ -2574,8 +2579,6 @@ this offset in the reloc's section offset. */
BFD_RELOC_IA64_LTV64LSB, BFD_RELOC_IA64_LTV64LSB,
BFD_RELOC_IA64_IPLTMSB, BFD_RELOC_IA64_IPLTMSB,
BFD_RELOC_IA64_IPLTLSB, BFD_RELOC_IA64_IPLTLSB,
BFD_RELOC_IA64_EPLTMSB,
BFD_RELOC_IA64_EPLTLSB,
BFD_RELOC_IA64_COPY, BFD_RELOC_IA64_COPY,
BFD_RELOC_IA64_TPREL22, BFD_RELOC_IA64_TPREL22,
BFD_RELOC_IA64_TPREL64MSB, BFD_RELOC_IA64_TPREL64MSB,
@ -2585,26 +2588,26 @@ this offset in the reloc's section offset. */
BFD_RELOC_IA64_LDXMOV, BFD_RELOC_IA64_LDXMOV,
/* Motorola 68HC11 reloc. /* Motorola 68HC11 reloc.
This is the 8 bits high part of an absolute address. */ This is the 8 bits high part of an absolute address. */
BFD_RELOC_M68HC11_HI8, BFD_RELOC_M68HC11_HI8,
/* Motorola 68HC11 reloc. /* Motorola 68HC11 reloc.
This is the 8 bits low part of an absolute address. */ This is the 8 bits low part of an absolute address. */
BFD_RELOC_M68HC11_LO8, BFD_RELOC_M68HC11_LO8,
/* Motorola 68HC11 reloc. /* Motorola 68HC11 reloc.
This is the 3 bits of a value. */ This is the 3 bits of a value. */
BFD_RELOC_M68HC11_3B, BFD_RELOC_M68HC11_3B,
/* These relocs are only used within the CRIS assembler. They are not /* These relocs are only used within the CRIS assembler. They are not
(at present) written to any object files. */ (at present) written to any object files. */
BFD_RELOC_CRIS_BDISP8, BFD_RELOC_CRIS_BDISP8,
BFD_RELOC_CRIS_UNSIGNED_5, BFD_RELOC_CRIS_UNSIGNED_5,
BFD_RELOC_CRIS_SIGNED_6, BFD_RELOC_CRIS_SIGNED_6,
BFD_RELOC_CRIS_UNSIGNED_6, BFD_RELOC_CRIS_UNSIGNED_6,
BFD_RELOC_CRIS_UNSIGNED_4, BFD_RELOC_CRIS_UNSIGNED_4,
/* Intel i860 Relocations. */ /* Intel i860 Relocations. */
BFD_RELOC_860_COPY, BFD_RELOC_860_COPY,
BFD_RELOC_860_GLOB_DAT, BFD_RELOC_860_GLOB_DAT,
BFD_RELOC_860_JUMP_SLOT, BFD_RELOC_860_JUMP_SLOT,
@ -2646,6 +2649,7 @@ bfd_reloc_type_lookup PARAMS ((bfd *abfd, bfd_reloc_code_real_type code));
const char * const char *
bfd_get_reloc_code_name PARAMS ((bfd_reloc_code_real_type code)); bfd_get_reloc_code_name PARAMS ((bfd_reloc_code_real_type code));
typedef struct symbol_cache_entry typedef struct symbol_cache_entry
{ {
/* A pointer to the BFD which owns the symbol. This information /* A pointer to the BFD which owns the symbol. This information
@ -2656,12 +2660,12 @@ typedef struct symbol_cache_entry
This field is *almost* redundant, since you can use section->owner This field is *almost* redundant, since you can use section->owner
instead, except that some symbols point to the global sections instead, except that some symbols point to the global sections
bfd_{abs,com,und}_section. This could be fixed by making bfd_{abs,com,und}_section. This could be fixed by making
these globals be per-bfd (or per-target-flavor). FIXME. */ these globals be per-bfd (or per-target-flavor). FIXME. */
struct _bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field. */ struct _bfd *the_bfd; /* Use bfd_asymbol_bfd(sym) to access this field. */
/* The text of the symbol. The name is left alone, and not copied; the /* The text of the symbol. The name is left alone, and not copied; the
application may not alter it. */ application may not alter it. */
CONST char *name; CONST char *name;
/* The value of the symbol. This really should be a union of a /* The value of the symbol. This really should be a union of a
@ -2674,15 +2678,15 @@ typedef struct symbol_cache_entry
#define BSF_NO_FLAGS 0x00 #define BSF_NO_FLAGS 0x00
/* The symbol has local scope; <<static>> in <<C>>. The value /* The symbol has local scope; <<static>> in <<C>>. The value
is the offset into the section of the data. */ is the offset into the section of the data. */
#define BSF_LOCAL 0x01 #define BSF_LOCAL 0x01
/* The symbol has global scope; initialized data in <<C>>. The /* The symbol has global scope; initialized data in <<C>>. The
value is the offset into the section of the data. */ value is the offset into the section of the data. */
#define BSF_GLOBAL 0x02 #define BSF_GLOBAL 0x02
/* The symbol has global scope and is exported. The value is /* The symbol has global scope and is exported. The value is
the offset into the section of the data. */ the offset into the section of the data. */
#define BSF_EXPORT BSF_GLOBAL /* no real difference */ #define BSF_EXPORT BSF_GLOBAL /* no real difference */
/* A normal C symbol would be one of: /* A normal C symbol would be one of:
@ -2697,7 +2701,7 @@ typedef struct symbol_cache_entry
perhaps others someday. */ perhaps others someday. */
#define BSF_FUNCTION 0x10 #define BSF_FUNCTION 0x10
/* Used by the linker. */ /* Used by the linker. */
#define BSF_KEEP 0x20 #define BSF_KEEP 0x20
#define BSF_KEEP_G 0x40 #define BSF_KEEP_G 0x40
@ -2710,31 +2714,31 @@ typedef struct symbol_cache_entry
#define BSF_SECTION_SYM 0x100 #define BSF_SECTION_SYM 0x100
/* The symbol used to be a common symbol, but now it is /* The symbol used to be a common symbol, but now it is
allocated. */ allocated. */
#define BSF_OLD_COMMON 0x200 #define BSF_OLD_COMMON 0x200
/* The default value for common data. */ /* The default value for common data. */
#define BFD_FORT_COMM_DEFAULT_VALUE 0 #define BFD_FORT_COMM_DEFAULT_VALUE 0
/* In some files the type of a symbol sometimes alters its /* In some files the type of a symbol sometimes alters its
location in an output file - ie in coff a <<ISFCN>> symbol location in an output file - ie in coff a <<ISFCN>> symbol
which is also <<C_EXT>> symbol appears where it was which is also <<C_EXT>> symbol appears where it was
declared and not at the end of a section. This bit is set declared and not at the end of a section. This bit is set
by the target BFD part to convey this information. */ by the target BFD part to convey this information. */
#define BSF_NOT_AT_END 0x400 #define BSF_NOT_AT_END 0x400
/* Signal that the symbol is the label of constructor section. */ /* Signal that the symbol is the label of constructor section. */
#define BSF_CONSTRUCTOR 0x800 #define BSF_CONSTRUCTOR 0x800
/* Signal that the symbol is a warning symbol. The name is a /* Signal that the symbol is a warning symbol. The name is a
warning. The name of the next symbol is the one to warn about; warning. The name of the next symbol is the one to warn about;
if a reference is made to a symbol with the same name as the next if a reference is made to a symbol with the same name as the next
symbol, a warning is issued by the linker. */ symbol, a warning is issued by the linker. */
#define BSF_WARNING 0x1000 #define BSF_WARNING 0x1000
/* Signal that the symbol is indirect. This symbol is an indirect /* Signal that the symbol is indirect. This symbol is an indirect
pointer to the symbol with the same name as the next symbol. */ pointer to the symbol with the same name as the next symbol. */
#define BSF_INDIRECT 0x2000 #define BSF_INDIRECT 0x2000
/* BSF_FILE marks symbols that contain a file name. This is used /* BSF_FILE marks symbols that contain a file name. This is used
@ -2830,7 +2834,7 @@ struct _bfd
/* Marks whether there was a default target specified when the /* Marks whether there was a default target specified when the
BFD was opened. This is used to select which matching algorithm BFD was opened. This is used to select which matching algorithm
to use to choose the back end. */ to use to choose the back end. */
boolean target_defaulted; boolean target_defaulted;
@ -2883,7 +2887,7 @@ struct _bfd
file_ptr origin; file_ptr origin;
/* Remember when output has begun, to stop strange things /* Remember when output has begun, to stop strange things
from happening. */ from happening. */
boolean output_has_begun; boolean output_has_begun;
/* Pointer to linked list of sections*/ /* Pointer to linked list of sections*/
@ -2893,7 +2897,7 @@ struct _bfd
unsigned int section_count; unsigned int section_count;
/* Stuff only useful for object files: /* Stuff only useful for object files:
The start address. */ The start address. */
bfd_vma start_address; bfd_vma start_address;
/* Used for input and output*/ /* Used for input and output*/
@ -2919,7 +2923,7 @@ struct _bfd
be used only for archive elements. */ be used only for archive elements. */
int archive_pass; int archive_pass;
/* Used by the back end to hold private data. */ /* Used by the back end to hold private data. */
union union
{ {
@ -3086,6 +3090,7 @@ bfd_set_private_flags PARAMS ((bfd *abfd, flagword flags));
#define bfd_debug_info_accumulate(abfd, section) \ #define bfd_debug_info_accumulate(abfd, section) \
BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section)) BFD_SEND (abfd, _bfd_debug_info_accumulate, (abfd, section))
#define bfd_stat_arch_elt(abfd, stat) \ #define bfd_stat_arch_elt(abfd, stat) \
BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat)) BFD_SEND (abfd, _bfd_stat_arch_elt,(abfd, stat))
@ -3431,7 +3436,7 @@ CAT(NAME,_get_dynamic_symtab_upper_bound),\
CAT(NAME,_canonicalize_dynamic_symtab),\ CAT(NAME,_canonicalize_dynamic_symtab),\
CAT(NAME,_get_dynamic_reloc_upper_bound),\ CAT(NAME,_get_dynamic_reloc_upper_bound),\
CAT(NAME,_canonicalize_dynamic_reloc) CAT(NAME,_canonicalize_dynamic_reloc)
/* Get the amount of memory required to hold the dynamic symbols. */ /* Get the amount of memory required to hold the dynamic symbols. */
long (*_bfd_get_dynamic_symtab_upper_bound) PARAMS ((bfd *)); long (*_bfd_get_dynamic_symtab_upper_bound) PARAMS ((bfd *));
/* Read in the dynamic symbols. */ /* Read in the dynamic symbols. */
long (*_bfd_canonicalize_dynamic_symtab) long (*_bfd_canonicalize_dynamic_symtab)

122
bfd/elfxx-ia64.c
View File

@ -353,7 +353,6 @@ static reloc_howto_type ia64_howto_table[] =
IA64_HOWTO (R_IA64_LTOFF_FPTR64MSB, "LTOFF_FPTR64MSB", 4, false, true), IA64_HOWTO (R_IA64_LTOFF_FPTR64MSB, "LTOFF_FPTR64MSB", 4, false, true),
IA64_HOWTO (R_IA64_LTOFF_FPTR64LSB, "LTOFF_FPTR64LSB", 4, false, true), IA64_HOWTO (R_IA64_LTOFF_FPTR64LSB, "LTOFF_FPTR64LSB", 4, false, true),
IA64_HOWTO (R_IA64_SEGBASE, "SEGBASE", 4, false, true),
IA64_HOWTO (R_IA64_SEGREL32MSB, "SEGREL32MSB", 2, false, true), IA64_HOWTO (R_IA64_SEGREL32MSB, "SEGREL32MSB", 2, false, true),
IA64_HOWTO (R_IA64_SEGREL32LSB, "SEGREL32LSB", 2, false, true), IA64_HOWTO (R_IA64_SEGREL32LSB, "SEGREL32LSB", 2, false, true),
IA64_HOWTO (R_IA64_SEGREL64MSB, "SEGREL64MSB", 4, false, true), IA64_HOWTO (R_IA64_SEGREL64MSB, "SEGREL64MSB", 4, false, true),
@ -380,8 +379,6 @@ static reloc_howto_type ia64_howto_table[] =
IA64_HOWTO (R_IA64_IPLTMSB, "IPLTMSB", 4, false, true), IA64_HOWTO (R_IA64_IPLTMSB, "IPLTMSB", 4, false, true),
IA64_HOWTO (R_IA64_IPLTLSB, "IPLTLSB", 4, false, true), IA64_HOWTO (R_IA64_IPLTLSB, "IPLTLSB", 4, false, true),
IA64_HOWTO (R_IA64_EPLTMSB, "EPLTMSB", 4, false, true),
IA64_HOWTO (R_IA64_EPLTLSB, "EPLTLSB", 4, false, true),
IA64_HOWTO (R_IA64_COPY, "COPY", 4, false, true), IA64_HOWTO (R_IA64_COPY, "COPY", 4, false, true),
IA64_HOWTO (R_IA64_LTOFF22X, "LTOFF22X", 0, false, true), IA64_HOWTO (R_IA64_LTOFF22X, "LTOFF22X", 0, false, true),
IA64_HOWTO (R_IA64_LDXMOV, "LDXMOV", 0, false, true), IA64_HOWTO (R_IA64_LDXMOV, "LDXMOV", 0, false, true),
@ -476,7 +473,6 @@ elfNN_ia64_reloc_type_lookup (abfd, bfd_code)
case BFD_RELOC_IA64_LTOFF_FPTR64MSB: rtype = R_IA64_LTOFF_FPTR64MSB; break; case BFD_RELOC_IA64_LTOFF_FPTR64MSB: rtype = R_IA64_LTOFF_FPTR64MSB; break;
case BFD_RELOC_IA64_LTOFF_FPTR64LSB: rtype = R_IA64_LTOFF_FPTR64LSB; break; case BFD_RELOC_IA64_LTOFF_FPTR64LSB: rtype = R_IA64_LTOFF_FPTR64LSB; break;
case BFD_RELOC_IA64_SEGBASE: rtype = R_IA64_SEGBASE; break;
case BFD_RELOC_IA64_SEGREL32MSB: rtype = R_IA64_SEGREL32MSB; break; case BFD_RELOC_IA64_SEGREL32MSB: rtype = R_IA64_SEGREL32MSB; break;
case BFD_RELOC_IA64_SEGREL32LSB: rtype = R_IA64_SEGREL32LSB; break; case BFD_RELOC_IA64_SEGREL32LSB: rtype = R_IA64_SEGREL32LSB; break;
case BFD_RELOC_IA64_SEGREL64MSB: rtype = R_IA64_SEGREL64MSB; break; case BFD_RELOC_IA64_SEGREL64MSB: rtype = R_IA64_SEGREL64MSB; break;
@ -499,8 +495,6 @@ elfNN_ia64_reloc_type_lookup (abfd, bfd_code)
case BFD_RELOC_IA64_IPLTMSB: rtype = R_IA64_IPLTMSB; break; case BFD_RELOC_IA64_IPLTMSB: rtype = R_IA64_IPLTMSB; break;
case BFD_RELOC_IA64_IPLTLSB: rtype = R_IA64_IPLTLSB; break; case BFD_RELOC_IA64_IPLTLSB: rtype = R_IA64_IPLTLSB; break;
case BFD_RELOC_IA64_EPLTMSB: rtype = R_IA64_EPLTMSB; break;
case BFD_RELOC_IA64_EPLTLSB: rtype = R_IA64_EPLTLSB; break;
case BFD_RELOC_IA64_COPY: rtype = R_IA64_COPY; break; case BFD_RELOC_IA64_COPY: rtype = R_IA64_COPY; break;
case BFD_RELOC_IA64_LTOFF22X: rtype = R_IA64_LTOFF22X; break; case BFD_RELOC_IA64_LTOFF22X: rtype = R_IA64_LTOFF22X; break;
case BFD_RELOC_IA64_LDXMOV: rtype = R_IA64_LDXMOV; break; case BFD_RELOC_IA64_LDXMOV: rtype = R_IA64_LDXMOV; break;
@ -1864,6 +1858,14 @@ elfNN_ia64_check_relocs (abfd, info, sec, relocs)
dynrel_type = R_IA64_DIR64LSB; dynrel_type = R_IA64_DIR64LSB;
break; break;
case R_IA64_IPLTMSB:
case R_IA64_IPLTLSB:
/* Shared objects will always need at least a REL relocation. */
if (info->shared || maybe_dynamic)
need_entry = NEED_DYNREL;
dynrel_type = R_IA64_IPLTLSB;
break;
case R_IA64_PCREL22: case R_IA64_PCREL22:
case R_IA64_PCREL64I: case R_IA64_PCREL64I:
case R_IA64_PCREL32MSB: case R_IA64_PCREL32MSB:
@ -2184,6 +2186,8 @@ allocate_dynrel_entries (dyn_i, data)
for (rent = dyn_i->reloc_entries; rent; rent = rent->next) for (rent = dyn_i->reloc_entries; rent; rent = rent->next)
{ {
int count = rent->count;
switch (rent->type) switch (rent->type)
{ {
case R_IA64_FPTR64LSB: case R_IA64_FPTR64LSB:
@ -2201,8 +2205,18 @@ allocate_dynrel_entries (dyn_i, data)
if (!dynamic_symbol && !shared) if (!dynamic_symbol && !shared)
continue; continue;
break; break;
case R_IA64_IPLTLSB:
if (!dynamic_symbol && !shared)
continue;
/* Use two REL relocations for IPLT relocations
against local symbols. */
if (!dynamic_symbol)
count *= 2;
break;
default:
abort ();
} }
rent->srel->_raw_size += sizeof (ElfNN_External_Rela) * rent->count; rent->srel->_raw_size += sizeof (ElfNN_External_Rela) * count;
} }
/* Take care of the GOT and PLT relocations. */ /* Take care of the GOT and PLT relocations. */
@ -2639,25 +2653,6 @@ elfNN_ia64_install_value (abfd, hit_addr, val, r_type)
break; break;
/* Unsupported / Dynamic relocations. */ /* Unsupported / Dynamic relocations. */
case R_IA64_REL32MSB:
case R_IA64_REL32LSB:
case R_IA64_REL64MSB:
case R_IA64_REL64LSB:
case R_IA64_IPLTMSB:
case R_IA64_IPLTLSB:
case R_IA64_EPLTMSB:
case R_IA64_EPLTLSB:
case R_IA64_COPY:
case R_IA64_SEGBASE:
case R_IA64_TPREL22:
case R_IA64_TPREL64MSB:
case R_IA64_TPREL64LSB:
case R_IA64_LTOFF_TP22:
default: default:
return bfd_reloc_notsupported; return bfd_reloc_notsupported;
} }
@ -2937,10 +2932,11 @@ set_pltoff_entry (abfd, info, dyn_i, value, is_plt)
if ((! dyn_i->want_plt || is_plt) if ((! dyn_i->want_plt || is_plt)
&& !dyn_i->pltoff_done) && !dyn_i->pltoff_done)
{ {
bfd_vma gp = _bfd_get_gp_value (abfd);
/* Fill in the function descriptor. */ /* Fill in the function descriptor. */
bfd_put_64 (abfd, value, pltoff_sec->contents + dyn_i->pltoff_offset); bfd_put_64 (abfd, value, pltoff_sec->contents + dyn_i->pltoff_offset);
bfd_put_64 (abfd, _bfd_get_gp_value (abfd), bfd_put_64 (abfd, gp, pltoff_sec->contents + dyn_i->pltoff_offset + 8);
pltoff_sec->contents + dyn_i->pltoff_offset + 8);
/* Install dynamic relocations if needed. */ /* Install dynamic relocations if needed. */
if (!is_plt && info->shared) if (!is_plt && info->shared)
@ -2955,11 +2951,11 @@ set_pltoff_entry (abfd, info, dyn_i, value, is_plt)
elfNN_ia64_install_dyn_reloc (abfd, NULL, pltoff_sec, elfNN_ia64_install_dyn_reloc (abfd, NULL, pltoff_sec,
ia64_info->rel_pltoff_sec, ia64_info->rel_pltoff_sec,
dyn_i->pltoff_offset, dyn_i->pltoff_offset,
dyn_r_type, 0, 0); dyn_r_type, 0, value);
elfNN_ia64_install_dyn_reloc (abfd, NULL, pltoff_sec, elfNN_ia64_install_dyn_reloc (abfd, NULL, pltoff_sec,
ia64_info->rel_pltoff_sec, ia64_info->rel_pltoff_sec,
dyn_i->pltoff_offset + 8, dyn_i->pltoff_offset + 8,
dyn_r_type, 0, 0); dyn_r_type, 0, gp);
} }
dyn_i->pltoff_done = 1; dyn_i->pltoff_done = 1;
@ -3366,6 +3362,7 @@ elfNN_ia64_relocate_section (output_bfd, info, input_bfd, input_section,
{ {
unsigned int dyn_r_type; unsigned int dyn_r_type;
long dynindx; long dynindx;
bfd_vma addend;
BFD_ASSERT (srel != NULL); BFD_ASSERT (srel != NULL);
@ -3373,7 +3370,11 @@ elfNN_ia64_relocate_section (output_bfd, info, input_bfd, input_section,
matching RELATIVE relocation. */ matching RELATIVE relocation. */
dyn_r_type = r_type; dyn_r_type = r_type;
if (dynamic_symbol_p) if (dynamic_symbol_p)
dynindx = h->dynindx; {
dynindx = h->dynindx;
addend = rel->r_addend;
value = 0;
}
else else
{ {
switch (r_type) switch (r_type)
@ -3405,11 +3406,12 @@ elfNN_ia64_relocate_section (output_bfd, info, input_bfd, input_section,
continue; continue;
} }
dynindx = 0; dynindx = 0;
addend = value;
} }
elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section, elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section,
srel, rel->r_offset, dyn_r_type, srel, rel->r_offset, dyn_r_type,
dynindx, rel->r_addend); dynindx, addend);
} }
/* FALLTHRU */ /* FALLTHRU */
@ -3678,23 +3680,51 @@ elfNN_ia64_relocate_section (output_bfd, info, input_bfd, input_section,
r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type); r = elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
break; break;
case R_IA64_SEGBASE:
case R_IA64_REL32MSB:
case R_IA64_REL32LSB:
case R_IA64_REL64MSB:
case R_IA64_REL64LSB:
case R_IA64_IPLTMSB: case R_IA64_IPLTMSB:
case R_IA64_IPLTLSB: case R_IA64_IPLTLSB:
case R_IA64_EPLTMSB: /* Install a dynamic relocation for this reloc. */
case R_IA64_EPLTLSB: if ((dynamic_symbol_p || info->shared)
case R_IA64_COPY: && (input_section->flags & SEC_ALLOC) != 0)
{
long dynindx;
BFD_ASSERT (srel != NULL);
/* If we don't need dynamic symbol lookup, install two
RELATIVE relocations. */
if (! dynamic_symbol_p)
{
unsigned int dyn_r_type;
if (r_type == R_IA64_IPLTMSB)
dyn_r_type = R_IA64_REL64MSB;
else
dyn_r_type = R_IA64_REL64LSB;
elfNN_ia64_install_dyn_reloc (output_bfd, info,
input_section,
srel, rel->r_offset,
dyn_r_type, 0, value);
elfNN_ia64_install_dyn_reloc (output_bfd, info,
input_section,
srel, rel->r_offset + 8,
dyn_r_type, 0, gp_val);
}
else
elfNN_ia64_install_dyn_reloc (output_bfd, info, input_section,
srel, rel->r_offset, r_type,
h->dynindx, rel->r_addend);
}
if (r_type == R_IA64_IPLTMSB)
r_type = R_IA64_DIR64MSB;
else
r_type = R_IA64_DIR64LSB;
elfNN_ia64_install_value (output_bfd, hit_addr, value, r_type);
r = elfNN_ia64_install_value (output_bfd, hit_addr + 8, gp_val,
r_type);
break;
case R_IA64_TPREL22:
case R_IA64_TPREL64MSB:
case R_IA64_TPREL64LSB:
case R_IA64_LTOFF_TP22:
default: default:
r = bfd_reloc_notsupported; r = bfd_reloc_notsupported;
break; break;

3
bfd/libbfd.h
View File

@ -942,7 +942,6 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_IA64_LTOFF_FPTR64I", "BFD_RELOC_IA64_LTOFF_FPTR64I",
"BFD_RELOC_IA64_LTOFF_FPTR64MSB", "BFD_RELOC_IA64_LTOFF_FPTR64MSB",
"BFD_RELOC_IA64_LTOFF_FPTR64LSB", "BFD_RELOC_IA64_LTOFF_FPTR64LSB",
"BFD_RELOC_IA64_SEGBASE",
"BFD_RELOC_IA64_SEGREL32MSB", "BFD_RELOC_IA64_SEGREL32MSB",
"BFD_RELOC_IA64_SEGREL32LSB", "BFD_RELOC_IA64_SEGREL32LSB",
"BFD_RELOC_IA64_SEGREL64MSB", "BFD_RELOC_IA64_SEGREL64MSB",
@ -961,8 +960,6 @@ static const char *const bfd_reloc_code_real_names[] = { "@@uninitialized@@",
"BFD_RELOC_IA64_LTV64LSB", "BFD_RELOC_IA64_LTV64LSB",
"BFD_RELOC_IA64_IPLTMSB", "BFD_RELOC_IA64_IPLTMSB",
"BFD_RELOC_IA64_IPLTLSB", "BFD_RELOC_IA64_IPLTLSB",
"BFD_RELOC_IA64_EPLTMSB",
"BFD_RELOC_IA64_EPLTLSB",
"BFD_RELOC_IA64_COPY", "BFD_RELOC_IA64_COPY",
"BFD_RELOC_IA64_TPREL22", "BFD_RELOC_IA64_TPREL22",
"BFD_RELOC_IA64_TPREL64MSB", "BFD_RELOC_IA64_TPREL64MSB",

6
bfd/reloc.c
View File

@ -2833,8 +2833,6 @@ ENUMX
BFD_RELOC_IA64_LTOFF_FPTR64MSB BFD_RELOC_IA64_LTOFF_FPTR64MSB
ENUMX ENUMX
BFD_RELOC_IA64_LTOFF_FPTR64LSB BFD_RELOC_IA64_LTOFF_FPTR64LSB
ENUMX
BFD_RELOC_IA64_SEGBASE
ENUMX ENUMX
BFD_RELOC_IA64_SEGREL32MSB BFD_RELOC_IA64_SEGREL32MSB
ENUMX ENUMX
@ -2871,10 +2869,6 @@ ENUMX
BFD_RELOC_IA64_IPLTMSB BFD_RELOC_IA64_IPLTMSB
ENUMX ENUMX
BFD_RELOC_IA64_IPLTLSB BFD_RELOC_IA64_IPLTLSB
ENUMX
BFD_RELOC_IA64_EPLTMSB
ENUMX
BFD_RELOC_IA64_EPLTLSB
ENUMX ENUMX
BFD_RELOC_IA64_COPY BFD_RELOC_IA64_COPY
ENUMX ENUMX