sim: riscv: drop subdir configure logic

We've been using this only to set the default word size to 32-vs-64
based on the $target.  We can easily merge this with the top-level
configure script to clean things up a bit.
This commit is contained in:
Mike Frysinger
2022-11-07 22:56:58 +07:00
parent b686ecb5b1
commit 1787fcc45a
8 changed files with 65 additions and 3138 deletions

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@ -233,7 +233,8 @@ am__aclocal_m4_deps = $(top_srcdir)/../config/acx.m4 \
$(top_srcdir)/m4/sim_ac_option_warnings.m4 \ $(top_srcdir)/m4/sim_ac_option_warnings.m4 \
$(top_srcdir)/m4/sim_ac_platform.m4 \ $(top_srcdir)/m4/sim_ac_platform.m4 \
$(top_srcdir)/m4/sim_ac_toolchain.m4 \ $(top_srcdir)/m4/sim_ac_toolchain.m4 \
$(top_srcdir)/frv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \ $(top_srcdir)/frv/acinclude.m4 \
$(top_srcdir)/riscv/acinclude.m4 $(top_srcdir)/rx/acinclude.m4 \
$(top_srcdir)/configure.ac $(top_srcdir)/configure.ac
am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \ am__configure_deps = $(am__aclocal_m4_deps) $(CONFIGURE_DEPENDENCIES) \
$(ACLOCAL_M4) $(ACLOCAL_M4)
@ -257,11 +258,11 @@ CONFIG_CLEAN_FILES = Make-common.sim aarch64/Makefile.sim \
microblaze/.gdbinit mips/.gdbinit mn10300/.gdbinit \ microblaze/.gdbinit mips/.gdbinit mn10300/.gdbinit \
moxie/Makefile.sim moxie/.gdbinit msp430/Makefile.sim \ moxie/Makefile.sim moxie/.gdbinit msp430/Makefile.sim \
msp430/.gdbinit or1k/.gdbinit ppc/.gdbinit pru/Makefile.sim \ msp430/.gdbinit or1k/.gdbinit ppc/.gdbinit pru/Makefile.sim \
pru/.gdbinit riscv/.gdbinit rl78/Makefile.sim rl78/.gdbinit \ pru/.gdbinit riscv/Makefile.sim riscv/.gdbinit \
rx/Makefile.sim rx/.gdbinit sh/Makefile.sim sh/.gdbinit \ rl78/Makefile.sim rl78/.gdbinit rx/Makefile.sim rx/.gdbinit \
erc32/Makefile.sim erc32/.gdbinit v850/.gdbinit \ sh/Makefile.sim sh/.gdbinit erc32/Makefile.sim erc32/.gdbinit \
example-synacor/Makefile.sim example-synacor/.gdbinit \ v850/.gdbinit example-synacor/Makefile.sim \
arch-subdir.mk .gdbinit example-synacor/.gdbinit arch-subdir.mk .gdbinit
CONFIG_CLEAN_VPATH_FILES = CONFIG_CLEAN_VPATH_FILES =
LIBRARIES = $(noinst_LIBRARIES) LIBRARIES = $(noinst_LIBRARIES)
ARFLAGS = cru ARFLAGS = cru
@ -1092,6 +1093,7 @@ SIM_HW_CFLAGS = @SIM_HW_CFLAGS@
SIM_HW_SOCKSER = @SIM_HW_SOCKSER@ SIM_HW_SOCKSER = @SIM_HW_SOCKSER@
SIM_INLINE = @SIM_INLINE@ SIM_INLINE = @SIM_INLINE@
SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@ SIM_PRIMARY_TARGET = @SIM_PRIMARY_TARGET@
SIM_RISCV_BITSIZE = @SIM_RISCV_BITSIZE@
SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@ SIM_RX_CYCLE_ACCURATE_FLAGS = @SIM_RX_CYCLE_ACCURATE_FLAGS@
SIM_SUBDIRS = @SIM_SUBDIRS@ SIM_SUBDIRS = @SIM_SUBDIRS@
SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@ SIM_TOOLCHAIN_VARS = @SIM_TOOLCHAIN_VARS@
@ -1772,6 +1774,8 @@ pru/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/pru/Makefile.in
cd $(top_builddir) && $(SHELL) ./config.status $@ cd $(top_builddir) && $(SHELL) ./config.status $@
pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in pru/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
cd $(top_builddir) && $(SHELL) ./config.status $@ cd $(top_builddir) && $(SHELL) ./config.status $@
riscv/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/riscv/Makefile.in
cd $(top_builddir) && $(SHELL) ./config.status $@
riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in riscv/.gdbinit: $(top_builddir)/config.status $(top_srcdir)/common/gdbinit.in
cd $(top_builddir) && $(SHELL) ./config.status $@ cd $(top_builddir) && $(SHELL) ./config.status $@
rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in rl78/Makefile.sim: $(top_builddir)/config.status $(top_srcdir)/rl78/Makefile.in

32
sim/configure vendored
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@ -640,6 +640,7 @@ am__EXEEXT_TRUE
LTLIBOBJS LTLIBOBJS
include_makefile include_makefile
SIM_RX_CYCLE_ACCURATE_FLAGS SIM_RX_CYCLE_ACCURATE_FLAGS
SIM_RISCV_BITSIZE
SIM_FRV_TRAPDUMP_FLAGS SIM_FRV_TRAPDUMP_FLAGS
sim_float sim_float
sim_bitsize sim_bitsize
@ -1114,7 +1115,6 @@ mips
mn10300 mn10300
or1k or1k
ppc ppc
riscv
v850' v850'
# Initialize some variables set by options. # Initialize some variables set by options.
@ -15455,8 +15455,11 @@ fi
SIM_PRIMARY_TARGET=riscv SIM_PRIMARY_TARGET=riscv
fi fi
as_fn_append SIM_ENABLED_ARCHES " riscv" as_fn_append SIM_ENABLED_ARCHES " riscv"
subdirs="$subdirs riscv" ac_config_files="$ac_config_files riscv/Makefile.sim:riscv/Makefile.in"
ac_config_commands="$ac_config_commands riscv/Makefile"
as_fn_append SIM_SUBDIRS " riscv"
ac_config_files="$ac_config_files riscv/.gdbinit:common/gdbinit.in" ac_config_files="$ac_config_files riscv/.gdbinit:common/gdbinit.in"
@ -16259,6 +16262,17 @@ $as_echo "no" >&6; }
fi fi
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking riscv bitsize" >&5
$as_echo_n "checking riscv bitsize... " >&6; }
SIM_RISCV_BITSIZE=64
case $target in #(
riscv32*) :
SIM_RISCV_BITSIZE=32 ;; #(
*) :
;;
esac
{ $as_echo "$as_me:${as_lineno-$LINENO}: checking whether sim rx should be cycle accurate" >&5 { $as_echo "$as_me:${as_lineno-$LINENO}: checking whether sim rx should be cycle accurate" >&5
$as_echo_n "checking whether sim rx should be cycle accurate... " >&6; } $as_echo_n "checking whether sim rx should be cycle accurate... " >&6; }
# Check whether --enable-sim-rx-cycle-accurate was given. # Check whether --enable-sim-rx-cycle-accurate was given.
@ -17542,6 +17556,8 @@ do
"pru/Makefile") CONFIG_COMMANDS="$CONFIG_COMMANDS pru/Makefile" ;; "pru/Makefile") CONFIG_COMMANDS="$CONFIG_COMMANDS pru/Makefile" ;;
"pru/.gdbinit") CONFIG_FILES="$CONFIG_FILES pru/.gdbinit:common/gdbinit.in" ;; "pru/.gdbinit") CONFIG_FILES="$CONFIG_FILES pru/.gdbinit:common/gdbinit.in" ;;
"depdir-pru") CONFIG_COMMANDS="$CONFIG_COMMANDS depdir-pru" ;; "depdir-pru") CONFIG_COMMANDS="$CONFIG_COMMANDS depdir-pru" ;;
"riscv/Makefile.sim") CONFIG_FILES="$CONFIG_FILES riscv/Makefile.sim:riscv/Makefile.in" ;;
"riscv/Makefile") CONFIG_COMMANDS="$CONFIG_COMMANDS riscv/Makefile" ;;
"riscv/.gdbinit") CONFIG_FILES="$CONFIG_FILES riscv/.gdbinit:common/gdbinit.in" ;; "riscv/.gdbinit") CONFIG_FILES="$CONFIG_FILES riscv/.gdbinit:common/gdbinit.in" ;;
"depdir-riscv") CONFIG_COMMANDS="$CONFIG_COMMANDS depdir-riscv" ;; "depdir-riscv") CONFIG_COMMANDS="$CONFIG_COMMANDS depdir-riscv" ;;
"rl78/Makefile.sim") CONFIG_FILES="$CONFIG_FILES rl78/Makefile.sim:rl78/Makefile.in" ;; "rl78/Makefile.sim") CONFIG_FILES="$CONFIG_FILES rl78/Makefile.sim:rl78/Makefile.in" ;;
@ -19161,6 +19177,18 @@ $as_echo X"$file" |
rm -f pru/Makesim1.tmp pru/Makesim2.tmp rm -f pru/Makesim1.tmp pru/Makesim2.tmp
;; ;;
"depdir-pru":C) $SHELL $ac_aux_dir/mkinstalldirs pru/$DEPDIR ;; "depdir-pru":C) $SHELL $ac_aux_dir/mkinstalldirs pru/$DEPDIR ;;
"riscv/Makefile":C) sed -n \
-e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ {
/^srcdir = / s:$:/riscv:
p
}' \
<Make-common.sim >riscv/Makesim1.tmp
sed -n -e '/^## COMMON_POST_/,/^## End COMMON_POST_/ p' <Make-common.sim >riscv/Makesim2.tmp
sed -e '/^## COMMON_PRE_/ r riscv/Makesim1.tmp' \
-e '/^## COMMON_POST_/ r riscv/Makesim2.tmp' \
<riscv/Makefile.sim >riscv/Makefile
rm -f riscv/Makesim1.tmp riscv/Makesim2.tmp
;;
"depdir-riscv":C) $SHELL $ac_aux_dir/mkinstalldirs riscv/$DEPDIR ;; "depdir-riscv":C) $SHELL $ac_aux_dir/mkinstalldirs riscv/$DEPDIR ;;
"rl78/Makefile":C) sed -n \ "rl78/Makefile":C) sed -n \
-e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ { -e '/^## COMMON_PRE_/,/^## End COMMON_PRE_/ {

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@ -150,7 +150,7 @@ if test "${enable_sim}" != no; then
SIM_TARGET([or1k*-*-*], [or1k], [true]) SIM_TARGET([or1k*-*-*], [or1k], [true])
SIM_TARGET([powerpc*-*-*], [ppc], [true]) SIM_TARGET([powerpc*-*-*], [ppc], [true])
SIM_TARGET([pru*-*-*], [pru]) SIM_TARGET([pru*-*-*], [pru])
SIM_TARGET([riscv*-*-*], [riscv], [true]) SIM_TARGET([riscv*-*-*], [riscv])
SIM_TARGET([rl78-*-*], [rl78]) SIM_TARGET([rl78-*-*], [rl78])
SIM_TARGET([rx-*-*], [rx]) SIM_TARGET([rx-*-*], [rx])
SIM_TARGET([sh*-*-*], [sh]) SIM_TARGET([sh*-*-*], [sh])
@ -203,6 +203,7 @@ AC_SUBST(sim_float)
dnl Some arches have unique configure flags. dnl Some arches have unique configure flags.
m4_include([frv/acinclude.m4]) m4_include([frv/acinclude.m4])
m4_include([riscv/acinclude.m4])
m4_include([rx/acinclude.m4]) m4_include([rx/acinclude.m4])
dnl Hack to output an "include" statement in the Makefile so automake doesn't dnl Hack to output an "include" statement in the Makefile so automake doesn't

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@ -24,4 +24,6 @@ SIM_OBJS = \
machs.o \ machs.o \
sim-main.o sim-main.o
SIM_EXTRA_CFLAGS = -DWITH_TARGET_WORD_BITSIZE=@SIM_RISCV_BITSIZE@
## COMMON_POST_CONFIG_FRAG ## COMMON_POST_CONFIG_FRAG

21
sim/riscv/acinclude.m4 Normal file
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@ -0,0 +1,21 @@
dnl Copyright (C) 2022 Free Software Foundation, Inc.
dnl
dnl This program is free software; you can redistribute it and/or modify
dnl it under the terms of the GNU General Public License as published by
dnl the Free Software Foundation; either version 3 of the License, or
dnl (at your option) any later version.
dnl
dnl This program is distributed in the hope that it will be useful,
dnl but WITHOUT ANY WARRANTY; without even the implied warranty of
dnl MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
dnl GNU General Public License for more details.
dnl
dnl You should have received a copy of the GNU General Public License
dnl along with this program. If not, see <http://www.gnu.org/licenses/>.
dnl
dnl NB: This file is included in sim/configure, so keep settings namespaced.
AC_MSG_CHECKING([riscv bitsize])
SIM_RISCV_BITSIZE=64
AS_CASE([$target],
[riscv32*], [SIM_RISCV_BITSIZE=32])
AC_SUBST(SIM_RISCV_BITSIZE)

16
sim/riscv/aclocal.m4 vendored
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@ -1,16 +0,0 @@
# generated automatically by aclocal 1.15.1 -*- Autoconf -*-
# Copyright (C) 1996-2017 Free Software Foundation, Inc.
# This file is free software; the Free Software Foundation
# gives unlimited permission to copy and/or distribute it,
# with or without modifications, as long as this notice is preserved.
# This program is distributed in the hope that it will be useful,
# but WITHOUT ANY WARRANTY, to the extent permitted by law; without
# even the implied warranty of MERCHANTABILITY or FITNESS FOR A
# PARTICULAR PURPOSE.
m4_ifndef([AC_CONFIG_MACRO_DIRS], [m4_defun([_AM_CONFIG_MACRO_DIRS], [])m4_defun([AC_CONFIG_MACRO_DIRS], [_AM_CONFIG_MACRO_DIRS($@)])])
m4_include([../m4/sim_ac_option_bitsize.m4])
m4_include([../m4/sim_ac_output.m4])

3096
sim/riscv/configure vendored

File diff suppressed because it is too large Load Diff

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@ -1,17 +0,0 @@
dnl Process this file with autoconf to produce a configure script.
AC_INIT(Makefile.in)
AC_CONFIG_MACRO_DIRS([../m4 ../.. ../../config])
dnl The sim shouldn't be checking $target and changing behavior. But it is,
dnl and until we clean that up, we need to expand --target for use below.
AC_CANONICAL_SYSTEM
# Select the bitsize of the target.
riscv_addr_bitsize=
case "${target}" in
riscv32*) riscv_addr_bitsize=32 ;;
riscv*) riscv_addr_bitsize=64 ;;
esac
SIM_AC_OPTION_BITSIZE($riscv_addr_bitsize)
SIM_AC_OUTPUT