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gas/testsuite/
2009-01-06 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * gas/i386/avx.s: Add tests for 256bit vmovntdq, vmovntpd and vmovntps. * gas/i386/x86-64-avx.s: Likewise. * gas/i386/avx.d: Updated. * gas/i386/avx-intel.d: Likewise. * gas/i386/x86-64-avx.d: Likewise. * gas/i386/x86-64-avx-intel.d: Likewise. opcodes/ 2009-01-06 H.J. Lu <hongjiu.lu@intel.com> AVX Programming Reference (December, 2008) * i386-dis.c (VEX_LEN_2B_M_0): Removed. (VEX_LEN_E7_P_2_M_0): Likewise. (VEX_LEN_2C_P_1): Updated. (VEX_LEN_E8_P_2): Likewise. (vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0. (mod_table): Likewise. * i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps. * i386-tbl.h: Regenerated.
This commit is contained in:
H.J. Lu
@ -1,3 +1,16 @@
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2009-01-06 H.J. Lu <hongjiu.lu@intel.com>
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AVX Programming Reference (December, 2008)
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* i386-dis.c (VEX_LEN_2B_M_0): Removed.
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(VEX_LEN_E7_P_2_M_0): Likewise.
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(VEX_LEN_2C_P_1): Updated.
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(VEX_LEN_E8_P_2): Likewise.
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(vex_len_table): Remove VEX_LEN_2B_M_0 and VEX_LEN_E7_P_2_M_0.
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(mod_table): Likewise.
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* i386-opc.tbl: Add 256bit vmovntdq, vmovntpd and vmovntps.
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* i386-tbl.h: Regenerated.
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2009-01-05 H.J. Lu <hongjiu.lu@intel.com>
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* i386-gen.c (process_copyright): Update for 2009.
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@ -1066,8 +1066,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define VEX_LEN_17_M_0 (VEX_LEN_16_P_2 + 1)
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#define VEX_LEN_2A_P_1 (VEX_LEN_17_M_0 + 1)
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#define VEX_LEN_2A_P_3 (VEX_LEN_2A_P_1 + 1)
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#define VEX_LEN_2B_M_0 (VEX_LEN_2A_P_3 + 1)
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#define VEX_LEN_2C_P_1 (VEX_LEN_2B_M_0 + 1)
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#define VEX_LEN_2C_P_1 (VEX_LEN_2A_P_3 + 1)
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#define VEX_LEN_2C_P_3 (VEX_LEN_2C_P_1 + 1)
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#define VEX_LEN_2D_P_1 (VEX_LEN_2C_P_3 + 1)
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#define VEX_LEN_2D_P_3 (VEX_LEN_2D_P_1 + 1)
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@ -1153,8 +1152,7 @@ fetch_data (struct disassemble_info *info, bfd_byte *addr)
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#define VEX_LEN_E3_P_2 (VEX_LEN_E2_P_2 + 1)
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#define VEX_LEN_E4_P_2 (VEX_LEN_E3_P_2 + 1)
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#define VEX_LEN_E5_P_2 (VEX_LEN_E4_P_2 + 1)
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#define VEX_LEN_E7_P_2_M_0 (VEX_LEN_E5_P_2 + 1)
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#define VEX_LEN_E8_P_2 (VEX_LEN_E7_P_2_M_0 + 1)
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#define VEX_LEN_E8_P_2 (VEX_LEN_E5_P_2 + 1)
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#define VEX_LEN_E9_P_2 (VEX_LEN_E8_P_2 + 1)
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#define VEX_LEN_EA_P_2 (VEX_LEN_E9_P_2 + 1)
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#define VEX_LEN_EB_P_2 (VEX_LEN_EA_P_2 + 1)
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@ -7971,12 +7969,6 @@ static const struct dis386 vex_len_table[][2] = {
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{ "(bad)", { XX } },
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},
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/* VEX_LEN_2B_M_0 */
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{
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{ "vmovntpX", { Mx, XM } },
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{ "(bad)", { XX } },
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},
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/* VEX_LEN_2C_P_1 */
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{
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{ "vcvttss2siY", { Gv, EXd } },
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@ -8493,12 +8485,6 @@ static const struct dis386 vex_len_table[][2] = {
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{ "(bad)", { XX } },
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},
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/* VEX_LEN_E7_P_2_M_0 */
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{
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{ "vmovntdq", { Mx, XM } },
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{ "(bad)", { XX } },
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},
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/* VEX_LEN_E8_P_2 */
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{
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{ "vpsubsb", { XM, Vex128, EXx } },
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@ -9356,7 +9342,7 @@ static const struct dis386 mod_table[][2] = {
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},
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{
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/* MOD_VEX_2B */
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{ VEX_LEN_TABLE (VEX_LEN_2B_M_0) },
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{ "vmovntpX", { Mx, XM } },
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{ "(bad)", { XX } },
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},
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{
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@ -9431,7 +9417,7 @@ static const struct dis386 mod_table[][2] = {
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},
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{
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/* MOD_VEX_E7_PREFIX_2 */
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{ VEX_LEN_TABLE (VEX_LEN_E7_P_2_M_0) },
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{ "vmovntdq", { Mx, XM } },
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{ "(bad)", { XX } },
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},
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{
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@ -2119,9 +2119,12 @@ vmovmskpd, 2, 0x6650, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|IgnoreSize|No_bSuf
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vmovmskps, 2, 0x50, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|NoRex64, { RegXMM, Reg32|Reg64 }
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vmovmskps, 2, 0x50, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|IgnoreSize|No_bSuf|No_wSuf|No_sSuf|No_ldSuf|NoRex64, { RegYMM, Reg32|Reg64 }
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vmovntdq, 2, 0x66e7, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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vmovntdq, 2, 0x66e7, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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vmovntdqa, 2, 0x662a, None, 1, CpuAVX, Modrm|Vex|Vex0F38|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S, RegXMM }
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vmovntpd, 2, 0x662b, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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vmovntpd, 2, 0x662b, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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vmovntps, 2, 0x2b, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegXMM, Xmmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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vmovntps, 2, 0x2b, None, 1, CpuAVX, Modrm|Vex|Vex0F|Vex256|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { RegYMM, Ymmword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S }
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vmovq, 2, 0xf37e, None, 1, CpuAVX, S|Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM, RegXMM }
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vmovq, 2, 0x66d6, None, 1, CpuAVX, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf|NoRex64, { RegXMM, Qword|Unspecified|BaseIndex|Disp8|Disp16|Disp32|Disp32S|RegXMM }
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vmovq, 2, 0x666e, None, 1, CpuAVX|Cpu64, Modrm|Vex|Vex0F|IgnoreSize|No_bSuf|No_wSuf|No_lSuf|No_sSuf|No_qSuf|No_ldSuf, { Reg64|Qword|Unspecified|BaseIndex|Disp8|Disp32|Disp32S, RegXMM }
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@ -21548,6 +21548,18 @@ const template i386_optab[] =
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 1, 0, 0, 0 } } } },
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{ "vmovntdq", 2, 0x66e7, None, 1,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
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1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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{ { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 1, 1, 0, 0, 0 } } } },
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{ "vmovntdqa", 2, 0x662a, None, 1,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
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@ -21572,6 +21584,18 @@ const template i386_optab[] =
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 1, 0, 0, 0 } } } },
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{ "vmovntpd", 2, 0x662b, None, 1,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
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1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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{ { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 1, 1, 0, 0, 0 } } } },
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{ "vmovntps", 2, 0x2b, None, 1,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
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@ -21584,6 +21608,18 @@ const template i386_optab[] =
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 0, 1, 0, 0, 0 } } } },
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{ "vmovntps", 2, 0x2b, None, 1,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
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{ 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 0, 1, 1, 1,
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1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 },
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{ { { 0, 0, 0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 0 } },
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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1, 1, 1, 1, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 1, 1, 0, 0, 0 } } } },
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{ "vmovq", 2, 0xf37e, None, 1,
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{ { 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,
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0, 0, 0, 0, 0, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0 } },
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