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Fixes for the encoding and decoding of the PDP11's SOB instruction
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@ -1,3 +1,8 @@
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2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
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* config/tc-pdp11.c (md_apply_fix3): Change to sign of the SOB
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instruction's offset.
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2004-10-01 Adam Nemet <anemet@lnxw.com>
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2004-10-01 Adam Nemet <anemet@lnxw.com>
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* (TARGET_FORMAT): Remove LynxOS COFF definition.
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* (TARGET_FORMAT): Remove LynxOS COFF definition.
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@ -1,5 +1,5 @@
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/* tc-pdp11.c - pdp11-specific -
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/* tc-pdp11.c - pdp11-specific -
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Copyright 2001, 2002 Free Software Foundation, Inc.
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Copyright 2001, 2002, 2004 Free Software Foundation, Inc.
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This file is part of GAS, the GNU Assembler.
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This file is part of GAS, the GNU Assembler.
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@ -199,6 +199,7 @@ md_apply_fix3 (fixP, valP, seg)
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case BFD_RELOC_PDP11_DISP_6_PCREL:
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case BFD_RELOC_PDP11_DISP_6_PCREL:
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mask = 0x003f;
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mask = 0x003f;
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shift = 1;
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shift = 1;
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val = -val;
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break;
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break;
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default:
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default:
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BAD_CASE (fixP->fx_r_type);
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BAD_CASE (fixP->fx_r_type);
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@ -1,3 +1,7 @@
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2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
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* gas/pdp11/opcode.d: Fix sob opcode value.
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2004-09-30 Paul Brook <paul@codesourcery.com>
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2004-09-30 Paul Brook <paul@codesourcery.com>
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* gas/arm/arch6zk.d: New file.
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* gas/arm/arch6zk.d: New file.
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@ -134,7 +134,7 @@ Disassembly of section .text:
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108: 7c7f [ ]*cvtlpi
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108: 7c7f [ ]*cvtlpi
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10a: 7d80 [ ]*med
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10a: 7d80 [ ]*med
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10c: 7dea [ ]*xfc 52
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10c: 7dea [ ]*xfc 52
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10e: 7e3e [ ]*sob r0, 10c <start2\+0x106>
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10e: 7e02 [ ]*sob r0, 10c <start2\+0x106>
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110: 80fd [ ]*bpl 10c <start2\+0x106>
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110: 80fd [ ]*bpl 10c <start2\+0x106>
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112: 81fc [ ]*bmi 10c <start2\+0x106>
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112: 81fc [ ]*bmi 10c <start2\+0x106>
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114: 82fb [ ]*bhi 10c <start2\+0x106>
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114: 82fb [ ]*bhi 10c <start2\+0x106>
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@ -1,3 +1,8 @@
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2004-10-01 Bill Farmer <Bill@the-farmers.freeserve.co.uk>
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* pdp11-dis.c (print_insn_pdp11): Subtract the SOB's displacement
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rather than add it.
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2004-09-30 Paul Brook <paul@codesourcery.com>
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2004-09-30 Paul Brook <paul@codesourcery.com>
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* arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
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* arm-dis.c (print_insn_arm): Handle 'e' for SMI instruction.
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@ -342,7 +342,8 @@ print_insn_pdp11 (memaddr, info)
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case PDP11_OPCODE_REG_DISPL:
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case PDP11_OPCODE_REG_DISPL:
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{
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{
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int displ = (opcode & 0x3f) << 10;
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int displ = (opcode & 0x3f) << 10;
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bfd_vma address = memaddr + (sign_extend (displ) >> 9);
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bfd_vma address = memaddr - (displ >> 9);
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FPRINTF (F, OP.name);
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FPRINTF (F, OP.name);
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FPRINTF (F, AFTER_INSTRUCTION);
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FPRINTF (F, AFTER_INSTRUCTION);
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print_reg (src, info);
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print_reg (src, info);
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