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* m32r-opc.h,m32r-opc.c,m32r-asm.c,m32r-dis.c: Regenerate.
This commit is contained in:
Doug Evans
@ -3,7 +3,7 @@
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This file is used to generate m32r-dis.c.
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Copyright (C) 1996, 1997 Free Software Foundation, Inc.
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Copyright (C) 1996, 1997, 1998 Free Software Foundation, Inc.
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This file is part of the GNU Binutils and GDB, the GNU debugger.
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@ -46,57 +46,32 @@ Foundation, Inc., 59 Temple Place - Suite 330, Boston, MA 02111-1307, USA. */
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static int print_insn PARAMS ((bfd_vma, disassemble_info *, char *, int));
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static int extract_normal
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PARAMS ((PTR, cgen_insn_t, unsigned int, int, int, int, long *));
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static void print_normal
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PARAMS ((PTR, long, unsigned int, unsigned long, int));
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static void print_keyword
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PARAMS ((PTR, CGEN_KEYWORD *, long, unsigned int));
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static int extract_insn_normal
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PARAMS ((const CGEN_INSN *, void *, cgen_insn_t, CGEN_FIELDS *));
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static void print_insn_normal
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PARAMS ((void *, const CGEN_INSN *, CGEN_FIELDS *, bfd_vma, int));
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/* Default extraction routine.
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/* -- disassembler routines inserted here */
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/* -- dis.c */
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ATTRS is a mask of the boolean attributes. We only need `unsigned',
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but for generality we take a bitmask of all of them. */
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/* Immediate values are prefixed with '#'. */
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static int
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extract_normal (buf_ctrl, insn_value, attrs, start, length, shift, total_length, valuep)
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PTR buf_ctrl;
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cgen_insn_t insn_value;
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unsigned int attrs;
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int start, length, shift, total_length;
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long *valuep;
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{
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long value;
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#define CGEN_PRINT_NORMAL(info, value, attrs, pc, length) \
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do { \
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if ((attrs) & (1 << CGEN_OPERAND_HASH_PREFIX)) \
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(*info->fprintf_func) (info->stream, "#"); \
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} while (0)
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#ifdef CGEN_INT_INSN
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#if 0
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value = ((insn_value >> (CGEN_BASE_INSN_BITSIZE - (start + length)))
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& ((1 << length) - 1));
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#else
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value = ((insn_value >> (total_length - (start + length)))
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& ((1 << length) - 1));
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#endif
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if (! (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED))
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&& (value & (1 << (length - 1))))
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value -= 1 << length;
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#else
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/* FIXME: unfinished */
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#endif
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/* This is backwards as we undo the effects of insert_normal. */
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if (shift < 0)
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value >>= -shift;
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else
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value <<= shift;
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*valuep = value;
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/* FIXME: for now */
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return 1;
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}
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/* Default print handler. */
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/* Handle '#' prefixes as operands. */
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static void
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print_normal (dis_info, value, attrs, pc, length)
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print_hash (dis_info, value, attrs, pc, length)
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PTR dis_info;
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long value;
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unsigned int attrs;
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@ -104,44 +79,9 @@ print_normal (dis_info, value, attrs, pc, length)
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int length;
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{
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disassemble_info *info = dis_info;
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/* Print the operand as directed by the attributes. */
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if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_FAKE))
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; /* nothing to do (??? at least not yet) */
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else if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_PCREL_ADDR))
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(*info->print_address_func) (pc + CGEN_PCREL_OFFSET + value, info);
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/* ??? Not all cases of this are currently caught. */
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else if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_ABS_ADDR))
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/* FIXME: Why & 0xffffffff? */
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(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
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else if (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED))
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(*info->fprintf_func) (info->stream, "0x%lx", value);
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else
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(*info->fprintf_func) (info->stream, "%ld", value);
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(*info->fprintf_func) (info->stream, "#");
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}
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/* Keyword print handler. */
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static void
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print_keyword (dis_info, keyword_table, value, attrs)
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PTR dis_info;
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CGEN_KEYWORD *keyword_table;
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long value;
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CGEN_ATTR *attrs;
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{
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disassemble_info *info = dis_info;
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const CGEN_KEYWORD_ENTRY *ke;
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ke = cgen_keyword_lookup_value (keyword_table, value);
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if (ke != NULL)
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(*info->fprintf_func) (info->stream, "%s", ke->name);
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else
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(*info->fprintf_func) (info->stream, "???");
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}
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/* -- disassembler routines inserted here */
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/* -- dis.c */
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#undef CGEN_PRINT_INSN
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#define CGEN_PRINT_INSN my_print_insn
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@ -209,92 +149,95 @@ m32r_cgen_extract_operand (opindex, buf_ctrl, insn_value, fields)
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switch (opindex)
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{
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case M32R_OPERAND_SR :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_r2);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), & fields->f_r2);
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break;
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case M32R_OPERAND_DR :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_r1);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), & fields->f_r1);
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break;
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case M32R_OPERAND_SRC1 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_r1);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), & fields->f_r1);
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break;
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case M32R_OPERAND_SRC2 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_r2);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), & fields->f_r2);
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break;
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case M32R_OPERAND_SCR :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_r2);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), & fields->f_r2);
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break;
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case M32R_OPERAND_DCR :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_r1);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 4, CGEN_FIELDS_BITSIZE (fields), & fields->f_r1);
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break;
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case M32R_OPERAND_SIMM8 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0, 8, 8, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_simm8);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_HASH_PREFIX), 8, 8, CGEN_FIELDS_BITSIZE (fields), & fields->f_simm8);
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break;
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case M32R_OPERAND_SIMM16 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0, 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_simm16);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_HASH_PREFIX), 16, 16, CGEN_FIELDS_BITSIZE (fields), & fields->f_simm16);
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break;
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case M32R_OPERAND_UIMM4 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm4);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 12, 4, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm4);
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break;
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case M32R_OPERAND_UIMM5 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 11, 5, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm5);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 11, 5, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm5);
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break;
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case M32R_OPERAND_UIMM16 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm16);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm16);
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break;
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/* start-sanitize-m32rx */
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case M32R_OPERAND_IMM1 :
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{
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long value;
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 15, 1, 0, CGEN_FIELDS_BITSIZE (fields), & value);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), 15, 1, CGEN_FIELDS_BITSIZE (fields), & value);
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fields->f_imm1 = ((value) + (1));
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}
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break;
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/* end-sanitize-m32rx */
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/* start-sanitize-m32rx */
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case M32R_OPERAND_ACCD :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 2, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_accd);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 4, 2, CGEN_FIELDS_BITSIZE (fields), & fields->f_accd);
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break;
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/* end-sanitize-m32rx */
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/* start-sanitize-m32rx */
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case M32R_OPERAND_ACCS :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 2, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_accs);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 12, 2, CGEN_FIELDS_BITSIZE (fields), & fields->f_accs);
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break;
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/* end-sanitize-m32rx */
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/* start-sanitize-m32rx */
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case M32R_OPERAND_ACC :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 1, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_acc);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 8, 1, CGEN_FIELDS_BITSIZE (fields), & fields->f_acc);
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break;
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/* end-sanitize-m32rx */
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case M32R_OPERAND_HASH :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0, 0, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_nil);
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break;
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case M32R_OPERAND_HI16 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_hi16);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, CGEN_FIELDS_BITSIZE (fields), & fields->f_hi16);
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break;
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case M32R_OPERAND_SLO16 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0, 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_simm16);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0, 16, 16, CGEN_FIELDS_BITSIZE (fields), & fields->f_simm16);
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break;
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case M32R_OPERAND_ULO16 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm16);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_UNSIGNED), 16, 16, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm16);
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break;
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case M32R_OPERAND_UIMM24 :
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_UNSIGNED), 8, 24, 0, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm24);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_UNSIGNED), 8, 24, CGEN_FIELDS_BITSIZE (fields), & fields->f_uimm24);
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break;
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case M32R_OPERAND_DISP8 :
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{
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long value;
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 8, 0, CGEN_FIELDS_BITSIZE (fields), & value);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 8, CGEN_FIELDS_BITSIZE (fields), & value);
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fields->f_disp8 = ((value) << (2));
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}
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break;
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case M32R_OPERAND_DISP16 :
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{
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long value;
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 16, 16, 0, CGEN_FIELDS_BITSIZE (fields), & value);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 16, 16, CGEN_FIELDS_BITSIZE (fields), & value);
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fields->f_disp16 = ((value) << (2));
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}
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break;
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case M32R_OPERAND_DISP24 :
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{
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long value;
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 24, 0, CGEN_FIELDS_BITSIZE (fields), & value);
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length = extract_normal (NULL /*FIXME*/, insn_value, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), 8, 24, CGEN_FIELDS_BITSIZE (fields), & value);
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fields->f_disp24 = ((value) << (2));
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}
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break;
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@ -352,23 +295,23 @@ m32r_cgen_print_operand (opindex, info, fields, attrs, pc, length)
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print_keyword (info, & m32r_cgen_opval_h_cr, fields->f_r1, 0|(1<<CGEN_OPERAND_UNSIGNED));
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break;
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case M32R_OPERAND_SIMM8 :
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print_normal (info, fields->f_simm8, 0, pc, length);
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print_normal (info, fields->f_simm8, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
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break;
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case M32R_OPERAND_SIMM16 :
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print_normal (info, fields->f_simm16, 0, pc, length);
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print_normal (info, fields->f_simm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX), pc, length);
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break;
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case M32R_OPERAND_UIMM4 :
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print_normal (info, fields->f_uimm4, 0|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
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print_normal (info, fields->f_uimm4, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
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break;
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||||
case M32R_OPERAND_UIMM5 :
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print_normal (info, fields->f_uimm5, 0|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
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print_normal (info, fields->f_uimm5, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
|
||||
break;
|
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case M32R_OPERAND_UIMM16 :
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print_normal (info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
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print_normal (info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
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break;
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/* start-sanitize-m32rx */
|
||||
case M32R_OPERAND_IMM1 :
|
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print_normal (info, fields->f_imm1, 0|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
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print_normal (info, fields->f_imm1, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
|
||||
break;
|
||||
/* end-sanitize-m32rx */
|
||||
/* start-sanitize-m32rx */
|
||||
@ -386,6 +329,9 @@ m32r_cgen_print_operand (opindex, info, fields, attrs, pc, length)
|
||||
print_keyword (info, & m32r_cgen_opval_h_accums, fields->f_acc, 0|(1<<CGEN_OPERAND_UNSIGNED));
|
||||
break;
|
||||
/* end-sanitize-m32rx */
|
||||
case M32R_OPERAND_HASH :
|
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print_hash (info, fields->f_nil, 0, pc, length);
|
||||
break;
|
||||
case M32R_OPERAND_HI16 :
|
||||
print_normal (info, fields->f_hi16, 0|(1<<CGEN_OPERAND_SIGN_OPT)|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
|
||||
break;
|
||||
@ -396,7 +342,7 @@ m32r_cgen_print_operand (opindex, info, fields, attrs, pc, length)
|
||||
print_normal (info, fields->f_uimm16, 0|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
|
||||
break;
|
||||
case M32R_OPERAND_UIMM24 :
|
||||
print_normal (info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
|
||||
print_normal (info, fields->f_uimm24, 0|(1<<CGEN_OPERAND_HASH_PREFIX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_ABS_ADDR)|(1<<CGEN_OPERAND_UNSIGNED), pc, length);
|
||||
break;
|
||||
case M32R_OPERAND_DISP8 :
|
||||
print_normal (info, fields->f_disp8, 0|(1<<CGEN_OPERAND_RELAX)|(1<<CGEN_OPERAND_RELOC)|(1<<CGEN_OPERAND_PCREL_ADDR), pc, length);
|
||||
@ -434,10 +380,96 @@ m32r_cgen_init_dis (mach, endian)
|
||||
enum cgen_endian endian;
|
||||
{
|
||||
m32r_cgen_init_tables (mach);
|
||||
cgen_set_cpu (& m32r_cgen_opcode_data, mach, endian);
|
||||
cgen_set_cpu (& m32r_cgen_opcode_table, mach, endian);
|
||||
cgen_dis_init ();
|
||||
}
|
||||
|
||||
|
||||
/* Default extraction routine.
|
||||
|
||||
ATTRS is a mask of the boolean attributes. We only need `unsigned',
|
||||
but for generality we take a bitmask of all of them. */
|
||||
|
||||
static int
|
||||
extract_normal (buf_ctrl, insn_value, attrs, start, length, total_length, valuep)
|
||||
PTR buf_ctrl;
|
||||
cgen_insn_t insn_value;
|
||||
unsigned int attrs;
|
||||
int start, length, total_length;
|
||||
long *valuep;
|
||||
{
|
||||
long value;
|
||||
|
||||
#ifdef CGEN_INT_INSN
|
||||
#if 0
|
||||
value = ((insn_value >> (CGEN_BASE_INSN_BITSIZE - (start + length)))
|
||||
& ((1 << length) - 1));
|
||||
#else
|
||||
value = ((insn_value >> (total_length - (start + length)))
|
||||
& ((1 << length) - 1));
|
||||
#endif
|
||||
if (! (attrs & CGEN_ATTR_MASK (CGEN_OPERAND_UNSIGNED))
|
||||
&& (value & (1 << (length - 1))))
|
||||
value -= 1 << length;
|
||||
#else
|
||||
/* FIXME: unfinished */
|
||||
#endif
|
||||
|
||||
*valuep = value;
|
||||
|
||||
/* FIXME: for now */
|
||||
return 1;
|
||||
}
|
||||
|
||||
/* Default print handler. */
|
||||
|
||||
static void
|
||||
print_normal (dis_info, value, attrs, pc, length)
|
||||
PTR dis_info;
|
||||
long value;
|
||||
unsigned int attrs;
|
||||
unsigned long pc; /* FIXME: should be bfd_vma */
|
||||
int length;
|
||||
{
|
||||
disassemble_info *info = dis_info;
|
||||
|
||||
#ifdef CGEN_PRINT_NORMAL
|
||||
CGEN_PRINT_NORMAL (info, value, attrs, pc, length);
|
||||
#endif
|
||||
|
||||
/* Print the operand as directed by the attributes. */
|
||||
if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_FAKE))
|
||||
; /* nothing to do (??? at least not yet) */
|
||||
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_PCREL_ADDR))
|
||||
(*info->print_address_func) (pc + CGEN_PCREL_OFFSET + value, info);
|
||||
/* ??? Not all cases of this are currently caught. */
|
||||
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_ABS_ADDR))
|
||||
/* FIXME: Why & 0xffffffff? */
|
||||
(*info->print_address_func) ((bfd_vma) value & 0xffffffff, info);
|
||||
else if (CGEN_BOOL_ATTR (attrs, CGEN_OPERAND_UNSIGNED))
|
||||
(*info->fprintf_func) (info->stream, "0x%lx", value);
|
||||
else
|
||||
(*info->fprintf_func) (info->stream, "%ld", value);
|
||||
}
|
||||
|
||||
/* Keyword print handler. */
|
||||
|
||||
static void
|
||||
print_keyword (dis_info, keyword_table, value, attrs)
|
||||
PTR dis_info;
|
||||
CGEN_KEYWORD *keyword_table;
|
||||
long value;
|
||||
unsigned int attrs;
|
||||
{
|
||||
disassemble_info *info = dis_info;
|
||||
const CGEN_KEYWORD_ENTRY *ke;
|
||||
|
||||
ke = cgen_keyword_lookup_value (keyword_table, value);
|
||||
if (ke != NULL)
|
||||
(*info->fprintf_func) (info->stream, "%s", ke->name);
|
||||
else
|
||||
(*info->fprintf_func) (info->stream, "???");
|
||||
}
|
||||
|
||||
/* Default insn extractor.
|
||||
|
||||
|
||||
Reference in New Issue
Block a user