mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-08-26 07:19:16 +08:00
2011-01-10 Michael Snyder <msnyder@vmware.com>
* nto-procfs.c: Comment cleanup, mostly periods and spaces. * nto-tdep.c: Ditto. * nto-tdep.h: Ditto. * objc-exp.y: Ditto. * objc-lang.c: Ditto. * objfiles.c: Ditto. * objfiles.h: Ditto. * observer.c: Ditto. * opencl-lang.c: Ditto. * osabi.c: Ditto. * parse.c: Ditto. * parser-defs.h: Ditto. * p-exp.y: Ditto. * p-lang.c: Ditto. * posix-hdep.c: Ditto. * ppcbug-rom.c: Ditto. * ppc-linux-nat.c: Ditto. * ppc-linux-tdep.c: Ditto. * ppc-linux-tdep.h: Ditto. * ppcnbsd-tdep.c: Ditto. * ppcobsd-tdep.c: Ditto. * ppcobsd-tdep.h: Ditto. * ppc-sysv-tdep.c: Ditto. * ppc-tdep.h: Ditto. * printcmd.c: Ditto. * proc-abi.c: Ditto. * proc-flags.c: Ditto. * procfs.c: Ditto. * proc-utils.h: Ditto. * progspace.h: Ditto. * prologue-value.c: Ditto. * prologue-value.h: Ditto. * psympriv.h: Ditto. * psymtab.c: Ditto. * p-typeprint.c: Ditto. * p-valprint.c: Ditto. * ravenscar-sparc-thread.c: Ditto. * ravenscar-thread.c: Ditto. * ravenscar-thread.h: Ditto. * record.c: Ditto. * regcache.c: Ditto. * regcache.h: Ditto. * remote.c: Ditto. * remote-fileio.c: Ditto. * remote-fileio.h: Ditto. * remote.h: Ditto. * remote-m32r-sdi.c: Ditto. * remote-mips.c: Ditto. * remote-sim.c: Ditto. * rs6000-aix-tdep.c: Ditto. * rs6000-nat.c: Ditto. * rs6000-tdep.c: Ditto.
This commit is contained in:
@ -42,7 +42,7 @@
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#include <sys/procfs.h>
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#include <sys/ptrace.h>
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/* Prototypes for supply_gregset etc. */
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/* Prototypes for supply_gregset etc. */
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#include "gregset.h"
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#include "ppc-tdep.h"
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#include "ppc-linux-tdep.h"
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@ -130,12 +130,12 @@
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struct ppc_debug_info
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{
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uint32_t version; /* Only version 1 exists to date */
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uint32_t version; /* Only version 1 exists to date. */
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uint32_t num_instruction_bps;
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uint32_t num_data_bps;
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uint32_t num_condition_regs;
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uint32_t data_bp_alignment;
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uint32_t sizeof_condition; /* size of the DVC register */
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uint32_t sizeof_condition; /* size of the DVC register. */
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uint64_t features;
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};
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@ -205,7 +205,7 @@ struct ppc_hw_breakpoint
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There are 32 vector registers 16 bytes longs, plus a VSCR register
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which is only 4 bytes long, but is fetched as a 16 bytes
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quantity. Up to here we have the elf_vrregset_t structure.
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quantity. Up to here we have the elf_vrregset_t structure.
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Appended to this there is space for the VRSAVE register: 4 bytes.
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Even though this vrsave register is not included in the regset
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typedef, it is handled by the ptrace requests.
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@ -325,10 +325,14 @@ PT_R0, PT_R1, PT_R2, PT_R3, PT_R4, PT_R5, PT_R6, PT_R7,
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PT_R8, PT_R9, PT_R10, PT_R11, PT_R12, PT_R13, PT_R14, PT_R15,
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PT_R16, PT_R17, PT_R18, PT_R19, PT_R20, PT_R21, PT_R22, PT_R23,
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PT_R24, PT_R25, PT_R26, PT_R27, PT_R28, PT_R29, PT_R30, PT_R31,
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PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6, PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
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PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22, PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
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PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38, PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
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PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54, PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
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PT_FPR0, PT_FPR0 + 2, PT_FPR0 + 4, PT_FPR0 + 6,
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PT_FPR0 + 8, PT_FPR0 + 10, PT_FPR0 + 12, PT_FPR0 + 14,
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PT_FPR0 + 16, PT_FPR0 + 18, PT_FPR0 + 20, PT_FPR0 + 22,
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PT_FPR0 + 24, PT_FPR0 + 26, PT_FPR0 + 28, PT_FPR0 + 30,
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PT_FPR0 + 32, PT_FPR0 + 34, PT_FPR0 + 36, PT_FPR0 + 38,
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PT_FPR0 + 40, PT_FPR0 + 42, PT_FPR0 + 44, PT_FPR0 + 46,
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PT_FPR0 + 48, PT_FPR0 + 50, PT_FPR0 + 52, PT_FPR0 + 54,
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PT_FPR0 + 56, PT_FPR0 + 58, PT_FPR0 + 60, PT_FPR0 + 62,
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PT_NIP, PT_MSR, PT_CCR, PT_LNK, PT_CTR, PT_XER, PT_MQ */
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/* *INDENT_ON * */
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@ -341,7 +345,7 @@ ppc_register_u_addr (struct gdbarch *gdbarch, int regno)
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interface, and not the wordsize of the program's ABI. */
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int wordsize = sizeof (long);
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/* General purpose registers occupy 1 slot each in the buffer */
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/* General purpose registers occupy 1 slot each in the buffer. */
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if (regno >= tdep->ppc_gp0_regnum
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&& regno < tdep->ppc_gp0_regnum + ppc_num_gprs)
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u_addr = ((regno - tdep->ppc_gp0_regnum + PT_R0) * wordsize);
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@ -354,7 +358,7 @@ ppc_register_u_addr (struct gdbarch *gdbarch, int regno)
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&& regno < tdep->ppc_fp0_regnum + ppc_num_fprs)
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u_addr = (PT_FPR0 * wordsize) + ((regno - tdep->ppc_fp0_regnum) * 8);
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/* UISA special purpose registers: 1 slot each */
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/* UISA special purpose registers: 1 slot each. */
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if (regno == gdbarch_pc_regnum (gdbarch))
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u_addr = PT_NIP * wordsize;
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if (regno == tdep->ppc_lr_regnum)
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@ -459,7 +463,8 @@ fetch_altivec_register (struct regcache *regcache, int tid, int regno)
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offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
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regcache_raw_supply (regcache, regno,
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regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
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regs + (regno
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- tdep->ppc_vr0_regnum) * vrregsize + offset);
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}
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/* Fetch the top 32 bits of TID's general-purpose registers and the
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@ -543,7 +548,7 @@ fetch_register (struct regcache *regcache, int tid, int regno)
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/* This isn't really an address. But ptrace thinks of it as one. */
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CORE_ADDR regaddr = ppc_register_u_addr (gdbarch, regno);
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int bytes_transferred;
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unsigned int offset; /* Offset of registers within the u area. */
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unsigned int offset; /* Offset of registers within the u area. */
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char buf[MAX_REGISTER_SIZE];
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if (altivec_register_p (gdbarch, regno))
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@ -855,10 +860,10 @@ static void
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ppc_linux_fetch_inferior_registers (struct target_ops *ops,
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struct regcache *regcache, int regno)
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{
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/* Overload thread id onto process id */
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/* Overload thread id onto process id. */
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int tid = TIDGET (inferior_ptid);
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/* No thread id, just use process id */
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/* No thread id, just use process id. */
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if (tid == 0)
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tid = PIDGET (inferior_ptid);
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@ -868,7 +873,7 @@ ppc_linux_fetch_inferior_registers (struct target_ops *ops,
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fetch_register (regcache, tid, regno);
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}
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/* Store one VSX register. */
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/* Store one VSX register. */
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static void
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store_vsx_register (const struct regcache *regcache, int tid, int regno)
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{
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@ -897,7 +902,7 @@ store_vsx_register (const struct regcache *regcache, int tid, int regno)
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perror_with_name (_("Unable to store VSX register"));
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}
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/* Store one register. */
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/* Store one register. */
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static void
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store_altivec_register (const struct regcache *regcache, int tid, int regno)
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{
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@ -925,7 +930,8 @@ store_altivec_register (const struct regcache *regcache, int tid, int regno)
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offset = vrregsize - register_size (gdbarch, tdep->ppc_vrsave_regnum);
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regcache_raw_collect (regcache, regno,
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regs + (regno - tdep->ppc_vr0_regnum) * vrregsize + offset);
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regs + (regno
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- tdep->ppc_vr0_regnum) * vrregsize + offset);
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ret = ptrace (PTRACE_SETVRREGS, tid, 0, ®s);
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if (ret < 0)
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@ -1413,7 +1419,8 @@ have_ptrace_booke_interface (void)
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{
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have_ptrace_booke_interface = 1;
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max_slots_number = booke_debug_info.num_instruction_bps
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+ booke_debug_info.num_data_bps + booke_debug_info.num_condition_regs;
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+ booke_debug_info.num_data_bps
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+ booke_debug_info.num_condition_regs;
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}
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else
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{
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@ -1464,9 +1471,9 @@ ppc_linux_can_use_hw_breakpoint (int type, int cnt, int ot)
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int tid;
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ptid_t ptid = inferior_ptid;
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/* We need to know whether ptrace supports PTRACE_SET_DEBUGREG and whether
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the target has DABR. If either answer is no, the ptrace call will
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return -1. Fail in that case. */
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/* We need to know whether ptrace supports PTRACE_SET_DEBUGREG
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and whether the target has DABR. If either answer is no, the
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ptrace call will return -1. Fail in that case. */
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tid = TIDGET (ptid);
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if (tid == 0)
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tid = PIDGET (ptid);
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@ -1541,7 +1548,8 @@ booke_find_thread_points_by_tid (int tid, int alloc_new)
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if (alloc_new)
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{
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t = xmalloc (sizeof (struct thread_points));
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t->hw_breaks = xzalloc (max_slots_number * sizeof (struct hw_break_tuple));
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t->hw_breaks
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= xzalloc (max_slots_number * sizeof (struct hw_break_tuple));
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t->tid = tid;
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VEC_safe_push (thread_points_p, ppc_threads, t);
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}
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@ -1615,7 +1623,8 @@ booke_remove_point (struct ppc_hw_breakpoint *b, int tid)
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errno = 0;
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if (ptrace (PPC_PTRACE_DELHWDEBUG, tid, 0, hw_breaks[i].slot) < 0)
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if (errno != ENOENT)
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perror_with_name (_("Unexpected error deleting breakpoint or watchpoint"));
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perror_with_name (_("Unexpected error deleting "
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"breakpoint or watchpoint"));
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xfree (hw_breaks[i].hw_break);
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hw_breaks[i].hw_break = NULL;
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@ -1750,7 +1759,8 @@ calculate_dvc (CORE_ADDR addr, int len, CORE_ADDR data_value,
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*condition_mode = PPC_BREAKPOINT_CONDITION_AND;
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for (i = 0; i < num_byte_enable; i++)
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*condition_mode |= PPC_BREAKPOINT_CONDITION_BE (i + rightmost_enabled_byte);
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*condition_mode
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|= PPC_BREAKPOINT_CONDITION_BE (i + rightmost_enabled_byte);
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/* Now we need to match the position within the DVC of the comparison
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value with where the watch region is relative to the window
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@ -1799,7 +1809,7 @@ num_memory_accesses (struct value *v)
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if (!value_lazy (v))
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found_memory_cnt++;
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}
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/* Other kinds of values are not fine. */
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/* Other kinds of values are not fine. */
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else
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return -1;
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}
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@ -2025,11 +2035,11 @@ ppc_linux_new_thread (ptid_t ptid)
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if (VEC_empty (thread_points_p, ppc_threads))
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return;
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/* Get a list of breakpoints from any thread. */
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/* Get a list of breakpoints from any thread. */
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p = VEC_last (thread_points_p, ppc_threads);
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hw_breaks = p->hw_breaks;
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/* Copy that thread's breakpoints and watchpoints to the new thread. */
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/* Copy that thread's breakpoints and watchpoints to the new thread. */
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for (i = 0; i < max_slots_number; i++)
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if (hw_breaks[i].hw_break)
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booke_insert_point (hw_breaks[i].hw_break, tid);
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@ -2133,7 +2143,7 @@ ppc_linux_watchpoint_addr_within_range (struct target_ops *target,
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addr &= ~mask;
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/* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
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/* Check whether [start, start+length-1] intersects [addr, addr+mask]. */
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return start <= addr + mask && start + length - 1 >= addr;
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}
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@ -2141,10 +2151,10 @@ static void
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ppc_linux_store_inferior_registers (struct target_ops *ops,
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struct regcache *regcache, int regno)
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{
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/* Overload thread id onto process id */
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/* Overload thread id onto process id. */
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int tid = TIDGET (inferior_ptid);
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/* No thread id, just use process id */
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/* No thread id, just use process id. */
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if (tid == 0)
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tid = PIDGET (inferior_ptid);
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@ -2156,7 +2166,7 @@ ppc_linux_store_inferior_registers (struct target_ops *ops,
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/* Functions for transferring registers between a gregset_t or fpregset_t
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(see sys/ucontext.h) and gdb's regcache. The word size is that used
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by the ptrace interface, not the current program's ABI. eg. If a
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by the ptrace interface, not the current program's ABI. Eg. if a
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powerpc64-linux gdb is being used to debug a powerpc32-linux app, we
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read or write 64-bit gregsets. This is to suit the host libthread_db. */
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@ -2296,7 +2306,7 @@ ppc_linux_read_description (struct target_ops *ops)
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}
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/* Power ISA 2.05 (implemented by Power 6 and newer processors) increases
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the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
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the FPSCR from 32 bits to 64 bits. Even though Power 7 supports this
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ISA version, it doesn't have PPC_FEATURE_ARCH_2_05 set, only
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PPC_FEATURE_ARCH_2_06. Since for now the only bits used in the higher
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half of the register are for Decimal Floating Point, we check if that
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@ -2314,7 +2324,8 @@ ppc_linux_read_description (struct target_ops *ops)
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else if (vsx)
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return isa205? tdesc_powerpc_isa205_vsx64l : tdesc_powerpc_vsx64l;
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else if (altivec)
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return isa205? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
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return isa205
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? tdesc_powerpc_isa205_altivec64l : tdesc_powerpc_altivec64l;
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return isa205? tdesc_powerpc_isa205_64l : tdesc_powerpc_64l;
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}
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@ -2353,7 +2364,8 @@ _initialize_ppc_linux_nat (void)
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t->to_stopped_by_watchpoint = ppc_linux_stopped_by_watchpoint;
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t->to_stopped_data_address = ppc_linux_stopped_data_address;
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t->to_watchpoint_addr_within_range = ppc_linux_watchpoint_addr_within_range;
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t->to_can_accel_watchpoint_condition = ppc_linux_can_accel_watchpoint_condition;
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t->to_can_accel_watchpoint_condition
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= ppc_linux_can_accel_watchpoint_condition;
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t->to_read_description = ppc_linux_read_description;
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t->to_auxv_parse = ppc_linux_auxv_parse;
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