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Add preliminary support for IRIX's n32 abi to the MIPS's multi-arch code.

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This commit is contained in:
Andrew Cagney
2000-05-11 03:40:08 +00:00
parent de950844b3
commit 0dadbba0df
3 changed files with 146 additions and 59 deletions

17
gdb/ChangeLog

@ -1,3 +1,19 @@
Thu May 11 13:24:52 2000 Andrew Cagney <cagney@b1.cygnus.com>
* mips-tdep.c (MIPS_DEFAULT_STACK_ARGSIZE): Fix typo.
* config/mips/tm-irix5.h (GDB_MULTI_ARCH): Add
definition. Disable. Document known problems.
(MIPS_DEFAULT_ABI): Define.
* mips-tdep.c (enum mips_abi): Define.
(struct gdbarch_tdep): Replace mips_eabi with mips_abi.
(MIPS_EABI): Update.
(mips_gdbarch_init): Add preliminary support for IRIX N32 ABI.
Determine ABI from either ELF_FLAGS or MIPS_DEFAULT_ABI. When
looking for a matching architecture require a matching MIPS_ABI.
(mips_gdbarch_init): Cleanup arch_debug information.
2000-05-10 Elena Zannoni <ezannoni@kwikemart.cygnus.com> 2000-05-10 Elena Zannoni <ezannoni@kwikemart.cygnus.com>
* solib.c (symbol_add_stub): Remember the index and the name of * solib.c (symbol_add_stub): Remember the index and the name of
@ -8,6 +24,7 @@
where the symbol lives to get the index, instead of guessing. where the symbol lives to get the index, instead of guessing.
2000-05-10 Michael Snyder <msnyder@seadog.cygnus.com> 2000-05-10 Michael Snyder <msnyder@seadog.cygnus.com>
Make Sparc a Multi-Arch target. Discard PARAMS macro (require ANSI). Make Sparc a Multi-Arch target. Discard PARAMS macro (require ANSI).
* sparc-tdep.c: include arch-utils.h. * sparc-tdep.c: include arch-utils.h.
(SPARC_HAS_FPU, FP_REGISTER_BYTES, FP_MAX_REG NUM, SPARC_INTREG_SIZE, (SPARC_HAS_FPU, FP_REGISTER_BYTES, FP_MAX_REG NUM, SPARC_INTREG_SIZE,

14
gdb/config/mips/tm-irix5.h

@ -18,6 +18,17 @@
Foundation, Inc., 59 Temple Place - Suite 330, Foundation, Inc., 59 Temple Place - Suite 330,
Boston, MA 02111-1307, USA. */ Boston, MA 02111-1307, USA. */
/* If we're being built for n32, enable multi-arch. */
/* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
_MIPS_SIM in a tm-*.h file is simply wrong! Those are
host-dependant macros (provided by /usr/include) and stop any
chance of the target being cross compiled */
#if 0 && defined (_MIPS_SIM_NABI32) && _MIPS_SIM == _MIPS_SIM_NABI32
/* FIXME: Don't enable multi-arch for IRIX/n32. The test
``gdb.base/corefile.exp: up in corefile.exp'' fails. */
#define GDB_MULTI_ARCH 1
#endif
#include "mips/tm-irix3.h" #include "mips/tm-irix3.h"
/* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and /* FIXME: cagney/2000-04-04: Testing the _MIPS_SIM_NABI32 and
@ -59,6 +70,9 @@
parameters. */ parameters. */
#define MIPS_REGS_HAVE_HOME_P 0 #define MIPS_REGS_HAVE_HOME_P 0
/* Force N32 ABI as the default. */
#define MIPS_DEFAULT_ABI MIPS_ABI_N32
#endif /* N32 */ #endif /* N32 */

162
gdb/mips-tdep.c

@ -40,6 +40,18 @@
#include "elf-bfd.h" #include "elf-bfd.h"
/* All the possible MIPS ABIs. */
enum mips_abi
{
MIPS_ABI_UNKNOWN,
MIPS_ABI_N32,
MIPS_ABI_O32,
MIPS_ABI_O64,
MIPS_ABI_EABI32,
MIPS_ABI_EABI64
};
struct frame_extra_info struct frame_extra_info
{ {
mips_extra_func_info_t proc_desc; mips_extra_func_info_t proc_desc;
@ -91,7 +103,7 @@ struct gdbarch_tdep
/* from the elf header */ /* from the elf header */
int elf_flags; int elf_flags;
/* mips options */ /* mips options */
int mips_eabi; enum mips_abi mips_abi;
enum mips_fpu_type mips_fpu_type; enum mips_fpu_type mips_fpu_type;
int mips_last_arg_regnum; int mips_last_arg_regnum;
int mips_last_fp_arg_regnum; int mips_last_fp_arg_regnum;
@ -103,7 +115,8 @@ struct gdbarch_tdep
#if GDB_MULTI_ARCH #if GDB_MULTI_ARCH
#undef MIPS_EABI #undef MIPS_EABI
#define MIPS_EABI (gdbarch_tdep (current_gdbarch)->mips_eabi) #define MIPS_EABI (gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI32 \
|| gdbarch_tdep (current_gdbarch)->mips_abi == MIPS_ABI_EABI32)
#endif #endif
#if GDB_MULTI_ARCH #if GDB_MULTI_ARCH
@ -171,7 +184,7 @@ mips_saved_regsize ()
#if GDB_MULTI_ARCH #if GDB_MULTI_ARCH
#undef MIPS_DEFAULT_STACK_ARGSIZE #undef MIPS_DEFAULT_STACK_ARGSIZE
#define MIPS_DEFAULT_STACK_ARGSIZE (gdbarch_tdep (current_gdbarch)->mips_default_statck_argsize) #define MIPS_DEFAULT_STACK_ARGSIZE (gdbarch_tdep (current_gdbarch)->mips_default_stack_argsize)
#elif !defined (MIPS_DEFAULT_STACK_ARGSIZE) #elif !defined (MIPS_DEFAULT_STACK_ARGSIZE)
#define MIPS_DEFAULT_STACK_ARGSIZE (MIPS_DEFAULT_SAVED_REGSIZE) #define MIPS_DEFAULT_STACK_ARGSIZE (MIPS_DEFAULT_SAVED_REGSIZE)
#endif #endif
@ -3753,6 +3766,7 @@ mips_gdbarch_init (info, arches)
char *ef_mips_abi; char *ef_mips_abi;
int ef_mips_bitptrs; int ef_mips_bitptrs;
int ef_mips_arch; int ef_mips_arch;
enum mips_abi mips_abi;
/* Extract the elf_flags if available */ /* Extract the elf_flags if available */
if (info.abfd != NULL if (info.abfd != NULL
@ -3761,6 +3775,30 @@ mips_gdbarch_init (info, arches)
else else
elf_flags = 0; elf_flags = 0;
/* Check ELF_FLAGS to see if it specifies the ABI being used. */
switch ((elf_flags & EF_MIPS_ABI))
{
case E_MIPS_ABI_O32:
mips_abi = MIPS_ABI_O32;
break;
case E_MIPS_ABI_O64:
mips_abi = MIPS_ABI_O64;
break;
case E_MIPS_ABI_EABI32:
mips_abi = MIPS_ABI_EABI32;
break;
case E_MIPS_ABI_EABI64:
mips_abi = MIPS_ABI_EABI32;
break;
default:
mips_abi = MIPS_ABI_UNKNOWN;
break;
}
#ifdef MIPS_DEFAULT_ABI
if (mips_abi == MIPS_ABI_UNKNOWN)
mips_abi = MIPS_DEFAULT_ABI;
#endif
/* try to find a pre-existing architecture */ /* try to find a pre-existing architecture */
for (arches = gdbarch_list_lookup_by_info (arches, &info); for (arches = gdbarch_list_lookup_by_info (arches, &info);
arches != NULL; arches != NULL;
@ -3770,6 +3808,8 @@ mips_gdbarch_init (info, arches)
using. */ using. */
if (gdbarch_tdep (current_gdbarch)->elf_flags != elf_flags) if (gdbarch_tdep (current_gdbarch)->elf_flags != elf_flags)
continue; continue;
if (gdbarch_tdep (current_gdbarch)->mips_abi != mips_abi)
continue;
return arches->gdbarch; return arches->gdbarch;
} }
@ -3784,55 +3824,82 @@ mips_gdbarch_init (info, arches)
set_gdbarch_float_bit (gdbarch, 32); set_gdbarch_float_bit (gdbarch, 32);
set_gdbarch_double_bit (gdbarch, 64); set_gdbarch_double_bit (gdbarch, 64);
set_gdbarch_long_double_bit (gdbarch, 64); set_gdbarch_long_double_bit (gdbarch, 64);
switch ((elf_flags & EF_MIPS_ABI)) tdep->mips_abi = mips_abi;
switch (mips_abi)
{ {
case E_MIPS_ABI_O32: case MIPS_ABI_O32:
ef_mips_abi = "o32"; ef_mips_abi = "o32";
tdep->mips_eabi = 0;
tdep->mips_default_saved_regsize = 4; tdep->mips_default_saved_regsize = 4;
tdep->mips_default_stack_argsize = 4;
tdep->mips_fp_register_double = 0; tdep->mips_fp_register_double = 0;
tdep->mips_last_arg_regnum = ZERO_REGNUM + 7;
tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 15;
tdep->mips_regs_have_home_p = 1;
set_gdbarch_long_bit (gdbarch, 32); set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32); set_gdbarch_ptr_bit (gdbarch, 32);
set_gdbarch_long_long_bit (gdbarch, 64); set_gdbarch_long_long_bit (gdbarch, 64);
break; break;
case E_MIPS_ABI_O64: case MIPS_ABI_O64:
ef_mips_abi = "o64"; ef_mips_abi = "o64";
tdep->mips_eabi = 0;
tdep->mips_default_saved_regsize = 8; tdep->mips_default_saved_regsize = 8;
tdep->mips_default_stack_argsize = 8;
tdep->mips_fp_register_double = 1; tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = ZERO_REGNUM + 7;
tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 15;
tdep->mips_regs_have_home_p = 1;
set_gdbarch_long_bit (gdbarch, 32); set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32); set_gdbarch_ptr_bit (gdbarch, 32);
set_gdbarch_long_long_bit (gdbarch, 64); set_gdbarch_long_long_bit (gdbarch, 64);
break; break;
case E_MIPS_ABI_EABI32: case MIPS_ABI_EABI32:
ef_mips_abi = "eabi32"; ef_mips_abi = "eabi32";
tdep->mips_eabi = 1;
tdep->mips_default_saved_regsize = 4; tdep->mips_default_saved_regsize = 4;
tdep->mips_default_stack_argsize = 4;
tdep->mips_fp_register_double = 0; tdep->mips_fp_register_double = 0;
tdep->mips_last_arg_regnum = ZERO_REGNUM + 11;
tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19;
tdep->mips_regs_have_home_p = 0;
set_gdbarch_long_bit (gdbarch, 32); set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32); set_gdbarch_ptr_bit (gdbarch, 32);
set_gdbarch_long_long_bit (gdbarch, 64); set_gdbarch_long_long_bit (gdbarch, 64);
break; break;
case E_MIPS_ABI_EABI64: case MIPS_ABI_EABI64:
ef_mips_abi = "eabi64"; ef_mips_abi = "eabi64";
tdep->mips_eabi = 1;
tdep->mips_default_saved_regsize = 8; tdep->mips_default_saved_regsize = 8;
tdep->mips_default_stack_argsize = 8;
tdep->mips_fp_register_double = 1; tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = ZERO_REGNUM + 11;
tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19;
tdep->mips_regs_have_home_p = 0;
set_gdbarch_long_bit (gdbarch, 64); set_gdbarch_long_bit (gdbarch, 64);
set_gdbarch_ptr_bit (gdbarch, 64); set_gdbarch_ptr_bit (gdbarch, 64);
set_gdbarch_long_long_bit (gdbarch, 64); set_gdbarch_long_long_bit (gdbarch, 64);
break; break;
case MIPS_ABI_N32:
ef_mips_abi = "n32";
tdep->mips_default_saved_regsize = 4;
tdep->mips_default_stack_argsize = 8;
tdep->mips_fp_register_double = 1;
tdep->mips_last_arg_regnum = ZERO_REGNUM + 11;
tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19;
tdep->mips_regs_have_home_p = 0;
set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32);
set_gdbarch_long_long_bit (gdbarch, 64);
break;
default: default:
ef_mips_abi = "default"; ef_mips_abi = "default";
tdep->mips_eabi = 0;
tdep->mips_default_saved_regsize = MIPS_REGSIZE; tdep->mips_default_saved_regsize = MIPS_REGSIZE;
tdep->mips_default_stack_argsize = MIPS_REGSIZE;
tdep->mips_fp_register_double = (REGISTER_VIRTUAL_SIZE (FP0_REGNUM) == 8); tdep->mips_fp_register_double = (REGISTER_VIRTUAL_SIZE (FP0_REGNUM) == 8);
tdep->mips_last_arg_regnum = ZERO_REGNUM + 11;
tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19;
tdep->mips_regs_have_home_p = 1;
set_gdbarch_long_bit (gdbarch, 32); set_gdbarch_long_bit (gdbarch, 32);
set_gdbarch_ptr_bit (gdbarch, 32); set_gdbarch_ptr_bit (gdbarch, 32);
set_gdbarch_long_long_bit (gdbarch, 64); set_gdbarch_long_long_bit (gdbarch, 64);
break; break;
} }
tdep->mips_default_stack_argsize = tdep->mips_default_saved_regsize;
/* FIXME: jlarmour/2000-04-07: There *is* a flag EF_MIPS_32BIT_MODE /* FIXME: jlarmour/2000-04-07: There *is* a flag EF_MIPS_32BIT_MODE
that could indicate -gp32 BUT gas/config/tc-mips.c contains the that could indicate -gp32 BUT gas/config/tc-mips.c contains the
@ -3890,26 +3957,6 @@ mips_gdbarch_init (info, arches)
} }
#endif #endif
/* Select either of the two alternative ABI's */
if (tdep->mips_eabi)
{
/* EABI uses R4 through R11 for args */
tdep->mips_last_arg_regnum = 11;
/* EABI uses F12 through F19 for args */
tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 19;
/* EABI does not reserve home space for registers */
tdep->mips_regs_have_home_p = 0;
}
else
{
/* old ABI uses R4 through R7 for args */
tdep->mips_last_arg_regnum = 7;
/* old ABI uses F12 through F15 for args */
tdep->mips_last_fp_arg_regnum = FP0_REGNUM + 15;
/* Old ABI reserves home space for registers */
tdep->mips_regs_have_home_p = 1;
}
/* enable/disable the MIPS FPU */ /* enable/disable the MIPS FPU */
if (!mips_fpu_type_auto) if (!mips_fpu_type_auto)
tdep->mips_fpu_type = mips_fpu_type; tdep->mips_fpu_type = mips_fpu_type;
@ -3967,42 +4014,51 @@ mips_gdbarch_init (info, arches)
if (gdbarch_debug) if (gdbarch_debug)
{ {
fprintf_unfiltered (gdb_stderr, fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: (info)elf_flags = 0x%x\n",
elf_flags);
fprintf_unfiltered (gdb_stderr,
"mips_gdbarch_init: (info)ef_mips_abi = %s\n", "mips_gdbarch_init: (info)ef_mips_abi = %s\n",
ef_mips_abi); ef_mips_abi);
fprintf_unfiltered (gdb_stderr, fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: (info)ef_mips_arch = %d\n", "mips_gdbarch_init: (info)ef_mips_arch = %d\n",
ef_mips_arch); ef_mips_arch);
fprintf_unfiltered (gdb_stderr, fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: (info)ef_mips_bitptrs = %d\n", "mips_gdbarch_init: (info)ef_mips_bitptrs = %d\n",
ef_mips_bitptrs); ef_mips_bitptrs);
fprintf_unfiltered (gdb_stderr, fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: MIPS_EABI = %d\n", "mips_gdbarch_init: MIPS_REGSIZE = %d\n",
tdep->mips_eabi); MIPS_REGSIZE);
fprintf_unfiltered (gdb_stderr, fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: MIPS_LAST_ARG_REGNUM = %d\n", "mips_gdbarch_init: tdep->elf_flags = 0x%x\n",
tdep->mips_last_arg_regnum); tdep->elf_flags);
fprintf_unfiltered (gdb_stderr, fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: MIPS_LAST_FP_ARG_REGNUM = %d (%d)\n", "mips_gdbarch_init: tdep->mips_abi = %d\n",
tdep->mips_last_fp_arg_regnum, tdep->mips_abi);
tdep->mips_last_fp_arg_regnum - FP0_REGNUM); fprintf_unfiltered (gdb_stdlog,
fprintf_unfiltered (gdb_stderr,
"mips_gdbarch_init: tdep->mips_fpu_type = %d (%s)\n", "mips_gdbarch_init: tdep->mips_fpu_type = %d (%s)\n",
tdep->mips_fpu_type, tdep->mips_fpu_type,
(tdep->mips_fpu_type == MIPS_FPU_NONE ? "none" (tdep->mips_fpu_type == MIPS_FPU_NONE ? "none"
: tdep->mips_fpu_type == MIPS_FPU_SINGLE ? "single" : tdep->mips_fpu_type == MIPS_FPU_SINGLE ? "single"
: tdep->mips_fpu_type == MIPS_FPU_DOUBLE ? "double" : tdep->mips_fpu_type == MIPS_FPU_DOUBLE ? "double"
: "???")); : "???"));
fprintf_unfiltered (gdb_stderr, fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: tdep->mips_last_arg_regnum = %d\n",
tdep->mips_last_arg_regnum);
fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: tdep->mips_last_fp_arg_regnum = %d (%d)\n",
tdep->mips_last_fp_arg_regnum,
tdep->mips_last_fp_arg_regnum - FP0_REGNUM);
fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: tdep->mips_default_saved_regsize = %d\n", "mips_gdbarch_init: tdep->mips_default_saved_regsize = %d\n",
tdep->mips_default_saved_regsize); tdep->mips_default_saved_regsize);
fprintf_unfiltered (gdb_stderr, fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: tdep->mips_fp_register_double = %d (%s)\n", "mips_gdbarch_init: tdep->mips_fp_register_double = %d (%s)\n",
tdep->mips_fp_register_double, tdep->mips_fp_register_double,
(tdep->mips_fp_register_double ? "true" : "false")); (tdep->mips_fp_register_double ? "true" : "false"));
fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: tdep->mips_regs_have_home_p = %d\n",
tdep->mips_regs_have_home_p);
fprintf_unfiltered (gdb_stdlog,
"mips_gdbarch_init: tdep->mips_default_stack_argsize = %d\n",
tdep->mips_default_stack_argsize);
} }
return gdbarch; return gdbarch;