* config/tc-m68k.c (init_table): Correct access control unit

register numbers.  From Ken Rose <rose@netcom.com>.
This commit is contained in:
Ian Lance Taylor
1996-10-01 17:59:56 +00:00
parent ffef69a368
commit 0b810a6ee0
2 changed files with 14 additions and 11 deletions

View File

@ -1,5 +1,8 @@
Tue Oct 1 12:37:48 1996 Ian Lance Taylor <ian@cygnus.com> Tue Oct 1 12:37:48 1996 Ian Lance Taylor <ian@cygnus.com>
* config/tc-m68k.c (init_table): Correct access control unit
register numbers. From Ken Rose <rose@netcom.com>.
* config/tc-alpha.c: Add some static function prototypes. * config/tc-alpha.c: Add some static function prototypes.
(alpha_macros): Move to top of file. Make static. (alpha_macros): Move to top of file. Make static.
(alpha_num_macros): Move to top of file. (alpha_num_macros): Move to top of file.

View File

@ -259,7 +259,7 @@ add_fix (width, exp, pc_rel, pc_fix)
int pc_rel; int pc_rel;
int pc_fix; int pc_fix;
{ {
the_ins.reloc[the_ins.nrel].n = (((width)=='B') the_ins.reloc[the_ins.nrel].n = ((width == 'B' || width == '3')
? (the_ins.numo*2-1) ? (the_ins.numo*2-1)
: (((width)=='b') : (((width)=='b')
? (the_ins.numo*2+1) ? (the_ins.numo*2+1)
@ -992,12 +992,10 @@ m68k_ip (instring)
/* If we didn't get the right number of ops, or we have no /* If we didn't get the right number of ops, or we have no
common model with this pattern then reject this pattern. */ common model with this pattern then reject this pattern. */
ok_arch |= opcode->m_arch;
if (opsfound != opcode->m_opnum if (opsfound != opcode->m_opnum
|| ((opcode->m_arch & current_architecture) == 0)) || ((opcode->m_arch & current_architecture) == 0))
{ ++losing;
++losing;
ok_arch |= opcode->m_arch;
}
else else
{ {
for (s = opcode->m_operands, opP = &the_ins.operands[0]; for (s = opcode->m_operands, opP = &the_ins.operands[0];
@ -3026,11 +3024,13 @@ static const struct init_entry init_table[] =
{ "dacr0", DTT0 }, /* Data Access Control Register 0 */ { "dacr0", DTT0 }, /* Data Access Control Register 0 */
{ "dacr1", DTT1 }, /* Data Access Control Register 0 */ { "dacr1", DTT1 }, /* Data Access Control Register 0 */
/* mcf5200 versions of same */ /* mcf5200 versions of same. The ColdFire programmer's reference
{ "acr2", ITT0 }, /* Access Control Unit 2 */ manual indicated that the order is 2,3,0,1, but Ken Rose
{ "acr3", ITT1 }, /* Access Control Unit 3 */ <rose@netcom.com> says that 0,1,2,3 is the correct order. */
{ "acr0", DTT0 }, /* Access Control Unit 0 */ { "acr0", ITT0 }, /* Access Control Unit 0 */
{ "acr1", DTT1 }, /* Access Control Unit 1 */ { "acr1", ITT1 }, /* Access Control Unit 1 */
{ "acr2", DTT0 }, /* Access Control Unit 2 */
{ "acr3", DTT1 }, /* Access Control Unit 3 */
{ "tc", TC }, /* MMU Translation Control Register */ { "tc", TC }, /* MMU Translation Control Register */
{ "tcr", TC }, { "tcr", TC },
@ -3210,7 +3210,7 @@ md_assemble (str)
n = 1; n = 1;
break; break;
case '3': case '3':
n = 2; n = 1;
break; break;
case 'w': case 'w':
n = 2; n = 2;