mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-08-06 14:49:38 +08:00
* interp.c (sim_open): New SIM_DESC result. Argument is now
in argv form. (other sim_*): New SIM_DESC argument.
This commit is contained in:
249
sim/sh/interp.c
249
sim/sh/interp.c
@ -18,19 +18,22 @@
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*/
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#include "config.h"
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#include <signal.h>
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#ifdef HAVE_UNISTD_H
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#include <unistd.h>
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#endif
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#include "sysdep.h"
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#include "bfd.h"
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#include "callback.h"
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#include "remote-sim.h"
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#include "callback.h"
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/* This file is local - if newlib changes, then so should this. */
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#include "syscall.h"
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/* start-sanitize-sh3e */
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#include <math.h>
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/* end-sanitize-sh3e */
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#ifndef SIGBUS
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#define SIGBUS SIGSEGV
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@ -44,8 +47,6 @@
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#define DEFINE_TABLE
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#define DISASSEMBLER_TABLE
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#define SBIT(x) ((x)&sbit)
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#define R0 saved_state.asregs.regs[0]
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#define Rn saved_state.asregs.regs[n]
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@ -56,15 +57,15 @@
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#define SR0 saved_state.asregs.regs[0]
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#define GBR saved_state.asregs.gbr
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#define VBR saved_state.asregs.vbr
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#define SSR saved_state.asregs.ssr
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#define SPC saved_state.asregs.spc
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#define MACH saved_state.asregs.mach
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#define MACL saved_state.asregs.macl
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#define M saved_state.asregs.sr.bits.m
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#define Q saved_state.asregs.sr.bits.q
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#define S saved_state.asregs.sr.bits.s
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/* start-sanitize-sh3e */
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#define FPSCR saved_state.asregs.fpscr
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#define FPUL saved_state.asregs.fpul
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/* end-sanitize-sh3e */
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#define GET_SR() (saved_state.asregs.sr.bits.t = T, saved_state.asregs.sr.word)
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#define SET_SR(x) {saved_state.asregs.sr.word = (x); T =saved_state.asregs.sr.bits.t;}
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@ -72,14 +73,24 @@
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#define PC pc
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#define C cycles
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extern int target_byte_order;
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int
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fail ()
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{
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abort ();
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}
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/* This function exists solely for the purpose of setting a breakpoint to
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catch simulated bus errors when running the simulator under GDB. */
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void
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bp_holder ()
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{
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}
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#define BUSERROR(addr, mask) \
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if (addr & ~mask) { saved_state.asregs.exception = SIGBUS;}
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if (addr & ~mask) { saved_state.asregs.exception = SIGBUS; bp_holder (); }
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/* Define this to enable register lifetime checking.
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The compiler generates "add #0,rn" insns to mark registers as invalid,
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@ -104,15 +115,13 @@ static void parse_and_set_memory_size PARAMS ((char *str));
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static int IOMEM PARAMS ((int addr, int write, int value));
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static host_callback *callback;
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static host_callback *callback = &default_callback;
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/* These variables are at file scope so that functions other than
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sim_resume can use the fetch/store macros */
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static int little_endian;
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#if 1
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static int maskl = ~0;
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static int maskw = ~0;
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@ -148,19 +157,23 @@ typedef union
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int word;
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}
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sr;
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int fpul;
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float fpscr;
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float fregs[16];
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int ssr;
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int spc;
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int bregs[16];
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int ticks;
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int stalls;
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int memstalls;
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int cycles;
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int insts;
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int prevlock;
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int thislock;
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/* start-sanitize-sh3e */
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float fregs[16];
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float fpscr;
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int fpul;
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/* end-sanitize-sh3e */
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int exception;
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int msize;
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#define PROFILE_FREQ 1
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@ -172,6 +185,7 @@ typedef union
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asregs;
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int asints[28];
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} saved_state_type;
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saved_state_type saved_state;
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static void INLINE
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@ -199,7 +213,6 @@ wwat_little (memory, x, value, maskw)
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p[0] = v;
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}
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static void INLINE
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wbat_any (memory, x, value, maskb)
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unsigned char *memory;
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@ -212,8 +225,6 @@ wbat_any (memory, x, value, maskb)
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p[0] = value;
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}
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static void INLINE
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wlat_big (memory, x, value, maskl)
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unsigned char *memory;
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@ -240,7 +251,6 @@ wwat_big (memory, x, value, maskw)
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p[1] = v;
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}
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static void INLINE
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wbat_big (memory, x, value, maskb)
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unsigned char *memory;
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@ -253,9 +263,8 @@ wbat_big (memory, x, value, maskb)
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p[0] = value;
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}
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/* Read functions */
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static int INLINE
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rlat_little (memory, x, maskl)
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unsigned char *memory;
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@ -264,7 +273,6 @@ rlat_little (memory, x, maskl)
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BUSERROR(x, maskl);
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return (p[3] << 24) | (p[2] << 16) | (p[1] << 8) | p[0];
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}
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static int INLINE
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@ -295,7 +303,6 @@ rlat_big (memory, x, maskl)
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BUSERROR(x, maskl);
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return (p[0] << 24) | (p[1] << 16) | (p[2] << 8) | p[3];
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}
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static int INLINE
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@ -308,7 +315,6 @@ rwat_big (memory, x, maskw)
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return (p[0] << 8) | p[1];
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}
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#define RWAT(x) (little_endian ? rwat_little(memory, x, maskw): rwat_big(memory, x, maskw))
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#define RLAT(x) (little_endian ? rlat_little(memory, x, maskl): rlat_big(memory, x, maskl))
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#define RBAT(x) (rbat_any (memory, x, maskb))
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@ -320,12 +326,13 @@ rwat_big (memory, x, maskw)
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#define RSWAT(x) ((short)(RWAT(x)))
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#define RSBAT(x) (SEXT(RBAT(x)))
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#define MA() ((pc & 3) != 0 ? ++memstalls : 0)
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#define SEXT(x) (((x&0xff) ^ (~0x7f))+0x80)
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#define SEXTW(y) ((int)((short)y))
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#define SL(TEMPPC) iword= RUWAT(TEMPPC); goto top;
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int empty[16];
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#define L(x) thislock = x;
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@ -360,11 +367,6 @@ IOMEM (addr, write, value)
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int write;
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int value;
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{
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static int io;
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static char ssr1;
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int x;
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static char lastchar;
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if (write)
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{
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switch (addr)
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@ -386,10 +388,9 @@ IOMEM (addr, write, value)
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return getchar ();
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}
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}
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return 0;
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}
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static int
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get_now ()
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{
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@ -402,8 +403,6 @@ now_persec ()
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return 1;
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}
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static FILE *profile_file;
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static void
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@ -413,6 +412,7 @@ swap (memory, n)
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{
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WLAT (0, n);
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}
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static void
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swap16 (memory, n)
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unsigned char *memory;
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@ -442,7 +442,6 @@ swapout16 (n)
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fwrite (b, 2, 1, profile_file);
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}
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/* Turn a pointer in a register into a pointer into real memory. */
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static char *
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@ -452,8 +451,8 @@ ptr (x)
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return (char *) (x + saved_state.asregs.memory);
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}
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/* Simulate a monitor trap, put the result into r0 and errno into r1 */
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static void
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trap (i, regs, memory, maskl, maskw, little_endian)
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int i;
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@ -527,9 +526,9 @@ trap (i, regs, memory, maskl, maskw, little_endian)
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regs[0] = callback->open (callback,ptr (regs[5]), regs[6]);
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break;
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case SYS_exit:
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/* EXIT - caller can look in r5 to work out the
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reason */
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/* EXIT - caller can look in r5 to work out the reason */
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saved_state.asregs.exception = SIGQUIT;
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regs[0] = regs[5];
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break;
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case SYS_stat: /* added at hmsi */
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@ -591,7 +590,7 @@ trap (i, regs, memory, maskl, maskw, little_endian)
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default:
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abort ();
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}
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regs[1] = errno;
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regs[1] = callback->get_errno (callback);
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errno = perrno;
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}
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break;
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@ -603,6 +602,7 @@ trap (i, regs, memory, maskl, maskw, little_endian)
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}
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}
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void
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control_c (sig, code, scp, addr)
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int sig;
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@ -613,7 +613,6 @@ control_c (sig, code, scp, addr)
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saved_state.asregs.exception = SIGINT;
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}
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static int
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div1 (R, iRn2, iRn1, T)
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int *R;
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@ -702,7 +701,6 @@ div1 (R, iRn2, iRn1, T)
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return T;
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}
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static void
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dmul (sign, rm, rn)
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int sign;
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@ -792,7 +790,6 @@ sim_size (power)
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sim_memory_size = power;
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if (saved_state.asregs.memory)
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{
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free (saved_state.asregs.memory);
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@ -812,22 +809,20 @@ sim_size (power)
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}
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}
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int target_byte_order;
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static void
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set_static_little_endian(x)
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int x;
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set_static_little_endian (x)
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int x;
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{
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little_endian = x;
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}
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static
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void
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static void
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init_pointers ()
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{
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register int little_endian = target_byte_order == 1234;
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int little_endian = (target_byte_order == 1234);
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set_static_little_endian (little_endian);
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if (saved_state.asregs.msize != 1 << sim_memory_size)
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{
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sim_size (sim_memory_size);
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@ -859,12 +854,8 @@ dump_profile ()
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unsigned int minpc;
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unsigned int maxpc;
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unsigned short *p;
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int thisshift;
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unsigned short *first;
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int i;
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p = saved_state.asregs.profile_hist;
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minpc = 0;
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maxpc = (1 << sim_profile_size);
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@ -878,7 +869,7 @@ dump_profile ()
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}
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static int
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static void
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gotcall (from, to)
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int from;
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int to;
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@ -890,14 +881,15 @@ gotcall (from, to)
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#define MMASKB ((saved_state.asregs.msize -1) & ~0)
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void
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sim_resume (step, siggnal)
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sim_resume (sd, step, siggnal)
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SIM_DESC sd;
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int step, siggnal;
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{
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register unsigned int pc;
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register int cycles = 0;
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register int stalls = 0;
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register int memstalls = 0;
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register int insts = 0;
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register int prevlock;
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register int thislock;
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@ -907,7 +899,6 @@ sim_resume (step, siggnal)
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#endif
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register int little_endian = target_byte_order == 1234;
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|
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|
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int tick_start = get_now ();
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void (*prev) ();
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extern unsigned char sh_jump_table0[];
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@ -915,9 +906,7 @@ sim_resume (step, siggnal)
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register unsigned char *jump_table = sh_jump_table0;
|
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register int *R = &(saved_state.asregs.regs[0]);
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/* start-sanitize-sh3e */
|
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register float *F = &(saved_state.asregs.fregs[0]);
|
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/* end-sanitize-sh3e */
|
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register int T;
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register int PR;
|
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|
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@ -981,7 +970,9 @@ sim_resume (step, siggnal)
|
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}
|
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}
|
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#endif
|
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#if defined (WIN32)
|
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/* FIXME: Testing for INSIDE_SIMULATOR is wrong.
|
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Only one copy of interp.o is built. */
|
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#if defined (WIN32) && !defined(INSIDE_SIMULATOR)
|
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pollcount++;
|
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if (pollcount > 1000)
|
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{
|
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@ -1028,6 +1019,7 @@ sim_resume (step, siggnal)
|
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saved_state.asregs.ticks += get_now () - tick_start;
|
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saved_state.asregs.cycles += cycles;
|
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saved_state.asregs.stalls += stalls;
|
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saved_state.asregs.memstalls += memstalls;
|
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saved_state.asregs.insts += insts;
|
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saved_state.asregs.pc = pc;
|
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saved_state.asregs.sr.bits.t = T;
|
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@ -1036,7 +1028,6 @@ sim_resume (step, siggnal)
|
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saved_state.asregs.prevlock = prevlock;
|
||||
saved_state.asregs.thislock = thislock;
|
||||
|
||||
|
||||
if (profile_file)
|
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{
|
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dump_profile ();
|
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@ -1045,16 +1036,15 @@ sim_resume (step, siggnal)
|
||||
signal (SIGINT, prev);
|
||||
}
|
||||
|
||||
|
||||
|
||||
|
||||
int
|
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sim_write (addr, buffer, size)
|
||||
sim_write (sd, addr, buffer, size)
|
||||
SIM_DESC sd;
|
||||
SIM_ADDR addr;
|
||||
unsigned char *buffer;
|
||||
int size;
|
||||
{
|
||||
int i;
|
||||
|
||||
init_pointers ();
|
||||
|
||||
for (i = 0; i < size; i++)
|
||||
@ -1065,7 +1055,8 @@ sim_write (addr, buffer, size)
|
||||
}
|
||||
|
||||
int
|
||||
sim_read (addr, buffer, size)
|
||||
sim_read (sd, addr, buffer, size)
|
||||
SIM_DESC sd;
|
||||
SIM_ADDR addr;
|
||||
unsigned char *buffer;
|
||||
int size;
|
||||
@ -1081,60 +1072,79 @@ sim_read (addr, buffer, size)
|
||||
return size;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
sim_store_register (rn, memory)
|
||||
sim_store_register (sd, rn, memory)
|
||||
SIM_DESC sd;
|
||||
int rn;
|
||||
unsigned char *memory;
|
||||
{
|
||||
init_pointers();
|
||||
saved_state.asregs.regs[rn]=RLAT(0);
|
||||
init_pointers ();
|
||||
saved_state.asregs.regs[rn] = RLAT(0);
|
||||
}
|
||||
|
||||
void
|
||||
sim_fetch_register (rn, memory)
|
||||
sim_fetch_register (sd, rn, memory)
|
||||
SIM_DESC sd;
|
||||
int rn;
|
||||
unsigned char *memory;
|
||||
{
|
||||
init_pointers();
|
||||
init_pointers ();
|
||||
WLAT (0, saved_state.asregs.regs[rn]);
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
sim_trace ()
|
||||
sim_trace (sd)
|
||||
SIM_DESC sd;
|
||||
{
|
||||
return 0;
|
||||
}
|
||||
|
||||
void
|
||||
sim_stop_reason (reason, sigrc)
|
||||
sim_stop_reason (sd, reason, sigrc)
|
||||
SIM_DESC sd;
|
||||
enum sim_stop *reason;
|
||||
int *sigrc;
|
||||
{
|
||||
*reason = sim_stopped;
|
||||
*sigrc = saved_state.asregs.exception;
|
||||
/* The SH simulator uses SIGQUIT to indicate that the program has
|
||||
exited, so we must check for it here and translate it to exit. */
|
||||
if (saved_state.asregs.exception == SIGQUIT)
|
||||
{
|
||||
*reason = sim_exited;
|
||||
*sigrc = saved_state.asregs.regs[5];
|
||||
}
|
||||
else
|
||||
{
|
||||
*reason = sim_stopped;
|
||||
*sigrc = saved_state.asregs.exception;
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
sim_info (verbose)
|
||||
sim_info (sd, verbose)
|
||||
SIM_DESC sd;
|
||||
int verbose;
|
||||
{
|
||||
double timetaken = (double) saved_state.asregs.ticks / (double) now_persec ();
|
||||
double virttime = saved_state.asregs.cycles / 36.0e6;
|
||||
|
||||
callback->printf_filtered (callback,
|
||||
"\n\n# instructions executed %10d\n",
|
||||
saved_state.asregs.insts);
|
||||
callback-> printf_filtered (callback, "# cycles %10d\n", saved_state.asregs.cycles);
|
||||
callback-> printf_filtered (callback, "# pipeline stalls %10d\n", saved_state.asregs.stalls);
|
||||
callback-> printf_filtered (callback, "# real time taken %10.4f\n", timetaken);
|
||||
callback-> printf_filtered (callback, "# virtual time taken %10.4f\n", virttime);
|
||||
callback-> printf_filtered (callback, "# profiling size %10d\n", sim_profile_size);
|
||||
callback-> printf_filtered (callback, "# profiling frequency %10d\n", saved_state.asregs.profile);
|
||||
callback-> printf_filtered (callback, "# profile maxpc %10x\n",
|
||||
(1 << sim_profile_size) << PROFILE_SHIFT);
|
||||
callback->printf_filtered (callback, "\n\n# instructions executed %10d\n",
|
||||
saved_state.asregs.insts);
|
||||
callback->printf_filtered (callback, "# cycles %10d\n",
|
||||
saved_state.asregs.cycles);
|
||||
callback->printf_filtered (callback, "# pipeline stalls %10d\n",
|
||||
saved_state.asregs.stalls);
|
||||
callback->printf_filtered (callback, "# misaligned load/store %10d\n",
|
||||
saved_state.asregs.memstalls);
|
||||
callback->printf_filtered (callback, "# real time taken %10.4f\n",
|
||||
timetaken);
|
||||
callback->printf_filtered (callback, "# virtual time taken %10.4f\n",
|
||||
virttime);
|
||||
callback->printf_filtered (callback, "# profiling size %10d\n",
|
||||
sim_profile_size);
|
||||
callback->printf_filtered (callback, "# profiling frequency %10d\n",
|
||||
saved_state.asregs.profile);
|
||||
callback->printf_filtered (callback, "# profile maxpc %10x\n",
|
||||
(1 << sim_profile_size) << PROFILE_SHIFT);
|
||||
|
||||
if (timetaken != 0)
|
||||
{
|
||||
@ -1145,7 +1155,6 @@ sim_info (verbose)
|
||||
}
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
sim_set_profile (n)
|
||||
int n;
|
||||
@ -1160,17 +1169,17 @@ sim_set_profile_size (n)
|
||||
sim_profile_size = n;
|
||||
}
|
||||
|
||||
|
||||
void
|
||||
sim_open (args)
|
||||
char *args;
|
||||
SIM_DESC
|
||||
sim_open (argv)
|
||||
char **argv;
|
||||
{
|
||||
int n;
|
||||
|
||||
if (args != NULL)
|
||||
/* FIXME: Better argument checking is needed here. */
|
||||
if (argv[1] != NULL)
|
||||
{
|
||||
parse_and_set_memory_size (args);
|
||||
parse_and_set_memory_size (argv[1]);
|
||||
}
|
||||
/* fudge our descriptor for now */
|
||||
return (SIM_DESC) 1;
|
||||
}
|
||||
|
||||
static void
|
||||
@ -1187,14 +1196,16 @@ parse_and_set_memory_size (str)
|
||||
}
|
||||
|
||||
void
|
||||
sim_close (quitting)
|
||||
sim_close (sd, quitting)
|
||||
SIM_DESC sd;
|
||||
int quitting;
|
||||
{
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
int
|
||||
sim_load (prog, from_tty)
|
||||
sim_load (sd, prog, from_tty)
|
||||
SIM_DESC sd;
|
||||
char *prog;
|
||||
int from_tty;
|
||||
{
|
||||
@ -1203,7 +1214,8 @@ sim_load (prog, from_tty)
|
||||
}
|
||||
|
||||
void
|
||||
sim_create_inferior (start_address, argv, env)
|
||||
sim_create_inferior (sd, start_address, argv, env)
|
||||
SIM_DESC sd;
|
||||
SIM_ADDR start_address;
|
||||
char **argv;
|
||||
char **env;
|
||||
@ -1212,16 +1224,17 @@ sim_create_inferior (start_address, argv, env)
|
||||
}
|
||||
|
||||
void
|
||||
sim_kill ()
|
||||
sim_kill (sd)
|
||||
SIM_DESC sd;
|
||||
{
|
||||
/* nothing to do */
|
||||
}
|
||||
|
||||
void
|
||||
sim_do_command (cmd)
|
||||
sim_do_command (sd, cmd)
|
||||
SIM_DESC sd;
|
||||
char *cmd;
|
||||
{
|
||||
int n;
|
||||
char *sms_cmd = "set-memory-size";
|
||||
|
||||
if (strncmp (cmd, sms_cmd, strlen (sms_cmd)) == 0
|
||||
@ -1230,26 +1243,18 @@ sim_do_command (cmd)
|
||||
|
||||
else if (strcmp (cmd, "help") == 0)
|
||||
{
|
||||
callback->printf_filtered (callback,"List of SH simulator commands:\n\n");
|
||||
callback->printf_filtered (callback,"set-memory-size <n> -- Set the number of address bits to use\n");
|
||||
callback->printf_filtered (callback,"\n");
|
||||
callback->printf_filtered (callback, "List of SH simulator commands:\n\n");
|
||||
callback->printf_filtered (callback, "set-memory-size <n> -- Set the number of address bits to use\n");
|
||||
callback->printf_filtered (callback, "\n");
|
||||
}
|
||||
else
|
||||
fprintf (stderr, "Error: \"%s\" is not a valid SH simulator command.\n",
|
||||
cmd);
|
||||
}
|
||||
|
||||
|
||||
int
|
||||
sim_get_quit_code()
|
||||
{
|
||||
return saved_state.asregs.regs[5];
|
||||
}
|
||||
|
||||
|
||||
|
||||
void
|
||||
sim_set_callbacks(p)
|
||||
sim_set_callbacks (sd, p)
|
||||
SIM_DESC sd;
|
||||
host_callback *p;
|
||||
{
|
||||
callback = p;
|
||||
|
Reference in New Issue
Block a user