espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-29 16:38:05 +08:00
Code Issues Packages Projects Releases Wiki Activity

x86: Add tests for -n option of x86 assembler

Browse Source 
The -n command-line of x86 assembler disables optimization of alignment
directives, like ".balign 8, 0x90", with multi-byte nop instructions
such as leal 0(%esi),%esi.

	PR gas/22464
	* testsuite/gas/i386/align-1.s: New file.
	* testsuite/gas/i386/align-1a.d: Likewise.
	* testsuite/gas/i386/align-1b.d: Likewise.
	* testsuite/gas/i386/i386.exp: Run align-1a and align-1b.
This commit is contained in:
H.J. Lu
2017-11-21 16:44:29 -08:00
parent c757658ed6
commit 0ad71725d9
5 changed files with 58 additions and 0 deletions
Download Patch File Download Diff File Expand all files Collapse all files

8
gas/ChangeLog
View File

@ -1,3 +1,11 @@
2017-11-21 H.J. Lu <hongjiu.lu@intel.com>
PR gas/22464
* testsuite/gas/i386/align-1.s: New file.
* testsuite/gas/i386/align-1a.d: Likewise.
* testsuite/gas/i386/align-1b.d: Likewise.
* testsuite/gas/i386/i386.exp: Run align-1a and align-1b.
2017-11-21 Claudiu Zissulescu <claziss@synopsys.com> 2017-11-21 Claudiu Zissulescu <claziss@synopsys.com>
* testsuite/gas/arc/b.d : Update test. * testsuite/gas/arc/b.d : Update test.

7
gas/testsuite/gas/i386/align-1.s Normal file
View File

@ -0,0 +1,7 @@
.text
_start:
movl %edi, %eax
.balign 8, 0x90
movl $0, %edx
.balign 8, 0x90
addl %eax, %edx

17
gas/testsuite/gas/i386/align-1a.d Normal file
View File

@ -0,0 +1,17 @@
#name: i386 balign
#source: align-1.s
#as: -mtune=generic32
#objdump: -dr
.*: +file format .*i386.*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 89 f8 mov %edi,%eax
[ ]*[a-f0-9]+: 8d b6 00 00 00 00 lea 0x0\(%esi\),%esi
[ ]*[a-f0-9]+: ba 00 00 00 00 mov \$0x0,%edx
[ ]*[a-f0-9]+: 8d 76 00 lea 0x0\(%esi\),%esi
[ ]*[a-f0-9]+: 01 c2 add %eax,%edx
#pass

24
gas/testsuite/gas/i386/align-1b.d Normal file
View File

@ -0,0 +1,24 @@
#name: i386 balign (-n)
#source: align-1.s
#as: -mtune=generic32 -n
#objdump: -dr
.*: +file format .*i386.*
Disassembly of section .text:
0+ <_start>:
[ ]*[a-f0-9]+: 89 f8 mov %edi,%eax
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: ba 00 00 00 00 mov \$0x0,%edx
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 90 nop
[ ]*[a-f0-9]+: 01 c2 add %eax,%edx
#pass

2
gas/testsuite/gas/i386/i386.exp
View File

@ -427,6 +427,8 @@ if [expr ([istarget "i*86-*-*"] || [istarget "x86_64-*-*"]) && [gas_32_check]]
run_dump_test "notrack" run_dump_test "notrack"
run_dump_test "notrack-intel" run_dump_test "notrack-intel"
run_list_test "notrackbad" "-al" run_list_test "notrackbad" "-al"
run_dump_test "align-1a"
run_dump_test "align-1b"
# These tests require support for 8 and 16 bit relocs, # These tests require support for 8 and 16 bit relocs,
# so we only run them for ELF and COFF targets. # so we only run them for ELF and COFF targets.