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Make RL78 disassembler and simulator respect ISA for mul/div

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[gas]
	* config/rl78-defs.h (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.
	* config/rl78-parse.y (ISA_G10): New.
	(ISA_G13): New.
	(ISA_G14): New.
	(MULHU, MULH, MULU, DIVHU, DIVWU, MACHU, MACH): Use them.
	* config/tc-rl78.c (rl78_isa_g10): New.
	(rl78_isa_g13): New.
	(rl78_isa_g14): New.

[gdb]
	* rl78-tdep.c (rl78_analyze_prologue): Pass RL78_ISA_DEFAULT to
	rl78_decode_opcode

[include]
	* dis-asm.h (print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.
	* opcode/rl78.h (RL78_Dis_Isa): New.
	(rl78_decode_opcode): Add ISA parameter.

[opcodes]
	* disassemble.c (disassembler): Choose suitable disassembler based
	on E_ABI.
	* rl78-decode.opc (rl78_decode_opcode): Take ISA parameter.  Use
	it to decode mul/div insns.
	* rl78-decode.c: Regenerate.
	* rl78-dis.c (print_insn_rl78): Rename to...
	(print_insn_rl78_common): ...this, take ISA parameter.
	(print_insn_rl78): New.
	(print_insn_rl78_g10): New.
	(print_insn_rl78_g13): New.
	(print_insn_rl78_g14): New.
	(rl78_get_disassembler): New.

[sim]
	* rl78/cpu.c (g14_multiply): New.
	* rl78/cpu.h (g14_multiply): New.
	* rl78/load.c (rl78_load): Decode ISA completely.
	* rl78/main.c (main): Expand -M to include other ISAs.
	* rl78/rl78.c (decode_opcode): Decode based on ISA.
	* rl78/trace.c (rl78_disasm_fn): New.
	(sim_disasm_init): Reset it.
	(sim_disasm_one): Get correct disassembler for ISA.
This commit is contained in:
DJ Delorie
2015-04-30 15:25:49 -04:00
parent b49f93f699
commit 0952813b0b
24 changed files with 706 additions and 467 deletions
Download Patch File Download Diff File Expand all files Collapse all files

24
sim/rl78/main.c
View File

@ -68,7 +68,7 @@ main (int argc, char **argv)
xmalloc_set_program_name (argv[0]);
while ((o = getopt (argc, argv, "tvdr:D:")) != -1)
while ((o = getopt (argc, argv, "tvdr:D:M:")) != -1)
{
switch (o)
{
@ -87,6 +87,27 @@ main (int argc, char **argv)
case 'D':
dump_counts_filename = optarg;
break;
case 'M':
if (strcmp (optarg, "g10") == 0)
{
rl78_g10_mode = 1;
g13_multiply = 0;
g14_multiply = 0;
mem_set_mirror (0, 0xf8000, 4096);
}
if (strcmp (optarg, "g13") == 0)
{
rl78_g10_mode = 0;
g13_multiply = 1;
g14_multiply = 0;
}
if (strcmp (optarg, "g14") == 0)
{
rl78_g10_mode = 0;
g13_multiply = 0;
g14_multiply = 1;
}
break;
case '?':
{
fprintf (stderr,
@ -96,6 +117,7 @@ main (int argc, char **argv)
"\t-t\t\t- trace.\n"
"\t-d\t\t- disassemble.\n"
"\t-r <bytes>\t- ram size.\n"
"\t-M <mcu>\t- mcu type, default none, allowed: g10,g13,g14\n"
"\t-D <filename>\t- dump cycle count histogram\n");
exit (1);
}