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@ -53,15 +53,18 @@ static reloc_howto_type txvu_elf_howto_table[] =
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false), /* pcrel_offset */
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false), /* pcrel_offset */
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/* A PC Relative 11-bit relocation, shifted by 3.
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/* A PC Relative 11-bit relocation, shifted by 3.
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This reloc is complicated because relocations are relative to the upper
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Fortunately, the lower instruction has the lower address in the 64 bit
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instruction, and I don't think BFD handles 64 bit instructions easily.
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pair. Thus we can treat the address of the instruction as a whole
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We could set the address of the reloc as the address of the lower
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as the address of the lower instruction (the one with the branch),
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instruction, but then we'd have to do what is done for R_M32R_10_PCREL
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and pretend the instruction size is 32 bits.
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which is to mask off the lower 3 bits of the pc before performing the
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Otherwise, we'd have to either perform the relocation on all 64 bits
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reloc. */
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(since the pc relative address is the start of the pair), or set the
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address of the reloc as the address of the lower instruction and do what
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is done for R_M32R_10_PCREL which is to mask off the lower 3 bits of the
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pc before performing the reloc. */
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HOWTO (R_TXVU_11_PCREL, /* type */
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HOWTO (R_TXVU_11_PCREL, /* type */
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3, /* rightshift */
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3, /* rightshift */
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3, /* size (0 = byte, 1 = short, 2 = long) */
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2, /* size (0 = byte, 1 = short, 2 = long) */
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11, /* bitsize */
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11, /* bitsize */
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true, /* pc_relative */
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true, /* pc_relative */
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0, /* bitpos */
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0, /* bitpos */
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