espressif/binutils-gdb
1
0
Fork 0
mirror of https://github.com/espressif/binutils-gdb.git synced 2025-06-21 10:34:21 +08:00
Code Issues Packages Projects Releases Wiki Activity

checkpoint

Browse Source
This commit is contained in:
Doug Evans
1998-01-21 01:43:40 +00:00
parent 775fdd0c3f
commit 0820c2f8f9
1 changed files with 10 additions and 7 deletions
Download Patch File Download Diff File Expand all files Collapse all files

17
bfd/elf32-txvu.c
View File

@ -53,15 +53,18 @@ static reloc_howto_type txvu_elf_howto_table[] =
false), /* pcrel_offset */ false), /* pcrel_offset */
/* A PC Relative 11-bit relocation, shifted by 3. /* A PC Relative 11-bit relocation, shifted by 3.
This reloc is complicated because relocations are relative to the upper Fortunately, the lower instruction has the lower address in the 64 bit
instruction, and I don't think BFD handles 64 bit instructions easily. pair. Thus we can treat the address of the instruction as a whole
We could set the address of the reloc as the address of the lower as the address of the lower instruction (the one with the branch),
instruction, but then we'd have to do what is done for R_M32R_10_PCREL and pretend the instruction size is 32 bits.
which is to mask off the lower 3 bits of the pc before performing the Otherwise, we'd have to either perform the relocation on all 64 bits
reloc. */ (since the pc relative address is the start of the pair), or set the
address of the reloc as the address of the lower instruction and do what
is done for R_M32R_10_PCREL which is to mask off the lower 3 bits of the
pc before performing the reloc. */
HOWTO (R_TXVU_11_PCREL, /* type */ HOWTO (R_TXVU_11_PCREL, /* type */
3, /* rightshift */ 3, /* rightshift */
3, /* size (0 = byte, 1 = short, 2 = long) */ 2, /* size (0 = byte, 1 = short, 2 = long) */
11, /* bitsize */ 11, /* bitsize */
true, /* pc_relative */ true, /* pc_relative */
0, /* bitpos */ 0, /* bitpos */