mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-22 11:00:01 +08:00
x86: adjust register names printed for MONITOR/MWAIT
As the comments (here: almost, in the opcode table: fully) correctly state - all register operands except MONITOR's address one are fixed at 32 bit size. Don't print 64-bit registers there. Also adjust x86-64-suffix.d's name such that it wouldn't be identical to x86-64-rep-suffix.d's, but instead resemble that of its sibling x86-64-suffix-intel.d.
This commit is contained in:
Jan Beulich
@ -1,3 +1,22 @@
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2019-11-07 Jan Beulich <jbeulich@suse.com>
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* testsuite/gas/i386/x86-64-arch-3.s: Add monitorx/mwaitx cases
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with canonical operand sizes.
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* testsuite/gas/i386/x86-64-sse3.s: Add monitor/mwait cases with
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canonical operand sizes.
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* testsuite/gas/i386/x86-64-arch-3-znver1.d,
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testsuite/gas/i386/x86-64-arch-3-znver2.d: Redirect expectations
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to x86-64-arch-3.d.
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* testsuite/gas/i386/ilp32/x86-64-sse-noavx.d: Redirect
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expectations to parent dir's x86-64-sse-noavx.d.
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* testsuite/gas/i386/ilp32/x86-64-sse3.d: Redirect expectations
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to to parent dir's x86-64-sse3.d.
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* testsuite/gas/i386/x86-64-arch-3.d,
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testsuite/gas/i386/x86-64-mwaitx-bdver4.d,
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testsuite/gas/i386/x86-64-sse-noavx.d,
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testsuite/gas/i386/x86-64-sse3.d,
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testsuite/gas/i386/x86-64-suffix.d: Adjust expectations.
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2019-11-04 Jan Beulich <jbeulich@suse.com>
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2019-11-04 Jan Beulich <jbeulich@suse.com>
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* config/tc-i386.c (process_operands): Handle ShortForm insns
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* config/tc-i386.c (process_operands): Handle ShortForm insns
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@ -2,68 +2,4 @@
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#as: -msse-check=error
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#as: -msse-check=error
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#objdump: -dw
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#objdump: -dw
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#name: x86-64 (ILP32) SSE without AVX equivalent
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#name: x86-64 (ILP32) SSE without AVX equivalent
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#dump: ../x86-64-sse-noavx.d
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.*: file format .*
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Disassembly of section .text:
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0+ <_start>:
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[ ]*[a-f0-9]+: 48 0f c7 08 cmpxchg16b \(%rax\)
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[ ]*[a-f0-9]+: f2 0f 38 f0 d9 crc32b %cl,%ebx
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[ ]*[a-f0-9]+: 66 0f 2d d3 cvtpd2pi %xmm3,%mm2
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[ ]*[a-f0-9]+: 66 0f 2a d3 cvtpi2pd %mm3,%xmm2
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[ ]*[a-f0-9]+: 0f 2a d3 cvtpi2ps %mm3,%xmm2
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[ ]*[a-f0-9]+: 0f 2d f7 cvtps2pi %xmm7,%mm6
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[ ]*[a-f0-9]+: 66 0f 2c dc cvttpd2pi %xmm4,%mm3
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[ ]*[a-f0-9]+: 0f 2c dc cvttps2pi %xmm4,%mm3
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[ ]*[a-f0-9]+: df 08 fisttps \(%rax\)
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[ ]*[a-f0-9]+: df 08 fisttps \(%rax\)
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[ ]*[a-f0-9]+: db 08 fisttpl \(%rax\)
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[ ]*[a-f0-9]+: dd 08 fisttpll \(%rax\)
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[ ]*[a-f0-9]+: 0f ae e8 lfence
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[ ]*[a-f0-9]+: 0f f7 c7 maskmovq %mm7,%mm0
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[ ]*[a-f0-9]+: 0f ae f0 mfence
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[ ]*[a-f0-9]+: 0f 01 c8 monitor %rax,%rcx,%rdx
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[ ]*[a-f0-9]+: f2 0f d6 c8 movdq2q %xmm0,%mm1
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[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\)
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[ ]*[a-f0-9]+: 0f e7 10 movntq %mm2,\(%rax\)
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[ ]*[a-f0-9]+: f3 0f d6 c8 movq2dq %mm0,%xmm1
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[ ]*[a-f0-9]+: 0f 01 c9 mwait %rax,%rcx
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[ ]*[a-f0-9]+: 0f 38 1c c1 pabsb %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 38 1e c1 pabsd %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 38 1d c1 pabsw %mm1,%mm0
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[ ]*[a-f0-9]+: 0f d4 c1 paddq %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 3a 0f c1 02 palignr \$0x2,%mm1,%mm0
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[ ]*[a-f0-9]+: 0f e0 c1 pavgb %mm1,%mm0
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[ ]*[a-f0-9]+: 0f e3 d3 pavgw %mm3,%mm2
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[ ]*[a-f0-9]+: 0f c5 c1 00 pextrw \$0x0,%mm1,%eax
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[ ]*[a-f0-9]+: 0f 38 02 c1 phaddd %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 38 03 c1 phaddsw %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 38 01 c1 phaddw %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 38 06 c1 phsubd %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 38 07 c1 phsubsw %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 38 05 c1 phsubw %mm1,%mm0
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[ ]*[a-f0-9]+: 0f c4 d2 02 pinsrw \$0x2,%edx,%mm2
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[ ]*[a-f0-9]+: 0f 38 04 c1 pmaddubsw %mm1,%mm0
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[ ]*[a-f0-9]+: 0f ee c1 pmaxsw %mm1,%mm0
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[ ]*[a-f0-9]+: 0f de d2 pmaxub %mm2,%mm2
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[ ]*[a-f0-9]+: 0f ea e5 pminsw %mm5,%mm4
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[ ]*[a-f0-9]+: 0f da f7 pminub %mm7,%mm6
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[ ]*[a-f0-9]+: 0f d7 c5 pmovmskb %mm5,%eax
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[ ]*[a-f0-9]+: 0f 38 0b c1 pmulhrsw %mm1,%mm0
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[ ]*[a-f0-9]+: 0f e4 e5 pmulhuw %mm5,%mm4
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[ ]*[a-f0-9]+: 0f f4 c8 pmuludq %mm0,%mm1
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[ ]*[a-f0-9]+: f3 0f b8 cb popcnt %ebx,%ecx
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[ ]*[a-f0-9]+: 0f 18 00 prefetchnta \(%rax\)
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[ ]*[a-f0-9]+: 0f 18 08 prefetcht0 \(%rax\)
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[ ]*[a-f0-9]+: 0f 18 10 prefetcht1 \(%rax\)
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[ ]*[a-f0-9]+: 0f 18 18 prefetcht2 \(%rax\)
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[ ]*[a-f0-9]+: 0f f6 f7 psadbw %mm7,%mm6
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[ ]*[a-f0-9]+: 0f 38 00 c1 pshufb %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 70 da 01 pshufw \$0x1,%mm2,%mm3
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[ ]*[a-f0-9]+: 0f 38 08 c1 psignb %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 38 0a c1 psignd %mm1,%mm0
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[ ]*[a-f0-9]+: 0f 38 09 c1 psignw %mm1,%mm0
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[ ]*[a-f0-9]+: 0f fb c1 psubq %mm1,%mm0
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[ ]*[a-f0-9]+: 0f ae f8 sfence
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#pass
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@ -1,40 +1,4 @@
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#source: ../x86-64-sse3.s
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#source: ../x86-64-sse3.s
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#objdump: -dw
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#objdump: -dw
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#name: x86-64 (ILP32) SSE3
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#name: x86-64 (ILP32) SSE3
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#dump: ../x86-64-sse3.d
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.*: +file format .*
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Disassembly of section .text:
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0+000 <foo>:
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0: 66 0f d0 01 [ ]*addsubpd \(%rcx\),%xmm0
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4: 66 0f d0 ca [ ]*addsubpd %xmm2,%xmm1
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8: f2 0f d0 13 [ ]*addsubps \(%rbx\),%xmm2
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c: f2 0f d0 dc [ ]*addsubps %xmm4,%xmm3
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10: df 88 90 90 90 00 [ ]*fisttps 0x909090\(%rax\)
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16: db 88 90 90 90 00 [ ]*fisttpl 0x909090\(%rax\)
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1c: dd 88 90 90 90 00 [ ]*fisttpll 0x909090\(%rax\)
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22: 66 0f 7c 65 00 [ ]*haddpd 0x0\(%rbp\),%xmm4
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27: 66 0f 7c ee [ ]*haddpd %xmm6,%xmm5
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2b: f2 0f 7c 37 [ ]*haddps \(%rdi\),%xmm6
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2f: f2 0f 7c f8 [ ]*haddps %xmm0,%xmm7
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33: 66 0f 7d c1 [ ]*hsubpd %xmm1,%xmm0
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37: 66 0f 7d 0a [ ]*hsubpd \(%rdx\),%xmm1
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3b: f2 0f 7d d2 [ ]*hsubps %xmm2,%xmm2
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3f: f2 0f 7d 1c 24 [ ]*hsubps \(%rsp\),%xmm3
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44: f2 0f f0 2e [ ]*lddqu \(%rsi\),%xmm5
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48: 0f 01 c8 [ ]*monitor %rax,%rcx,%rdx
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4b: 0f 01 c8 [ ]*monitor %rax,%rcx,%rdx
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4e: f2 0f 12 f7 [ ]*movddup %xmm7,%xmm6
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52: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
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56: f3 0f 16 01 [ ]*movshdup \(%rcx\),%xmm0
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5a: f3 0f 16 ca [ ]*movshdup %xmm2,%xmm1
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5e: f3 0f 12 13 [ ]*movsldup \(%rbx\),%xmm2
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62: f3 0f 12 dc [ ]*movsldup %xmm4,%xmm3
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66: 0f 01 c9 [ ]*mwait %rax,%rcx
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69: 0f 01 c9 [ ]*mwait %rax,%rcx
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6c: 67 0f 01 c8 [ ]*monitor %eax,%rcx,%rdx
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70: 67 0f 01 c8 [ ]*monitor %eax,%rcx,%rdx
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74: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
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78: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
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#pass
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@ -2,30 +2,4 @@
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#as: -march=znver1+rdpid+clwb+wbnoinvd
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#as: -march=znver1+rdpid+clwb+wbnoinvd
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#objdump: -dw
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#objdump: -dw
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#name: x86-64 arch 3 (znver1)
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#name: x86-64 arch 3 (znver1)
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#dump: x86-64-arch-3.d
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.*: file format .*
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Disassembly of section .text:
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0+ <.text>:
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[ ]*[a-f0-9]+: 0f 01 ca clac
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[ ]*[a-f0-9]+: 0f 01 cb stac
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[ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx
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[ ]*[a-f0-9]+: f3 0f 38 f6 ca adox %edx,%ecx
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[ ]*[a-f0-9]+: 0f c7 f8 rdseed %eax
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[ ]*[a-f0-9]+: 0f 01 fc clzero
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[ ]*[a-f0-9]+: 44 0f 38 c8 00 sha1nexte \(%rax\),%xmm8
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[ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\)
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[ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\)
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[ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\)
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[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
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[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx
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[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
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[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
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[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
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[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
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[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\)
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[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %rax
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[ ]*[a-f0-9]+:[ ]*f3 41 0f c7 fa[ ]*rdpid %r10
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[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
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#pass
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@ -2,30 +2,4 @@
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#as: -march=znver2
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#as: -march=znver2
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#objdump: -dw
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#objdump: -dw
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#name: x86-64 arch 3 (znver2)
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#name: x86-64 arch 3 (znver2)
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#dump: x86-64-arch-3.d
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.*: file format .*
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||||||
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Disassembly of section .text:
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||||||
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||||||
0+ <.text>:
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||||||
[ ]*[a-f0-9]+: 0f 01 ca clac[ ]*
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[ ]*[a-f0-9]+: 0f 01 cb stac[ ]*
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[ ]*[a-f0-9]+: 66 0f 38 f6 ca adcx %edx,%ecx
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||||||
[ ]*[a-f0-9]+: f3 0f 38 f6 ca adox %edx,%ecx
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[ ]*[a-f0-9]+: 0f c7 f8 rdseed %eax
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|
||||||
[ ]*[a-f0-9]+: 0f 01 fc clzero[ ]*
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||||||
[ ]*[a-f0-9]+: 44 0f 38 c8 00 sha1nexte \(%rax\),%xmm8
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|
||||||
[ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\)
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|
||||||
[ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\)
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|
||||||
[ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\)
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|
||||||
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
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|
||||||
[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx
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|
||||||
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
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||||||
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
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||||||
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
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||||||
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
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||||||
[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\)
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|
||||||
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %rax
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|
||||||
[ ]*[a-f0-9]+:[ ]*f3 41 0f c7 fa[ ]*rdpid %r10
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|
||||||
[ ]*[a-f0-9]+:[ ]*f3 0f 09[ ]*wbnoinvd[ ]*
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|
||||||
#pass
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||||||
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|||||||
@ -17,11 +17,14 @@ Disassembly of section .text:
|
|||||||
[ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\)
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[ ]*[a-f0-9]+: 48 0f c7 21 xsavec64 \(%rcx\)
|
||||||
[ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\)
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[ ]*[a-f0-9]+: 48 0f c7 29 xsaves64 \(%rcx\)
|
||||||
[ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\)
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[ ]*[a-f0-9]+: 66 0f ae 39 clflushopt \(%rcx\)
|
||||||
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
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[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%ecx,%edx
|
||||||
[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx
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[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%ecx,%edx
|
||||||
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
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[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%ecx,%edx
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||||||
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
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[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%ecx,%edx
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||||||
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
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[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%ecx,%edx
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||||||
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[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
|
||||||
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[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
|
||||||
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[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
|
||||||
[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
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[ ]*[a-f0-9]+:[ ]*66 0f ae 31[ ]*clwb \(%rcx\)
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||||||
[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\)
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[ ]*[a-f0-9]+:[ ]*66 42 0f ae b4 f0 23 01 00 00[ ]*clwb 0x123\(%rax,%r14,8\)
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||||||
[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %rax
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[ ]*[a-f0-9]+:[ ]*f3 0f c7 f8[ ]*rdpid %rax
|
||||||
|
|||||||
@ -18,9 +18,12 @@
|
|||||||
xsaves64 (%rcx)
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xsaves64 (%rcx)
|
||||||
#CLFLUSHOPT
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#CLFLUSHOPT
|
||||||
clflushopt (%rcx)
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clflushopt (%rcx)
|
||||||
|
monitorx %rax,%ecx,%edx
|
||||||
|
monitorx %eax,%ecx,%edx
|
||||||
monitorx %rax,%rcx,%rdx
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monitorx %rax,%rcx,%rdx
|
||||||
monitorx %eax,%rcx,%rdx
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monitorx %eax,%rcx,%rdx
|
||||||
monitorx
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monitorx
|
||||||
|
mwaitx %eax,%ecx,%ebx
|
||||||
mwaitx %rax,%rcx,%rbx
|
mwaitx %rax,%rcx,%rbx
|
||||||
mwaitx
|
mwaitx
|
||||||
# clwb instruction
|
# clwb instruction
|
||||||
|
|||||||
@ -9,9 +9,9 @@
|
|||||||
Disassembly of section \.text:
|
Disassembly of section \.text:
|
||||||
|
|
||||||
0000000000000000 <_start>:
|
0000000000000000 <_start>:
|
||||||
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
|
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%ecx,%edx
|
||||||
[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%rcx,%rdx
|
[ ]*[a-f0-9]+: 67 0f 01 fa monitorx %eax,%ecx,%edx
|
||||||
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%rcx,%rdx
|
[ ]*[a-f0-9]+: 0f 01 fa monitorx %rax,%ecx,%edx
|
||||||
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
|
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
|
||||||
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %rax,%rcx,%rbx
|
[ ]*[a-f0-9]+: 0f 01 fb mwaitx %eax,%ecx,%ebx
|
||||||
#pass
|
#pass
|
||||||
|
|||||||
@ -22,12 +22,12 @@ Disassembly of section .text:
|
|||||||
[ ]*[a-f0-9]+: 0f ae e8 lfence
|
[ ]*[a-f0-9]+: 0f ae e8 lfence
|
||||||
[ ]*[a-f0-9]+: 0f f7 c7 maskmovq %mm7,%mm0
|
[ ]*[a-f0-9]+: 0f f7 c7 maskmovq %mm7,%mm0
|
||||||
[ ]*[a-f0-9]+: 0f ae f0 mfence
|
[ ]*[a-f0-9]+: 0f ae f0 mfence
|
||||||
[ ]*[a-f0-9]+: 0f 01 c8 monitor %rax,%rcx,%rdx
|
[ ]*[a-f0-9]+: 0f 01 c8 monitor %rax,%ecx,%edx
|
||||||
[ ]*[a-f0-9]+: f2 0f d6 c8 movdq2q %xmm0,%mm1
|
[ ]*[a-f0-9]+: f2 0f d6 c8 movdq2q %xmm0,%mm1
|
||||||
[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\)
|
[ ]*[a-f0-9]+: 0f c3 00 movnti %eax,\(%rax\)
|
||||||
[ ]*[a-f0-9]+: 0f e7 10 movntq %mm2,\(%rax\)
|
[ ]*[a-f0-9]+: 0f e7 10 movntq %mm2,\(%rax\)
|
||||||
[ ]*[a-f0-9]+: f3 0f d6 c8 movq2dq %mm0,%xmm1
|
[ ]*[a-f0-9]+: f3 0f d6 c8 movq2dq %mm0,%xmm1
|
||||||
[ ]*[a-f0-9]+: 0f 01 c9 mwait %rax,%rcx
|
[ ]*[a-f0-9]+: 0f 01 c9 mwait %eax,%ecx
|
||||||
[ ]*[a-f0-9]+: 0f 38 1c c1 pabsb %mm1,%mm0
|
[ ]*[a-f0-9]+: 0f 38 1c c1 pabsb %mm1,%mm0
|
||||||
[ ]*[a-f0-9]+: 0f 38 1e c1 pabsd %mm1,%mm0
|
[ ]*[a-f0-9]+: 0f 38 1e c1 pabsd %mm1,%mm0
|
||||||
[ ]*[a-f0-9]+: 0f 38 1d c1 pabsw %mm1,%mm0
|
[ ]*[a-f0-9]+: 0f 38 1d c1 pabsw %mm1,%mm0
|
||||||
|
|||||||
@ -6,34 +6,37 @@
|
|||||||
Disassembly of section .text:
|
Disassembly of section .text:
|
||||||
|
|
||||||
0+000 <foo>:
|
0+000 <foo>:
|
||||||
0: 66 0f d0 01 [ ]*addsubpd \(%rcx\),%xmm0
|
[ ]*[a-f0-9]+: 66 0f d0 01 [ ]*addsubpd \(%rcx\),%xmm0
|
||||||
4: 66 0f d0 ca [ ]*addsubpd %xmm2,%xmm1
|
[ ]*[a-f0-9]+: 66 0f d0 ca [ ]*addsubpd %xmm2,%xmm1
|
||||||
8: f2 0f d0 13 [ ]*addsubps \(%rbx\),%xmm2
|
[ ]*[a-f0-9]+: f2 0f d0 13 [ ]*addsubps \(%rbx\),%xmm2
|
||||||
c: f2 0f d0 dc [ ]*addsubps %xmm4,%xmm3
|
[ ]*[a-f0-9]+: f2 0f d0 dc [ ]*addsubps %xmm4,%xmm3
|
||||||
10: df 88 90 90 90 00 [ ]*fisttps 0x909090\(%rax\)
|
[ ]*[a-f0-9]+: df 88 90 90 90 00 [ ]*fisttps 0x909090\(%rax\)
|
||||||
16: db 88 90 90 90 00 [ ]*fisttpl 0x909090\(%rax\)
|
[ ]*[a-f0-9]+: db 88 90 90 90 00 [ ]*fisttpl 0x909090\(%rax\)
|
||||||
1c: dd 88 90 90 90 00 [ ]*fisttpll 0x909090\(%rax\)
|
[ ]*[a-f0-9]+: dd 88 90 90 90 00 [ ]*fisttpll 0x909090\(%rax\)
|
||||||
22: 66 0f 7c 65 00 [ ]*haddpd 0x0\(%rbp\),%xmm4
|
[ ]*[a-f0-9]+: 66 0f 7c 65 00 [ ]*haddpd 0x0\(%rbp\),%xmm4
|
||||||
27: 66 0f 7c ee [ ]*haddpd %xmm6,%xmm5
|
[ ]*[a-f0-9]+: 66 0f 7c ee [ ]*haddpd %xmm6,%xmm5
|
||||||
2b: f2 0f 7c 37 [ ]*haddps \(%rdi\),%xmm6
|
[ ]*[a-f0-9]+: f2 0f 7c 37 [ ]*haddps \(%rdi\),%xmm6
|
||||||
2f: f2 0f 7c f8 [ ]*haddps %xmm0,%xmm7
|
[ ]*[a-f0-9]+: f2 0f 7c f8 [ ]*haddps %xmm0,%xmm7
|
||||||
33: 66 0f 7d c1 [ ]*hsubpd %xmm1,%xmm0
|
[ ]*[a-f0-9]+: 66 0f 7d c1 [ ]*hsubpd %xmm1,%xmm0
|
||||||
37: 66 0f 7d 0a [ ]*hsubpd \(%rdx\),%xmm1
|
[ ]*[a-f0-9]+: 66 0f 7d 0a [ ]*hsubpd \(%rdx\),%xmm1
|
||||||
3b: f2 0f 7d d2 [ ]*hsubps %xmm2,%xmm2
|
[ ]*[a-f0-9]+: f2 0f 7d d2 [ ]*hsubps %xmm2,%xmm2
|
||||||
3f: f2 0f 7d 1c 24 [ ]*hsubps \(%rsp\),%xmm3
|
[ ]*[a-f0-9]+: f2 0f 7d 1c 24 [ ]*hsubps \(%rsp\),%xmm3
|
||||||
44: f2 0f f0 2e [ ]*lddqu \(%rsi\),%xmm5
|
[ ]*[a-f0-9]+: f2 0f f0 2e [ ]*lddqu \(%rsi\),%xmm5
|
||||||
48: 0f 01 c8 [ ]*monitor %rax,%rcx,%rdx
|
[ ]*[a-f0-9]+: 0f 01 c8 [ ]*monitor %rax,%ecx,%edx
|
||||||
4b: 0f 01 c8 [ ]*monitor %rax,%rcx,%rdx
|
[ ]*[a-f0-9]+: 0f 01 c8 [ ]*monitor %rax,%ecx,%edx
|
||||||
4e: f2 0f 12 f7 [ ]*movddup %xmm7,%xmm6
|
[ ]*[a-f0-9]+: 0f 01 c8 [ ]*monitor %rax,%ecx,%edx
|
||||||
52: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
|
[ ]*[a-f0-9]+: f2 0f 12 f7 [ ]*movddup %xmm7,%xmm6
|
||||||
56: f3 0f 16 01 [ ]*movshdup \(%rcx\),%xmm0
|
[ ]*[a-f0-9]+: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
|
||||||
5a: f3 0f 16 ca [ ]*movshdup %xmm2,%xmm1
|
[ ]*[a-f0-9]+: f3 0f 16 01 [ ]*movshdup \(%rcx\),%xmm0
|
||||||
5e: f3 0f 12 13 [ ]*movsldup \(%rbx\),%xmm2
|
[ ]*[a-f0-9]+: f3 0f 16 ca [ ]*movshdup %xmm2,%xmm1
|
||||||
62: f3 0f 12 dc [ ]*movsldup %xmm4,%xmm3
|
[ ]*[a-f0-9]+: f3 0f 12 13 [ ]*movsldup \(%rbx\),%xmm2
|
||||||
66: 0f 01 c9 [ ]*mwait %rax,%rcx
|
[ ]*[a-f0-9]+: f3 0f 12 dc [ ]*movsldup %xmm4,%xmm3
|
||||||
69: 0f 01 c9 [ ]*mwait %rax,%rcx
|
[ ]*[a-f0-9]+: 0f 01 c9 [ ]*mwait %eax,%ecx
|
||||||
6c: 67 0f 01 c8 [ ]*monitor %eax,%rcx,%rdx
|
[ ]*[a-f0-9]+: 0f 01 c9 [ ]*mwait %eax,%ecx
|
||||||
70: 67 0f 01 c8 [ ]*monitor %eax,%rcx,%rdx
|
[ ]*[a-f0-9]+: 0f 01 c9 [ ]*mwait %eax,%ecx
|
||||||
74: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
|
[ ]*[a-f0-9]+: 67 0f 01 c8 [ ]*monitor %eax,%ecx,%edx
|
||||||
78: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
|
[ ]*[a-f0-9]+: 67 0f 01 c8 [ ]*monitor %eax,%ecx,%edx
|
||||||
|
[ ]*[a-f0-9]+: 67 0f 01 c8 [ ]*monitor %eax,%ecx,%edx
|
||||||
|
[ ]*[a-f0-9]+: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
|
||||||
|
[ ]*[a-f0-9]+: f2 0f 12 38 [ ]*movddup \(%rax\),%xmm7
|
||||||
#pass
|
#pass
|
||||||
|
|||||||
@ -19,6 +19,7 @@ foo:
|
|||||||
hsubps (%rsp,1),%xmm3
|
hsubps (%rsp,1),%xmm3
|
||||||
lddqu (%rsi),%xmm5
|
lddqu (%rsi),%xmm5
|
||||||
monitor
|
monitor
|
||||||
|
monitor %rax,%ecx,%edx
|
||||||
monitor %rax,%rcx,%rdx
|
monitor %rax,%rcx,%rdx
|
||||||
movddup %xmm7,%xmm6
|
movddup %xmm7,%xmm6
|
||||||
movddup (%rax),%xmm7
|
movddup (%rax),%xmm7
|
||||||
@ -27,8 +28,10 @@ foo:
|
|||||||
movsldup (%rbx),%xmm2
|
movsldup (%rbx),%xmm2
|
||||||
movsldup %xmm4,%xmm3
|
movsldup %xmm4,%xmm3
|
||||||
mwait
|
mwait
|
||||||
|
mwait %eax,%ecx
|
||||||
mwait %rax,%rcx
|
mwait %rax,%rcx
|
||||||
|
|
||||||
|
monitor %eax,%ecx,%edx
|
||||||
monitor %eax,%rcx,%rdx
|
monitor %eax,%rcx,%rdx
|
||||||
addr32 monitor
|
addr32 monitor
|
||||||
|
|
||||||
|
|||||||
@ -1,13 +1,13 @@
|
|||||||
#objdump: -dwMsuffix
|
#objdump: -dwMsuffix
|
||||||
#name: x86-64 rep prefix (with suffixes)
|
#name: x86-64 suffix (AT&T mode)
|
||||||
|
|
||||||
.*: +file format .*
|
.*: +file format .*
|
||||||
|
|
||||||
Disassembly of section .text:
|
Disassembly of section .text:
|
||||||
|
|
||||||
0+ <foo>:
|
0+ <foo>:
|
||||||
[ ]*[a-f0-9]+: 0f 01 c8 monitor %rax,%rcx,%rdx
|
[ ]*[a-f0-9]+: 0f 01 c8 monitor %rax,%ecx,%edx
|
||||||
[ ]*[a-f0-9]+: 0f 01 c9 mwait %rax,%rcx
|
[ ]*[a-f0-9]+: 0f 01 c9 mwait %eax,%ecx
|
||||||
[ ]*[a-f0-9]+: 0f 01 c1 vmcall
|
[ ]*[a-f0-9]+: 0f 01 c1 vmcall
|
||||||
[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
|
[ ]*[a-f0-9]+: 0f 01 c2 vmlaunch
|
||||||
[ ]*[a-f0-9]+: 0f 01 c3 vmresume
|
[ ]*[a-f0-9]+: 0f 01 c3 vmresume
|
||||||
|
|||||||
@ -1,3 +1,11 @@
|
|||||||
|
2019-11-07 Jan Beulich <jbeulich@suse.com>
|
||||||
|
|
||||||
|
* i386-dis.c (OP_Mwait): Drop local variable "names", use
|
||||||
|
"names32" instead.
|
||||||
|
(OP_Monitor): Drop local variable "op1_names", re-purpose
|
||||||
|
"names" for it instead, and replace former "names" uses by
|
||||||
|
"names32" ones.
|
||||||
|
|
||||||
2019-11-07 Jan Beulich <jbeulich@suse.com>
|
2019-11-07 Jan Beulich <jbeulich@suse.com>
|
||||||
|
|
||||||
PR/gas 25167
|
PR/gas 25167
|
||||||
|
|||||||
@ -15520,12 +15520,10 @@ OP_Mwait (int bytemode, int sizeflag ATTRIBUTE_UNUSED)
|
|||||||
/* mwait %eax,%ecx / mwaitx %eax,%ecx,%ebx */
|
/* mwait %eax,%ecx / mwaitx %eax,%ecx,%ebx */
|
||||||
if (!intel_syntax)
|
if (!intel_syntax)
|
||||||
{
|
{
|
||||||
const char **names = (address_mode == mode_64bit
|
strcpy (op_out[0], names32[0]);
|
||||||
? names64 : names32);
|
strcpy (op_out[1], names32[1]);
|
||||||
strcpy (op_out[0], names[0]);
|
|
||||||
strcpy (op_out[1], names[1]);
|
|
||||||
if (bytemode == eBX_reg)
|
if (bytemode == eBX_reg)
|
||||||
strcpy (op_out[2], names[3]);
|
strcpy (op_out[2], names32[3]);
|
||||||
two_source_ops = 1;
|
two_source_ops = 1;
|
||||||
}
|
}
|
||||||
/* Skip mod/rm byte. */
|
/* Skip mod/rm byte. */
|
||||||
@ -15537,27 +15535,25 @@ static void
|
|||||||
OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
|
OP_Monitor (int bytemode ATTRIBUTE_UNUSED,
|
||||||
int sizeflag ATTRIBUTE_UNUSED)
|
int sizeflag ATTRIBUTE_UNUSED)
|
||||||
{
|
{
|
||||||
/* monitor %eax,%ecx,%edx" */
|
/* monitor %{e,r,}ax,%ecx,%edx" */
|
||||||
if (!intel_syntax)
|
if (!intel_syntax)
|
||||||
{
|
{
|
||||||
const char **op1_names;
|
|
||||||
const char **names = (address_mode == mode_64bit
|
const char **names = (address_mode == mode_64bit
|
||||||
? names64 : names32);
|
? names64 : names32);
|
||||||
|
|
||||||
if (!(prefixes & PREFIX_ADDR))
|
if (prefixes & PREFIX_ADDR)
|
||||||
op1_names = (address_mode == mode_16bit
|
|
||||||
? names16 : names);
|
|
||||||
else
|
|
||||||
{
|
{
|
||||||
/* Remove "addr16/addr32". */
|
/* Remove "addr16/addr32". */
|
||||||
all_prefixes[last_addr_prefix] = 0;
|
all_prefixes[last_addr_prefix] = 0;
|
||||||
op1_names = (address_mode != mode_32bit
|
names = (address_mode != mode_32bit
|
||||||
? names32 : names16);
|
? names32 : names16);
|
||||||
used_prefixes |= PREFIX_ADDR;
|
used_prefixes |= PREFIX_ADDR;
|
||||||
}
|
}
|
||||||
strcpy (op_out[0], op1_names[0]);
|
else if (address_mode == mode_16bit)
|
||||||
strcpy (op_out[1], names[1]);
|
names = names16;
|
||||||
strcpy (op_out[2], names[2]);
|
strcpy (op_out[0], names[0]);
|
||||||
|
strcpy (op_out[1], names32[1]);
|
||||||
|
strcpy (op_out[2], names32[2]);
|
||||||
two_source_ops = 1;
|
two_source_ops = 1;
|
||||||
}
|
}
|
||||||
/* Skip mod/rm byte. */
|
/* Skip mod/rm byte. */
|
||||||
|
|||||||
Reference in New Issue
Block a user