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or1k: Add the l.muld, l.muldu, l.macu, l.msbu insns
Also fix the incorrect definitions of multiply and divide carry and overflow float. Changes to the instructions are made in the .cpu file, then we regenerate the binutils and sim files. The changes also required a few fixups for tests and additional sim helpers. cpu/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> Stafford Horne <shorne@gmail.com> * or1korbis.cpu (insn-opcode-mac): Add opcodes for MACU and MSBU. (insn-opcode-alu-regreg): Add opcodes for MULD and MULDU. (l-mul): Fix overflow support and indentation. (l-mulu): Fix overflow support and indentation. (l-muld, l-muldu, l-msbu, l-macu): New instructions. (l-div); Remove incorrect carry behavior. (l-divu): Fix carry and overflow behavior. (l-mac): Add overflow support. (l-msb, l-msbu): Add carry and overflow support. opcodes/ChangeLog: yyyy-mm-dd Richard Henderson <rth@twiddle.net> Stafford Horne <shorne@gmail.com> * or1k-desc.c: Regenerate. * or1k-desc.h: Regenerate. * or1k-opc.c: Regenerate. * or1k-opc.h: Regenerate. * or1k-opinst.c: Regenerate. sim/common/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * cgen-ops.h (ADDCFDI): New function, add carry flag DI variant. (ADDOFDI): New function, add overflow flag DI variant. (SUBCFDI): New function, subtract carry flag DI variant. (SUBOFDI): New function, subtract overflow flag DI variant. sim/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * or1k/cpu.h: Regenerate. * or1k/decode.c: Regenerate. * or1k/decode.h: Regenerate. * or1k/model.c: Regenerate. * or1k/sem-switch.c: Regenerate. * or1k/sem.c: Regenerate: sim/testsuite/sim/or1k/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * div.S: Fix tests to match correct overflow/carry semantics. * mul.S: Likewise. gas/ChangeLog: yyyy-mm-dd Stafford Horne <shorne@gmail.com> * testsuite/gas/or1k/allinsn.s: Add instruction tests for l.muld, l.muldu, l.macu, l.msb, l.msbu. * testsuite/gas/or1k/allinsn.d: Add test results for new instructions.
This commit is contained in:
Richard Henderson
committed by
Stafford Horne
Stafford Horne
parent
c8e98e3692
commit
07f5f4c683
341
sim/or1k/sem.c
341
sim/or1k/sem.c
@ -228,6 +228,27 @@ if (1)
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#undef FLD
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}
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/* l-adrp: l.adrp $rD,${disp21} */
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static SEM_PC
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SEM_FN_NAME (or1k32bf,l_adrp) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_l_adrp.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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USI opval = FLD (i_disp21);
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SET_H_GPR (FLD (f_r1), opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
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}
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return vpc;
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#undef FLD
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}
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/* l-jal: l.jal ${disp26} */
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static SEM_PC
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@ -572,7 +593,7 @@ SEM_FN_NAME (or1k32bf,l_movhi) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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static SEM_PC
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SEM_FN_NAME (or1k32bf,l_macrc) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_l_slli.f
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#define FLD(f) abuf->fields.sfmt_l_adrp.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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@ -1304,11 +1325,6 @@ SEM_FN_NAME (or1k32bf,l_mul) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SET_H_SYS_SR_OV (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
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}
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{
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BI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
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SET_H_SYS_SR_CY (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
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}
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{
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USI opval = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
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SET_H_GPR (FLD (f_r1), opval);
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@ -1324,6 +1340,36 @@ or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
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#undef FLD
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}
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/* l-muld: l.muld $rA,$rB */
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static SEM_PC
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SEM_FN_NAME (or1k32bf,l_muld) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_l_sll.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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DI tmp_result;
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tmp_result = MULDI (EXTSIDI (GET_H_GPR (FLD (f_r2))), EXTSIDI (GET_H_GPR (FLD (f_r3))));
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{
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SI opval = SUBWORDDISI (tmp_result, 0);
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SET_H_MAC_MACHI (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
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}
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{
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SI opval = SUBWORDDISI (tmp_result, 1);
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SET_H_MAC_MACLO (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
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}
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}
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return vpc;
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#undef FLD
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}
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/* l-mulu: l.mulu $rD,$rA,$rB */
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static SEM_PC
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@ -1337,11 +1383,6 @@ SEM_FN_NAME (or1k32bf,l_mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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{
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{
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BI opval = 0;
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SET_H_SYS_SR_OV (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
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}
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{
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BI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
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SET_H_SYS_SR_CY (opval);
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@ -1353,7 +1394,7 @@ SEM_FN_NAME (or1k32bf,l_mulu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
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}
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}
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if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
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if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
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or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
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}
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}
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@ -1362,6 +1403,36 @@ or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
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#undef FLD
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}
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/* l-muldu: l.muldu $rA,$rB */
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static SEM_PC
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SEM_FN_NAME (or1k32bf,l_muldu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_l_sll.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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DI tmp_result;
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tmp_result = MULDI (ZEXTSIDI (GET_H_GPR (FLD (f_r2))), ZEXTSIDI (GET_H_GPR (FLD (f_r3))));
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{
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SI opval = SUBWORDDISI (tmp_result, 0);
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SET_H_MAC_MACHI (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
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}
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{
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SI opval = SUBWORDDISI (tmp_result, 1);
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SET_H_MAC_MACLO (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
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}
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}
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return vpc;
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#undef FLD
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}
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/* l-div: l.div $rD,$rA,$rB */
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static SEM_PC
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@ -1373,38 +1444,33 @@ SEM_FN_NAME (or1k32bf,l_div) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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if (NESI (GET_H_GPR (FLD (f_r3)), 0)) {
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{
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{
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BI opval = 0;
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SET_H_SYS_SR_CY (opval);
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written |= (1 << 6);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
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SET_H_SYS_SR_OV (opval);
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written |= (1 << 5);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
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}
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{
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SI opval = DIVSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
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SET_H_GPR (FLD (f_r1), opval);
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written |= (1 << 5);
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written |= (1 << 4);
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CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
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}
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}
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} else {
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{
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{
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BI opval = 1;
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SET_H_SYS_SR_CY (opval);
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written |= (1 << 6);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
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}
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}
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{
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BI opval = 0;
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SET_H_SYS_SR_OV (opval);
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written |= (1 << 5);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
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}
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if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
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if (GET_H_SYS_SR_OVE ()) {
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or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
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}
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}
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}
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abuf->written = written;
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@ -1423,38 +1489,33 @@ SEM_FN_NAME (or1k32bf,l_divu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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if (NESI (GET_H_GPR (FLD (f_r3)), 0)) {
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{
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{
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BI opval = 0;
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SET_H_SYS_SR_CY (opval);
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written |= (1 << 6);
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written |= (1 << 5);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
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}
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{
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USI opval = UDIVSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
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SET_H_GPR (FLD (f_r1), opval);
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written |= (1 << 5);
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written |= (1 << 4);
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CGEN_TRACE_RESULT (current_cpu, abuf, "gpr", 'x', opval);
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}
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}
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} else {
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{
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{
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BI opval = 1;
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SET_H_SYS_SR_CY (opval);
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written |= (1 << 6);
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written |= (1 << 5);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
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}
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}
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{
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BI opval = 0;
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SET_H_SYS_SR_OV (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
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}
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if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
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if (GET_H_SYS_SR_OVE ()) {
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or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
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}
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}
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}
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abuf->written = written;
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@ -1663,11 +1724,6 @@ SEM_FN_NAME (or1k32bf,l_muli) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SET_H_SYS_SR_OV (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
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}
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{
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USI opval = MUL1OFSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
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SET_H_SYS_SR_CY (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
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}
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{
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USI opval = MULSI (GET_H_GPR (FLD (f_r2)), EXTSISI (FLD (f_simm16)));
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SET_H_GPR (FLD (f_r1), opval);
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@ -2273,10 +2329,13 @@ SEM_FN_NAME (or1k32bf,l_mac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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SI tmp_prod;
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{
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DI tmp_prod;
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DI tmp_mac;
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DI tmp_result;
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tmp_prod = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
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tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod));
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tmp_prod = MULDI (EXTSIDI (GET_H_GPR (FLD (f_r2))), EXTSIDI (GET_H_GPR (FLD (f_r3))));
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tmp_mac = JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ());
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tmp_result = ADDDI (tmp_prod, tmp_mac);
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{
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SI opval = SUBWORDDISI (tmp_result, 0);
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SET_H_MAC_MACHI (opval);
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@ -2287,38 +2346,15 @@ SEM_FN_NAME (or1k32bf,l_mac) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SET_H_MAC_MACLO (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
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}
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}
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return vpc;
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#undef FLD
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}
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/* l-msb: l.msb $rA,$rB */
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static SEM_PC
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SEM_FN_NAME (or1k32bf,l_msb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_l_sll.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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SI tmp_prod;
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DI tmp_result;
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tmp_prod = MULSI (GET_H_GPR (FLD (f_r2)), GET_H_GPR (FLD (f_r3)));
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tmp_result = SUBDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod));
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{
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SI opval = SUBWORDDISI (tmp_result, 0);
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SET_H_MAC_MACHI (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
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}
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{
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SI opval = SUBWORDDISI (tmp_result, 1);
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SET_H_MAC_MACLO (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
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BI opval = ADDOFDI (tmp_prod, tmp_mac, 0);
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SET_H_SYS_SR_OV (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
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}
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}
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if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
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or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
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}
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}
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return vpc;
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@ -2337,10 +2373,13 @@ SEM_FN_NAME (or1k32bf,l_maci) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
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{
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SI tmp_prod;
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{
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DI tmp_prod;
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DI tmp_mac;
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DI tmp_result;
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tmp_prod = MULSI (EXTSISI (FLD (f_simm16)), GET_H_GPR (FLD (f_r2)));
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tmp_result = ADDDI (JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ()), EXTSIDI (tmp_prod));
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tmp_prod = MULDI (EXTSIDI (GET_H_GPR (FLD (f_r2))), EXTSIDI (FLD (f_simm16)));
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tmp_mac = JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ());
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tmp_result = ADDDI (tmp_mac, tmp_prod);
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{
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SI opval = SUBWORDDISI (tmp_result, 0);
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SET_H_MAC_MACHI (opval);
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@ -2351,6 +2390,147 @@ SEM_FN_NAME (or1k32bf,l_maci) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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SET_H_MAC_MACLO (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
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}
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{
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BI opval = ADDOFDI (tmp_prod, tmp_mac, 0);
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SET_H_SYS_SR_OV (opval);
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CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
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}
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}
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if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
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or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
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}
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}
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return vpc;
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#undef FLD
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}
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/* l-macu: l.macu $rA,$rB */
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static SEM_PC
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SEM_FN_NAME (or1k32bf,l_macu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
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{
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#define FLD(f) abuf->fields.sfmt_l_sll.f
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ARGBUF *abuf = SEM_ARGBUF (sem_arg);
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int UNUSED written = 0;
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IADDR UNUSED pc = abuf->addr;
|
||||
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
||||
|
||||
{
|
||||
{
|
||||
DI tmp_prod;
|
||||
DI tmp_mac;
|
||||
DI tmp_result;
|
||||
tmp_prod = MULDI (ZEXTSIDI (GET_H_GPR (FLD (f_r2))), ZEXTSIDI (GET_H_GPR (FLD (f_r3))));
|
||||
tmp_mac = JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ());
|
||||
tmp_result = ADDDI (tmp_prod, tmp_mac);
|
||||
{
|
||||
SI opval = SUBWORDDISI (tmp_result, 0);
|
||||
SET_H_MAC_MACHI (opval);
|
||||
CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
|
||||
}
|
||||
{
|
||||
SI opval = SUBWORDDISI (tmp_result, 1);
|
||||
SET_H_MAC_MACLO (opval);
|
||||
CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
|
||||
}
|
||||
{
|
||||
BI opval = ADDCFDI (tmp_prod, tmp_mac, 0);
|
||||
SET_H_SYS_SR_CY (opval);
|
||||
CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
|
||||
}
|
||||
}
|
||||
if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
|
||||
or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
|
||||
}
|
||||
}
|
||||
|
||||
return vpc;
|
||||
#undef FLD
|
||||
}
|
||||
|
||||
/* l-msb: l.msb $rA,$rB */
|
||||
|
||||
static SEM_PC
|
||||
SEM_FN_NAME (or1k32bf,l_msb) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
||||
{
|
||||
#define FLD(f) abuf->fields.sfmt_l_sll.f
|
||||
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
||||
int UNUSED written = 0;
|
||||
IADDR UNUSED pc = abuf->addr;
|
||||
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
||||
|
||||
{
|
||||
{
|
||||
DI tmp_prod;
|
||||
DI tmp_mac;
|
||||
DI tmp_result;
|
||||
tmp_prod = MULDI (EXTSIDI (GET_H_GPR (FLD (f_r2))), EXTSIDI (GET_H_GPR (FLD (f_r3))));
|
||||
tmp_mac = JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ());
|
||||
tmp_result = SUBDI (tmp_mac, tmp_prod);
|
||||
{
|
||||
SI opval = SUBWORDDISI (tmp_result, 0);
|
||||
SET_H_MAC_MACHI (opval);
|
||||
CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
|
||||
}
|
||||
{
|
||||
SI opval = SUBWORDDISI (tmp_result, 1);
|
||||
SET_H_MAC_MACLO (opval);
|
||||
CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
|
||||
}
|
||||
{
|
||||
BI opval = SUBOFDI (tmp_mac, tmp_result, 0);
|
||||
SET_H_SYS_SR_OV (opval);
|
||||
CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-ov", 'x', opval);
|
||||
}
|
||||
}
|
||||
if (ANDIF (GET_H_SYS_SR_OV (), GET_H_SYS_SR_OVE ())) {
|
||||
or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
|
||||
}
|
||||
}
|
||||
|
||||
return vpc;
|
||||
#undef FLD
|
||||
}
|
||||
|
||||
/* l-msbu: l.msbu $rA,$rB */
|
||||
|
||||
static SEM_PC
|
||||
SEM_FN_NAME (or1k32bf,l_msbu) (SIM_CPU *current_cpu, SEM_ARG sem_arg)
|
||||
{
|
||||
#define FLD(f) abuf->fields.sfmt_l_sll.f
|
||||
ARGBUF *abuf = SEM_ARGBUF (sem_arg);
|
||||
int UNUSED written = 0;
|
||||
IADDR UNUSED pc = abuf->addr;
|
||||
SEM_PC vpc = SEM_NEXT_VPC (sem_arg, pc, 4);
|
||||
|
||||
{
|
||||
{
|
||||
DI tmp_prod;
|
||||
DI tmp_mac;
|
||||
DI tmp_result;
|
||||
tmp_prod = MULDI (ZEXTSIDI (GET_H_GPR (FLD (f_r2))), ZEXTSIDI (GET_H_GPR (FLD (f_r3))));
|
||||
tmp_mac = JOINSIDI (GET_H_MAC_MACHI (), GET_H_MAC_MACLO ());
|
||||
tmp_result = SUBDI (tmp_mac, tmp_prod);
|
||||
{
|
||||
SI opval = SUBWORDDISI (tmp_result, 0);
|
||||
SET_H_MAC_MACHI (opval);
|
||||
CGEN_TRACE_RESULT (current_cpu, abuf, "mac-machi", 'x', opval);
|
||||
}
|
||||
{
|
||||
SI opval = SUBWORDDISI (tmp_result, 1);
|
||||
SET_H_MAC_MACLO (opval);
|
||||
CGEN_TRACE_RESULT (current_cpu, abuf, "mac-maclo", 'x', opval);
|
||||
}
|
||||
{
|
||||
BI opval = SUBCFDI (tmp_mac, tmp_result, 0);
|
||||
SET_H_SYS_SR_CY (opval);
|
||||
CGEN_TRACE_RESULT (current_cpu, abuf, "sys-sr-cy", 'x', opval);
|
||||
}
|
||||
}
|
||||
if (ANDIF (GET_H_SYS_SR_CY (), GET_H_SYS_SR_OVE ())) {
|
||||
or1k32bf_exception (current_cpu, pc, EXCEPT_RANGE);
|
||||
}
|
||||
}
|
||||
|
||||
return vpc;
|
||||
@ -2814,6 +2994,7 @@ static const struct sem_fn_desc sem_fns[] = {
|
||||
{ OR1K32BF_INSN_X_CHAIN, SEM_FN_NAME (or1k32bf,x_chain) },
|
||||
{ OR1K32BF_INSN_X_BEGIN, SEM_FN_NAME (or1k32bf,x_begin) },
|
||||
{ OR1K32BF_INSN_L_J, SEM_FN_NAME (or1k32bf,l_j) },
|
||||
{ OR1K32BF_INSN_L_ADRP, SEM_FN_NAME (or1k32bf,l_adrp) },
|
||||
{ OR1K32BF_INSN_L_JAL, SEM_FN_NAME (or1k32bf,l_jal) },
|
||||
{ OR1K32BF_INSN_L_JR, SEM_FN_NAME (or1k32bf,l_jr) },
|
||||
{ OR1K32BF_INSN_L_JALR, SEM_FN_NAME (or1k32bf,l_jalr) },
|
||||
@ -2856,7 +3037,9 @@ static const struct sem_fn_desc sem_fns[] = {
|
||||
{ OR1K32BF_INSN_L_SUB, SEM_FN_NAME (or1k32bf,l_sub) },
|
||||
{ OR1K32BF_INSN_L_ADDC, SEM_FN_NAME (or1k32bf,l_addc) },
|
||||
{ OR1K32BF_INSN_L_MUL, SEM_FN_NAME (or1k32bf,l_mul) },
|
||||
{ OR1K32BF_INSN_L_MULD, SEM_FN_NAME (or1k32bf,l_muld) },
|
||||
{ OR1K32BF_INSN_L_MULU, SEM_FN_NAME (or1k32bf,l_mulu) },
|
||||
{ OR1K32BF_INSN_L_MULDU, SEM_FN_NAME (or1k32bf,l_muldu) },
|
||||
{ OR1K32BF_INSN_L_DIV, SEM_FN_NAME (or1k32bf,l_div) },
|
||||
{ OR1K32BF_INSN_L_DIVU, SEM_FN_NAME (or1k32bf,l_divu) },
|
||||
{ OR1K32BF_INSN_L_FF1, SEM_FN_NAME (or1k32bf,l_ff1) },
|
||||
@ -2895,8 +3078,10 @@ static const struct sem_fn_desc sem_fns[] = {
|
||||
{ OR1K32BF_INSN_L_SFNE, SEM_FN_NAME (or1k32bf,l_sfne) },
|
||||
{ OR1K32BF_INSN_L_SFNEI, SEM_FN_NAME (or1k32bf,l_sfnei) },
|
||||
{ OR1K32BF_INSN_L_MAC, SEM_FN_NAME (or1k32bf,l_mac) },
|
||||
{ OR1K32BF_INSN_L_MSB, SEM_FN_NAME (or1k32bf,l_msb) },
|
||||
{ OR1K32BF_INSN_L_MACI, SEM_FN_NAME (or1k32bf,l_maci) },
|
||||
{ OR1K32BF_INSN_L_MACU, SEM_FN_NAME (or1k32bf,l_macu) },
|
||||
{ OR1K32BF_INSN_L_MSB, SEM_FN_NAME (or1k32bf,l_msb) },
|
||||
{ OR1K32BF_INSN_L_MSBU, SEM_FN_NAME (or1k32bf,l_msbu) },
|
||||
{ OR1K32BF_INSN_L_CUST1, SEM_FN_NAME (or1k32bf,l_cust1) },
|
||||
{ OR1K32BF_INSN_L_CUST2, SEM_FN_NAME (or1k32bf,l_cust2) },
|
||||
{ OR1K32BF_INSN_L_CUST3, SEM_FN_NAME (or1k32bf,l_cust3) },
|
||||
|
||||
Reference in New Issue
Block a user