mirror of
https://github.com/espressif/binutils-gdb.git
synced 2025-06-23 03:29:47 +08:00
sim: iq2000: invert sim_cpu storage
The cpu.h change is in generated cgen code, but that has been sent upstream too, so the next regen should include it automatically.
This commit is contained in:
@ -61,7 +61,7 @@ CPU (h_gr[(index)]) = (x);\
|
|||||||
}\
|
}\
|
||||||
;} while (0)
|
;} while (0)
|
||||||
} hardware;
|
} hardware;
|
||||||
#define CPU_CGEN_HW(cpu) (& (cpu)->cpu_data.hardware)
|
#define CPU_CGEN_HW(cpu) (& IQ2000_SIM_CPU (cpu)->cpu_data.hardware)
|
||||||
} IQ2000BF_CPU_DATA;
|
} IQ2000BF_CPU_DATA;
|
||||||
|
|
||||||
/* Cover fns for register access. */
|
/* Cover fns for register access. */
|
||||||
|
@ -70,7 +70,8 @@ sim_open (SIM_OPEN_KIND kind, host_callback *callback, struct bfd *abfd,
|
|||||||
current_target_byte_order = BFD_ENDIAN_BIG;
|
current_target_byte_order = BFD_ENDIAN_BIG;
|
||||||
|
|
||||||
/* The cpu data is kept in a separately allocated chunk of memory. */
|
/* The cpu data is kept in a separately allocated chunk of memory. */
|
||||||
if (sim_cpu_alloc_all (sd, 1) != SIM_RC_OK)
|
if (sim_cpu_alloc_all_extra (sd, 1, sizeof (struct iq2000_sim_cpu))
|
||||||
|
!= SIM_RC_OK)
|
||||||
{
|
{
|
||||||
free_state (sd);
|
free_state (sd);
|
||||||
return 0;
|
return 0;
|
||||||
|
@ -4,6 +4,8 @@
|
|||||||
#ifndef SIM_MAIN_H
|
#ifndef SIM_MAIN_H
|
||||||
#define SIM_MAIN_H
|
#define SIM_MAIN_H
|
||||||
|
|
||||||
|
#define SIM_HAVE_COMMON_SIM_CPU
|
||||||
|
|
||||||
/* This is a global setting. Different cpu families can't mix-n-match -scache
|
/* This is a global setting. Different cpu families can't mix-n-match -scache
|
||||||
and -pbb. However some cpu families may use -simple while others use
|
and -pbb. However some cpu families may use -simple while others use
|
||||||
one of -scache/-pbb. ???? */
|
one of -scache/-pbb. ???? */
|
||||||
@ -22,15 +24,7 @@
|
|||||||
#include "sim-base.h"
|
#include "sim-base.h"
|
||||||
#include "cgen-sim.h"
|
#include "cgen-sim.h"
|
||||||
|
|
||||||
/* The _sim_cpu struct. */
|
struct iq2000_sim_cpu {
|
||||||
|
|
||||||
struct _sim_cpu {
|
|
||||||
/* sim/common cpu base. */
|
|
||||||
sim_cpu_base base;
|
|
||||||
|
|
||||||
/* Static parts of cgen. */
|
|
||||||
CGEN_CPU cgen_cpu;
|
|
||||||
|
|
||||||
/* CPU specific parts go here.
|
/* CPU specific parts go here.
|
||||||
Note that in files that don't need to access these pieces WANT_CPU_FOO
|
Note that in files that don't need to access these pieces WANT_CPU_FOO
|
||||||
won't be defined and thus these parts won't appear. This is ok in the
|
won't be defined and thus these parts won't appear. This is ok in the
|
||||||
@ -42,6 +36,7 @@ struct _sim_cpu {
|
|||||||
IQ2000BF_CPU_DATA cpu_data;
|
IQ2000BF_CPU_DATA cpu_data;
|
||||||
#endif
|
#endif
|
||||||
};
|
};
|
||||||
|
#define IQ2000_SIM_CPU(cpu) ((struct iq2000_sim_cpu *) CPU_ARCH_DATA (cpu))
|
||||||
|
|
||||||
/* Misc. */
|
/* Misc. */
|
||||||
|
|
||||||
|
Reference in New Issue
Block a user