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sim: m32r: fix virtual environment with Linux targets

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We don't want to handle Linux syscalls when in the virtual environment,
just the user environment, so adjust the Linux traps logic to check for
that specifically (instead of just skipping the operating environment).

Also tweak some testcases to explicitly specify the environment they run
under rather than relying on the default matching their needs.  This gets
the tests passing for all m32r targets.
This commit is contained in:
Mike Frysinger
2021-06-30 20:30:43 -04:00
parent 33b477e1c7
commit 055a3f27e8
5 changed files with 15 additions and 8 deletions
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5
sim/m32r/ChangeLog
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@ -1,3 +1,8 @@
2021-07-01 Mike Frysinger <vapier@gentoo.org>
* traps-linux.c (m32r_trap): Change OPERATING_ENVIRONMENT check to
!USER_ENVIRONMENT. Jump to default switch case.
2021-07-01 Mike Frysinger <vapier@gentoo.org> 2021-07-01 Mike Frysinger <vapier@gentoo.org>
* syscall.h: Change __NR_ prefix on all symbols to TARGET_LINUX_SYS_. * syscall.h: Change __NR_ prefix on all symbols to TARGET_LINUX_SYS_.

11
sim/m32r/traps-linux.c
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@ -231,14 +231,8 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
unsigned int func, arg1, arg2, arg3, arg4, arg5, arg6, arg7; unsigned int func, arg1, arg2, arg3, arg4, arg5, arg6, arg7;
int result, result2, errcode; int result, result2, errcode;
if (STATE_ENVIRONMENT (sd) == OPERATING_ENVIRONMENT) if (STATE_ENVIRONMENT (sd) != USER_ENVIRONMENT)
{ goto case_default;
/* The new pc is the trap vector entry.
We assume there's a branch there to some handler.
Use cr5 as EVB (EIT Vector Base) register. */
USI new_pc = m32rbf_h_cr_get (current_cpu, 5) + 0x40 + num * 4;
return new_pc;
}
func = m32rbf_h_gr_get (current_cpu, 7); func = m32rbf_h_gr_get (current_cpu, 7);
arg1 = m32rbf_h_gr_get (current_cpu, 0); arg1 = m32rbf_h_gr_get (current_cpu, 0);
@ -1344,6 +1338,7 @@ m32r_trap (SIM_CPU *current_cpu, PCADDR pc, int num)
/* Do nothing. */ /* Do nothing. */
break; break;
case_default:
default : default :
{ {
/* Use cr5 as EVB (EIT Vector Base) register. */ /* Use cr5 as EVB (EIT Vector Base) register. */

5
sim/testsuite/m32r/ChangeLog
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@ -1,3 +1,8 @@
2021-07-01 Mike Frysinger <vapier@gentoo.org>
* hw-trap.ms: Run sim with --environment virtual.
* trap.cgs: Likewise.
2021-04-08 Mike Frysinger <vapier@gentoo.org> 2021-04-08 Mike Frysinger <vapier@gentoo.org>
* allinsn.exp (arch): Delete. * allinsn.exp (arch): Delete.

1
sim/testsuite/m32r/hw-trap.ms
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@ -1,4 +1,5 @@
# mach(): m32r m32rx # mach(): m32r m32rx
# sim: --environment virtual
# output(): pass\n # output(): pass\n
.include "testutils.inc" .include "testutils.inc"

1
sim/testsuite/m32r/trap.cgs
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@ -1,5 +1,6 @@
# m32r testcase for trap #$uimm4 # m32r testcase for trap #$uimm4
# mach(): m32r m32rx # mach(): m32r m32rx
# sim: --environment virtual
.include "testutils.inc" .include "testutils.inc"