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[AArch64][SVE 29/32] Add new SVE core & FP register operands

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SVE uses some new fields to store W, X and scalar FP registers.
This patch adds corresponding operands.

include/
	* opcode/aarch64.h (AARCH64_OPND_SVE_Rm): New aarch64_opnd.
	(AARCH64_OPND_SVE_Rn_SP, AARCH64_OPND_SVE_VZn, AARCH64_OPND_SVE_Vd)
	(AARCH64_OPND_SVE_Vm, AARCH64_OPND_SVE_Vn): Likewise.

opcodes/
	* aarch64-tbl.h (AARCH64_OPERANDS): Add entries for the new SVE core
	and FP register operands.
	* aarch64-opc.h (FLD_SVE_Rm, FLD_SVE_Rn, FLD_SVE_Vd, FLD_SVE_Vm)
	(FLD_SVE_Vn): New aarch64_field_kinds.
	* aarch64-opc.c (fields): Add corresponding entries.
	(aarch64_print_operand): Handle the new SVE core and FP register
	operands.
	* aarch64-opc-2.c: Regenerate.
	* aarch64-asm-2.c: Likewise.
	* aarch64-dis-2.c: Likewise.

gas/
	* config/tc-aarch64.c (parse_operands): Handle the new SVE core
	and FP register operands.
This commit is contained in:
Richard Sandiford
2016-09-21 16:57:43 +01:00
parent 165d495085
commit 047cd301d4
11 changed files with 98 additions and 20 deletions
Download Patch File Download Diff File Expand all files Collapse all files

6
include/opcode/aarch64.h
View File

@ -310,6 +310,8 @@ enum aarch64_opnd
AARCH64_OPND_SVE_Pm, /* SVE p0-p15 in Pm. */
AARCH64_OPND_SVE_Pn, /* SVE p0-p15 in Pn. */
AARCH64_OPND_SVE_Pt, /* SVE p0-p15 in Pt. */
AARCH64_OPND_SVE_Rm, /* Integer Rm or ZR, alt. SVE position. */
AARCH64_OPND_SVE_Rn_SP, /* Integer Rn or SP, alt. SVE position. */
AARCH64_OPND_SVE_SHLIMM_PRED, /* SVE shift left amount (predicated). */
AARCH64_OPND_SVE_SHLIMM_UNPRED, /* SVE shift left amount (unpredicated). */
AARCH64_OPND_SVE_SHRIMM_PRED, /* SVE shift right amount (predicated). */
@ -322,6 +324,10 @@ enum aarch64_opnd
AARCH64_OPND_SVE_UIMM7, /* SVE unsigned 7-bit immediate. */
AARCH64_OPND_SVE_UIMM8, /* SVE unsigned 8-bit immediate. */
AARCH64_OPND_SVE_UIMM8_53, /* SVE split unsigned 8-bit immediate. */
AARCH64_OPND_SVE_VZn, /* Scalar SIMD&FP register in Zn field. */
AARCH64_OPND_SVE_Vd, /* Scalar SIMD&FP register in Vd. */
AARCH64_OPND_SVE_Vm, /* Scalar SIMD&FP register in Vm. */
AARCH64_OPND_SVE_Vn, /* Scalar SIMD&FP register in Vn. */
AARCH64_OPND_SVE_Za_5, /* SVE vector register in Za, bits [9,5]. */
AARCH64_OPND_SVE_Za_16, /* SVE vector register in Za, bits [20,16]. */
AARCH64_OPND_SVE_Zd, /* SVE vector register in Zd. */