76cc2a00c6
Add the first and most basic task pool example.
2019-06-28 23:20:52 +00:00
87eb37342f
Create a project that builds a subset of the dependencies of the IoT SDK that have been brought into SVN thus far. The application does nothing other than build at this time.
2019-06-19 18:42:58 +00:00
0b0a02b76a
Bring in a minimum subset of the IoT SDK - at this time just a subset of the library dependencies rather than the libraries themselves.
2019-06-19 18:41:21 +00:00
fb3eaeac40
Added additional xMessageBufferSpacesAvailable() (plural) to existing xMessageBufferSpaceAvailable() (singular) macro as the documentation muddled both.
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Added #define portPOINTER_SIZE_TYPE uint64_t to the 64-bit RISC-V port layer.
2019-05-13 03:14:05 +00:00
b51529a284
Update version number ready for next release.
2019-05-11 01:47:37 +00:00
9e10b08a3a
Delete the Release configuration from the NXP project.
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Also, some cosmetic changes.
2019-05-11 00:53:34 +00:00
db5d265c07
Removing obsolete code and files only.
2019-05-10 22:19:18 +00:00
53cb12e389
Add M7/M4 AMP demo.
2019-05-10 18:25:10 +00:00
0b1a025789
Add NXP libs needed to build the project
2019-05-09 22:27:44 +00:00
aa9c8d2697
Delete the not needed file missed in last commit
2019-05-09 22:09:12 +00:00
b9e379951a
Do not strip required symbols when LTO is on
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Link time optimization was stripping off some symbols which were
accessed from assembly code.
2019-05-09 22:04:29 +00:00
b6e5f96f0e
Ensure that fault handlers are declared naked.
2019-05-05 02:26:42 +00:00
2279a86566
Add ARMv8M demo project for NXP LPC55S69.
2019-05-05 02:15:55 +00:00
ae448fc952
Add Cortex M23 GCC and IAR ports. Add demo projects for Nuvoton NuMaker-PFM-2351.
2019-05-02 21:08:28 +00:00
079d081346
Basic 64-bit RISC-V port now functional. RISC-V port layer automatically switches between 32-bit and 64-bit.
2019-04-29 00:57:14 +00:00
27ca5c8341
Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM Cortex-M33 ports to assist with link time optimisation.
2019-04-25 19:49:50 +00:00
84377442fc
Added portMEMORY_BARRIER() implemented as __asm volatile( "" ::: "memory" ) into ARM GCC ports to assist with link time optimisation.
2019-04-21 20:15:34 +00:00
606845492b
Fix potential memory leak in the Win32 FreeRTOS+TCP network interface initialisation sequence.
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Introduce portMEMORY_BARRIER() macro to assist with memory access ordering when suspending the scheduler if link time optimization is used.
2019-04-17 17:16:04 +00:00
dd9a9710c6
Export port architecture name for COrtex-M33. This can be used by debuggers to find the port in-use to be able to correctly decode the context stored on the stack.
2019-03-28 00:00:46 +00:00
ba39a958b5
Fix spelling of priority in comments.
2019-03-18 23:28:03 +00:00
12fb75be37
Fix warning portHAS_STACK_OVERFLOW_CHECKING not defined
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portHAS_STACK_OVERFLOW_CHECKING was getting defined too late before
being used in portable.h for the platforms that do not have stack
overflow checking registers. This commit ensures that it is defined
before it is used.
2019-03-13 21:10:44 +00:00
2265d70499
Correcting spelling mistakes in comments only.
2019-03-08 17:30:49 +00:00
06596c3192
Prepare the RISC-V port layer for addition of 64-bit port.
2019-03-08 17:03:43 +00:00
50e67a89f1
Update version number in +TCP code.
2019-02-21 18:08:36 +00:00
5fe8465a35
Change type of usStackDepth to configSTACK_DEPTH_TYPE.
2019-02-21 03:25:30 +00:00
5623c69748
Fix Build and Links failure in MPU projects. Minor cosmetic changes in some V8M files.
2019-02-20 20:27:07 +00:00
8b6ab5f197
Add instructions on building the Cortex-M33 secure and non secure projects into the comments of that project and into a readme.txt file.
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Enable configUSE_LIST_DATA_INTEGRITY_CHECK_BYTES setting to be used in statically allocated systems.
2019-02-20 17:55:59 +00:00
ceeff14524
Set default value of configRUN_FREERTOS_SECURE_ONLY to 0.
2019-02-20 00:40:46 +00:00
5849459c65
Add support for running FreeRTOS on Secure Side only in Cortex M33 port. Also, change spaces to tabs.
2019-02-20 00:25:45 +00:00
c3c9c12ce2
Update the common demo death.c to use the updated macro name to give it a secure context.
2019-02-19 02:57:44 +00:00
ce576f3683
First Official Release of ARMV8M Support. This release removes Pre-Release from all the ARMv8M files licensees.
2019-02-19 02:30:32 +00:00
58ba10eee8
Update version number in readiness for V10.2.0 release.
2019-02-17 22:36:16 +00:00
55ad3861c5
Sync the Renesas port to AFR Git Repo
2019-02-17 01:27:16 +00:00
0de2a2758a
Fix definition of tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE
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tskSTATIC_AND_DYNAMIC_ALLOCATION_POSSIBLE was not correctly defined resulting in
dynamically allocated TCB not being freed when MPU was enabled. This commit fixes
the definition to ensure that dynamically allocated RAM (Stack and TCB) is freed
always.
2019-02-17 01:24:58 +00:00
2c88fb7fa1
Fix build failure when dynamic allocation is not enabled.
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When dynamic allocation is not enabled, vPortFree is not available. The current code used
vPortFree and this resulted in linker error. This commit removes the use of vPortFree when
dynamic allocation is not enabled.
2019-02-16 20:21:47 +00:00
6844bef74f
Replace the pdf RISC-V documentation with links to the documentation web pages.
2019-02-16 01:15:33 +00:00
b2b1b09ea5
Fix bug in core_cm3.c atomic macros.
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Rename the portable/GCC/RISC-V-RV32 directory to just RISC-V as also adding support for 64-bit cores.
2019-02-16 01:08:38 +00:00
3153131fa7
Add Dornerworks attribution to makefiles that build the Freedom Studio RISC-V project.
2019-02-12 02:43:28 +00:00
7e08fd6d07
Add makefiles that build the FreedomStudio project (provided by Dornerworks - thanks).
2019-02-11 19:44:13 +00:00
fb73829148
Ensure eTaskGetState() is brought in automatically if INCLUDE_xTaskAbortDelay is set to 1, as it is a dependency of eTaskGetState().
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Added the portTASK_FUNCTION_PROTO macros around the timer task, as the macros are already used by the idle task.
Add a PDF of the RISC-V documentation into the repo as the web page is not yet live.
2019-02-08 01:18:08 +00:00
df5952f655
Add xTaskGetIdleRunTimeCounter() API function to return the run time stats counter for the idle task - useful for POSIX time implementations.
2019-01-21 23:39:48 +00:00
817783d75c
Copyright updates from Cadence.
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e1df894752
2019-01-16 19:01:25 +00:00
a4941ac5db
Update main.c() for the WIN32-MingW project so the trace recorder is initialized even when the simple blinky demo is used - otherwise the trace recorder causes an exception as it is used without first being initialized.
2019-01-07 19:40:13 +00:00
80df5cd517
Update the pin mux setup on the Vega board demo to enable the LED.
2018-12-31 20:14:34 +00:00
11d9c440b8
Move the 'generic' version of freertos_risc_v_chip_specific_extensions.h back to a sub-directory as having it in the RISC-V port's base directory was causing SoftConsole to pick up the wrong version (for an unknown reason).
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Add a project for the Vega board's RI5CY core.
2018-12-31 18:19:52 +00:00
e2af102c80
Re-org of RISC-V file structure and naming step 2.
2018-12-30 23:53:47 +00:00
818eeccc0c
Re-org of RISC-V file structure and naming step 1.
2018-12-30 23:20:26 +00:00
3474e750fa
Create folder to hold RISC-V chip specific extensions.
2018-12-30 23:15:37 +00:00
db750d0c82
Update RSIC-V port layer after testing saving and receiving of chip specific registers.
2018-12-30 23:11:40 +00:00
60b133b2c6
Move the RISC-V pxPortInitialiseStack() implementation to the assembly port file from the C port file so it can have access to the number of chip specific registers it needs to save space for on the stack.
2018-12-30 20:00:43 +00:00
