diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/gensav_cmd.xml b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/gensav_cmd.xml index 42f1efa6ce..a1d03d35a7 100644 --- a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/gensav_cmd.xml +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/gensav_cmd.xml @@ -1,2 +1,2 @@ - \ No newline at end of file + \ No newline at end of file diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise/_xmsgs/platgen.xmsgs b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise/_xmsgs/platgen.xmsgs index a52da26800..3105fb7e21 100644 --- a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise/_xmsgs/platgen.xmsgs +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise/_xmsgs/platgen.xmsgs @@ -31,7 +31,7 @@ IPNAME: axi_ethernetlite, INSTANCE: Ethernet_Lite - This design requires design constraints to guarantee performance. Please refer to the data sheet for details. -The AXI clock frequency must be greater than or equal to 50 MHz for 100 Mbs Ethernet operation and greater than or equal to 5.0 MHz for 10 Mbs Ethernet operation. - C:\E\Dev\FreeRTOS\WorkingCopy\Demo\MicroBlaze_Spartan-6_SP605\system.mhs line 324 +The AXI clock frequency must be greater than or equal to 50 MHz for 100 Mbs Ethernet operation and greater than or equal to 5.0 MHz for 10 Mbs Ethernet operation. - C:\E\Dev\FreeRTOS\WorkingCopy\Demo\MicroBlaze_Spartan-6_EthernetLite\PlatformStudioProject\system.mhs line 324 IPNAME: lmb_v10, INSTANCE:microblaze_0_ilmb - tool is overriding PARAMETER C_LMB_NUM_SLAVES value to 1 - C:\devtools\Xilinx\13.1\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\lmb_v10_v2_00_a\data\lmb_v10_v2_1_0.mpd line 70 @@ -121,7 +121,7 @@ The AXI clock frequency must be greater than or equal to 50 MHz for 100 Mbs Ethe IPNAME: axi_intc, INSTANCE:microblaze_0_intc - tcl is overriding PARAMETER C_NUM_INTR_INPUTS value to 4 - C:\devtools\Xilinx\13.1\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\axi_intc_v1_01_a\data\axi_intc_v2_1_0.mpd line 71 -IPNAME: axi_intc, INSTANCE:microblaze_0_intc - tcl is overriding PARAMETER C_KIND_OF_INTR value to 0b11111111111111111111111111111011 - C:\devtools\Xilinx\13.1\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\axi_intc_v1_01_a\data\axi_intc_v2_1_0.mpd line 72 +IPNAME: axi_intc, INSTANCE:microblaze_0_intc - tcl is overriding PARAMETER C_KIND_OF_INTR value to 0b11111111111111111111111111110111 - C:\devtools\Xilinx\13.1\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\axi_intc_v1_01_a\data\axi_intc_v2_1_0.mpd line 72 IPNAME: axi_intc, INSTANCE:microblaze_0_intc - tcl is overriding PARAMETER C_KIND_OF_EDGE value to 0b11111111111111111111111111111111 - C:\devtools\Xilinx\13.1\ISE_DS\EDK\hw\XilinxProcessorIPLib\pcores\axi_intc_v1_01_a\data\axi_intc_v2_1_0.mpd line 73 diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise/system.xreport b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise/system.xreport index 6ff58f4fae..931bf725af 100644 --- a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise/system.xreport +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise/system.xreport @@ -1,9 +1,9 @@
- 2011-05-31T10:04:43 + 2011-05-31T17:38:56 system - 2011-05-31T10:04:43 + 2011-05-31T17:38:55 C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise/system.xreport filter.filter C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/ise diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/system.xml b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/system.xml index 992659d8bf..8c4df39056 100644 --- a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/system.xml +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/__xps/system.xml @@ -1,48 +1,8 @@ - + + - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - - AXI Interconnect @@ -50,7 +10,6 @@ - @@ -271,6 +230,7 @@ + AXI Interconnect @@ -278,7 +238,6 @@ - @@ -499,6 +458,7 @@ + MicroBlaze @@ -506,7 +466,6 @@ - @@ -2519,6 +2478,9 @@ + + + @@ -2583,9 +2545,7 @@ - - - + Local Memory Bus (LMB) 1.0 @@ -2593,7 +2553,6 @@ - @@ -2631,6 +2590,7 @@ + Local Memory Bus (LMB) 1.0 @@ -2638,7 +2598,6 @@ - @@ -2676,6 +2635,7 @@ + LMB BRAM Controller @@ -2683,7 +2643,6 @@ - @@ -2914,6 +2873,7 @@ + LMB BRAM Controller @@ -2921,7 +2881,6 @@ - @@ -3152,6 +3111,7 @@ + Block RAM (BRAM) Block @@ -3159,7 +3119,6 @@ - @@ -3207,6 +3166,7 @@ + Processor System Reset Module @@ -3214,7 +3174,6 @@ - @@ -3276,6 +3235,7 @@ + Clock Generator @@ -3283,7 +3243,6 @@ - @@ -3409,6 +3368,7 @@ + MicroBlaze Debug Module (MDM) @@ -3416,7 +3376,6 @@ - @@ -3775,6 +3734,7 @@ + AXI UART (Lite) @@ -3782,7 +3742,6 @@ - @@ -3862,6 +3821,9 @@ + + + @@ -3869,9 +3831,7 @@ - - - + AXI General Purpose IO @@ -3879,7 +3839,6 @@ - @@ -3983,6 +3942,7 @@ + AXI General Purpose IO @@ -3990,7 +3950,6 @@ - @@ -4087,6 +4046,9 @@ + + + @@ -4094,9 +4056,7 @@ - - - + AXI S6 Memory Controller(DDR/DDR2/DDR3) @@ -4104,7 +4064,6 @@ - @@ -4856,6 +4815,7 @@ + AXI 10/100 Ethernet MAC Lite @@ -4863,7 +4823,6 @@ - @@ -5024,6 +4983,9 @@ + + + @@ -5031,9 +4993,7 @@ - - - + AXI Timer/Counter @@ -5041,7 +5001,6 @@ - @@ -5124,6 +5083,9 @@ + + + @@ -5131,9 +5093,7 @@ - - - + AXI Interrupt Controller @@ -5141,7 +5101,6 @@ - @@ -5170,7 +5129,7 @@ Interrupt Request Output - + @@ -5223,6 +5182,13 @@ + + + + + + + @@ -5230,14 +5196,49 @@ - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/etc/system.filters b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/etc/system.filters index db9a31b74c..75b425ae1d 100644 --- a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/etc/system.filters +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/etc/system.filters @@ -1,3 +1,4 @@ + @@ -93,8 +94,8 @@ - - + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/etc/system.gui b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/etc/system.gui index cc7d6cf4af..9425e44803 100644 --- a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/etc/system.gui +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/etc/system.gui @@ -9,14 +9,14 @@ - + - + @@ -83,37 +83,74 @@ - - - - - - - - - - + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + - - - - - - - - - - + + + + + + + + + + + + + + + + @@ -166,10 +203,11 @@ - + + - + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/implementation/system_summary.html b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/implementation/system_summary.html index 0ff23f2cf1..a1ba6df817 100644 --- a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/implementation/system_summary.html +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/implementation/system_summary.html @@ -32,11 +32,7 @@ Libgen Log File     Simgen Log File     BitInit Log File     -System Log File     - - 
- - +
XPS Synthesis Summary (estimated values) [-]
ReportGeneratedFlip Flops UsedLUTs UsedBRAMS UsedErrors
System Log FileTue 31. May 18:23:42 2011   
@@ -62,5 +58,5 @@ -
Date Generated: 05/31/2011 - 10:04:43
+
Date Generated: 05/31/2011 - 18:23:42
\ No newline at end of file diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/system.mhs b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/system.mhs index c4fd90865e..a0cc03c057 100644 --- a/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/system.mhs +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/PlatformStudioProject/system.mhs @@ -382,6 +382,6 @@ BEGIN axi_intc BUS_INTERFACE S_AXI = axi4lite_0 PORT IRQ = microblaze_0_interrupt PORT S_AXI_ACLK = clk_50_0000MHzPLL0 - PORT INTR = RS232_Uart_1_Interrupt & Push_Buttons_4Bits_IP2INTC_Irpt & Ethernet_Lite_IP2INTC_Irpt & axi_timer_0_Interrupt + PORT INTR = Push_Buttons_4Bits_IP2INTC_Irpt & Ethernet_Lite_IP2INTC_Irpt & axi_timer_0_Interrupt & RS232_Uart_1_Interrupt END diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/.project b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/.project new file mode 100644 index 0000000000..0060b40d2e --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/.project @@ -0,0 +1,12 @@ + + + HardwareWithEthernetLite + + + + + + + com.xilinx.sdk.hw.HwProject + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/download.bit b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/download.bit new file mode 100644 index 0000000000..f8531f062a Binary files /dev/null and b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/download.bit differ diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/system.bit b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/system.bit new file mode 100644 index 0000000000..b32ce2889a Binary files /dev/null and b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/system.bit differ diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/system.xml b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/system.xml new file mode 100644 index 0000000000..b3326f4c0c --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/system.xml @@ -0,0 +1,6258 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AXI Interconnect + AXI4 Memory-Mapped Interconnect + + + + + + + Family + + + Base Family + + + Number of Slave Slots + + + Number of Master Slots + + + AXI ID Widgth + + + AXI Address Widgth + + + AXI Data Maximum Width + + + Slave AXI Data Width + + + Master AXI Data Width + + + Interconnect Crossbar Data Width + + + AXI Protocol + + + Master AXI Protocol + + + Master AXI Base Address + + + Master AXI High Address + + + Slave AXI Base ID + + + Slave AXI Thread ID Width + + + Slave AXI Is Interconnect + + + Slave AXI ACLK Ratio + + + Slvave AXI Is ACLK ASYNC + + + Master AXI ACLK Ratio + + + Master AXI Is ACLK ASYNC + + + Interconnect Crossbar ACLK Frequency Ratio + + + Slave AXI Supports Write + + + Slave AXI Supports Read + + + Master AXI Supports Write + + + Master AXI Supports Read + + + Propagate USER Signals + + + AWUSER Signal Width + + + ARUSER Signal Width + + + WUSER Signal Width + + + RUSER Signal Width + + + BUSER Signal Width + + + AXI Connectivity + + + Slave AXI Single Thread + + + Master AXI Supports Reordering + + + Master generates narrow bursts + + + Slave accepts narrow bursts + + + Slave AXI Write Acceptance + + + Slave AXI Read Acceptance + + + Master AXI Write Issuing + + + Master AXI Read Issuing + + + Slave AXI ARB Priority + + + Master AXI Secure + + + Master AXI Write FIFO Depth + + + Slave AXI Write FIFO Type + + + Slave AXI Write FIFO Delay + + + Slave AXI Read FIFO Depth + + + Slave AXI Read FIFO Type + + + Slave AXI Read FIFO Delay + + + Master AXI Write FIFO Depth + + + Master AXI Write FIFO Type + + + Master AXI Write FIFO Delay + + + Master AXI Read FIFO Depth + + + Master AXI Read FIFO Type + + + Master AXI Read FIFO Delay + + + Slave AXI AW Register + + + Slave AXI AR Register + + + Slave AXI W Register + + + Slave AXI R Register + + + Slave AXI B Register + + + Master AXI AW Register + + + Master AXI AR Register + + + Master AXI W Register + + + Master AXI R Register + + + Master AXI B Register + + + C_INTERCONNECT_R_REGISTER + + + Interconnect Architecture + + + Use Diagnostic Slave Port + + + Generate Interrupts + + + Check for transaction errors (DECERR) + + + Slave AXI CTRL Protocol + + + Slave AXI CTRL Address Width + + + Slave AXI CTRL Data Width + + + Diagnostic Slave Port Base Address + + + Diagnostic Slave Port High Address + + + Simulation debug + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AXI Interconnect + AXI4 Memory-Mapped Interconnect + + + + + + + Family + + + Base Family + + + Number of Slave Slots + + + Number of Master Slots + + + AXI ID Widgth + + + AXI Address Widgth + + + AXI Data Maximum Width + + + Slave AXI Data Width + + + Master AXI Data Width + + + Interconnect Crossbar Data Width + + + AXI Protocol + + + Master AXI Protocol + + + Master AXI Base Address + + + Master AXI High Address + + + Slave AXI Base ID + + + Slave AXI Thread ID Width + + + Slave AXI Is Interconnect + + + Slave AXI ACLK Ratio + + + Slvave AXI Is ACLK ASYNC + + + Master AXI ACLK Ratio + + + Master AXI Is ACLK ASYNC + + + Interconnect Crossbar ACLK Frequency Ratio + + + Slave AXI Supports Write + + + Slave AXI Supports Read + + + Master AXI Supports Write + + + Master AXI Supports Read + + + Propagate USER Signals + + + AWUSER Signal Width + + + ARUSER Signal Width + + + WUSER Signal Width + + + RUSER Signal Width + + + BUSER Signal Width + + + AXI Connectivity + + + Slave AXI Single Thread + + + Master AXI Supports Reordering + + + Master generates narrow bursts + + + Slave accepts narrow bursts + + + Slave AXI Write Acceptance + + + Slave AXI Read Acceptance + + + Master AXI Write Issuing + + + Master AXI Read Issuing + + + Slave AXI ARB Priority + + + Master AXI Secure + + + Master AXI Write FIFO Depth + + + Slave AXI Write FIFO Type + + + Slave AXI Write FIFO Delay + + + Slave AXI Read FIFO Depth + + + Slave AXI Read FIFO Type + + + Slave AXI Read FIFO Delay + + + Master AXI Write FIFO Depth + + + Master AXI Write FIFO Type + + + Master AXI Write FIFO Delay + + + Master AXI Read FIFO Depth + + + Master AXI Read FIFO Type + + + Master AXI Read FIFO Delay + + + Slave AXI AW Register + + + Slave AXI AR Register + + + Slave AXI W Register + + + Slave AXI R Register + + + Slave AXI B Register + + + Master AXI AW Register + + + Master AXI AR Register + + + Master AXI W Register + + + Master AXI R Register + + + Master AXI B Register + + + C_INTERCONNECT_R_REGISTER + + + Interconnect Architecture + + + Use Diagnostic Slave Port + + + Generate Interrupts + + + Check for transaction errors (DECERR) + + + Slave AXI CTRL Protocol + + + Slave AXI CTRL Address Width + + + Slave AXI CTRL Data Width + + + Diagnostic Slave Port Base Address + + + Diagnostic Slave Port High Address + + + Simulation debug + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + MicroBlaze + The MicroBlaze 32 bit soft processor + + + + + + + + + + + + + Enable Fault Tolerance Support + + + + + Select implementation to optimize area (with lower instruction throughput) + + + + Select Bus Interfaces + + + Select Stream Interfaces + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + Enable Additional Machine Status Register Instructions + + + Enable Pattern Comparator + + + Enable Barrel Shifter + + + Enable Integer Divider + + + Enable Integer Multiplier + + + Enable Floating Point Unit + + + Enable Unaligned Data Exception + + + Enable Illegal Instruction Exception + + + Enable Instruction-side AXI Exception + + + Enable Data-side AXI Exception + + + Enable Instruction-side PLB Exception + + + Enable Data-side PLB Exception + + + Enable Integer Divide Exception + + + Enable Floating Point Unit Exceptions + + + Enable Stream Exception + + + <qt>Enable stack protection</qt> + + + Specifies Processor Version Register + + + Specify USER1 Bits in Processor Version Register + + + Specify USER2 Bits in Processor Version Registers + + + Enable MicroBlaze Debug Module Interface + + + Number of PC Breakpoints + + + Number of Read Address Watchpoints + + + Number of Write Address Watchpoints + + + Sense Interrupt on Edge vs. Level + + + Sense Interrupt on Rising vs. Falling Edge + + + Specify Reset Value for Select MSR Bits + + + <qt>Generate Illegal Instruction Exception for NULL Instruction</qt> + + + Number of Stream Links + + + + Enable Additional Stream Instructions + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + I-Cache Base Address + + + I-Cache High Address + + + Enable Instruction Cache + + + Enable I-Cache Writes + + + + Size of the I-Cache in Bytes + + + + Instruction Cache Line Length + + + Use Cache Links for All I-Cache Memory Accesses + + + + Number of I-Cache Victims + + + Number of I-Cache Streams + + + Use Distributed RAM for I-Cache Tags + + + + + + + + + + + + + + + + + + + + D-Cache Base Address + + + D-Cache High Address + + + Enable Data Cache + + + Enable D-Cache Writes + + + + Size of D-Cache in Bytes + + + + Data Cache Line Length + + + Use Cache Links for All D-Cache Memory Accesses + + + + Enable Write-back Storage Policy + + + Number of D-Cache Victims + + + Use Distributed RAM for D-Cache Tags + + + + + + + + + + + + + + + + + + + + + + Memory Management + + + Data Shadow Translation Look-Aside Buffer Size + + + Instruction Shadow Translation Look-Aside Buffer Size + + + Enable Access to Memory Management Special Registers + + + Number of Memory Protection Zones + + + Privileged Instructions + + + + + + Enable Branch Target Cache + + + Branch Target Cache Size + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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generator for processor system. + + + + + + + Family + + + Device + + + Package + + + Speed Grade + + + Input Clock Frequency (Hz) + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Varaible Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Varaible Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase + + + Required Frequency (Hz) + + + Clock Deskew + + + Required Frequency (Hz) + + + Required Phase + + + Required Group + + + Buffered + + + Variable Phase Shift + + + + Clock Primitive Feedback Buffer + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + MicroBlaze Debug Module (MDM) + Debug module for MicroBlaze Soft Processor. + + + + + + + Device Family + + + Specifies the JTAG user-defined register used + + + Specifies the Bus Interface for the JTAG UART + + + Base Address + + + High Address + + + PLB Address Bus Width + + + PLB Data Bus Width + + + PLB Slave Uses P2P Topology + + + Master ID Bus Width of PLB + + + Number of PLB Masters + + + Native Data Bus Width of PLB Slave + + + PLB Slave is Capable of Bursts + + + Number of MicroBlaze debug ports + + + Enable JTAG UART + + + AXI Address Width + + + AXI Data Width + + + AXI4LITE protocal + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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Channel Width + GPIO Data Width + + + GPIO2 Data Channel Width + + + Channel 1 is Input Only + + + Channel 2 is Input Only + + + GPIO Supports Interrupts + + + Channel 1 Data Out Default Value + + + Channel 1 Tri-state Default Value + + + Enable Channel 2 + + + Channel 2 Data Out Default Value + + + Channel 2 Tri-state Default Value + + + AXI4LITE protocol + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + GPIO1 Data IO + + + GPIO2 Data IO + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AXI S6 Memory Controller(DDR/DDR2/DDR3) + Spartan-6 memory controller + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + 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Ethernet Transmit Enable + + + Ethernet Transmit Clock Input + + + Ethernet Collision Input + + + Ethernet Receive Data Input + + + Ethernet Receive Error Input + + + Ethernet Receive Clock Input + + + Ethernet Carrier Sense Input + + + Ethernet Receive Data Valid + + + Ethernet PHY Reset + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AXI Timer/Counter + Timer counter with AXI interface + + + + + + + AXI4LITE protocol + + + Device Family + + + The Width of Counter in Timer + Count Width + + + Only One Timer is present + + + TRIG0 Active Level + + + TRIG1 Active Level + + + GEN0 Active Level + + + GEN1 Active Level + + + AXI Base Address + + + AXI High Address + + + AXI Address Width + + + AXI Data Width + + + + + + + + + + + + Capture Trig 0 + + + Capture Trig 1 + + + Generate Out 0 + + + Generate Out 1 + + + Pulse Width Modulation 0 + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + AXI Interrupt Controller + intc core attached to the AXI + + + + + + + Device Family + + + AXI Base Address + + + AXI High Address + + + AXI Address Width + + + AXI Data Width + + + Number of Interrupt Inputs + + + Type of Interrupt for Each Input + + + Type of Each Edge Senstive Interrupt + + + Type of Each Level Sensitive Interrupt + + + Support IPR + + + Support SIE + + + Support CIE + + + Support IVR + + + IRQ Output Use Level + + + The Sense of IRQ Output + + + AXI4LITE protocol + + + + + + + + + + Interrupt Request Output + + + + + + + + + + Interrupt Inputs + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + \ No newline at end of file diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/system_bd.bmm b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/system_bd.bmm new file mode 100644 index 0000000000..ca5622cf72 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/HardwareWithEthernetLite/system_bd.bmm @@ -0,0 +1,32 @@ +// BMM LOC annotation file. +// +// Release 13.1 - Data2MEM O.40d, build 1.9 Aug 19, 2010 +// Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved. + + +/////////////////////////////////////////////////////////////////////////////// +// +// Processor 'microblaze_0', ID 100, memory map. +// +/////////////////////////////////////////////////////////////////////////////// + +ADDRESS_MAP microblaze_0 MICROBLAZE-LE 100 + + + /////////////////////////////////////////////////////////////////////////////// + // + // Processor 'microblaze_0' address space 'microblaze_0_bram_block_combined' 0x00000000:0x00001FFF (8 KBytes). + // + /////////////////////////////////////////////////////////////////////////////// + + ADDRESS_SPACE microblaze_0_bram_block_combined RAMB16 [0x00000000:0x00001FFF] + BUS_BLOCK + microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_0 [31:24] INPUT = microblaze_0_bram_block_combined_0.mem PLACED = X1Y30; + microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_1 [23:16] INPUT = microblaze_0_bram_block_combined_1.mem PLACED = X1Y32; + microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_2 [15:8] INPUT = microblaze_0_bram_block_combined_2.mem PLACED = X0Y30; + microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_3 [7:0] INPUT = microblaze_0_bram_block_combined_3.mem PLACED = X0Y32; + END_BUS_BLOCK; + END_ADDRESS_SPACE; + +END_ADDRESS_MAP; + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/.cproject b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/.cproject new file mode 100644 index 0000000000..c6fbd0b120 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/.cproject @@ -0,0 +1,14 @@ + + + + + + + + + + + + + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/.project b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/.project new file mode 100644 index 0000000000..7c08598513 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/.project @@ -0,0 +1,77 @@ + + + RTOSDemoBSP + + + HardwareWithEthernetLite + + + + org.eclipse.cdt.make.core.makeBuilder + clean,full,incremental, + + + org.eclipse.cdt.core.errorOutputParser + org.eclipse.cdt.core.GASErrorParser;org.eclipse.cdt.core.GCCErrorParser;org.eclipse.cdt.core.GLDErrorParser;org.eclipse.cdt.core.GmakeErrorParser;org.eclipse.cdt.core.VCErrorParser;org.eclipse.cdt.core.CWDLocator;org.eclipse.cdt.core.MakeErrorParser; + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.build.arguments + + + + org.eclipse.cdt.make.core.build.command + make + + + org.eclipse.cdt.make.core.build.target.auto + all + + + org.eclipse.cdt.make.core.build.target.clean + clean + + + org.eclipse.cdt.make.core.build.target.inc + all + + + org.eclipse.cdt.make.core.enableAutoBuild + false + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.enabledIncrementalBuild + true + + + org.eclipse.cdt.make.core.environment + + + + org.eclipse.cdt.make.core.stopOnError + false + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + + com.xilinx.sdk.sw.SwProjectNature + org.eclipse.cdt.core.cnature + org.eclipse.cdt.make.core.makeNature + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/.sdkproject b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/.sdkproject new file mode 100644 index 0000000000..d75738c3f2 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/.sdkproject @@ -0,0 +1,3 @@ +THIRPARTY=false +PROCESSOR=microblaze_0 +MSS_FILE=system.mss diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/Makefile b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/Makefile new file mode 100644 index 0000000000..fe2a0efc7c --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/Makefile @@ -0,0 +1,21 @@ +# Makefile generated by Xilinx SDK. + +-include libgen.options + +LIBRARIES = ${PROCESSOR}/lib/libxil.a +MSS = system.mss + +all: libs + @echo 'Finished building libraries' + +libs: $(LIBRARIES) + +$(LIBRARIES): $(MSS) + libgen -hw ${HWSPEC}\ + ${REPOSITORIES}\ + -pe ${PROCESSOR} \ + -log libgen.log \ + $(MSS) + +clean: + rm -rf ${PROCESSOR} diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/libgen.options b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/libgen.options new file mode 100644 index 0000000000..e58297d00d --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/libgen.options @@ -0,0 +1,3 @@ +PROCESSOR=microblaze_0 +REPOSITORIES= +HWSPEC=../HardwareWithEthernetLite/system.xml diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/system.mss b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/system.mss new file mode 100644 index 0000000000..2369c83b34 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoBSP/system.mss @@ -0,0 +1,81 @@ + + PARAMETER VERSION = 2.2.0 + + +BEGIN OS + PARAMETER OS_NAME = standalone + PARAMETER OS_VER = 3.01.a + PARAMETER PROC_INSTANCE = microblaze_0 + PARAMETER STDIN = RS232_Uart_1 + PARAMETER STDOUT = RS232_Uart_1 +END + + +BEGIN PROCESSOR + PARAMETER DRIVER_NAME = cpu + PARAMETER DRIVER_VER = 1.13.a + PARAMETER HW_INSTANCE = microblaze_0 +END + + +BEGIN DRIVER + PARAMETER DRIVER_NAME = emaclite + PARAMETER DRIVER_VER = 3.01.a + PARAMETER HW_INSTANCE = Ethernet_Lite +END + +BEGIN DRIVER + PARAMETER DRIVER_NAME = gpio + PARAMETER DRIVER_VER = 3.00.a + PARAMETER HW_INSTANCE = LEDs_4Bits +END + +BEGIN DRIVER + PARAMETER DRIVER_NAME = s6_ddrx + PARAMETER DRIVER_VER = 1.00.a + PARAMETER HW_INSTANCE = MCB_DDR3 +END + +BEGIN DRIVER + PARAMETER DRIVER_NAME = gpio + PARAMETER DRIVER_VER = 3.00.a + PARAMETER HW_INSTANCE = Push_Buttons_4Bits +END + +BEGIN DRIVER + PARAMETER DRIVER_NAME = uartlite + PARAMETER DRIVER_VER = 2.00.a + PARAMETER HW_INSTANCE = RS232_Uart_1 +END + +BEGIN DRIVER + PARAMETER DRIVER_NAME = tmrctr + PARAMETER DRIVER_VER = 2.03.a + PARAMETER HW_INSTANCE = axi_timer_0 +END + +BEGIN DRIVER + PARAMETER DRIVER_NAME = uartlite + PARAMETER DRIVER_VER = 2.00.a + PARAMETER HW_INSTANCE = debug_module +END + +BEGIN DRIVER + PARAMETER DRIVER_NAME = bram + PARAMETER DRIVER_VER = 3.00.a + PARAMETER HW_INSTANCE = microblaze_0_d_bram_ctrl +END + +BEGIN DRIVER + PARAMETER DRIVER_NAME = bram + PARAMETER DRIVER_VER = 3.00.a + PARAMETER HW_INSTANCE = microblaze_0_i_bram_ctrl +END + +BEGIN DRIVER + PARAMETER DRIVER_NAME = intc + PARAMETER DRIVER_VER = 2.02.a + PARAMETER HW_INSTANCE = microblaze_0_intc +END + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/.cproject b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/.cproject new file mode 100644 index 0000000000..f6753354bf --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/.cproject @@ -0,0 +1,1428 @@ + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/.project b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/.project new file mode 100644 index 0000000000..40ea64679d --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/.project @@ -0,0 +1,82 @@ + + + RTOSDemoSource + RTOSDemoBSP - microblaze_0 + + RTOSDemoBSP + + + + org.eclipse.cdt.managedbuilder.core.genmakebuilder + + + ?name? + + + + org.eclipse.cdt.make.core.append_environment + true + + + org.eclipse.cdt.make.core.autoBuildTarget + all + + + org.eclipse.cdt.make.core.buildArguments + + + + org.eclipse.cdt.make.core.buildCommand + make + + + org.eclipse.cdt.make.core.buildLocation + ${workspace_loc:/RTOSDemoSource/Debug} + + + org.eclipse.cdt.make.core.cleanBuildTarget + clean + + + org.eclipse.cdt.make.core.contents + org.eclipse.cdt.make.core.activeConfigSettings + + + org.eclipse.cdt.make.core.enableAutoBuild + true + + + org.eclipse.cdt.make.core.enableCleanBuild + true + + + org.eclipse.cdt.make.core.enableFullBuild + true + + + org.eclipse.cdt.make.core.fullBuildTarget + all + + + org.eclipse.cdt.make.core.stopOnError + true + + + org.eclipse.cdt.make.core.useDefaultBuildCmd + true + + + + + org.eclipse.cdt.managedbuilder.core.ScannerConfigBuilder + full,incremental, + + + + + + org.eclipse.cdt.core.cnature + org.eclipse.cdt.managedbuilder.core.managedBuildNature + org.eclipse.cdt.managedbuilder.core.ScannerConfigNature + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/emaclite_header.h b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/emaclite_header.h new file mode 100644 index 0000000000..ca11dd5bb0 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/emaclite_header.h @@ -0,0 +1,56 @@ +#define TESTAPP_GEN + +/* $Id: emaclite_header.h,v 1.1.2.2 2010/09/16 12:57:34 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2003-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +#ifndef EMACLITE_HEADER_H /* prevent circular inclusions */ +#define EMACLITE_HEADER_H /* by using protection macros */ + + +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" + +int EmacLitePolledExample(u16 DeviceId); + +#endif + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/emaclite_intr_header.h b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/emaclite_intr_header.h new file mode 100644 index 0000000000..90ff393ed1 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/emaclite_intr_header.h @@ -0,0 +1,57 @@ +#define TESTAPP_GEN + +/* $Id: emaclite_intr_header.h,v 1.1.2.2 2010/09/16 12:57:34 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2003-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +#ifndef EMACLITE_INTR_HEADER_H /* prevent circular inclusions */ +#define EMACLITE_INTR_HEADER_H /* by using protection macros */ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" + +int EmacLiteIntrExample(XIntc* IntcInstancePtr, + XEmacLite* EmacLiteInstPtr, + u16 EmacLiteDeviceId, + u16 EmacLiteIntrId); + +#endif + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/gpio_header.h b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/gpio_header.h new file mode 100644 index 0000000000..2ff58eca8c --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/gpio_header.h @@ -0,0 +1,56 @@ +#define TESTAPP_GEN + +/* $Id: gpio_header.h,v 1.1.2.2 2010/09/16 13:03:37 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2003-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +#ifndef GPIO_HEADER_H /* prevent circular inclusions */ +#define GPIO_HEADER_H /* by using protection macros */ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" + +int GpioOutputExample(u16 DeviceId, u32 GpioWidth); +int GpioInputExample(u16 DeviceId, u32 *DataRead); + +#endif + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/gpio_intr_header.h b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/gpio_intr_header.h new file mode 100644 index 0000000000..d7dbffeff8 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/gpio_intr_header.h @@ -0,0 +1,62 @@ +#define TESTAPP_GEN + +/* $Id: gpio_intr_header.h,v 1.1.2.2 2010/09/16 13:03:37 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2005-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +#ifndef GPIO_INTR_HEADER_H /* prevent circular inclusions */ +#define GPIO_INTR_HEADER_H /* by using protection macros */ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" + + +int GpioIntrExample(XIntc* IntcInstancePtr, + XGpio* InstancePtr, + u16 DeviceId, + u16 IntrId, + u16 IntrMask, + u32 *DataRead); + + +#endif + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/intc_header.h b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/intc_header.h new file mode 100644 index 0000000000..eface144e0 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/intc_header.h @@ -0,0 +1,55 @@ +#define TESTAPP_GEN + +/* $Id: intc_header.h,v 1.1.4.1 2010/09/17 05:32:46 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2006-2009 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +#ifndef INTC_HEADER_H /* prevent circular inclusions */ +#define INTC_HEADER_H /* by using protection macros */ + +#include "xil_assert.h" +#include "xil_types.h" +#include "xstatus.h" + +int IntcSelfTestExample(u16 DeviceId); +int IntcInterruptSetup(XIntc *IntcInstancePtr, u16 DeviceId); + +#endif + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/lscript.ld b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/lscript.ld new file mode 100644 index 0000000000..f70a4ba196 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/lscript.ld @@ -0,0 +1,213 @@ +/*******************************************************************/ +/* */ +/* This file is automatically generated by linker script generator.*/ +/* */ +/* Version: Xilinx EDK 13.1 EDK_O.40d */ +/* */ +/* Copyright (c) 2010 Xilinx, Inc. All rights reserved. */ +/* */ +/* Description : MicroBlaze Linker Script */ +/* */ +/*******************************************************************/ + +_STACK_SIZE = DEFINED(_STACK_SIZE) ? _STACK_SIZE : 0x400; +_HEAP_SIZE = DEFINED(_HEAP_SIZE) ? _HEAP_SIZE : 0x400; + +/* Define Memories in the system */ + +MEMORY +{ + microblaze_0_i_bram_ctrl_microblaze_0_d_bram_ctrl : ORIGIN = 0x00000050, LENGTH = 0x00001FB0 + MCB_DDR3_S0_AXI_BASEADDR : ORIGIN = 0xC0000000, LENGTH = 0x08000000 +} + +/* Specify the default entry point to the program */ + +ENTRY(_start) + +/* Define the sections, and where they are mapped in memory */ + +SECTIONS +{ +.vectors.reset 0x00000000 : { + *(.vectors.reset) +} + +.vectors.sw_exception 0x00000008 : { + *(.vectors.sw_exception) +} + +.vectors.interrupt 0x00000010 : { + *(.vectors.interrupt) +} + +.vectors.hw_exception 0x00000020 : { + *(.vectors.hw_exception) +} + +.text : { + *(.text) + *(.text.*) + *(.gnu.linkonce.t.*) +} > MCB_DDR3_S0_AXI_BASEADDR + +.init : { + KEEP (*(.init)) +} > MCB_DDR3_S0_AXI_BASEADDR + +.fini : { + KEEP (*(.fini)) +} > MCB_DDR3_S0_AXI_BASEADDR + +.rodata : { + __rodata_start = .; + *(.rodata) + *(.rodata.*) + *(.gnu.linkonce.r.*) + __rodata_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.sdata2 : { + . = ALIGN(8); + __sdata2_start = .; + *(.sdata2) + *(.sdata2.*) + *(.gnu.linkonce.s2.*) + . = ALIGN(8); + __sdata2_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.sbss2 : { + __sbss2_start = .; + *(.sbss2) + *(.sbss2.*) + *(.gnu.linkonce.sb2.*) + __sbss2_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.data : { + . = ALIGN(4); + __data_start = .; + *(.data) + *(.data.*) + *(.gnu.linkonce.d.*) + __data_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.got : { + *(.got) +} > MCB_DDR3_S0_AXI_BASEADDR + +.got1 : { + *(.got1) +} > MCB_DDR3_S0_AXI_BASEADDR + +.got2 : { + *(.got2) +} > MCB_DDR3_S0_AXI_BASEADDR + +.ctors : { + __CTOR_LIST__ = .; + ___CTORS_LIST___ = .; + KEEP (*crtbegin.o(.ctors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .ctors)) + KEEP (*(SORT(.ctors.*))) + KEEP (*(.ctors)) + __CTOR_END__ = .; + ___CTORS_END___ = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.dtors : { + __DTOR_LIST__ = .; + ___DTORS_LIST___ = .; + KEEP (*crtbegin.o(.dtors)) + KEEP (*(EXCLUDE_FILE(*crtend.o) .dtors)) + KEEP (*(SORT(.dtors.*))) + KEEP (*(.dtors)) + __DTOR_END__ = .; + ___DTORS_END___ = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.eh_frame : { + *(.eh_frame) +} > MCB_DDR3_S0_AXI_BASEADDR + +.jcr : { + *(.jcr) +} > MCB_DDR3_S0_AXI_BASEADDR + +.gcc_except_table : { + *(.gcc_except_table) +} > MCB_DDR3_S0_AXI_BASEADDR + +.sdata : { + . = ALIGN(8); + __sdata_start = .; + *(.sdata) + *(.sdata.*) + *(.gnu.linkonce.s.*) + __sdata_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.sbss : { + . = ALIGN(4); + __sbss_start = .; + *(.sbss) + *(.sbss.*) + *(.gnu.linkonce.sb.*) + . = ALIGN(8); + __sbss_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.tdata : { + __tdata_start = .; + *(.tdata) + *(.tdata.*) + *(.gnu.linkonce.td.*) + __tdata_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.tbss : { + __tbss_start = .; + *(.tbss) + *(.tbss.*) + *(.gnu.linkonce.tb.*) + __tbss_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.bss : { + . = ALIGN(4); + __bss_start = .; + *(.bss) + *(.bss.*) + *(.gnu.linkonce.b.*) + *(COMMON) + . = ALIGN(4); + __bss_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +_SDA_BASE_ = __sdata_start + ((__sbss_end - __sdata_start) / 2 ); + +_SDA2_BASE_ = __sdata2_start + ((__sbss2_end - __sdata2_start) / 2 ); + +/* Generate Stack and Heap definitions */ + +.heap : { + . = ALIGN(8); + _heap = .; + _heap_start = .; + . += _HEAP_SIZE; + _heap_end = .; +} > MCB_DDR3_S0_AXI_BASEADDR + +.stack : { + _stack_end = .; + . += _STACK_SIZE; + . = ALIGN(8); + _stack = .; + __stack = _stack; +} > MCB_DDR3_S0_AXI_BASEADDR + +_end = .; +} + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/testperiph.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/testperiph.c new file mode 100644 index 0000000000..21b4e95407 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/testperiph.c @@ -0,0 +1,246 @@ +/* + * + * Xilinx, Inc. + * XILINX IS PROVIDING THIS DESIGN, CODE, OR INFORMATION "AS IS" AS A + * COURTESY TO YOU. BY PROVIDING THIS DESIGN, CODE, OR INFORMATION AS + * ONE POSSIBLE IMPLEMENTATION OF THIS FEATURE, APPLICATION OR + * STANDARD, XILINX IS MAKING NO REPRESENTATION THAT THIS IMPLEMENTATION + * IS FREE FROM ANY CLAIMS OF INFRINGEMENT, AND YOU ARE RESPONSIBLE + * FOR OBTAINING ANY RIGHTS YOU MAY REQUIRE FOR YOUR IMPLEMENTATION + * XILINX EXPRESSLY DISCLAIMS ANY WARRANTY WHATSOEVER WITH RESPECT TO + * THE ADEQUACY OF THE IMPLEMENTATION, INCLUDING BUT NOT LIMITED TO + * ANY WARRANTIES OR REPRESENTATIONS THAT THIS IMPLEMENTATION IS FREE + * FROM CLAIMS OF INFRINGEMENT, IMPLIED WARRANTIES OF MERCHANTABILITY + * AND FITNESS FOR A PARTICULAR PURPOSE. + */ + +/* + * + * + * This file is a generated sample test application. + * + * This application is intended to test and/or illustrate some + * functionality of your system. The contents of this file may + * vary depending on the IP in your system and may use existing + * IP driver functions. These drivers will be generated in your + * SDK application project when you run the "Generate Libraries" menu item. + * + */ + + +#include +#include "xparameters.h" +#include "xenv_standalone.h" +#include "xintc.h" +#include "intc_header.h" +#include "xbasic_types.h" +#include "xgpio.h" +#include "gpio_header.h" +#include "xbasic_types.h" +#include "xgpio.h" +#include "gpio_header.h" +#include "gpio_intr_header.h" +#include "uartlite_header.h" +#include "xtmrctr.h" +#include "tmrctr_header.h" +#include "tmrctr_intr_header.h" +#include "xemaclite.h" +#include "xemaclite_example.h" +#include "emaclite_header.h" +#include "emaclite_intr_header.h" + + +#define GPIO_CHANNEL1 1 + +int main() +{ + + static XIntc intc; + static XGpio Push_Buttons_4Bits_Gpio; + static XTmrCtr axi_timer_0_Timer; + static XEmacLite Ethernet_Lite_EmacLite; + + XCACHE_ENABLE_ICACHE(); + XCACHE_ENABLE_DCACHE(); + + print("---Entering main---\n\r"); + + + + { + int status; + + print("\r\n Running IntcSelfTestExample() for microblaze_0_intc...\r\n"); + + status = IntcSelfTestExample(XPAR_MICROBLAZE_0_INTC_DEVICE_ID); + + if (status == 0) { + print("IntcSelfTestExample PASSED\r\n"); + } + else { + print("IntcSelfTestExample FAILED\r\n"); + } + } + + { + int Status; + + Status = IntcInterruptSetup(&intc, XPAR_MICROBLAZE_0_INTC_DEVICE_ID); + if (Status == 0) { + print("Intc Interrupt Setup PASSED\r\n"); + } + else { + print("Intc Interrupt Setup FAILED\r\n"); + } + } + + + { + u32 status; + + print("\r\nRunning GpioOutputExample() for LEDs_4Bits...\r\n"); + + status = GpioOutputExample(XPAR_LEDS_4BITS_DEVICE_ID,4); + + if (status == 0) { + print("GpioOutputExample PASSED.\r\n"); + } + else { + print("GpioOutputExample FAILED.\r\n"); + } + } + + + { + u32 status; + + print("\r\nRunning GpioInputExample() for Push_Buttons_4Bits...\r\n"); + + u32 DataRead; + + status = GpioInputExample(XPAR_PUSH_BUTTONS_4BITS_DEVICE_ID, &DataRead); + + if (status == 0) { + xil_printf("GpioInputExample PASSED. Read data:0x%X\r\n", DataRead); + } + else { + print("GpioInputExample FAILED.\r\n"); + } + } + { + + int Status; + + u32 DataRead; + + print(" Press button to Generate Interrupt\r\n"); + + Status = GpioIntrExample(&intc, &Push_Buttons_4Bits_Gpio, \ + XPAR_PUSH_BUTTONS_4BITS_DEVICE_ID, \ + XPAR_MICROBLAZE_0_INTC_PUSH_BUTTONS_4BITS_IP2INTC_IRPT_INTR, \ + GPIO_CHANNEL1, &DataRead); + + if (Status == 0 ){ + if(DataRead == 0) + print("No button pressed. \r\n"); + else + print("Gpio Interrupt Test PASSED. \r\n"); + } + else { + print("Gpio Interrupt Test FAILED.\r\n"); + } + + } + + /* + * Peripheral SelfTest will not be run for RS232_Uart_1 + * because it has been selected as the STDOUT device + */ + + + + { + int status; + + print("\r\nRunning UartLiteSelfTestExample() for debug_module...\r\n"); + status = UartLiteSelfTestExample(XPAR_DEBUG_MODULE_DEVICE_ID); + if (status == 0) { + print("UartLiteSelfTestExample PASSED\r\n"); + } + else { + print("UartLiteSelfTestExample FAILED\r\n"); + } + } + + + { + int status; + + print("\r\n Running TmrCtrSelfTestExample() for axi_timer_0...\r\n"); + + status = TmrCtrSelfTestExample(XPAR_AXI_TIMER_0_DEVICE_ID, 0x0); + + if (status == 0) { + print("TmrCtrSelfTestExample PASSED\r\n"); + } + else { + print("TmrCtrSelfTestExample FAILED\r\n"); + } + } + { + int Status; + + print("\r\n Running Interrupt Test for axi_timer_0...\r\n"); + + Status = TmrCtrIntrExample(&intc, &axi_timer_0_Timer, \ + XPAR_AXI_TIMER_0_DEVICE_ID, \ + XPAR_MICROBLAZE_0_INTC_AXI_TIMER_0_INTERRUPT_INTR, 0); + + if (Status == 0) { + print("Timer Interrupt Test PASSED\r\n"); + } + else { + print("Timer Interrupt Test FAILED\r\n"); + } + + } + + + { + int status; + + print("\r\nRunning EmacLitePolledExample() for Ethernet_Lite...\r\n"); + status = EmacLitePolledExample(XPAR_ETHERNET_LITE_DEVICE_ID); + if (status == 0) { + print("EmacLite Polled Example PASSED\r\n"); + } + else { + print("EmacLite Polled Example FAILED\r\n"); + } + } + { + int Status; + + print("\r\n Running Interrupt Test for Ethernet_Lite...\r\n"); + + Status = EmacLiteIntrExample(&intc, &Ethernet_Lite_EmacLite, \ + XPAR_ETHERNET_LITE_DEVICE_ID, \ + XPAR_MICROBLAZE_0_INTC_ETHERNET_LITE_IP2INTC_IRPT_INTR); + + if (Status == 0) { + print("EmacLite Interrupt Test PASSED\r\n"); + } + else { + print("EmacLite Interrupt Test FAILED\r\n"); + } + + } + + print("---Exiting main---\n\r"); + + XCACHE_DISABLE_ICACHE(); + XCACHE_DISABLE_DCACHE(); + + return 0; +} + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/tmrctr_header.h b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/tmrctr_header.h new file mode 100644 index 0000000000..f8c5f5f96a --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/tmrctr_header.h @@ -0,0 +1,55 @@ +#define TESTAPP_GEN + +/* $Id: tmrctr_header.h,v 1.1.2.1 2010/12/01 07:53:56 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2005-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +#ifndef TMRCTR_HEADER_H /* prevent circular inclusions */ +#define TMRCTR_HEADER_H /* by using protection macros */ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" + +int TmrCtrSelfTestExample(u16 DeviceId, u8 TmrCtrNumber); + +#endif + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/tmrctr_intr_header.h b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/tmrctr_intr_header.h new file mode 100644 index 0000000000..8beef56c51 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/tmrctr_intr_header.h @@ -0,0 +1,60 @@ +#define TESTAPP_GEN + +/* $Id: tmrctr_intr_header.h,v 1.1.2.1 2010/12/01 07:53:56 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2005-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +#ifndef TMRCTR_INTR_HEADER_H /* prevent circular inclusions */ +#define TMRCTR_INTR_HEADER_H /* by using protection macros */ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" + + +int TmrCtrIntrExample(XIntc* IntcInstancePtr, + XTmrCtr* InstancePtr, + u16 DeviceId, + u16 IntrId, + u8 TmrCtrNumber); + +#endif + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/uartlite_header.h b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/uartlite_header.h new file mode 100644 index 0000000000..422602e57b --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/uartlite_header.h @@ -0,0 +1,55 @@ +#define TESTAPP_GEN + +/* $Id: uartlite_header.h,v 1.1.2.2 2010/09/16 12:12:57 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2006-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +#ifndef UARTLITE_HEADER_H /* prevent circular inclusions */ +#define UARTLITE_HEADER_H /* by using protection macros */ + +#include "xil_types.h" +#include "xil_assert.h" +#include "xstatus.h" + +int UartLiteSelfTestExample(u16 DeviceId); + +#endif + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_example.h b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_example.h new file mode 100644 index 0000000000..8326c34bb0 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_example.h @@ -0,0 +1,135 @@ +#define TESTAPP_GEN + +/* $Id: xemaclite_example.h,v 1.1.2.1 2010/07/12 08:34:24 svemula Exp $ +*/ +/****************************************************************************** +* +* (c) Copyright 2009 - 2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xemaclite_example.h +* +* Defines common data types, prototypes, and includes the proper headers +* for use with the EmacLite example code residing in this directory. +* +* This file along with xemaclite_example_util.c are utilized with the specific +* example code in the other source code files provided. +* +* These examples are designed to be compiled and utilized within the EDK +* standalone BSP development environment. The readme file contains more +* information on build requirements needed by these examples. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 2.00a ktn  04/13/09 First release
+*
+* +******************************************************************************/ +#ifndef XEMACLITE_EXAMPLE_H +#define XEMACLITE_EXAMPLE_H + +/***************************** Include Files *********************************/ + +#include "xparameters.h" +#include "xemaclite.h" + +/************************** Constant Definitions ****************************/ + +#define PHY_REG0_OFFSET 0 /* Register 0 of PHY device */ +#define PHY_REG1_OFFSET 1 /* Register 1 of PHY device */ + +#define PHY_REG0_RESET_MASK 0x8000 /* Reset Phy device */ +#define PHY_REG0_LOOPBACK_MASK 0x4000 /* Loopback Enable in Phy */ +#define PHY_REG0_SPD_100_MASK 0x2000 /* Speed of 100Mbps for Phy */ + +#define PHY_REG1_DETECT_MASK 0x1808 /* Mask to detect PHY device */ + +#define EMACLITE_PHY_DELAY_SEC 4 /* Amount of time to delay waiting on + * PHY to reset. + */ + +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are defined here such that a user can easily + * change all the needed parameters in one place. + */ +#define EMAC_DEVICE_ID XPAR_EMACLITE_0_DEVICE_ID + +/***************** Macros (Inline Functions) Definitions *********************/ + +/**************************** Type Definitions ******************************/ + +/************************** Function Prototypes *****************************/ + +/* + * Utility functions implemented in xemaclite_example_util.c + */ +void EmacLitePhyDelay(unsigned int Seconds); +u32 EmacLitePhyDetect(XEmacLite *InstancePtr); +int EmacLiteEnablePhyLoopBack(XEmacLite *InstancePtr, u32 PhyAddress); +int EmacLiteDisablePhyLoopBack(XEmacLite *InstancePtr, u32 PhyAddress); + +/************************** Variable Definitions ****************************/ +/* + * Set up valid local MAC addresses. This loop back test uses the LocalAddress + * both as a source and destination MAC address. + */ + +XEmacLite EmacLiteInstance; /* Instance of the EmacLite */ + +/* + * Buffers used for Transmission and Reception of Packets. These are declared + * as global so that they are not a part of the stack. + */ +u8 TxFrame[XEL_MAX_FRAME_SIZE]; +u8 RxFrame[XEL_MAX_FRAME_SIZE]; + +volatile u32 RecvFrameLength; /* Indicates the length of the Received packet + */ +volatile int TransmitComplete; /* Flag to indicate that the Transmission + * is complete + */ +#endif /* XTEMAC_EXAMPLE_H */ + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_example_util.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_example_util.c new file mode 100644 index 0000000000..c85d7ef031 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_example_util.c @@ -0,0 +1,265 @@ +#define TESTAPP_GEN + +/* $Id: xemaclite_example_util.c,v 1.1.2.1 2010/07/12 08:34:25 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2009-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* +* @file xemaclite_example_util.c +* +* This file implements the utility functions for the EmacLite example code. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -------------------------------------------------------
+* 2.00a  ktn 04/13/09 First release
+* 2.00a  ktn 06/13/09 Changed the EmacLitePhyDetect function so that
+*		      the function is not in an infinite loop in case of a
+*		      faulty Phy device.
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xemaclite_example.h" +#include "stdio.h" + +/************************** Variable Definitions ****************************/ + +/******************************************************************************/ +/** +* +* This function detects the PHY address by looking for successful MII status +* register contents (PHY register 1). It looks for a PHY that supports +* auto-negotiation and 10Mbps full-duplex and half-duplex. So, this code +* won't work for PHYs that don't support those features, but it's a bit more +* general purpose than matching a specific PHY manufacturer ID. +* +* Note also that on some (older) Xilinx ML4xx boards, PHY address 0 does not +* properly respond to this query. But, since the default is 0 and assuming +* no other address responds, then it seems to work OK. +* +* @param InstancePtr is the pointer to the instance of EmacLite driver. +* +* @return The address of the PHY device detected (returns 0 if not +* detected). +* +* @note +* The bit mask (0x1808) of the MII status register +* (PHY Register 1) used in this function are: +* 0x1000: 10Mbps full duplex support. +* 0x0800: 10Mbps half duplex support. +* 0x0008: Auto-negotiation support. +* +******************************************************************************/ +u32 EmacLitePhyDetect(XEmacLite *InstancePtr) +{ + u16 PhyData; + int PhyAddr; + + /* + * Verify all 32 MDIO ports. + */ + for (PhyAddr = 31; PhyAddr >= 0; PhyAddr--) { + XEmacLite_PhyRead(InstancePtr, PhyAddr, PHY_REG1_OFFSET, + &PhyData); + + if (PhyData != 0xFFFF) { + if ((PhyData & PHY_REG1_DETECT_MASK) == + PHY_REG1_DETECT_MASK) { + return PhyAddr; /* Found a valid PHY device */ + } + } + } + /* + * Unable to detect PHY device returning the default address of 0. + */ + return 0; +} + +/******************************************************************************/ +/** +* +* This function enables the MAC loopback on the PHY. +* +* @param InstancePtr is the pointer to the instance of EmacLite driver. +* @param PhyAddress is the address of the Phy device. +* +* @return +* - XST_SUCCESS if the loop back is enabled. +* - XST_FAILURE if the loop back was not enabled. +* +* @note None. +* +******************************************************************************/ +int EmacLiteEnablePhyLoopBack(XEmacLite *InstancePtr, u32 PhyAddress) +{ + int Status; + u16 PhyData = 0; + + /* + * Set the speed and put the PHY in reset. + */ + PhyData |= PHY_REG0_SPD_100_MASK; + Status = XEmacLite_PhyWrite(InstancePtr, PhyAddress, PHY_REG0_OFFSET, + PhyData | PHY_REG0_RESET_MASK); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Give sufficient delay for Phy Reset. + */ + EmacLitePhyDelay(EMACLITE_PHY_DELAY_SEC); + + /* + * Set the PHY in loop back. + */ + XEmacLite_PhyWrite(InstancePtr, PhyAddress, PHY_REG0_OFFSET, + PhyData | PHY_REG0_LOOPBACK_MASK); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Give sufficient delay for Phy Loopback Enable. + */ + EmacLitePhyDelay(1); + + return XST_SUCCESS; +} + +/******************************************************************************/ +/** +* +* This function disables the MAC loopback on the PHY. +* +* @param InstancePtr is the pointer to the instance of EmacLite driver. +* @param PhyAddress is the address of the Phy device. +* +* @return +* - XST_SUCCESS if the loop back was disabled. +* - XST_FAILURE if the loop back was not disabled. +* +* @note None. +* +******************************************************************************/ +int EmacLiteDisablePhyLoopBack(XEmacLite *InstancePtr, u32 PhyAddress) +{ + int Status; + u16 PhyData; + + /* + * Disable loop back through PHY register using MDIO support. + */ + Status = XEmacLite_PhyRead(InstancePtr, PhyAddress, PHY_REG0_OFFSET, + &PhyData); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + Status = XEmacLite_PhyWrite(InstancePtr,PhyAddress, PHY_REG0_OFFSET, + PhyData & ~(PHY_REG0_LOOPBACK_MASK)); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; + +} + +/******************************************************************************/ +/** +* +* For PPC we use a usleep call, for Microblaze we use an assembly loop that +* is roughly the same regardless of optimization level, although caches and +* memory access time can make the delay vary. Just keep in mind that after +* resetting or updating the PHY modes, the PHY typically needs time to recover. +* +* @return None +* +* @note None +* +******************************************************************************/ +void EmacLitePhyDelay(unsigned int Seconds) +{ +#ifdef __MICROBLAZE__ + static int WarningFlag = 0; + + /* If MB caches are disabled or do not exist, this delay loop could + * take minutes instead of seconds (e.g., 30x longer). Print a warning + * message for the user (once). If only MB had a built-in timer! + */ + if (((mfmsr() & 0x20) == 0) && (!WarningFlag)) { +#ifdef STDOUT_BASEADDRESS + xil_printf("Warning: This example will take "); + xil_printf("minutes to complete without I-cache enabled \r\n"); +#endif + WarningFlag = 1; + } + +#define ITERS_PER_SEC (XPAR_CPU_CORE_CLOCK_FREQ_HZ / 6) + asm volatile ("\n" + "1: \n\t" + "addik r7, r0, %0 \n\t" + "2: \n\t" + "addik r7, r7, -1 \n\t" + "bneid r7, 2b \n\t" + "or r0, r0, r0 \n\t" + "bneid %1, 1b \n\t" + "addik %1, %1, -1 \n\t" + :: "i"(ITERS_PER_SEC), "d" (Seconds)); + +#else + + usleep(Seconds * 1000000); + +#endif +} + + + + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_intr_example.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_intr_example.c new file mode 100644 index 0000000000..faa642017e --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_intr_example.c @@ -0,0 +1,684 @@ +#define TESTAPP_GEN + +/* $Id: xemaclite_intr_example.c,v 1.1.2.2 2010/08/06 15:11:04 anirudh Exp $ +*/ +/****************************************************************************** +* +* (c) Copyright 2003-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +2* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xemaclite_intr_example.c +* +* This file contains an example for using the EmacLite hardware and driver. +* This file contains an interrupt example outlining the use of interrupts and +* callbacks in the transmission/reception of an Ethernet frame of 1000 bytes of +* payload. +* +* If the MDIO interface is NOT configured in the EmacLite core then this example +* will transmit a frame. +* If the MDIO interface is configured in the EmacLite core then this example +* will enable the MAC loopback in the PHY device, then transmit the frame and +* compare the received frame. +* +* @note +* +* None +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.01a ecm  05/21/04 First release
+* 1.01a sv   06/06/05 Minor changes to comply to Doxygen and coding guidelines
+* 1.01a sv   06/06/06 Minor changes for supporting Test App Interrupt examples
+* 2.00a ktn  02/25/09 Updated to use PHY loop back if MDIO is configured in
+*		      core
+* 3.00a ktn  10/22/09 Updated the example to use the HAL APIs/macros.
+*		      Updated example to use the macros that have been changed
+*		      in the driver to remove _m from the name of the macro.
+* 3.01a ktn  07/08/10 Updated example to support Little Endian MicroBlaze.
+*
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xemaclite_example.h" +#include "xintc.h" +#include "xil_exception.h" +#include "xil_io.h" + +/************************** Constant Definitions *****************************/ + +#ifndef TESTAPP_GEN +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are defined here such that a user can easily + * change all the needed parameters in one place. + */ +#define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID +#define INTC_EMACLITE_ID XPAR_INTC_0_EMACLITE_0_VEC_ID +#endif + +/* + * The Size of the Test Frame. + */ +#define EMACLITE_TEST_FRAME_SIZE 1000 + +/**************************** Type Definitions *******************************/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +/************************** Function Prototypes ******************************/ + +int EmacLiteIntrExample(XIntc *IntcInstancePtr, + XEmacLite *EmacLiteInstPtr, + u16 EmacLiteDeviceId, + u16 EmacLiteIntrId); + +static int EmacLiteSendFrame(XEmacLite *EmacLiteInstPtr, + u32 PayloadSize); +static int EmacLiteRecvFrame(u32 PayloadSize); +static void EmacLiteRecvHandler(void *CallBackRef); +static void EmacLiteSendHandler(void *CallBackRef); +static void EmacLiteDisableIntrSystem(XIntc *IntcInstancePtr, + u16 EmacLiteIntrId); +static int EmacLiteSetupIntrSystem(XIntc *IntcInstancePtr, + XEmacLite *EmacLiteInstPtr, u16 EmacLiteIntrId); + +/************************** Variable Definitions *****************************/ + +XIntc IntcInstance; /* Instance of the Interrupt Controller */ + +/* + * Set up valid local and remote MAC addresses. This loop back test uses the + * LocalAddress both as a source and destination MAC address. + */ +static u8 RemoteAddress[XEL_MAC_ADDR_SIZE] = +{ + 0x00, 0x10, 0xa4, 0xb6, 0xfd, 0x09 +}; +static u8 LocalAddress[XEL_MAC_ADDR_SIZE] = +{ + 0x00, 0x0A, 0x35, 0x01, 0x02, 0x03 +}; + +/****************************************************************************/ +/** +* +* This function is the main function of the EmacLite interrupt example. +* +* @param None. +* +* @return XST_SUCCESS if successful, otherwise XST_FAILURE. +* +* @note None. +* +*****************************************************************************/ +#ifndef TESTAPP_GEN +int main() +{ + int Status; + + /* + * Run the EmacLite interrupt example , specify the parameters + * generated in xparameters.h. + */ + Status = EmacLiteIntrExample(&IntcInstance, + &EmacLiteInstance, + EMAC_DEVICE_ID, + INTC_EMACLITE_ID); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; + +} +#endif + +/*****************************************************************************/ +/** +* +* The main entry point for the EmacLite driver example in interrupt mode. + +* This function will transmit/receive the Ethernet frames and verify the +* data in the received frame (if the MDIO interface is configured in the +* EmacLite core). +* This function simply transmits a frame if the MDIO interface is not +* configured in the EmacLite core. +* +* @param IntcInstancePtr is a pointer to the instance of the Intc. +* @param EmacLiteInstPtr is a pointer to the instance of the EmacLite. +* @param EmacLiteDeviceId is device ID of the XEmacLite Device , +* typically XPAR__DEVICE_ID value from +* xparameters.h. +* @param EmacLiteIntrId is the interrupt ID and is typically +* XPAR___VEC_ID value from +* xparameters.h. +* +* @return XST_SUCCESS if successful, otherwise XST_FAILURE. +* +* @note None. +* +******************************************************************************/ +int EmacLiteIntrExample(XIntc *IntcInstancePtr, + XEmacLite *EmacLiteInstPtr, + u16 EmacLiteDeviceId, + u16 EmacLiteIntrId) +{ + int Status; + u32 PhyAddress = 0; + XEmacLite_Config *ConfigPtr; + + /* + * Initialize the EmacLite device. + */ + ConfigPtr = XEmacLite_LookupConfig(EmacLiteDeviceId); + if (ConfigPtr == NULL) { + return XST_FAILURE; + } + Status = XEmacLite_CfgInitialize(EmacLiteInstPtr, + ConfigPtr, + ConfigPtr->BaseAddress); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Set the MAC address. + */ + XEmacLite_SetMacAddress(EmacLiteInstPtr, LocalAddress); + + /* + * Empty any existing receive frames. + */ + XEmacLite_FlushReceive(EmacLiteInstPtr); + + + /* + * Check if there is a Tx buffer available, if there isn't it is an + * error. + */ + if (XEmacLite_TxBufferAvailable(EmacLiteInstPtr) != TRUE) { + return XST_FAILURE; + } + + + /* + * Set up the interrupt infrastructure. + */ + Status = EmacLiteSetupIntrSystem(IntcInstancePtr, + EmacLiteInstPtr, + EmacLiteIntrId); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Setup the EmacLite handlers. + */ + XEmacLite_SetRecvHandler((EmacLiteInstPtr), (void *)(EmacLiteInstPtr), + (XEmacLite_Handler)EmacLiteRecvHandler); + XEmacLite_SetSendHandler((EmacLiteInstPtr), (void *)(EmacLiteInstPtr), + (XEmacLite_Handler)EmacLiteSendHandler); + + + /* + * Enable the interrupts in the EmacLite controller. + */ + XEmacLite_EnableInterrupts(EmacLiteInstPtr); + RecvFrameLength = 0; + + /* + * If the MDIO is configured in the device. + */ + if (XEmacLite_IsMdioConfigured(EmacLiteInstPtr)) { + /* + * Detect the PHY device and enable the MAC Loop back + * in the PHY. + */ + PhyAddress = EmacLitePhyDetect(EmacLiteInstPtr); + Status = EmacLiteEnablePhyLoopBack(EmacLiteInstPtr, + PhyAddress); + if (Status != XST_SUCCESS) { + XEmacLite_DisableInterrupts(EmacLiteInstPtr); + EmacLiteDisableIntrSystem(IntcInstancePtr, + EmacLiteIntrId); + return XST_FAILURE; + } + } + + /* + * Transmit an Ethernet frame. + */ + Status = EmacLiteSendFrame(EmacLiteInstPtr, + EMACLITE_TEST_FRAME_SIZE); + if (Status != XST_SUCCESS) { + if (XEmacLite_IsMdioConfigured(EmacLiteInstPtr)) { + /* + * Disable the MAC Loop back in the PHY and + * disable/disconnect the EmacLite Interrupts. + */ + EmacLiteDisablePhyLoopBack(EmacLiteInstPtr, + PhyAddress); + XEmacLite_DisableInterrupts(EmacLiteInstPtr); + EmacLiteDisableIntrSystem(IntcInstancePtr, + EmacLiteIntrId); + return XST_FAILURE; + } + } + + /* + * Wait for the frame to be transmitted. + */ + while (TransmitComplete == FALSE); + + /* + * If the MDIO is not configured in the core then return XST_SUCCESS + * as the frame has been transmitted. + */ + if (!XEmacLite_IsMdioConfigured(EmacLiteInstPtr)) { + + /* + * Disable and disconnect the EmacLite Interrupts. + */ + XEmacLite_DisableInterrupts(EmacLiteInstPtr); + EmacLiteDisableIntrSystem(IntcInstancePtr, EmacLiteIntrId); + return XST_SUCCESS; + } + + /* + * Wait for the frame to be received. + */ + while (RecvFrameLength == 0); + + /* + * Check the received frame. + */ + Status = EmacLiteRecvFrame(EMACLITE_TEST_FRAME_SIZE); + + /* + * Diasble the Loop Back. + */ + if (XEmacLite_IsMdioConfigured(EmacLiteInstPtr)) { + /* + * Disable the MAC Loop back in the PHY. + */ + Status |= EmacLiteDisablePhyLoopBack(EmacLiteInstPtr, + PhyAddress); + } + + /* + * Disable and disconnect the EmacLite Interrupts. + */ + XEmacLite_DisableInterrupts(EmacLiteInstPtr); + EmacLiteDisableIntrSystem(IntcInstancePtr, EmacLiteIntrId); + if ((Status != XST_SUCCESS) && (Status != XST_NO_DATA)) { + return XST_FAILURE; + } + + return XST_SUCCESS; +} + +/******************************************************************************/ +/** +* +* This function sends a frame of given size. This function assumes interrupt +* mode and sends the frame. +* +* @param EmacLiteInstPtr is a pointer to the EmacLite instance. +* @param PayloadSize is the size of the frame to create. The size only +* reflects the payload size, it does not include the Ethernet +* header size (14 bytes) nor the Ethernet CRC size (4 bytes). +* +* @return XST_SUCCESS if successful, else XST_FAILURE. +* +* @note None. +* +******************************************************************************/ +static int EmacLiteSendFrame(XEmacLite *EmacLiteInstPtr, u32 PayloadSize) +{ + int Status; + u8 *FramePtr; + u32 Index; + + /* + * Set the Complete flag to false. + */ + TransmitComplete = FALSE; + + /* + * Assemble the frame with a destination address and the source address. + */ + FramePtr = (u8 *)TxFrame; + + /* + * Set up the destination address as the local address for + * Phy Loopback and Internal loopback. + */ + if (XEmacLite_IsMdioConfigured(EmacLiteInstPtr) || + XEmacLite_IsLoopbackConfigured(EmacLiteInstPtr)) { + + *FramePtr++ = LocalAddress[0]; + *FramePtr++ = LocalAddress[1]; + *FramePtr++ = LocalAddress[2]; + *FramePtr++ = LocalAddress[3]; + *FramePtr++ = LocalAddress[4]; + *FramePtr++ = LocalAddress[5]; + } else { + /* + * Fill in the valid Destination MAC address if + * the Loopback is not enabled. + */ + *FramePtr++ = RemoteAddress[0]; + *FramePtr++ = RemoteAddress[1]; + *FramePtr++ = RemoteAddress[2]; + *FramePtr++ = RemoteAddress[3]; + *FramePtr++ = RemoteAddress[4]; + *FramePtr++ = RemoteAddress[5]; + } + + /* + * Fill in the source MAC address. + */ + *FramePtr++ = LocalAddress[0]; + *FramePtr++ = LocalAddress[1]; + *FramePtr++ = LocalAddress[2]; + *FramePtr++ = LocalAddress[3]; + *FramePtr++ = LocalAddress[4]; + *FramePtr++ = LocalAddress[5]; + + /* + * Set up the type/length field - be sure its in network order. + */ + *((u16 *)FramePtr) = Xil_Htons(PayloadSize); + FramePtr++; + FramePtr++; + + /* + * Now fill in the data field with known values so we can verify them. + */ + for (Index = 0; Index < PayloadSize; Index++) { + *FramePtr++ = (u8)Index; + } + + /* + * Now send the frame. + */ + Status = XEmacLite_Send(EmacLiteInstPtr, (u8 *)TxFrame, + PayloadSize + XEL_HEADER_SIZE); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; +} + +/******************************************************************************/ +/** +* +* This function receives a frame of given size. This function assumes interrupt +* mode, receives the frame and verifies its contents. +* +* @param PayloadSize is the size of the frame to receive. +* The size only reflects the payload size, it does not include the +* Ethernet header size (14 bytes) nor the Ethernet CRC size (4 +* bytes). +* +* @return XST_SUCCESS if successful, a driver-specific return code if not. +* +* @note None. +* +******************************************************************************/ +static int EmacLiteRecvFrame(u32 PayloadSize) +{ + u8 *FramePtr; + + /* + * This assumes MAC does not strip padding or CRC. + */ + if (RecvFrameLength != 0) { + int Index; + + /* + * Verify length, which should be the payload size. + */ + if ((RecvFrameLength- (XEL_HEADER_SIZE + XEL_FCS_SIZE)) != + PayloadSize) { + return XST_LOOPBACK_ERROR; + } + + /* + * Verify the contents of the Received Frame. + */ + FramePtr = (u8 *)RxFrame; + FramePtr += XEL_HEADER_SIZE; /* Get past the header */ + + for (Index = 0; Index < PayloadSize; Index++) { + if (*FramePtr++ != (u8)Index) { + return XST_LOOPBACK_ERROR; + } + } + } + + return XST_SUCCESS; +} + + +/******************************************************************************/ +/** +* +* This function handles the receive callback from the EmacLite driver. +* +* @param CallBackRef is the call back reference provided to the Handler. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +static void EmacLiteRecvHandler(void *CallBackRef) +{ + XEmacLite *XEmacInstancePtr; + + /* + * Convert the argument to something useful. + */ + XEmacInstancePtr = (XEmacLite *)CallBackRef; + + /* + * Handle the Receive callback. + */ + RecvFrameLength = XEmacLite_Recv(XEmacInstancePtr, (u8 *)RxFrame); + +} + +/******************************************************************************/ +/** +* +* This function handles the transmit callback from the EmacLite driver. +* +* @param CallBackRef is the call back reference provided to the Handler. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +static void EmacLiteSendHandler(void *CallBackRef) +{ + XEmacLite *XEmacInstancePtr; + + /* + * Convert the argument to something useful. + */ + XEmacInstancePtr = (XEmacLite *)CallBackRef; + + /* + * Handle the Transmit callback. + */ + TransmitComplete = TRUE; + +} + +/*****************************************************************************/ +/** +* +* This function setups the interrupt system such that interrupts can occur +* for the EmacLite device. This function is application specific since the +* actual system may or may not have an interrupt controller. The EmacLite +* could be directly connected to a processor without an interrupt controller. +* The user should modify this function to fit the application. +* +* @param IntcInstancePtr is a pointer to the instance of the Intc. +* @param EmacLiteInstPtr is a pointer to the instance of the EmacLite. +* @param EmacLiteIntrId is the interrupt ID and is typically +* XPAR___VEC_ID +* value from xparameters.h +* +* @return XST_SUCCESS if successful, otherwise XST_FAILURE. +* +* @note None. +* +******************************************************************************/ +static int EmacLiteSetupIntrSystem(XIntc *IntcInstancePtr, + XEmacLite *EmacLiteInstPtr, u16 EmacLiteIntrId) +{ + int Status; + +#ifndef TESTAPP_GEN + /* + * Initialize the interrupt controller driver so that it is ready to + * use. + */ + Status = XIntc_Initialize(IntcInstancePtr, INTC_DEVICE_ID); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } +#endif + /* + * Connect a device driver handler that will be called when an interrupt + * for the device occurs, the device driver handler performs the + * specific interrupt processing for the device. + */ + Status = XIntc_Connect(IntcInstancePtr, + EmacLiteIntrId, + XEmacLite_InterruptHandler, + (void *)(EmacLiteInstPtr)); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + +#ifndef TESTAPP_GEN + /* + * Start the interrupt controller such that interrupts are enabled for + * all devices that cause interrupts, specific real mode so that + * the EmacLite can cause interrupts thru the interrupt controller. + */ + Status = XIntc_Start(IntcInstancePtr, XIN_REAL_MODE); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } +#endif + + /* + * Enable the interrupt for the EmacLite in the Interrupt controller. + */ + XIntc_Enable(IntcInstancePtr, EmacLiteIntrId); + +#ifndef TESTAPP_GEN + + /* + * Initialize the exception table. + */ + Xil_ExceptionInit(); + + /* + * Register the interrupt controller handler with the exception table. + */ + Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT, + (Xil_ExceptionHandler) XIntc_InterruptHandler, + IntcInstancePtr); + + /* + * Enable non-critical exceptions. + */ + Xil_ExceptionEnable(); + +#endif /* TESTAPP_GEN */ + + return XST_SUCCESS; +} + + +/*****************************************************************************/ +/** +* +* This function disables the interrupts that occur for the EmacLite device. +* +* @param IntcInstancePtr is the pointer to the instance of the INTC +* component. +* @param EmacLiteIntrId is the interrupt ID and is typically +* XPAR___VEC_ID +* value from xparameters.h. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +static void EmacLiteDisableIntrSystem(XIntc *IntcInstancePtr, + u16 EmacLiteIntrId) +{ + /* + * Disconnect and disable the interrupts for the EmacLite device. + */ + XIntc_Disconnect(IntcInstancePtr, EmacLiteIntrId); + +} + + + + + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_polled_example.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_polled_example.c new file mode 100644 index 0000000000..c4b64057b4 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xemaclite_polled_example.c @@ -0,0 +1,409 @@ +#define TESTAPP_GEN + +/* $Id: xemaclite_polled_example.c,v 1.1.2.2 2010/08/06 15:11:04 anirudh Exp $ +*/ +/****************************************************************************** +* +* (c) Copyright 2004-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xemaclite_polled_example.c +* +* This file contains an example for using the EmacLite hardware and driver. +* This file contains an polled mode example outlining the transmission/reception +* of an Ethernet frame of 1000 bytes of payload. +* +* If the MDIO interface is NOT configured in the EmacLite core then this example +* will only transmit a frame. +* If the MDIO interface is configured in the EmacLite core then this example +* will enable the MAC loopback in the PHY device, then transmit the frame and +* compare the received frame. +* +* @note +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date     Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.01a ecm  21/05/04 First release
+* 1.01a sv   06/06/05 Minor changes to comply to Doxygen and coding guidelines
+* 2.00a ktn  02/25/09 Updated to use PHY loop back if MDIO is configured in
+*		      core and updated to be used in Test App
+* 3.00a ktn  10/22/09 Updated example to use the macros that have been changed
+*		      in the driver to remove _m from the name of the macro.
+* 3.01a ktn  07/08/10 Updated example to support Little Endian MicroBlaze.
+*
+*
+* +*****************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xemaclite_example.h" + +/************************** Constant Definitions *****************************/ + +/* + * The Size of the Test Frame. + */ +#define EMACLITE_TEST_FRAME_SIZE 1000 + +/**************************** Type Definitions *******************************/ + +/***************** Macros (Inline Functions) Definitions *********************/ + +/************************** Function Prototypes ******************************/ + +int EmacLitePolledExample(u16 DeviceId); + +static int EmacLiteSendFrame(XEmacLite *InstancePtr, u32 PayloadSize); + +static int EmacLiteRecvFrame(u32 PayloadSize); + +/************************** Variable Definitions *****************************/ + +/* + * Set up valid local and remote MAC addresses. This loop back test uses the + * LocalAddress both as a source and destination MAC address. + */ +static u8 LocalAddress[XEL_MAC_ADDR_SIZE] = +{ + 0x00, 0x0A, 0x35, 0x01, 0x02, 0x03 +}; +static u8 RemoteAddress[XEL_MAC_ADDR_SIZE] = +{ + 0x00, 0x10, 0xa4, 0xb6, 0xfd, 0x09 +}; + +/****************************************************************************/ +/** +* +* This function is the main function of the EmacLite polled example. +* +* @param None. +* +* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE . +* +* @note None. +* +*****************************************************************************/ +#ifndef TESTAPP_GEN +int main() +{ + int Status; + + /* + * Run the EmacLite Polled example, specify the Device ID that is + * generated in xparameters.h. + */ + Status = EmacLitePolledExample(EMAC_DEVICE_ID); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; +} +#endif + +/*****************************************************************************/ +/** +* +* The main entry point for the EmacLite driver example in polled mode. +* +* This function will transmit/receive the Ethernet frames and verify the +* data in the received frame (if the MDIO interface is configured in the +* EmacLite core). +* This function simply transmits a frame if the MDIO interface is not +* configured in the EmacLite core. +* +* @param DeviceId is device ID of the XEmacLite Device , typically +* XPAR__DEVICE_ID value from xparameters.h. +* +* @return XST_SUCCESS to indicate success, XST_FAILURE otherwise. +* +* @note None. +* +******************************************************************************/ +int EmacLitePolledExample(u16 DeviceId) +{ + int Status; + XEmacLite *EmacLiteInstPtr = &EmacLiteInstance; + u32 PhyAddress = 0; + RecvFrameLength = 0; + XEmacLite_Config *ConfigPtr; + + /* + * Initialize the EmacLite device. + */ + ConfigPtr = XEmacLite_LookupConfig(DeviceId); + if (ConfigPtr == NULL) { + return XST_FAILURE; + } + Status = XEmacLite_CfgInitialize(EmacLiteInstPtr, + ConfigPtr, + ConfigPtr->BaseAddress); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Set the MAC address. + */ + XEmacLite_SetMacAddress(EmacLiteInstPtr, LocalAddress); + + /* + * Empty any existing receive frames. + */ + XEmacLite_FlushReceive(EmacLiteInstPtr); + + /* + * Check if there is a TX buffer available, if there isn't it is an + * error. + */ + if (XEmacLite_TxBufferAvailable(EmacLiteInstPtr) != TRUE) { + return XST_FAILURE; + } + + /* + * If the MDIO is configured in the device. + */ + if (XEmacLite_IsMdioConfigured(EmacLiteInstPtr)) { + /* + * Detect the PHY device and enable the MAC Loop back + * in the PHY. + */ + PhyAddress = EmacLitePhyDetect(EmacLiteInstPtr); + Status = EmacLiteEnablePhyLoopBack(EmacLiteInstPtr, + PhyAddress); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + } + + + /* + * Reset the receive frame length to zero. + */ + RecvFrameLength = 0; + Status = EmacLiteSendFrame(EmacLiteInstPtr, EMACLITE_TEST_FRAME_SIZE); + if (Status != XST_SUCCESS) { + if (XEmacLite_IsMdioConfigured(EmacLiteInstPtr)) { + /* + * Disable the MAC Loop back in the PHY. + */ + EmacLiteDisablePhyLoopBack(EmacLiteInstPtr, + PhyAddress); + return XST_FAILURE; + } + } + + /* + * If the MDIO is not configured in the core then return XST_SUCCESS + * as the frame has been transmitted. + */ + if (!XEmacLite_IsMdioConfigured(EmacLiteInstPtr)) { + return XST_SUCCESS; + } + + + /* + * Poll for receive packet. + */ + while ((volatile u32)RecvFrameLength == 0) { + RecvFrameLength = XEmacLite_Recv(EmacLiteInstPtr, + (u8 *)RxFrame); + } + + /* + * Check the received frame. + */ + Status = EmacLiteRecvFrame(EMACLITE_TEST_FRAME_SIZE); + if ((Status != XST_SUCCESS) && (Status != XST_NO_DATA)) { + /* + * Disable the MAC Loop back in the PHY. + */ + EmacLiteDisablePhyLoopBack(EmacLiteInstPtr, PhyAddress); + return XST_FAILURE; + } + + + /* + * Disable the MAC Loop back in the PHY. + */ + EmacLiteDisablePhyLoopBack(EmacLiteInstPtr, PhyAddress); + + return XST_SUCCESS; +} + +/******************************************************************************/ +/** +* +* This function sends a frame of given size. +* +* @param XEmacInstancePtr is a pointer to the XEmacLite instance. +* @param PayloadSize is the size of the frame to create. The size only +* reflects the payload size, it does not include the Ethernet +* header size (14 bytes) nor the Ethernet CRC size (4 bytes). +* +* @return XST_SUCCESS if successful, else a driver-specific return code. +* +* @note None. +* +******************************************************************************/ +static int EmacLiteSendFrame(XEmacLite *InstancePtr, u32 PayloadSize) +{ + u8 *FramePtr; + int Index; + FramePtr = (u8 *)TxFrame; + + /* + * Set up the destination address as the local address for + * Phy Loopback. + */ + if (XEmacLite_IsMdioConfigured(InstancePtr)) { + + *FramePtr++ = LocalAddress[0]; + *FramePtr++ = LocalAddress[1]; + *FramePtr++ = LocalAddress[2]; + *FramePtr++ = LocalAddress[3]; + *FramePtr++ = LocalAddress[4]; + *FramePtr++ = LocalAddress[5]; + } else { + /* + * Fill in the valid Destination MAC address if + * the Loopback is not enabled. + */ + *FramePtr++ = RemoteAddress[0]; + *FramePtr++ = RemoteAddress[1]; + *FramePtr++ = RemoteAddress[2]; + *FramePtr++ = RemoteAddress[3]; + *FramePtr++ = RemoteAddress[4]; + *FramePtr++ = RemoteAddress[5]; + } + + /* + * Fill in the source MAC address. + */ + *FramePtr++ = LocalAddress[0]; + *FramePtr++ = LocalAddress[1]; + *FramePtr++ = LocalAddress[2]; + *FramePtr++ = LocalAddress[3]; + *FramePtr++ = LocalAddress[4]; + *FramePtr++ = LocalAddress[5]; + + /* + * Set up the type/length field - be sure its in network order. + */ + *((u16 *)FramePtr) = Xil_Htons(PayloadSize); + FramePtr++; + FramePtr++; + + /* + * Now fill in the data field with known values so we can verify them + * on receive. + */ + for (Index = 0; Index < PayloadSize; Index++) { + *FramePtr++ = (u8)Index; + } + + /* + * Now send the frame. + */ + return XEmacLite_Send(InstancePtr, (u8 *)TxFrame, + PayloadSize + XEL_HEADER_SIZE); + +} + +/******************************************************************************/ +/** +* +* This function receives a frame of given size. This function assumes interrupt +* mode, receives the frame and verifies its contents. +* +* @param PayloadSize is the size of the frame to receive. +* The size only reflects the payload size, it does not include the +* Ethernet header size (14 bytes) nor the Ethernet CRC size (4 +* bytes). +* +* @return XST_SUCCESS if successful, a driver-specific return code if not. +* +* @note None. +* +******************************************************************************/ +static int EmacLiteRecvFrame(u32 PayloadSize) +{ + u8 *FramePtr; + + /* + * This assumes MAC does not strip padding or CRC. + */ + if (RecvFrameLength != 0) { + int Index; + + /* + * Verify length, which should be the payload size. + */ + if ((RecvFrameLength- (XEL_HEADER_SIZE + XEL_FCS_SIZE)) != + PayloadSize) { + return XST_LOOPBACK_ERROR; + } + + /* + * Verify the contents of the Received Frame. + */ + FramePtr = (u8 *)RxFrame; + FramePtr += XEL_HEADER_SIZE; /* Get past the header */ + + for (Index = 0; Index < PayloadSize; Index++) { + if (*FramePtr++ != (u8)Index) { + return XST_LOOPBACK_ERROR; + } + } + } + + return XST_SUCCESS; +} + + + + + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xgpio_intr_tapp_example.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xgpio_intr_tapp_example.c new file mode 100644 index 0000000000..45ee87baba --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xgpio_intr_tapp_example.c @@ -0,0 +1,386 @@ +#define TESTAPP_GEN + +/* $Id: xgpio_intr_tapp_example.c,v 1.1.2.1 2009/11/25 07:38:15 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2002-2009 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xgpio_intr_tapp_example.c +* +* This file contains a design example using the GPIO driver (XGpio) in an +* interrupt driven mode of operation. This example does assume that there is +* an interrupt controller in the hardware system and the GPIO device is +* connected to the interrupt controller. +* +* This file is used by the TestAppGen utility to include a simplified test for +* gpio interrupts. + +* The buttons and LEDs are on 2 seperate channels of the GPIO so that interrupts +* are not caused when the LEDs are turned on and off. +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -------------------------------------------------------
+* 2.01a sn   05/09/06 Modified to be used by TestAppGen to include test for
+*		      interrupts.
+* 3.00a ktn  11/21/09 Updated to use HAL Processor APIs and minior changes
+*		      as per coding guidelines.
+*
+* +******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xparameters.h" +#include "xgpio.h" +#include "xil_exception.h" +#include "xintc.h" + +/************************** Constant Definitions *****************************/ +#ifndef TESTAPP_GEN +/* + * The following constants map to the names of the hardware instances that + * were created in the EDK XPS system. They are only defined here such that + * a user can easily change all the needed device IDs in one place. + */ +#define GPIO_DEVICE_ID XPAR_PUSH_BUTTONS_5BIT_DEVICE_ID +#define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID +#define INTC_GPIO_INTERRUPT_ID XPAR_INTC_0_GPIO_3_VEC_ID +#define GPIO_CHANNEL1 1 +/* + * The following constants define the positions of the buttons and LEDs each + * channel of the GPIO + */ +#define GPIO_ALL_LEDS 0xFFFF +#define GPIO_ALL_BUTTONS 0xFFFF + +/* + * The following constants define the GPIO channel that is used for the buttons + * and the LEDs. They allow the channels to be reversed easily. + */ +#define BUTTON_CHANNEL 1 /* Channel 1 of the GPIO Device */ +#define LED_CHANNEL 2 /* Channel 2 of the GPIO Device */ +#define BUTTON_INTERRUPT XGPIO_IR_CH1_MASK /* Channel 1 Interrupt Mask */ + +/* + * The following constant determines which buttons must be pressed at the same + * time to cause interrupt processing to stop and start + */ +#define INTERRUPT_CONTROL_VALUE 0x7 + +/* + * The following constant is used to wait after an LED is turned on to make + * sure that it is visible to the human eye. This constant might need to be + * tuned for faster or slower processor speeds. + */ +#define LED_DELAY 1000000 + +#endif + +#define INTR_DELAY 0x00FFFFFF + + +/************************** Function Prototypes ******************************/ +void GpioDriverHandler(void *CallBackRef); + +int GpioIntrExample(XIntc* IntcInstancePtr, XGpio* InstancePtr, + u16 DeviceId, u16 IntrId, + u16 IntrMask, u32 *DataRead); + +int GpioSetupIntrSystem(XIntc* IntcInstancePtr, XGpio* InstancePtr, + u16 DeviceId, u16 IntrId, u16 IntrMask); + +void GpioDisableIntr(XIntc* IntcInstancePtr, XGpio* InstancePtr, + u16 IntrId, u16 IntrMask); + +/************************** Variable Definitions *****************************/ + +/* + * The following are declared globally so they are zeroed and so they are + * easily accessible from a debugger + */ +XGpio Gpio; /* The Instance of the GPIO Driver */ + +XIntc Intc; /* The Instance of the Interrupt Controller Driver */ + + +static u16 GlobalIntrMask; /* GPIO channel mask that is needed by + * the Interrupt Handler */ + +static volatile u32 IntrFlag; /* Interrupt Handler Flag */ + +/****************************************************************************/ +/** +* This function is the main function of the GPIO example. It is responsible +* for initializing the GPIO device, setting up interrupts and providing a +* foreground loop such that interrupt can occur in the background. +* +* @param None. +* +* @return +* - XST_SUCCESS to indicate success. +* - XST_FAILURE to indicate failure. +* +* @note None. +* +*****************************************************************************/ +#ifndef TESTAPP_GEN +int main(void) +{ + int Status; + u32 DataRead; + + print(" Press button to Generate Interrupt\r\n"); + + Status = GpioIntrExample(&Intc, &Gpio, + GPIO_DEVICE_ID, + INTC_GPIO_INTERRUPT_ID, + GPIO_CHANNEL1, &DataRead); + + if (Status == 0 ){ + if(DataRead == 0) + print("No button pressed. \r\n"); + else + print("Gpio Interrupt Test PASSED. \r\n"); + } else { + print("Gpio Interrupt Test FAILED.\r\n"); + } +} +#endif + +/******************************************************************************/ +/** +* +* This is the entry function from the TestAppGen tool generated application +* which tests the interrupts when enabled in the GPIO +* +* @param IntcInstancePtr is a reference to the Interrupt Controller +* driver Instance +* @param InstancePtr is a reference to the GPIO driver Instance +* @param DeviceId is the XPAR__DEVICE_ID value from +* xparameters.h +* @param IntrId is XPAR___IP2INTC_IRPT_INTR +* value from xparameters.h +* @param IntrMask is the GPIO channel mask +* @param DataRead is the pointer where the data read from GPIO Input is +* returned +* +* @return XST_SUCCESS if the Test is successful, otherwise XST_FAILURE +* +* @note None. +* +******************************************************************************/ +int GpioIntrExample(XIntc* IntcInstancePtr, XGpio* InstancePtr, u16 DeviceId, + u16 IntrId, u16 IntrMask, u32 *DataRead) +{ + int Status; + u32 delay; + + /* Initialize the GPIO driver. If an error occurs then exit */ + + Status = XGpio_Initialize(InstancePtr, DeviceId); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + Status = GpioSetupIntrSystem(IntcInstancePtr, + InstancePtr, + DeviceId, + IntrId, + IntrMask); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + IntrFlag = 0; + delay = 0; + + while(!IntrFlag && (delay < INTR_DELAY)) { + delay++; + } + + GpioDisableIntr(IntcInstancePtr, + InstancePtr, + IntrId, + IntrMask); + + *DataRead = IntrFlag; + + return Status; + +} + + +/******************************************************************************/ +/** +* +* This function performs the GPIO set up for Interrupts +* +* @param IntcInstancePtr is a reference to the Interrupt Controller +* driver Instance +* @param InstancePtr is a reference to the GPIO driver Instance +* @param DeviceId is the XPAR__DEVICE_ID value from +* xparameters.h +* @param IntrId is XPAR___IP2INTC_IRPT_INTR +* value from xparameters.h +* @param IntrMask is the GPIO channel mask +* +* @return XST_SUCCESS if the Test is successful, otherwise XST_FAILURE +* +* @note None. +* +******************************************************************************/ +int GpioSetupIntrSystem(XIntc* IntcInstancePtr, XGpio* InstancePtr, + u16 DeviceId, u16 IntrId, u16 IntrMask) + +{ + int Result; + + GlobalIntrMask = IntrMask; + +#ifndef TESTAPP_GEN + /* + * Initialize the interrupt controller driver so that it's ready to use. + * specify the device ID that was generated in xparameters.h + */ + Result = XIntc_Initialize(IntcInstancePtr, INTC_DEVICE_ID); + if (Result != XST_SUCCESS) { + return Result; + } +#endif + + /* Hook up simple interrupt service routine for TestApp */ + + Result = XIntc_Connect(IntcInstancePtr, IntrId, + (XInterruptHandler)GpioDriverHandler, + InstancePtr); + + /* + * Enable the GPIO channel interrupts so that push button can be detected + * and enable interrupts for the GPIO device + */ + XGpio_InterruptEnable(InstancePtr, IntrMask); + XGpio_InterruptGlobalEnable(InstancePtr); + + /* Enable the interrupt vector at the interrupt controller */ + XIntc_Enable(IntcInstancePtr, IntrId); + +#ifndef TESTAPP_GEN + + /* + * Initialize the exception table and register the interrupt + * controller handler with the exception table + */ + Xil_ExceptionInit(); + Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT, + (Xil_ExceptionHandler)XIntc_InterruptHandler, + IntcInstancePtr); + + /* Enable non-critical exceptions */ + Xil_ExceptionEnable(); + + /* + * Start the interrupt controller such that interrupts are recognized + * and handled by the processor + */ + Result = XIntc_Start(IntcInstancePtr, XIN_REAL_MODE); +#endif + + if (Result != XST_SUCCESS) { + return Result; + } + + return XST_SUCCESS; +} + + +/******************************************************************************/ +/** +* +* This is the interrupt handler routine for the GPIO for this example. +* +* @param CallbackRef is the Callback reference for the handler. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void GpioDriverHandler(void *CallbackRef) +{ + XGpio *GpioPtr = (XGpio *)CallbackRef; + + IntrFlag = 1; + /* + * Clear the Interrupt + */ + XGpio_InterruptClear(GpioPtr, GlobalIntrMask); + +} + +/******************************************************************************/ +/** +* +* This function disables the interrupts for the GPIO +* +* @param IntcInstancePtr is a pointer to the Interrupt Controller +* driver Instance +* @param InstancePtr is a pointer to the GPIO driver Instance +* @param IntrId is XPAR___IP2INTC_IRPT_INTR +* value from xparameters.h +* @param IntrMask is the GPIO channel mask +* +* @return None +* +* @note None. +* +******************************************************************************/ +void GpioDisableIntr(XIntc* IntcInstancePtr, XGpio* InstancePtr, + u16 IntrId, u16 IntrMask) +{ + XGpio_InterruptDisable(InstancePtr, IntrMask); + XIntc_Disable(IntcInstancePtr, IntrId); + return; +} + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xgpio_tapp_example.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xgpio_tapp_example.c new file mode 100644 index 0000000000..5e94be998f --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xgpio_tapp_example.c @@ -0,0 +1,294 @@ +#define TESTAPP_GEN + +/* $Id: xgpio_tapp_example.c,v 1.1.2.1 2009/11/25 07:38:15 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2005-2009 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ + +/*****************************************************************************/ +/** +* @file xgpio_tapp_example.c +* +* This file contains a example for using GPIO hardware and driver. +* This example assumes that there is a UART Device or STDIO Device in the +* hardware system. +* +* This example can be run on the Xilinx ML300 board using the Prototype Pins & +* LEDs of the board connected to the GPIO and the Push Buttons connected. +* +* @note +* +* None +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver	Who  Date	  Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sv   04/15/05 Initial release for TestApp integration.
+* 3.00a sv   11/21/09 Updated to use HAL Processor APIs.
+*
+* +*****************************************************************************/ + +/***************************** Include Files ********************************/ + +#include "xparameters.h" +#include "xgpio.h" +#include "stdio.h" +#include "xstatus.h" + +/************************** Constant Definitions ****************************/ + +/* + * The following constant is used to wait after an LED is turned on to make + * sure that it is visible to the human eye. This constant might need to be + * tuned for faster or slower processor speeds. + */ +#define LED_DELAY 1000000 + +/* following constant is used to determine which channel of the GPIO is + * used if there are 2 channels supported in the GPIO. + */ +#define LED_CHANNEL 1 + +#define LED_MAX_BLINK 0x1 /* Number of times the LED Blinks */ + +#define GPIO_BITWIDTH 16 /* This is the width of the GPIO */ + +#define printf xil_printf /* A smaller footprint printf */ + +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are defined here such that a user can easily + * change all the needed parameters in one place. + */ +#ifndef TESTAPP_GEN +#define GPIO_OUTPUT_DEVICE_ID XPAR_LEDS_4BIT_DEVICE_ID +#define GPIO_INPUT_DEVICE_ID XPAR_LEDS_4BIT_DEVICE_ID +#endif /* TESTAPP_GEN */ + +/**************************** Type Definitions ******************************/ + + +/***************** Macros (Inline Functions) Definitions *******************/ + + +/************************** Function Prototypes ****************************/ + +int GpioOutputExample(u16 DeviceId, u32 GpioWidth); + +int GpioInputExample(u16 DeviceId, u32 *DataRead); + +void GpioDriverHandler(void *CallBackRef); + + +/************************** Variable Definitions **************************/ + +/* + * The following are declared globally so they are zeroed and so they are + * easily accessible from a debugger + */ +XGpio GpioOutput; /* The driver instance for GPIO Device configured as O/P */ +XGpio GpioInput; /* The driver instance for GPIO Device configured as I/P */ + +/*****************************************************************************/ +/** +* Main function to call the example.This function is not included if the +* example is generated from the TestAppGen test tool. +* +* @param None +* +* @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful +* +* @note None +* +******************************************************************************/ +#ifndef TESTAPP_GEN +int main(void) +{ + int Status; + u32 InputData; + + Status = GpioOutputExample(GPIO_OUTPUT_DEVICE_ID, GPIO_BITWIDTH); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + Status = GpioInputExample(GPIO_INPUT_DEVICE_ID, &InputData); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + printf("Data read from GPIO Input is 0x%x \n", (int)InputData); + + return XST_SUCCESS; +} +#endif + + +/*****************************************************************************/ +/** +* +* This function does a minimal test on the GPIO device configured as OUTPUT +* and driver as a example. +* +* +* @param DeviceId is the XPAR__DEVICE_ID value from +* xparameters.h +* @param GpioWidth is the width of the GPIO +* +* @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful +* +* @note None +* +****************************************************************************/ +int GpioOutputExample(u16 DeviceId, u32 GpioWidth) +{ + u32 Data; + volatile int Delay; + u32 LedBit; + u32 LedLoop; + int Status; + + /* + * Initialize the GPIO driver so that it's ready to use, + * specify the device ID that is generated in xparameters.h + */ + Status = XGpio_Initialize(&GpioOutput, DeviceId); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + + /* + * Set the direction for all signals to be outputs + */ + XGpio_SetDataDirection(&GpioOutput, LED_CHANNEL, 0x0); + + /* + * Set the GPIO outputs to low + */ + XGpio_DiscreteWrite(&GpioOutput, LED_CHANNEL, 0x0); + + for (LedBit = 0x0; LedBit < GpioWidth; LedBit++) { + + for (LedLoop = 0; LedLoop < LED_MAX_BLINK; LedLoop++) { + + /* + * Set the GPIO Output to High + */ + XGpio_DiscreteWrite(&GpioOutput, LED_CHANNEL, + 1 << LedBit); + +#ifndef __SIM__ + /* + * Wait a small amount of time so the LED is visible + */ + for (Delay = 0; Delay < LED_DELAY; Delay++); + +#endif + /* + * Clear the GPIO Output + */ + XGpio_DiscreteClear(&GpioOutput, LED_CHANNEL, + 1 << LedBit); + + +#ifndef __SIM__ + /* + * Wait a small amount of time so the LED is visible + */ + for (Delay = 0; Delay < LED_DELAY; Delay++); +#endif + + } + + } + + return XST_SUCCESS; + +} + + +/******************************************************************************/ +/** +* +* This function performs a test on the GPIO driver/device with the GPIO +* configured as INPUT +* +* @param DeviceId is the XPAR__DEVICE_ID value from +* xparameters.h +* @param DataRead is the pointer where the data read from GPIO Input is +* returned +* +* @return XST_SUCCESS if the Test is successful, otherwise XST_FAILURE +* +* @note None. +* +******************************************************************************/ +int GpioInputExample(u16 DeviceId, u32 *DataRead) +{ + int Status; + + /* + * Initialize the GPIO driver so that it's ready to use, + * specify the device ID that is generated in xparameters.h + */ + Status = XGpio_Initialize(&GpioInput, DeviceId); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Set the direction for all signals to be inputs + */ + XGpio_SetDataDirection(&GpioInput, LED_CHANNEL, 0xFFFFFFFF); + + /* + * Read the state of the data so that it can be verified + */ + *DataRead = XGpio_DiscreteRead(&GpioInput, LED_CHANNEL); + + return XST_SUCCESS; + +} + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xintc_tapp_example.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xintc_tapp_example.c new file mode 100644 index 0000000000..a759313fd0 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xintc_tapp_example.c @@ -0,0 +1,265 @@ +#define TESTAPP_GEN + + +/* $Id: xintc_tapp_example.c,v 1.1.4.1 2010/09/17 05:32:46 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2002-2009 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/******************************************************************************/ +/** +* +* @file xintc_tapp_example.c +* +* This file contains a self test example using the Interrupt Controller driver +* (XIntc) and hardware device. Please reference other device driver examples to +* see more examples of how the Intc and interrupts can be used by a software +* application. +* +* This example shows the use of the Interrupt Controller both with a PowerPC405 +* and MicroBlaze processor. +* +* The TestApp Gen utility uses this file to perform the self test and setup +* of Intc for interrupts. +* +* @note +* +* None +* +* 
+*
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- --------------------------------------------------------
+* 1.00a sv   06/29/05  Created for Test App Integration
+* 1.00c sn   05/09/06  Added Interrupt Setup Function
+* 2.00a ktn  10/20/09  Updated to use HAL Processor APIs and minor changes as
+*		       per coding guidelines.
+*
+******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xparameters.h" +#include "xstatus.h" +#include "xintc.h" +#include "xil_exception.h" + + +/************************** Constant Definitions *****************************/ + +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are defined here such that a user can easily + * change all the needed parameters in one place. This definition is not + * included if the example is generated from the TestAppGen test tool. + */ +#ifndef TESTAPP_GEN +#define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID +#endif + +/**************************** Type Definitions *******************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/************************** Function Prototypes ******************************/ + +int IntcSelfTestExample(u16 DeviceId); +int IntcInterruptSetup(XIntc *IntcInstancePtr, u16 DeviceId); + +/************************** Variable Definitions *****************************/ + +static XIntc InterruptController; /* Instance of the Interrupt Controller */ + + +/*****************************************************************************/ +/** +* +* This is the main function for the Interrupt Controller example. This +* function is not included if the example is generated from the TestAppGen test +* tool. +* +* @param None. +* +* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE. +* +* @note None. +* +******************************************************************************/ +#ifndef TESTAPP_GEN +int main(void) +{ + int Status; + + /* + * Run the Intc example , specify the Device ID generated in + * xparameters.h. + */ + Status = IntcSelfTestExample(INTC_DEVICE_ID); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; + +} +#endif + +/*****************************************************************************/ +/** +* +* This function runs a self-test on the driver/device. This is a destructive +* test. This function is an example of how to use the interrupt controller +* driver component (XIntc) and the hardware device. This function is designed +* to work without any hardware devices to cause interrupts. It may not return +* if the interrupt controller is not properly connected to the processor in +* either software or hardware. +* +* This function relies on the fact that the interrupt controller hardware +* has come out of the reset state such that it will allow interrupts to be +* simulated by the software. +* +* @param DeviceId is device ID of the Interrupt Controller Device, +* typically XPAR__DEVICE_ID value from +* xparameters.h. +* +* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE. +* +* @note None. +* +******************************************************************************/ +int IntcSelfTestExample(u16 DeviceId) +{ + int Status; + + /* + * Initialize the interrupt controller driver so that it is ready to use. + */ + Status = XIntc_Initialize(&InterruptController, DeviceId); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + + /* + * Perform a self-test to ensure that the hardware was built correctly. + */ + Status = XIntc_SelfTest(&InterruptController); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; + +} + + +/*****************************************************************************/ +/** +* +* This function is used by the TestAppGen generated application to setup +* the interrupt controller. +* +* @param IntcInstancePtr is the reference to the Interrupt Controller +* instance. +* @param DeviceId is device ID of the Interrupt Controller Device, +* typically XPAR__DEVICE_ID value from +* xparameters.h. +* +* @return XST_SUCCESS to indicate success, otherwise XST_FAILURE. +* +* @note None. +* +******************************************************************************/ +int IntcInterruptSetup(XIntc *IntcInstancePtr, u16 DeviceId) +{ + + int Status; + + /* + * Initialize the interrupt controller driver so that it is + * ready to use. + */ + Status = XIntc_Initialize(IntcInstancePtr, DeviceId); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Perform a self-test to ensure that the hardware was built correctly. + */ + Status = XIntc_SelfTest(IntcInstancePtr); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Initialize the exception table. + */ + Xil_ExceptionInit(); + + /* + * Register the interrupt controller handler with the exception table. + */ + Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT, + (Xil_ExceptionHandler)XIntc_DeviceInterruptHandler, + (void*) 0); + + /* + * Enable exceptions. + */ + Xil_ExceptionEnable(); + + /* + * Start the interrupt controller such that interrupts are enabled for + * all devices that cause interrupts. + */ + Status = XIntc_Start(IntcInstancePtr, XIN_REAL_MODE); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; + +} + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xtmrctr_intr_example.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xtmrctr_intr_example.c new file mode 100644 index 0000000000..067a0abd5f --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xtmrctr_intr_example.c @@ -0,0 +1,457 @@ +#define TESTAPP_GEN + +/* $Id: xtmrctr_intr_example.c,v 1.1.2.1 2010/12/01 07:53:56 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2002-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xtmrctr_intr_example.c +* +* This file contains a design example using the timer counter driver +* (XTmCtr) and hardware device using interrupt mode.This example assumes +* that the interrupt controller is also present as a part of the system +* +* This file can be used as a standalone example or by the TestAppGen utility +* to include a test for Timer interrupts. +* +* +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00b jhl  02/13/02 First release
+* 1.00b sv   04/26/05 Minor changes to comply to Doxygen and coding guidelines
+* 1.00b sn   05/09/06 Modified to be used by TestAppGen to include test for
+*		      interrupts.
+* 2.00a ktn  10/30/09 Updated to use HAL API's and minor changes as per coding
+*		      guidelines.
+*
+******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xparameters.h" +#include "xtmrctr.h" +#include "xintc.h" +#include "xil_exception.h" + +/************************** Constant Definitions *****************************/ +#ifndef TESTAPP_GEN +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are only defined here such that a user can easily + * change all the needed parameters in one place. + */ +#define TMRCTR_DEVICE_ID XPAR_TMRCTR_0_DEVICE_ID +#define INTC_DEVICE_ID XPAR_INTC_0_DEVICE_ID +#define TMRCTR_INTERRUPT_ID XPAR_INTC_0_TMRCTR_0_VEC_ID + +/* + * The following constant determines which timer counter of the device that is + * used for this example, there are currently 2 timer counters in a device + * and this example uses the first one, 0, the timer numbers are 0 based + */ +#define TIMER_CNTR_0 0 + +#endif +/* + * The following constant is used to set the reset value of the timer counter, + * making this number larger reduces the amount of time this example consumes + * because it is the value the timer counter is loaded with when it is started + */ +#define RESET_VALUE 0xF0000000 + + + +/**************************** Type Definitions *******************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/************************** Function Prototypes ******************************/ + +int TmrCtrIntrExample(XIntc* IntcInstancePtr, + XTmrCtr* InstancePtr, + u16 DeviceId, + u16 IntrId, + u8 TmrCtrNumber); + +static int TmrCtrSetupIntrSystem(XIntc* IntcInstancePtr, + XTmrCtr* InstancePtr, + u16 DeviceId, + u16 IntrId, + u8 TmrCtrNumber); + +void TimerCounterHandler(void *CallBackRef, u8 TmrCtrNumber); + +void TmrCtrDisableIntr(XIntc* IntcInstancePtr, u16 IntrId); + +/************************** Variable Definitions *****************************/ +#ifndef TESTAPP_GEN +XIntc InterruptController; /* The instance of the Interrupt Controller */ + +XTmrCtr TimerCounterInst; /* The instance of the Timer Counter */ +#endif +/* + * The following variables are shared between non-interrupt processing and + * interrupt processing such that they must be global. + */ +volatile int TimerExpired; + + +/*****************************************************************************/ +/** +* This function is the main function of the Tmrctr example using Interrupts. +* +* @param None. +* +* @return XST_SUCCESS to indicate success, else XST_FAILURE to indicate a +* Failure. +* +* @note None. +* +******************************************************************************/ +#ifndef TESTAPP_GEN +int main(void) +{ + + int Status; + + /* + * Run the Timer Counter - Interrupt example. + */ + Status = TmrCtrIntrExample(&InterruptController, + &TimerCounterInst, + TMRCTR_DEVICE_ID, + TMRCTR_INTERRUPT_ID, + TIMER_CNTR_0); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; + +} +#endif + +/*****************************************************************************/ +/** +* This function does a minimal test on the timer counter device and driver as a +* design example. The purpose of this function is to illustrate how to use the +* XTmrCtr component. It initializes a timer counter and then sets it up in +* compare mode with auto reload such that a periodic interrupt is generated. +* +* This function uses interrupt driven mode of the timer counter. +* +* @param IntcInstancePtr is a pointer to the Interrupt Controller +* driver Instance +* @param TmrCtrInstancePtr is a pointer to the XTmrCtr driver Instance +* @param DeviceId is the XPAR__DEVICE_ID value from +* xparameters.h +* @param IntrId is XPAR___INTERRUPT_INTR +* value from xparameters.h +* @param TmrCtrNumber is the number of the timer to which this +* handler is associated with. +* +* @return XST_SUCCESS if the Test is successful, otherwise XST_FAILURE +* +* @note This function contains an infinite loop such that if interrupts +* are not working it may never return. +* +*****************************************************************************/ +int TmrCtrIntrExample(XIntc* IntcInstancePtr, + XTmrCtr* TmrCtrInstancePtr, + u16 DeviceId, + u16 IntrId, + u8 TmrCtrNumber) +{ + int Status; + int LastTimerExpired = 0; + + /* + * Initialize the timer counter so that it's ready to use, + * specify the device ID that is generated in xparameters.h + */ + Status = XTmrCtr_Initialize(TmrCtrInstancePtr, DeviceId); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Perform a self-test to ensure that the hardware was built + * correctly, use the 1st timer in the device (0) + */ + Status = XTmrCtr_SelfTest(TmrCtrInstancePtr, TmrCtrNumber); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Connect the timer counter to the interrupt subsystem such that + * interrupts can occur. This function is application specific. + */ + Status = TmrCtrSetupIntrSystem(IntcInstancePtr, + TmrCtrInstancePtr, + DeviceId, + IntrId, + TmrCtrNumber); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Setup the handler for the timer counter that will be called from the + * interrupt context when the timer expires, specify a pointer to the + * timer counter driver instance as the callback reference so the handler + * is able to access the instance data + */ + XTmrCtr_SetHandler(TmrCtrInstancePtr, TimerCounterHandler, + TmrCtrInstancePtr); + + /* + * Enable the interrupt of the timer counter so interrupts will occur + * and use auto reload mode such that the timer counter will reload + * itself automatically and continue repeatedly, without this option + * it would expire once only + */ + XTmrCtr_SetOptions(TmrCtrInstancePtr, TmrCtrNumber, + XTC_INT_MODE_OPTION | XTC_AUTO_RELOAD_OPTION); + + /* + * Set a reset value for the timer counter such that it will expire + * eariler than letting it roll over from 0, the reset value is loaded + * into the timer counter when it is started + */ + XTmrCtr_SetResetValue(TmrCtrInstancePtr, TmrCtrNumber, RESET_VALUE); + + /* + * Start the timer counter such that it's incrementing by default, + * then wait for it to timeout a number of times + */ + XTmrCtr_Start(TmrCtrInstancePtr, TmrCtrNumber); + + while (1) { + /* + * Wait for the first timer counter to expire as indicated by the + * shared variable which the handler will increment + */ + while (TimerExpired == LastTimerExpired) { + } + LastTimerExpired = TimerExpired; + + /* + * If it has expired a number of times, then stop the timer counter + * and stop this example + */ + if (TimerExpired == 3) { + + XTmrCtr_Stop(TmrCtrInstancePtr, TmrCtrNumber); + break; + } + } + + TmrCtrDisableIntr(IntcInstancePtr, DeviceId); + return XST_SUCCESS; +} + +/*****************************************************************************/ +/** +* This function is the handler which performs processing for the timer counter. +* It is called from an interrupt context such that the amount of processing +* performed should be minimized. It is called when the timer counter expires +* if interrupts are enabled. +* +* This handler provides an example of how to handle timer counter interrupts +* but is application specific. +* +* @param CallBackRef is a pointer to the callback function +* @param TmrCtrNumber is the number of the timer to which this +* handler is associated with. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void TimerCounterHandler(void *CallBackRef, u8 TmrCtrNumber) +{ + XTmrCtr *InstancePtr = (XTmrCtr *)CallBackRef; + + /* + * Check if the timer counter has expired, checking is not necessary + * since that's the reason this function is executed, this just shows + * how the callback reference can be used as a pointer to the instance + * of the timer counter that expired, increment a shared variable so + * the main thread of execution can see the timer expired + */ + if (XTmrCtr_IsExpired(InstancePtr, TmrCtrNumber)) { + TimerExpired++; + if(TimerExpired == 3) { + XTmrCtr_SetOptions(InstancePtr, TmrCtrNumber, 0); + } + } +} + +/*****************************************************************************/ +/** +* This function setups the interrupt system such that interrupts can occur +* for the timer counter. This function is application specific since the actual +* system may or may not have an interrupt controller. The timer counter could +* be directly connected to a processor without an interrupt controller. The +* user should modify this function to fit the application. +* +* @param IntcInstancePtr is a pointer to the Interrupt Controller +* driver Instance. +* @param TmrCtrInstancePtr is a pointer to the XTmrCtr driver Instance. +* @param DeviceId is the XPAR__DEVICE_ID value from +* xparameters.h. +* @param IntrId is XPAR___VEC_ID +* value from xparameters.h. +* @param TmrCtrNumber is the number of the timer to which this +* handler is associated with. +* +* @return XST_SUCCESS if the Test is successful, otherwise XST_FAILURE. +* +* @note This function contains an infinite loop such that if interrupts +* are not working it may never return. +* +******************************************************************************/ +static int TmrCtrSetupIntrSystem(XIntc* IntcInstancePtr, + XTmrCtr* TmrCtrInstancePtr, + u16 DeviceId, + u16 IntrId, + u8 TmrCtrNumber) +{ + int Status; + + #ifndef TESTAPP_GEN + /* + * Initialize the interrupt controller driver so that + * it's ready to use, specify the device ID that is generated in + * xparameters.h + */ + Status = XIntc_Initialize(IntcInstancePtr, INTC_DEVICE_ID); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } +#endif + /* + * Connect a device driver handler that will be called when an interrupt + * for the device occurs, the device driver handler performs the specific + * interrupt processing for the device + */ + Status = XIntc_Connect(IntcInstancePtr, IntrId, + (XInterruptHandler)XTmrCtr_InterruptHandler, + (void *)TmrCtrInstancePtr); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + +#ifndef TESTAPP_GEN + /* + * Start the interrupt controller such that interrupts are enabled for + * all devices that cause interrupts, specific real mode so that + * the timer counter can cause interrupts thru the interrupt controller. + */ + Status = XIntc_Start(IntcInstancePtr, XIN_REAL_MODE); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } +#endif + + /* + * Enable the interrupt for the timer counter + */ + XIntc_Enable(IntcInstancePtr, IntrId); + +#ifndef TESTAPP_GEN + /* + * Initialize the exception table. + */ + Xil_ExceptionInit(); + + /* + * Register the interrupt controller handler with the exception table. + */ + Xil_ExceptionRegisterHandler(XIL_EXCEPTION_ID_INT, + (Xil_ExceptionHandler) + XIntc_InterruptHandler, + IntcInstancePtr); + + /* + * Enable non-critical exceptions. + */ + Xil_ExceptionEnable(); + +#endif + return XST_SUCCESS; +} + + +/******************************************************************************/ +/** +* +* This function disables the interrupts for the Timer. +* +* @param IntcInstancePtr is a reference to the Interrupt Controller +* driver Instance. +* @param IntrId is XPAR___VEC_ID +* value from xparameters.h. +* +* @return None. +* +* @note None. +* +******************************************************************************/ +void TmrCtrDisableIntr(XIntc* IntcInstancePtr, u16 IntrId) +{ + /* + * Disable the interrupt for the timer counter + */ + XIntc_Disable(IntcInstancePtr, IntrId); + + return; +} + + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xtmrctr_selftest_example.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xtmrctr_selftest_example.c new file mode 100644 index 0000000000..fe5ef01392 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xtmrctr_selftest_example.c @@ -0,0 +1,174 @@ +#define TESTAPP_GEN + +/* $Id: xtmrctr_selftest_example.c,v 1.1.2.1 2010/12/01 07:53:56 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2002-2010 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/*****************************************************************************/ +/** +* @file xtmrctr_selftest_example.c +* +* This file contains a example for using the Timer Counter hardware and +* driver +* +* @note +* +* None +* +* 
+* MODIFICATION HISTORY:
+*
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a sv   04/25/05 Initial release for TestApp integration.
+* 2.00a ktn  11/26/09 Minor changes as per coding guidelines.
+*
+* +*****************************************************************************/ + +/***************************** Include Files ********************************/ + +#include "xparameters.h" +#include "xtmrctr.h" + + +/************************** Constant Definitions ****************************/ + +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are defined here such that a user can easily + * change all the needed parameters in one place. + */ +#define TMRCTR_DEVICE_ID XPAR_TMRCTR_0_DEVICE_ID + +/* + * This example only uses the 1st of the 2 timer counters contained in a + * single timer counter hardware device + */ +#define TIMER_COUNTER_0 0 + +/**************************** Type Definitions ******************************/ + + +/***************** Macros (Inline Functions) Definitions *******************/ + + +/************************** Function Prototypes ****************************/ + +int TmrCtrSelfTestExample(u16 DeviceId, u8 TmrCtrNumber); + +/************************** Variable Definitions **************************/ + +XTmrCtr TimerCounter; /* The instance of the timer counter */ + + +/*****************************************************************************/ +/** +* Main function to call the example. This function is not included if the +* example is generated from the TestAppGen test tool. +* +* @param None +* +* @return XST_SUCCESS to indicate success, else XST_FAILURE to indicate +* a Failure. +* +* @note None +* +******************************************************************************/ +#ifndef TESTAPP_GEN +int main(void) +{ + int Status; + + Status = TmrCtrSelfTestExample(TMRCTR_DEVICE_ID, TIMER_COUNTER_0); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; +} +#endif + + +/*****************************************************************************/ +/** +* +* This function does a minimal test on the TmrCtr device and driver as a +* design example. The purpose of this function is to illustrate +* how to use the XTmrCtr component. +* +* +* @param DeviceId is the XPAR__DEVICE_ID value from +* xparameters.h +* @param TmrCtrNumber is the timer counter of the device to operate on. +* Each device may contain multiple timer counters. +* The timer number is a zero based number with a range of +* 0 - (XTC_DEVICE_TIMER_COUNT - 1). +* +* @return XST_SUCCESS if successful, XST_FAILURE if unsuccessful +* +* @note None +* +****************************************************************************/ +int TmrCtrSelfTestExample(u16 DeviceId, u8 TmrCtrNumber) +{ + int Status; + XTmrCtr *TmrCtrInstancePtr = &TimerCounter; + + /* + * Initialize the TmrCtr driver so that it iss ready to use + */ + Status = XTmrCtr_Initialize(TmrCtrInstancePtr, DeviceId); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Perform a self-test to ensure that the hardware was built + * correctly, use the 1st timer in the device (0) + */ + Status = XTmrCtr_SelfTest(TmrCtrInstancePtr, TmrCtrNumber); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; +} + diff --git a/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xuartlite_selftest_example.c b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xuartlite_selftest_example.c new file mode 100644 index 0000000000..12a0aa0d28 --- /dev/null +++ b/Demo/MicroBlaze_Spartan-6_EthernetLite/SDKProjects/RTOSDemoSource/src/xuartlite_selftest_example.c @@ -0,0 +1,166 @@ +#define TESTAPP_GEN + +/* $Id: xuartlite_selftest_example.c,v 1.1.2.1 2009/11/24 05:14:25 svemula Exp $ */ +/****************************************************************************** +* +* (c) Copyright 2005-2009 Xilinx, Inc. All rights reserved. +* +* This file contains confidential and proprietary information of Xilinx, Inc. +* and is protected under U.S. and international copyright and other +* intellectual property laws. +* +* DISCLAIMER +* This disclaimer is not a license and does not grant any rights to the +* materials distributed herewith. Except as otherwise provided in a valid +* license issued to you by Xilinx, and to the maximum extent permitted by +* applicable law: (1) THESE MATERIALS ARE MADE AVAILABLE "AS IS" AND WITH ALL +* FAULTS, AND XILINX HEREBY DISCLAIMS ALL WARRANTIES AND CONDITIONS, EXPRESS, +* IMPLIED, OR STATUTORY, INCLUDING BUT NOT LIMITED TO WARRANTIES OF +* MERCHANTABILITY, NON-INFRINGEMENT, OR FITNESS FOR ANY PARTICULAR PURPOSE; +* and (2) Xilinx shall not be liable (whether in contract or tort, including +* negligence, or under any other theory of liability) for any loss or damage +* of any kind or nature related to, arising under or in connection with these +* materials, including for any direct, or any indirect, special, incidental, +* or consequential loss or damage (including loss of data, profits, goodwill, +* or any type of loss or damage suffered as a result of any action brought by +* a third party) even if such damage or loss was reasonably foreseeable or +* Xilinx had been advised of the possibility of the same. +* +* CRITICAL APPLICATIONS +* Xilinx products are not designed or intended to be fail-safe, or for use in +* any application requiring fail-safe performance, such as life-support or +* safety devices or systems, Class III medical devices, nuclear facilities, +* applications related to the deployment of airbags, or any other applications +* that could lead to death, personal injury, or severe property or +* environmental damage (individually and collectively, "Critical +* Applications"). Customer assumes the sole risk and liability of any use of +* Xilinx products in Critical Applications, subject only to applicable laws +* and regulations governing limitations on product liability. +* +* THIS COPYRIGHT NOTICE AND DISCLAIMER MUST BE RETAINED AS PART OF THIS FILE +* AT ALL TIMES. +* +******************************************************************************/ +/****************************************************************************/ +/** +* +* @file xuartlite_selftest_example.c +* +* This file contains a design example using the UartLite driver (XUartLite) and +* hardware device. +* +* @note +* +* None +* +* MODIFICATION HISTORY: +* 
+* Ver   Who  Date	 Changes
+* ----- ---- -------- -----------------------------------------------
+* 1.00a ecm  01/25/04 First Release.
+* 1.00a sv   06/13/05 Minor changes to comply to Doxygen and Coding guidelines
+* 2.00a ktn  10/20/09 Minor changes as per coding guidelines.
+*
+******************************************************************************/ + +/***************************** Include Files *********************************/ + +#include "xparameters.h" +#include "xuartlite.h" + +/************************** Constant Definitions *****************************/ + +/* + * The following constants map to the XPAR parameters created in the + * xparameters.h file. They are defined here such that a user can easily + * change all the needed parameters in one place. + */ +#define UARTLITE_DEVICE_ID XPAR_UARTLITE_0_DEVICE_ID + + +/**************************** Type Definitions *******************************/ + + +/***************** Macros (Inline Functions) Definitions *********************/ + + +/************************** Function Prototypes ******************************/ + +int UartLiteSelfTestExample(u16 DeviceId); + +/************************** Variable Definitions *****************************/ + +XUartLite UartLite; /* Instance of the UartLite device */ + +/*****************************************************************************/ +/** +* +* Main function to call the example. This function is not included if the +* example is generated from the TestAppGen test tool. +* +* @param None. +* +* @return XST_SUCCESS if successful, otherwise XST_FAILURE. +* +* @note None. +* +******************************************************************************/ +#ifndef TESTAPP_GEN +int main(void) +{ + int Status; + + /* + * Run the UartLite self test example, specify the Device ID that is + * generated in xparameters.h + */ + Status = UartLiteSelfTestExample(UARTLITE_DEVICE_ID); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; + +} +#endif + +/*****************************************************************************/ +/** +* +* This function does a minimal test on the UartLite device and driver as a +* design example. The purpose of this function is to illustrate +* how to use the XUartLite component. +* +* +* @param DeviceId is the XPAR__DEVICE_ID value from +* xparameters.h. +* +* @return XST_SUCCESS if successful, otherwise XST_FAILURE. +* +* @note None. +* +****************************************************************************/ +int UartLiteSelfTestExample(u16 DeviceId) +{ + int Status; + + /* + * Initialize the UartLite driver so that it is ready to use. + */ + Status = XUartLite_Initialize(&UartLite, DeviceId); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + /* + * Perform a self-test to ensure that the hardware was built correctly. + */ + Status = XUartLite_SelfTest(&UartLite); + if (Status != XST_SUCCESS) { + return XST_FAILURE; + } + + return XST_SUCCESS; +} + +