diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system.bit b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system.bit
deleted file mode 100644
index 4fa2c85c35..0000000000
Binary files a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system.bit and /dev/null differ
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system.xml b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system.xml
deleted file mode 100644
index 3c2d81d0df..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system.xml
+++ /dev/null
@@ -1,6936 +0,0 @@
-
-<EDKSYSTEM EDKVERSION="13.1" EDWVERSION="1.2" TIMESTAMP="Sat Aug 27 15:05:40 2011">
-
- <SYSTEMINFO ARCH="spartan6" DEVICE="xc6slx45t" PACKAGE="fgg484" PART="xc6slx45tfgg484-3" SOURCE="C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.xmp" SPEEDGRADE="-3"/>
-
- <EXTERNALPORTS>
- <PORT DIR="I" MHS_INDEX="0" NAME="RESET" RSTPOLARITY="1" SIGIS="RST" SIGNAME="RESET"/>
- <PORT CLKFREQUENCY="200000000" DIFFPOLARITY="P" DIR="I" MHS_INDEX="1" NAME="CLK_P" SIGIS="CLK" SIGNAME="CLK"/>
- <PORT CLKFREQUENCY="200000000" DIFFPOLARITY="N" DIR="I" MHS_INDEX="2" NAME="CLK_N" SIGIS="CLK" SIGNAME="CLK"/>
- <PORT DIR="O" MHS_INDEX="3" NAME="RS232_Uart_1_sout" SIGNAME="RS232_Uart_1_sout"/>
- <PORT DIR="I" MHS_INDEX="4" NAME="RS232_Uart_1_sin" SIGNAME="RS232_Uart_1_sin"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="5" MSB="3" NAME="LEDs_4Bits_TRI_O" RIGHT="0" SIGNAME="LEDs_4Bits_TRI_O"/>
- <PORT DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="6" MSB="3" NAME="Push_Buttons_4Bits_TRI_I" RIGHT="0" SIGNAME="Push_Buttons_4Bits_TRI_I"/>
- <PORT DIR="O" MHS_INDEX="7" NAME="mcbx_dram_clk" SIGIS="CLK" SIGNAME="mcbx_dram_clk"/>
- <PORT DIR="O" MHS_INDEX="8" NAME="mcbx_dram_clk_n" SIGIS="CLK" SIGNAME="mcbx_dram_clk_n"/>
- <PORT DIR="O" MHS_INDEX="9" NAME="mcbx_dram_cke" SIGNAME="mcbx_dram_cke"/>
- <PORT DIR="O" MHS_INDEX="10" NAME="mcbx_dram_odt" SIGNAME="mcbx_dram_odt"/>
- <PORT DIR="O" MHS_INDEX="11" NAME="mcbx_dram_ras_n" SIGNAME="mcbx_dram_ras_n"/>
- <PORT DIR="O" MHS_INDEX="12" NAME="mcbx_dram_cas_n" SIGNAME="mcbx_dram_cas_n"/>
- <PORT DIR="O" MHS_INDEX="13" NAME="mcbx_dram_we_n" SIGNAME="mcbx_dram_we_n"/>
- <PORT DIR="O" MHS_INDEX="14" NAME="mcbx_dram_udm" SIGNAME="mcbx_dram_udm"/>
- <PORT DIR="O" MHS_INDEX="15" NAME="mcbx_dram_ldm" SIGNAME="mcbx_dram_ldm"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MHS_INDEX="16" MSB="2" NAME="mcbx_dram_ba" RIGHT="0" SIGNAME="mcbx_dram_ba"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="12" LSB="0" MHS_INDEX="17" MSB="12" NAME="mcbx_dram_addr" RIGHT="0" SIGNAME="mcbx_dram_addr"/>
- <PORT DIR="O" MHS_INDEX="18" NAME="mcbx_dram_ddr3_rst" SIGNAME="mcbx_dram_ddr3_rst"/>
- <PORT DIR="IO" ENDIAN="LITTLE" LEFT="15" LSB="0" MHS_INDEX="19" MSB="15" NAME="mcbx_dram_dq" RIGHT="0" SIGNAME="mcbx_dram_dq"/>
- <PORT DIR="IO" MHS_INDEX="20" NAME="mcbx_dram_dqs" SIGNAME="mcbx_dram_dqs"/>
- <PORT DIR="IO" MHS_INDEX="21" NAME="mcbx_dram_dqs_n" SIGNAME="mcbx_dram_dqs_n"/>
- <PORT DIR="IO" MHS_INDEX="22" NAME="mcbx_dram_udqs" SIGNAME="mcbx_dram_udqs"/>
- <PORT DIR="IO" MHS_INDEX="23" NAME="mcbx_dram_udqs_n" SIGNAME="mcbx_dram_udqs_n"/>
- <PORT DIR="IO" MHS_INDEX="24" NAME="rzq" SIGNAME="rzq"/>
- <PORT DIR="IO" MHS_INDEX="25" NAME="zio" SIGNAME="zio"/>
- <PORT DIR="IO" MHS_INDEX="26" NAME="ETHERNET_MDIO" SIGNAME="ETHERNET_MDIO"/>
- <PORT DIR="O" MHS_INDEX="27" NAME="ETHERNET_MDC" SIGNAME="ETHERNET_MDC"/>
- <PORT DIR="O" MHS_INDEX="28" NAME="ETHERNET_TX_ER" SIGNAME="ETHERNET_TX_ER"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="29" MSB="7" NAME="ETHERNET_TXD" RIGHT="0" SIGNAME="ETHERNET_TXD"/>
- <PORT DIR="O" MHS_INDEX="30" NAME="ETHERNET_TX_EN" SIGNAME="ETHERNET_TX_EN"/>
- <PORT DIR="I" MHS_INDEX="31" NAME="ETHERNET_MII_TX_CLK" SIGNAME="ETHERNET_MII_TX_CLK"/>
- <PORT DIR="O" MHS_INDEX="32" NAME="ETHERNET_TX_CLK" SIGNAME="ETHERNET_TX_CLK"/>
- <PORT DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="33" MSB="7" NAME="ETHERNET_RXD" RIGHT="0" SIGNAME="ETHERNET_RXD"/>
- <PORT DIR="I" MHS_INDEX="34" NAME="ETHERNET_RX_ER" SIGNAME="ETHERNET_RX_ER"/>
- <PORT DIR="I" MHS_INDEX="35" NAME="ETHERNET_RX_CLK" SIGNAME="ETHERNET_RX_CLK"/>
- <PORT DIR="I" MHS_INDEX="36" NAME="ETHERNET_RX_DV" SIGNAME="ETHERNET_RX_DV"/>
- <PORT DIR="O" MHS_INDEX="37" NAME="ETHERNET_PHY_RST_N" SIGNAME="ETHERNET_PHY_RST_N"/>
- </EXTERNALPORTS>
-
- <MODULES>
- <MODULE BUSSTD="AXI" BUSSTD_PSF="AXI" HWVERSION="1.02.a" INSTANCE="axi4_0" IPTYPE="BUS" IS_CROSSBAR="TRUE" MHS_INDEX="0" MODCLASS="BUS" MODTYPE="axi_interconnect">
- <DESCRIPTION TYPE="SHORT">AXI Interconnect</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">AXI4 Memory-Mapped Interconnect</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_interconnect_v1_02_a/doc/ds768_axi_interconnect.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_BASEFAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Base Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_NUM_SLAVE_SLOTS" TYPE="INTEGER" VALUE="5">
- <DESCRIPTION>Number of Slave Slots </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="3" NAME="C_NUM_MASTER_SLOTS" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Number of Master Slots </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="3">
- <DESCRIPTION>AXI ID Widgth </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="5" NAME="C_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Address Widgth </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_AXI_DATA_MAX_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Data Maximum Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="7" NAME="C_S_AXI_DATA_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020">
- <DESCRIPTION>Slave AXI Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_M_AXI_DATA_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020">
- <DESCRIPTION>Master AXI Data Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="9" NAME="C_INTERCONNECT_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>Interconnect Crossbar Data Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_S_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>AXI Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="11" NAME="C_M_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Master AXI Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_M_AXI_BASE_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000080000000">
- <DESCRIPTION>Master AXI Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000807fffff">
- <DESCRIPTION>Master AXI High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000400000003000000020000000100000000">
- <DESCRIPTION>Slave AXI Base ID</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_THREAD_ID_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Slave AXI Thread ID Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="16" NAME="C_S_AXI_IS_INTERCONNECT" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slave AXI Is Interconnect</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_S_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e10005f5e10005f5e10005f5e10005f5e100">
- <DESCRIPTION>Slave AXI ACLK Ratio</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="18" NAME="C_S_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slvave AXI Is ACLK ASYNC</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="19" NAME="C_M_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e100">
- <DESCRIPTION>Master AXI ACLK Ratio</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="20" NAME="C_M_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Master AXI Is ACLK ASYNC</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="21" NAME="C_INTERCONNECT_ACLK_RATIO" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>Interconnect Crossbar ACLK Frequency Ratio</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="22" NAME="C_S_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111110101">
- <DESCRIPTION>Slave AXI Supports Write</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="23" NAME="C_S_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111101111">
- <DESCRIPTION>Slave AXI Supports Read</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="24" NAME="C_M_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Supports Write</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="25" NAME="C_M_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Supports Read</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="26" NAME="C_AXI_SUPPORTS_USER_SIGNALS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Propagate USER Signals</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="27" NAME="C_AXI_AWUSER_WIDTH" TYPE="INTEGER" VALUE="5">
- <DESCRIPTION>AWUSER Signal Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="28" NAME="C_AXI_ARUSER_WIDTH" TYPE="INTEGER" VALUE="5">
- <DESCRIPTION>ARUSER Signal Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="29" NAME="C_AXI_WUSER_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>WUSER Signal Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="30" NAME="C_AXI_RUSER_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>RUSER Signal Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="31" NAME="C_AXI_BUSER_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>BUSER Signal Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="32" NAME="C_AXI_CONNECTIVITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f">
- <DESCRIPTION>AXI Connectivity</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="33" NAME="C_S_AXI_SINGLE_THREAD" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slave AXI Single Thread</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="34" NAME="C_M_AXI_SUPPORTS_REORDERING" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Supports Reordering</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="35" NAME="C_S_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111100000">
- <DESCRIPTION>Master generates narrow bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="36" NAME="C_M_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111110">
- <DESCRIPTION>Slave accepts narrow bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="37" NAME="C_S_AXI_WRITE_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000400000001000000010000000100000020">
- <DESCRIPTION>Slave AXI Write Acceptance</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="38" NAME="C_S_AXI_READ_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004000000010000000200000002">
- <DESCRIPTION>Slave AXI Read Acceptance</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="39" NAME="C_M_AXI_WRITE_ISSUING" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004">
- <DESCRIPTION>Master AXI Write Issuing</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="40" NAME="C_M_AXI_READ_ISSUING" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004">
- <DESCRIPTION>Master AXI Read Issuing</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="41" NAME="C_S_AXI_ARB_PRIORITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Slave AXI ARB Priority</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="42" NAME="C_M_AXI_SECURE" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Master AXI Secure</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="43" NAME="C_S_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000">
- <DESCRIPTION>Master AXI Write FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="44" NAME="C_S_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Slave AXI Write FIFO Type</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="45" NAME="C_S_AXI_WRITE_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slave AXI Write FIFO Delay</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="46" NAME="C_S_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000">
- <DESCRIPTION>Slave AXI Read FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="47" NAME="C_S_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Slave AXI Read FIFO Type</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="48" NAME="C_S_AXI_READ_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slave AXI Read FIFO Delay</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="49" NAME="C_M_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Master AXI Write FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="50" NAME="C_M_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Write FIFO Type</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="51" NAME="C_M_AXI_WRITE_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Master AXI Write FIFO Delay</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="52" NAME="C_M_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Master AXI Read FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="53" NAME="C_M_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Read FIFO Type</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="54" NAME="C_M_AXI_READ_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Master AXI Read FIFO Delay</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="55" NAME="C_S_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
- <DESCRIPTION>Slave AXI AW Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="56" NAME="C_S_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
- <DESCRIPTION>Slave AXI AR Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="57" NAME="C_S_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
- <DESCRIPTION>Slave AXI W Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="58" NAME="C_S_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
- <DESCRIPTION>Slave AXI R Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="59" NAME="C_S_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001">
- <DESCRIPTION>Slave AXI B Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="60" NAME="C_M_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Master AXI AW Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="61" NAME="C_M_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Master AXI AR Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="62" NAME="C_M_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Master AXI W Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="63" NAME="C_M_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Master AXI R Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="64" NAME="C_M_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Master AXI B Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="65" NAME="C_INTERCONNECT_R_REGISTER" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>C_INTERCONNECT_R_REGISTER</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="66" NAME="C_INTERCONNECT_CONNECTIVITY_MODE" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Interconnect Architecture</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="67" NAME="C_USE_CTRL_PORT" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Use Diagnostic Slave Port</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="68" NAME="C_USE_INTERRUPT" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Generate Interrupts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="69" NAME="C_RANGE_CHECK" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Check for transaction errors (DECERR)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="70" NAME="C_S_AXI_CTRL_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>Slave AXI CTRL Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="71" NAME="C_S_AXI_CTRL_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>Slave AXI CTRL Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="72" NAME="C_S_AXI_CTRL_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>Slave AXI CTRL Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="73" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF">
- <DESCRIPTION>Diagnostic Slave Port Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="74" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000">
- <DESCRIPTION>Diagnostic Slave Port High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="75" NAME="C_DEBUG" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Simulation debug</DESCRIPTION>
- </PARAMETER>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="S_AXI_CTRL" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="interconnect_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="INTERCONNECT_ARESETN" SIGIS="RST" SIGNAME="proc_sys_reset_0_Interconnect_aresetn"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARESETN" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="2" MSB="4" NAME="S_AXI_ARESET_OUT_N" RIGHT="0" SIGIS="RST" SIGNAME="axi4_0_S_ARESETN" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARESETN" DIR="O" MPD_INDEX="3" NAME="M_AXI_ARESET_OUT_N" SIGIS="RST" SIGNAME="axi4_0_M_ARESETN" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="4" NAME="IRQ" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DEF_SIGNAME="clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="5" MSB="4" NAME="S_AXI_ACLK" RIGHT="0" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0&clk_100_0000MHzPLL0" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]">
- <SIGNALS>
- <SIGNAL NAME="clk_100_0000MHzPLL0"/>
- <SIGNAL NAME="clk_100_0000MHzPLL0"/>
- <SIGNAL NAME="clk_100_0000MHzPLL0"/>
- <SIGNAL NAME="clk_100_0000MHzPLL0"/>
- <SIGNAL NAME="clk_100_0000MHzPLL0"/>
- </SIGNALS>
- </PORT>
- <PORT DEF_SIGNAME="axi4_0_S_AWID" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="6" MSB="14" NAME="S_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_S_AWID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="7" MSB="159" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWLEN" DIR="I" ENDIAN="LITTLE" LEFT="39" LSB="0" MPD_INDEX="8" MSB="39" NAME="S_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="9" MSB="14" NAME="S_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWBURST" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="10" MSB="9" NAME="S_AXI_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="11" MSB="9" NAME="S_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4_0_S_AWLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="12" MSB="19" NAME="S_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWPROT" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="13" MSB="14" NAME="S_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWQOS" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="14" MSB="19" NAME="S_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWUSER" DIR="I" ENDIAN="LITTLE" LEFT="24" LSB="0" MPD_INDEX="15" MSB="24" NAME="S_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="16" MSB="4" NAME="S_AXI_AWVALID" RIGHT="0" SIGNAME="axi4_0_S_AWVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="17" MSB="4" NAME="S_AXI_AWREADY" RIGHT="0" SIGNAME="axi4_0_S_AWREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="18" MSB="159" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="19" MSB="19" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WLAST" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="20" MSB="4" NAME="S_AXI_WLAST" RIGHT="0" SIGNAME="axi4_0_S_WLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WUSER" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="21" MSB="4" NAME="S_AXI_WUSER" RIGHT="0" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="22" MSB="4" NAME="S_AXI_WVALID" RIGHT="0" SIGNAME="axi4_0_S_WVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="23" MSB="4" NAME="S_AXI_WREADY" RIGHT="0" SIGNAME="axi4_0_S_WREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BID" DIR="O" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="24" MSB="14" NAME="S_AXI_BID" RIGHT="0" SIGNAME="axi4_0_S_BID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="25" MSB="9" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="26" MSB="4" NAME="S_AXI_BUSER" RIGHT="0" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BVALID" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="27" MSB="4" NAME="S_AXI_BVALID" RIGHT="0" SIGNAME="axi4_0_S_BVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BREADY" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="28" MSB="4" NAME="S_AXI_BREADY" RIGHT="0" SIGNAME="axi4_0_S_BREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARID" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="29" MSB="14" NAME="S_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_S_ARID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="30" MSB="159" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARLEN" DIR="I" ENDIAN="LITTLE" LEFT="39" LSB="0" MPD_INDEX="31" MSB="39" NAME="S_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="32" MSB="14" NAME="S_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARBURST" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="33" MSB="9" NAME="S_AXI_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="34" MSB="9" NAME="S_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4_0_S_ARLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="35" MSB="19" NAME="S_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARPROT" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="36" MSB="14" NAME="S_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARQOS" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="37" MSB="19" NAME="S_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARUSER" DIR="I" ENDIAN="LITTLE" LEFT="24" LSB="0" MPD_INDEX="38" MSB="24" NAME="S_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="39" MSB="4" NAME="S_AXI_ARVALID" RIGHT="0" SIGNAME="axi4_0_S_ARVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="40" MSB="4" NAME="S_AXI_ARREADY" RIGHT="0" SIGNAME="axi4_0_S_ARREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RID" DIR="O" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="41" MSB="14" NAME="S_AXI_RID" RIGHT="0" SIGNAME="axi4_0_S_RID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="42" MSB="159" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="43" MSB="9" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RLAST" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="44" MSB="4" NAME="S_AXI_RLAST" RIGHT="0" SIGNAME="axi4_0_S_RLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="45" MSB="4" NAME="S_AXI_RUSER" RIGHT="0" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RVALID" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="46" MSB="4" NAME="S_AXI_RVALID" RIGHT="0" SIGNAME="axi4_0_S_RVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RREADY" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="47" MSB="4" NAME="S_AXI_RREADY" RIGHT="0" SIGNAME="axi4_0_S_RREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="clk_100_0000MHzPLL0" DIR="I" MPD_INDEX="48" NAME="M_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="49" MSB="2" NAME="M_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_M_AWID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="50" MSB="31" NAME="M_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_M_AWADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="51" MSB="7" NAME="M_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_M_AWLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="52" MSB="2" NAME="M_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_M_AWSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="53" MSB="1" NAME="M_AXI_AWBURST" RIGHT="0" SIGNAME="axi4_0_M_AWBURST" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWLOCK" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="54" MSB="1" NAME="M_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4_0_M_AWLOCK" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="55" MSB="3" NAME="M_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4_0_M_AWCACHE" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="56" MSB="2" NAME="M_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_M_AWPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWREGION" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="57" MSB="3" NAME="M_AXI_AWREGION" RIGHT="0" SIGNAME="axi4_0_M_AWREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="58" MSB="3" NAME="M_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_M_AWQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="59" MSB="4" NAME="M_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_M_AWUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWVALID" DIR="O" MPD_INDEX="60" NAME="M_AXI_AWVALID" SIGNAME="axi4_0_M_AWVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWREADY" DIR="I" MPD_INDEX="61" NAME="M_AXI_AWREADY" SIGNAME="axi4_0_M_AWREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="62" MSB="2" NAME="M_AXI_WID" RIGHT="0" SIGNAME="axi4_0_M_WID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="63" MSB="31" NAME="M_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_M_WDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="64" MSB="3" NAME="M_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_M_WSTRB" VECFORMULA="[(((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WLAST" DIR="O" MPD_INDEX="65" NAME="M_AXI_WLAST" SIGNAME="axi4_0_M_WLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WUSER" DIR="O" MPD_INDEX="66" NAME="M_AXI_WUSER" SIGNAME="axi4_0_M_WUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WVALID" DIR="O" MPD_INDEX="67" NAME="M_AXI_WVALID" SIGNAME="axi4_0_M_WVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WREADY" DIR="I" MPD_INDEX="68" NAME="M_AXI_WREADY" SIGNAME="axi4_0_M_WREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="69" MSB="2" NAME="M_AXI_BID" RIGHT="0" SIGNAME="axi4_0_M_BID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="70" MSB="1" NAME="M_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_M_BRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BUSER" DIR="I" MPD_INDEX="71" NAME="M_AXI_BUSER" SIGNAME="axi4_0_M_BUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BVALID" DIR="I" MPD_INDEX="72" NAME="M_AXI_BVALID" SIGNAME="axi4_0_M_BVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BREADY" DIR="O" MPD_INDEX="73" NAME="M_AXI_BREADY" SIGNAME="axi4_0_M_BREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="74" MSB="2" NAME="M_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_M_ARID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="75" MSB="31" NAME="M_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_M_ARADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="76" MSB="7" NAME="M_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_M_ARLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="77" MSB="2" NAME="M_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_M_ARSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="78" MSB="1" NAME="M_AXI_ARBURST" RIGHT="0" SIGNAME="axi4_0_M_ARBURST" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARLOCK" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="79" MSB="1" NAME="M_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4_0_M_ARLOCK" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="80" MSB="3" NAME="M_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4_0_M_ARCACHE" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="81" MSB="2" NAME="M_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_M_ARPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARREGION" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="82" MSB="3" NAME="M_AXI_ARREGION" RIGHT="0" SIGNAME="axi4_0_M_ARREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="83" MSB="3" NAME="M_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_M_ARQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="84" MSB="4" NAME="M_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_M_ARUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARVALID" DIR="O" MPD_INDEX="85" NAME="M_AXI_ARVALID" SIGNAME="axi4_0_M_ARVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARREADY" DIR="I" MPD_INDEX="86" NAME="M_AXI_ARREADY" SIGNAME="axi4_0_M_ARREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="87" MSB="2" NAME="M_AXI_RID" RIGHT="0" SIGNAME="axi4_0_M_RID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="88" MSB="31" NAME="M_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_M_RDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="89" MSB="1" NAME="M_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_M_RRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RLAST" DIR="I" MPD_INDEX="90" NAME="M_AXI_RLAST" SIGNAME="axi4_0_M_RLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RUSER" DIR="I" MPD_INDEX="91" NAME="M_AXI_RUSER" SIGNAME="axi4_0_M_RUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RVALID" DIR="I" MPD_INDEX="92" NAME="M_AXI_RVALID" SIGNAME="axi4_0_M_RVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RREADY" DIR="O" MPD_INDEX="93" NAME="M_AXI_RREADY" SIGNAME="axi4_0_M_RREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="94" MSB="31" NAME="S_AXI_CTRL_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="95" NAME="S_AXI_CTRL_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="96" NAME="S_AXI_CTRL_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="97" MSB="31" NAME="S_AXI_CTRL_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="98" NAME="S_AXI_CTRL_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="99" NAME="S_AXI_CTRL_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="100" MSB="1" NAME="S_AXI_CTRL_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1 : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="101" NAME="S_AXI_CTRL_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="102" NAME="S_AXI_CTRL_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="103" MSB="31" NAME="S_AXI_CTRL_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="104" NAME="S_AXI_CTRL_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="105" NAME="S_AXI_CTRL_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="106" MSB="31" NAME="S_AXI_CTRL_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="107" MSB="1" NAME="S_AXI_CTRL_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1 : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="108" NAME="S_AXI_CTRL_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="109" NAME="S_AXI_CTRL_RREADY" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="0" NAME="S_AXI_CTRL" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="interconnect_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE BUSSTD="AXI" BUSSTD_PSF="AXI" HWVERSION="1.02.a" INSTANCE="axi4lite_0" IPTYPE="BUS" MHS_INDEX="1" MODCLASS="BUS" MODTYPE="axi_interconnect">
- <DESCRIPTION TYPE="SHORT">AXI Interconnect</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">AXI4 Memory-Mapped Interconnect</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_interconnect_v1_02_a/doc/ds768_axi_interconnect.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_BASEFAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Base Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="2" NAME="C_NUM_SLAVE_SLOTS" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Number of Slave Slots </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_NUM_MASTER_SLOTS" TYPE="INTEGER" VALUE="8">
- <DESCRIPTION>Number of Master Slots </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>AXI ID Widgth </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="5" NAME="C_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Address Widgth </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_AXI_DATA_MAX_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Data Maximum Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="7" NAME="C_S_AXI_DATA_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020">
- <DESCRIPTION>Slave AXI Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_M_AXI_DATA_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020">
- <DESCRIPTION>Master AXI Data Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="9" NAME="C_INTERCONNECT_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>Interconnect Crossbar Data Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="10" NAME="C_S_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000002">
- <DESCRIPTION>AXI Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_M_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000200000002000000020000000200000002000000020000000200000002">
- <DESCRIPTION>Master AXI Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_M_AXI_BASE_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041c00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041200000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041e00000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000041240000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040000000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040020000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000040600000ffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000074800000">
- <DESCRIPTION>Master AXI Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041c0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004120ffff0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000041e0ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004127ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004000ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004002ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000004060ffff000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000007480ffff">
- <DESCRIPTION>Master AXI High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Slave AXI Base ID</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_THREAD_ID_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Slave AXI Thread ID Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="16" NAME="C_S_AXI_IS_INTERCONNECT" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slave AXI Is Interconnect</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_S_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e100">
- <DESCRIPTION>Slave AXI ACLK Ratio</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="18" NAME="C_S_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slvave AXI Is ACLK ASYNC</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="19" NAME="C_M_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000010000000100000001000000010000000100000001000000010000000102faf08002faf08005f5e10002faf08002faf08002faf08002faf08002faf080">
- <DESCRIPTION>Master AXI ACLK Ratio</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="20" NAME="C_M_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Master AXI Is ACLK ASYNC</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="21" NAME="C_INTERCONNECT_ACLK_RATIO" TYPE="INTEGER" VALUE="50000000">
- <DESCRIPTION>Interconnect Crossbar ACLK Frequency Ratio</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="22" NAME="C_S_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Slave AXI Supports Write</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="23" NAME="C_S_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Slave AXI Supports Read</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="24" NAME="C_M_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Supports Write</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="25" NAME="C_M_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Supports Read</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="26" NAME="C_AXI_SUPPORTS_USER_SIGNALS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Propagate USER Signals</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="27" NAME="C_AXI_AWUSER_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>AWUSER Signal Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="28" NAME="C_AXI_ARUSER_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>ARUSER Signal Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="29" NAME="C_AXI_WUSER_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>WUSER Signal Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="30" NAME="C_AXI_RUSER_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>RUSER Signal Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="31" NAME="C_AXI_BUSER_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>BUSER Signal Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="32" NAME="C_AXI_CONNECTIVITY" TYPE="STD_LOGIC_VECTOR" VALUE="0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff">
- <DESCRIPTION>AXI Connectivity</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="33" NAME="C_S_AXI_SINGLE_THREAD" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slave AXI Single Thread</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="34" NAME="C_M_AXI_SUPPORTS_REORDERING" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Supports Reordering</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="35" NAME="C_S_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111110">
- <DESCRIPTION>Master generates narrow bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="36" NAME="C_M_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Slave accepts narrow bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="37" NAME="C_S_AXI_WRITE_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001">
- <DESCRIPTION>Slave AXI Write Acceptance</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="38" NAME="C_S_AXI_READ_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001">
- <DESCRIPTION>Slave AXI Read Acceptance</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="39" NAME="C_M_AXI_WRITE_ISSUING" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001">
- <DESCRIPTION>Master AXI Write Issuing</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="40" NAME="C_M_AXI_READ_ISSUING" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001">
- <DESCRIPTION>Master AXI Read Issuing</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="41" NAME="C_S_AXI_ARB_PRIORITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Slave AXI ARB Priority</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="42" NAME="C_M_AXI_SECURE" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Master AXI Secure</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="43" NAME="C_S_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Master AXI Write FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="44" NAME="C_S_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Slave AXI Write FIFO Type</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="45" NAME="C_S_AXI_WRITE_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slave AXI Write FIFO Delay</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="46" NAME="C_S_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Slave AXI Read FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="47" NAME="C_S_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Slave AXI Read FIFO Type</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="48" NAME="C_S_AXI_READ_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Slave AXI Read FIFO Delay</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="49" NAME="C_M_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Master AXI Write FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="50" NAME="C_M_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Write FIFO Type</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="51" NAME="C_M_AXI_WRITE_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Master AXI Write FIFO Delay</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="52" NAME="C_M_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000">
- <DESCRIPTION>Master AXI Read FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="53" NAME="C_M_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111">
- <DESCRIPTION>Master AXI Read FIFO Type</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="54" NAME="C_M_AXI_READ_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000">
- <DESCRIPTION>Master AXI Read FIFO Delay</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="55" NAME="C_S_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Slave AXI AW Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="56" NAME="C_S_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Slave AXI AR Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="57" NAME="C_S_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Slave AXI W Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="58" NAME="C_S_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Slave AXI R Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="59" NAME="C_S_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001">
- <DESCRIPTION>Slave AXI B Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="60" NAME="C_M_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000001000000010000000100000001000000010000000100000001">
- <DESCRIPTION>Master AXI AW Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="61" NAME="C_M_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000001000000010000000100000001000000010000000100000001">
- <DESCRIPTION>Master AXI AR Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="62" NAME="C_M_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000001000000010000000100000001000000010000000100000001">
- <DESCRIPTION>Master AXI W Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="63" NAME="C_M_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000001000000010000000100000001000000010000000100000001">
- <DESCRIPTION>Master AXI R Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="64" NAME="C_M_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000001000000010000000100000001000000010000000100000001">
- <DESCRIPTION>Master AXI B Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="65" NAME="C_INTERCONNECT_R_REGISTER" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>C_INTERCONNECT_R_REGISTER</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="66" NAME="C_INTERCONNECT_CONNECTIVITY_MODE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Interconnect Architecture</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="67" NAME="C_USE_CTRL_PORT" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Use Diagnostic Slave Port</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="68" NAME="C_USE_INTERRUPT" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Generate Interrupts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="69" NAME="C_RANGE_CHECK" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Check for transaction errors (DECERR)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="70" NAME="C_S_AXI_CTRL_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>Slave AXI CTRL Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="71" NAME="C_S_AXI_CTRL_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>Slave AXI CTRL Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="72" NAME="C_S_AXI_CTRL_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>Slave AXI CTRL Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="73" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF">
- <DESCRIPTION>Diagnostic Slave Port Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="74" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000">
- <DESCRIPTION>Diagnostic Slave Port High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="75" NAME="C_DEBUG" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Simulation debug</DESCRIPTION>
- </PARAMETER>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="INTERCONNECT_ARESETN" SIGIS="RST" SIGNAME="proc_sys_reset_0_Interconnect_aresetn"/>
- <PORT BUS="S_AXI_CTRL" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="INTERCONNECT_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARESETN" DIR="O" MPD_INDEX="2" NAME="S_AXI_ARESET_OUT_N" SIGIS="RST" SIGNAME="axi4lite_0_S_ARESETN" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="3" MSB="7" NAME="M_AXI_ARESET_OUT_N" RIGHT="0" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="4" NAME="IRQ" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DEF_SIGNAME="clk_100_0000MHzPLL0" DIR="I" MPD_INDEX="5" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWID" DIR="I" MPD_INDEX="6" NAME="S_AXI_AWID" SIGNAME="axi4lite_0_S_AWID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="7" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_S_AWADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWLEN" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="8" MSB="7" NAME="S_AXI_AWLEN" RIGHT="0" SIGNAME="axi4lite_0_S_AWLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWSIZE" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="9" MSB="2" NAME="S_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4lite_0_S_AWSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWBURST" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="10" MSB="1" NAME="S_AXI_AWBURST" RIGHT="0" SIGNAME="axi4lite_0_S_AWBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWLOCK" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="11" MSB="1" NAME="S_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4lite_0_S_AWLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWCACHE" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="12" MSB="3" NAME="S_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4lite_0_S_AWCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWPROT" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="13" MSB="2" NAME="S_AXI_AWPROT" RIGHT="0" SIGNAME="axi4lite_0_S_AWPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWQOS" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="14" MSB="3" NAME="S_AXI_AWQOS" RIGHT="0" SIGNAME="axi4lite_0_S_AWQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWUSER" DIR="I" MPD_INDEX="15" NAME="S_AXI_AWUSER" SIGNAME="axi4lite_0_S_AWUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWVALID" DIR="I" MPD_INDEX="16" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_S_AWVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWREADY" DIR="O" MPD_INDEX="17" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_S_AWREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="18" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_S_WDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="19" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_S_WSTRB" VECFORMULA="[(((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WLAST" DIR="I" MPD_INDEX="20" NAME="S_AXI_WLAST" SIGNAME="axi4lite_0_S_WLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WUSER" DIR="I" MPD_INDEX="21" NAME="S_AXI_WUSER" SIGNAME="axi4lite_0_S_WUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WVALID" DIR="I" MPD_INDEX="22" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_S_WVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WREADY" DIR="O" MPD_INDEX="23" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_S_WREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BID" DIR="O" MPD_INDEX="24" NAME="S_AXI_BID" SIGNAME="axi4lite_0_S_BID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="25" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_S_BRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BUSER" DIR="O" MPD_INDEX="26" NAME="S_AXI_BUSER" SIGNAME="axi4lite_0_S_BUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BVALID" DIR="O" MPD_INDEX="27" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_S_BVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BREADY" DIR="I" MPD_INDEX="28" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_S_BREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARID" DIR="I" MPD_INDEX="29" NAME="S_AXI_ARID" SIGNAME="axi4lite_0_S_ARID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="30" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_S_ARADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARLEN" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="31" MSB="7" NAME="S_AXI_ARLEN" RIGHT="0" SIGNAME="axi4lite_0_S_ARLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARSIZE" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="32" MSB="2" NAME="S_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4lite_0_S_ARSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARBURST" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="33" MSB="1" NAME="S_AXI_ARBURST" RIGHT="0" SIGNAME="axi4lite_0_S_ARBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARLOCK" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="34" MSB="1" NAME="S_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4lite_0_S_ARLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARCACHE" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="35" MSB="3" NAME="S_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4lite_0_S_ARCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARPROT" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="36" MSB="2" NAME="S_AXI_ARPROT" RIGHT="0" SIGNAME="axi4lite_0_S_ARPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARQOS" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="37" MSB="3" NAME="S_AXI_ARQOS" RIGHT="0" SIGNAME="axi4lite_0_S_ARQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARUSER" DIR="I" MPD_INDEX="38" NAME="S_AXI_ARUSER" SIGNAME="axi4lite_0_S_ARUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARVALID" DIR="I" MPD_INDEX="39" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_S_ARVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARREADY" DIR="O" MPD_INDEX="40" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_S_ARREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RID" DIR="O" MPD_INDEX="41" NAME="S_AXI_RID" SIGNAME="axi4lite_0_S_RID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="42" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_S_RDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="43" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_S_RRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RLAST" DIR="O" MPD_INDEX="44" NAME="S_AXI_RLAST" SIGNAME="axi4lite_0_S_RLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RUSER" DIR="O" MPD_INDEX="45" NAME="S_AXI_RUSER" SIGNAME="axi4lite_0_S_RUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RVALID" DIR="O" MPD_INDEX="46" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_S_RVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RREADY" DIR="I" MPD_INDEX="47" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_S_RREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="clk_50_0000MHzPLL0&clk_50_0000MHzPLL0&clk_100_0000MHzPLL0&clk_50_0000MHzPLL0&clk_50_0000MHzPLL0&clk_50_0000MHzPLL0&clk_50_0000MHzPLL0&clk_50_0000MHzPLL0" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="48" MSB="7" NAME="M_AXI_ACLK" RIGHT="0" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0&clk_50_0000MHzPLL0&clk_100_0000MHzPLL0&clk_50_0000MHzPLL0&clk_50_0000MHzPLL0&clk_50_0000MHzPLL0&clk_50_0000MHzPLL0&clk_50_0000MHzPLL0" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]">
- <SIGNALS>
- <SIGNAL NAME="clk_50_0000MHzPLL0"/>
- <SIGNAL NAME="clk_50_0000MHzPLL0"/>
- <SIGNAL NAME="clk_100_0000MHzPLL0"/>
- <SIGNAL NAME="clk_50_0000MHzPLL0"/>
- <SIGNAL NAME="clk_50_0000MHzPLL0"/>
- <SIGNAL NAME="clk_50_0000MHzPLL0"/>
- <SIGNAL NAME="clk_50_0000MHzPLL0"/>
- <SIGNAL NAME="clk_50_0000MHzPLL0"/>
- </SIGNALS>
- </PORT>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="49" MSB="7" NAME="M_AXI_AWID" RIGHT="0" SIGNAME="axi4lite_0_M_AWID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="255" LSB="0" MPD_INDEX="50" MSB="255" NAME="M_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="63" LSB="0" MPD_INDEX="51" MSB="63" NAME="M_AXI_AWLEN" RIGHT="0" SIGNAME="axi4lite_0_M_AWLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="52" MSB="23" NAME="M_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4lite_0_M_AWSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="53" MSB="15" NAME="M_AXI_AWBURST" RIGHT="0" SIGNAME="axi4lite_0_M_AWBURST" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWLOCK" DIR="O" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="54" MSB="15" NAME="M_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4lite_0_M_AWLOCK" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="55" MSB="31" NAME="M_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4lite_0_M_AWCACHE" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="56" MSB="23" NAME="M_AXI_AWPROT" RIGHT="0" SIGNAME="axi4lite_0_M_AWPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWREGION" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="57" MSB="31" NAME="M_AXI_AWREGION" RIGHT="0" SIGNAME="axi4lite_0_M_AWREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="58" MSB="31" NAME="M_AXI_AWQOS" RIGHT="0" SIGNAME="axi4lite_0_M_AWQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="59" MSB="7" NAME="M_AXI_AWUSER" RIGHT="0" SIGNAME="axi4lite_0_M_AWUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="60" MSB="7" NAME="M_AXI_AWVALID" RIGHT="0" SIGNAME="axi4lite_0_M_AWVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="61" MSB="7" NAME="M_AXI_AWREADY" RIGHT="0" SIGNAME="axi4lite_0_M_AWREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="62" MSB="7" NAME="M_AXI_WID" RIGHT="0" SIGNAME="axi4lite_0_M_WID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="255" LSB="0" MPD_INDEX="63" MSB="255" NAME="M_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="64" MSB="31" NAME="M_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[(((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WLAST" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="65" MSB="7" NAME="M_AXI_WLAST" RIGHT="0" SIGNAME="axi4lite_0_M_WLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WUSER" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="66" MSB="7" NAME="M_AXI_WUSER" RIGHT="0" SIGNAME="axi4lite_0_M_WUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="67" MSB="7" NAME="M_AXI_WVALID" RIGHT="0" SIGNAME="axi4lite_0_M_WVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="68" MSB="7" NAME="M_AXI_WREADY" RIGHT="0" SIGNAME="axi4lite_0_M_WREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BID" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="69" MSB="7" NAME="M_AXI_BID" RIGHT="0" SIGNAME="axi4lite_0_M_BID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="70" MSB="15" NAME="M_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BUSER" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="71" MSB="7" NAME="M_AXI_BUSER" RIGHT="0" SIGNAME="axi4lite_0_M_BUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="72" MSB="7" NAME="M_AXI_BVALID" RIGHT="0" SIGNAME="axi4lite_0_M_BVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="73" MSB="7" NAME="M_AXI_BREADY" RIGHT="0" SIGNAME="axi4lite_0_M_BREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="74" MSB="7" NAME="M_AXI_ARID" RIGHT="0" SIGNAME="axi4lite_0_M_ARID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="255" LSB="0" MPD_INDEX="75" MSB="255" NAME="M_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="63" LSB="0" MPD_INDEX="76" MSB="63" NAME="M_AXI_ARLEN" RIGHT="0" SIGNAME="axi4lite_0_M_ARLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="77" MSB="23" NAME="M_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4lite_0_M_ARSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="78" MSB="15" NAME="M_AXI_ARBURST" RIGHT="0" SIGNAME="axi4lite_0_M_ARBURST" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARLOCK" DIR="O" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="79" MSB="15" NAME="M_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4lite_0_M_ARLOCK" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="80" MSB="31" NAME="M_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4lite_0_M_ARCACHE" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="81" MSB="23" NAME="M_AXI_ARPROT" RIGHT="0" SIGNAME="axi4lite_0_M_ARPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARREGION" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="82" MSB="31" NAME="M_AXI_ARREGION" RIGHT="0" SIGNAME="axi4lite_0_M_ARREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="83" MSB="31" NAME="M_AXI_ARQOS" RIGHT="0" SIGNAME="axi4lite_0_M_ARQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="84" MSB="7" NAME="M_AXI_ARUSER" RIGHT="0" SIGNAME="axi4lite_0_M_ARUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="85" MSB="7" NAME="M_AXI_ARVALID" RIGHT="0" SIGNAME="axi4lite_0_M_ARVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="86" MSB="7" NAME="M_AXI_ARREADY" RIGHT="0" SIGNAME="axi4lite_0_M_ARREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RID" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="87" MSB="7" NAME="M_AXI_RID" RIGHT="0" SIGNAME="axi4lite_0_M_RID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="255" LSB="0" MPD_INDEX="88" MSB="255" NAME="M_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="89" MSB="15" NAME="M_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RLAST" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="90" MSB="7" NAME="M_AXI_RLAST" RIGHT="0" SIGNAME="axi4lite_0_M_RLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RUSER" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="91" MSB="7" NAME="M_AXI_RUSER" RIGHT="0" SIGNAME="axi4lite_0_M_RUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="92" MSB="7" NAME="M_AXI_RVALID" RIGHT="0" SIGNAME="axi4lite_0_M_RVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="93" MSB="7" NAME="M_AXI_RREADY" RIGHT="0" SIGNAME="axi4lite_0_M_RREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="94" MSB="31" NAME="S_AXI_CTRL_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="95" NAME="S_AXI_CTRL_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="96" NAME="S_AXI_CTRL_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="97" MSB="31" NAME="S_AXI_CTRL_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="98" NAME="S_AXI_CTRL_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="99" NAME="S_AXI_CTRL_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="100" MSB="1" NAME="S_AXI_CTRL_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1 : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="101" NAME="S_AXI_CTRL_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="102" NAME="S_AXI_CTRL_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="103" MSB="31" NAME="S_AXI_CTRL_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="104" NAME="S_AXI_CTRL_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="105" NAME="S_AXI_CTRL_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="106" MSB="31" NAME="S_AXI_CTRL_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="107" MSB="1" NAME="S_AXI_CTRL_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1 : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="108" NAME="S_AXI_CTRL_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="109" NAME="S_AXI_CTRL_RREADY" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="0" NAME="S_AXI_CTRL" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="INTERCONNECT_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="8.10.a" INSTANCE="microblaze_0" IPTYPE="PROCESSOR" MHS_INDEX="2" MODCLASS="PROCESSOR" MODTYPE="microblaze" PROCTYPE="MICROBLAZE">
- <DESCRIPTION TYPE="SHORT">MicroBlaze</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">The MicroBlaze 32 bit soft processor</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/microblaze_v8_10_a/doc/microblaze.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_SCO" TYPE="integer" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_FREQ" TYPE="integer" VALUE="100000000"/>
- <PARAMETER MPD_INDEX="2" NAME="C_DATA_SIZE" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="3" NAME="C_DYNAMIC_BUS_SIZING" TYPE="integer" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="5" NAME="C_INSTANCE" TYPE="string" VALUE="microblaze_0"/>
- <PARAMETER MPD_INDEX="6" NAME="C_FAULT_TOLERANT" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Fault Tolerance Support</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="7" NAME="C_ECC_USE_CE_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="8" NAME="C_ENDIANNESS" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="9" NAME="C_AREA_OPTIMIZED" TYPE="integer" VALUE="0">
- <DESCRIPTION>Select implementation to optimize area (with lower instruction throughput)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_OPTIMIZATION" TYPE="integer" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="11" NAME="C_INTERCONNECT" TYPE="integer" VALUE="2">
- <DESCRIPTION>Select Bus Interfaces</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="12" NAME="C_STREAM_INTERCONNECT" TYPE="integer" VALUE="0">
- <DESCRIPTION>Select Stream Interfaces</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="13" NAME="C_DPLB_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="14" NAME="C_DPLB_NATIVE_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="15" NAME="C_DPLB_BURST_EN" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="16" NAME="C_DPLB_P2P" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="17" NAME="C_IPLB_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="18" NAME="C_IPLB_NATIVE_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="19" NAME="C_IPLB_BURST_EN" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="20" NAME="C_IPLB_P2P" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="21" NAME="C_M_AXI_DP_SUPPORTS_THREADS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="22" NAME="C_M_AXI_DP_THREAD_ID_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="23" NAME="C_M_AXI_DP_SUPPORTS_READ" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="24" NAME="C_M_AXI_DP_SUPPORTS_WRITE" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="25" NAME="C_M_AXI_DP_SUPPORTS_NARROW_BURST" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="26" NAME="C_M_AXI_DP_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="27" NAME="C_M_AXI_DP_ADDR_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="28" NAME="C_M_AXI_DP_PROTOCOL" TYPE="string" VALUE="AXI4LITE"/>
- <PARAMETER MPD_INDEX="29" NAME="C_M_AXI_DP_EXCLUSIVE_ACCESS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="30" NAME="C_INTERCONNECT_M_AXI_DP_READ_ISSUING" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="31" NAME="C_INTERCONNECT_M_AXI_DP_WRITE_ISSUING" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="32" NAME="C_M_AXI_IP_SUPPORTS_THREADS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="33" NAME="C_M_AXI_IP_THREAD_ID_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="34" NAME="C_M_AXI_IP_SUPPORTS_READ" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="35" NAME="C_M_AXI_IP_SUPPORTS_WRITE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="36" NAME="C_M_AXI_IP_SUPPORTS_NARROW_BURST" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="37" NAME="C_M_AXI_IP_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="38" NAME="C_M_AXI_IP_ADDR_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="39" NAME="C_M_AXI_IP_PROTOCOL" TYPE="string" VALUE="AXI4LITE"/>
- <PARAMETER MPD_INDEX="40" NAME="C_INTERCONNECT_M_AXI_IP_READ_ISSUING" TYPE="integer" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="41" NAME="C_D_AXI" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="42" NAME="C_D_PLB" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="43" NAME="C_D_LMB" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="44" NAME="C_I_AXI" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="45" NAME="C_I_PLB" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="46" NAME="C_I_LMB" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="47" NAME="C_USE_MSR_INSTR" TYPE="integer" VALUE="1">
- <DESCRIPTION>Enable Additional Machine Status Register Instructions</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="48" NAME="C_USE_PCMP_INSTR" TYPE="integer" VALUE="1">
- <DESCRIPTION>Enable Pattern Comparator</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="49" NAME="C_USE_BARREL" TYPE="integer" VALUE="1">
- <DESCRIPTION>Enable Barrel Shifter</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="50" NAME="C_USE_DIV" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Integer Divider</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="51" NAME="C_USE_HW_MUL" TYPE="integer" VALUE="1">
- <DESCRIPTION>Enable Integer Multiplier</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="52" NAME="C_USE_FPU" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Floating Point Unit</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="53" NAME="C_UNALIGNED_EXCEPTIONS" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Unaligned Data Exception</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="54" NAME="C_ILL_OPCODE_EXCEPTION" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Illegal Instruction Exception</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="55" NAME="C_M_AXI_I_BUS_EXCEPTION" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Instruction-side AXI Exception</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="56" NAME="C_M_AXI_D_BUS_EXCEPTION" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Data-side AXI Exception</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="57" NAME="C_IPLB_BUS_EXCEPTION" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Instruction-side PLB Exception</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="58" NAME="C_DPLB_BUS_EXCEPTION" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Data-side PLB Exception</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="59" NAME="C_DIV_ZERO_EXCEPTION" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Integer Divide Exception</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="60" NAME="C_FPU_EXCEPTION" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Floating Point Unit Exceptions</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="61" NAME="C_FSL_EXCEPTION" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Stream Exception</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="62" NAME="C_USE_STACK_PROTECTION" TYPE="integer" VALUE="0">
- <DESCRIPTION><qt>Enable stack protection</qt></DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="63" NAME="C_PVR" TYPE="integer" VALUE="0">
- <DESCRIPTION>Specifies Processor Version Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ENDIAN="BIG" LSB="7" MPD_INDEX="64" MSB="0" NAME="C_PVR_USER1" TYPE="std_logic_vector" VALUE="0x00">
- <DESCRIPTION>Specify USER1 Bits in Processor Version Register</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ENDIAN="BIG" LSB="31" MPD_INDEX="65" MSB="0" NAME="C_PVR_USER2" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>Specify USER2 Bits in Processor Version Registers</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="66" NAME="C_DEBUG_ENABLED" TYPE="integer" VALUE="1">
- <DESCRIPTION>Enable MicroBlaze Debug Module Interface</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="29" MPD_INDEX="67" NAME="C_NUMBER_OF_PC_BRK" TYPE="integer" VALUE="7">
- <DESCRIPTION>Number of PC Breakpoints </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="31" MPD_INDEX="68" NAME="C_NUMBER_OF_RD_ADDR_BRK" TYPE="integer" VALUE="2">
- <DESCRIPTION>Number of Read Address Watchpoints </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="30" MPD_INDEX="69" NAME="C_NUMBER_OF_WR_ADDR_BRK" TYPE="integer" VALUE="2">
- <DESCRIPTION>Number of Write Address Watchpoints </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="70" NAME="C_INTERRUPT_IS_EDGE" TYPE="integer" VALUE="0">
- <DESCRIPTION>Sense Interrupt on Edge vs. Level </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="71" NAME="C_EDGE_IS_POSITIVE" TYPE="integer" VALUE="1">
- <DESCRIPTION>Sense Interrupt on Rising vs. Falling Edge </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="72" NAME="C_RESET_MSR" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>Specify Reset Value for Select MSR Bits</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="73" NAME="C_OPCODE_0x0_ILLEGAL" TYPE="integer" VALUE="0">
- <DESCRIPTION><qt>Generate Illegal Instruction Exception for NULL Instruction</qt></DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="74" NAME="C_FSL_LINKS" TYPE="integer" VALUE="0">
- <DESCRIPTION>Number of Stream Links </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="75" NAME="C_FSL_DATA_SIZE" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="76" NAME="C_USE_EXTENDED_FSL_INSTR" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Additional Stream Instructions</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="77" NAME="C_M0_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="78" NAME="C_S0_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="79" NAME="C_M1_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="80" NAME="C_S1_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="81" NAME="C_M2_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="82" NAME="C_S2_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="83" NAME="C_M3_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="84" NAME="C_S3_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="85" NAME="C_M4_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="86" NAME="C_S4_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="87" NAME="C_M5_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="88" NAME="C_S5_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="89" NAME="C_M6_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="90" NAME="C_S6_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="91" NAME="C_M7_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="92" NAME="C_S7_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="93" NAME="C_M8_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="94" NAME="C_S8_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="95" NAME="C_M9_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="96" NAME="C_S9_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="97" NAME="C_M10_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="98" NAME="C_S10_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="99" NAME="C_M11_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="100" NAME="C_S11_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="101" NAME="C_M12_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="102" NAME="C_S12_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="103" NAME="C_M13_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="104" NAME="C_S13_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="105" NAME="C_M14_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="106" NAME="C_S14_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="107" NAME="C_M15_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="108" NAME="C_S15_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="109" NAME="C_M0_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="110" NAME="C_S0_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="111" NAME="C_M1_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="112" NAME="C_S1_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="113" NAME="C_M2_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="114" NAME="C_S2_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="115" NAME="C_M3_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="116" NAME="C_S3_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="117" NAME="C_M4_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="118" NAME="C_S4_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="119" NAME="C_M5_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="120" NAME="C_S5_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="121" NAME="C_M6_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="122" NAME="C_S6_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="123" NAME="C_M7_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="124" NAME="C_S7_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="125" NAME="C_M8_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="126" NAME="C_S8_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="127" NAME="C_M9_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="128" NAME="C_S9_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="129" NAME="C_M10_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="130" NAME="C_S10_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="131" NAME="C_M11_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="132" NAME="C_S11_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="133" NAME="C_M12_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="134" NAME="C_S12_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="135" NAME="C_M13_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="136" NAME="C_S13_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="137" NAME="C_M14_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="138" NAME="C_S14_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="139" NAME="C_M15_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="140" NAME="C_S15_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="141" NAME="C_ICACHE_BASEADDR" TYPE="std_logic_vector" VALUE="0xc0000000">
- <DESCRIPTION>I-Cache Base Address </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="142" NAME="C_ICACHE_HIGHADDR" TYPE="std_logic_vector" VALUE="0xc7ffffff">
- <DESCRIPTION>I-Cache High Address </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="143" NAME="C_USE_ICACHE" TYPE="integer" VALUE="1">
- <DESCRIPTION>Enable Instruction Cache </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="144" NAME="C_ALLOW_ICACHE_WR" TYPE="integer" VALUE="1">
- <DESCRIPTION>Enable I-Cache Writes</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="145" NAME="C_ADDR_TAG_BITS" TYPE="integer" VALUE="13"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="32" MPD_INDEX="146" NAME="C_CACHE_BYTE_SIZE" TYPE="integer" VALUE="16384">
- <DESCRIPTION>Size of the I-Cache in Bytes</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="147" NAME="C_ICACHE_USE_FSL" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="148" NAME="C_ICACHE_LINE_LEN" TYPE="integer" VALUE="4">
- <DESCRIPTION>Instruction Cache Line Length</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="149" NAME="C_ICACHE_ALWAYS_USED" TYPE="integer" VALUE="1">
- <DESCRIPTION>Use Cache Links for All I-Cache Memory Accesses </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="150" NAME="C_ICACHE_INTERFACE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="151" NAME="C_ICACHE_VICTIMS" TYPE="integer" VALUE="0">
- <DESCRIPTION>Number of I-Cache Victims</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="152" NAME="C_ICACHE_STREAMS" TYPE="integer" VALUE="0">
- <DESCRIPTION>Number of I-Cache Streams</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="153" NAME="C_ICACHE_FORCE_TAG_LUTRAM" TYPE="integer" VALUE="0">
- <DESCRIPTION>Use Distributed RAM for I-Cache Tags</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="154" NAME="C_ICACHE_DATA_WIDTH" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="155" NAME="C_M_AXI_IC_SUPPORTS_THREADS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="156" NAME="C_M_AXI_IC_THREAD_ID_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="157" NAME="C_M_AXI_IC_SUPPORTS_READ" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="158" NAME="C_M_AXI_IC_SUPPORTS_WRITE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="159" NAME="C_M_AXI_IC_SUPPORTS_NARROW_BURST" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="160" NAME="C_M_AXI_IC_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="161" NAME="C_M_AXI_IC_ADDR_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="162" NAME="C_M_AXI_IC_PROTOCOL" TYPE="string" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="163" NAME="C_M_AXI_IC_USER_VALUE" TYPE="integer" VALUE="0b11111"/>
- <PARAMETER MPD_INDEX="164" NAME="C_M_AXI_IC_SUPPORTS_USER_SIGNALS" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="165" NAME="C_M_AXI_IC_AWUSER_WIDTH" TYPE="integer" VALUE="5"/>
- <PARAMETER MPD_INDEX="166" NAME="C_M_AXI_IC_ARUSER_WIDTH" TYPE="integer" VALUE="5"/>
- <PARAMETER MPD_INDEX="167" NAME="C_M_AXI_IC_WUSER_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="168" NAME="C_M_AXI_IC_RUSER_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="169" NAME="C_M_AXI_IC_BUSER_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="170" NAME="C_INTERCONNECT_M_AXI_IC_READ_ISSUING" TYPE="integer" VALUE="2"/>
- <PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="171" NAME="C_DCACHE_BASEADDR" TYPE="std_logic_vector" VALUE="0xc0000000">
- <DESCRIPTION>D-Cache Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="172" NAME="C_DCACHE_HIGHADDR" TYPE="std_logic_vector" VALUE="0xc7ffffff">
- <DESCRIPTION>D-Cache High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="173" NAME="C_USE_DCACHE" TYPE="integer" VALUE="1">
- <DESCRIPTION>Enable Data Cache</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="174" NAME="C_ALLOW_DCACHE_WR" TYPE="integer" VALUE="1">
- <DESCRIPTION>Enable D-Cache Writes</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="175" NAME="C_DCACHE_ADDR_TAG" TYPE="integer" VALUE="13"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="33" MPD_INDEX="176" NAME="C_DCACHE_BYTE_SIZE" TYPE="integer" VALUE="16384">
- <DESCRIPTION>Size of D-Cache in Bytes</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="177" NAME="C_DCACHE_USE_FSL" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="178" NAME="C_DCACHE_LINE_LEN" TYPE="integer" VALUE="4">
- <DESCRIPTION>Data Cache Line Length</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="179" NAME="C_DCACHE_ALWAYS_USED" TYPE="integer" VALUE="1">
- <DESCRIPTION>Use Cache Links for All D-Cache Memory Accesses </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="180" NAME="C_DCACHE_INTERFACE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="181" NAME="C_DCACHE_USE_WRITEBACK" TYPE="integer" VALUE="0">
- <DESCRIPTION>Enable Write-back Storage Policy</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="182" NAME="C_DCACHE_VICTIMS" TYPE="integer" VALUE="0">
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- <PORT BUS="DPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="87" NAME="DPLB_MTimeout" SIGNAME="__NOC__"/>
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- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="89" MSB="31" NAME="M_AXI_IP_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IP_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="90" MSB="7" NAME="M_AXI_IP_AWLEN" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="91" MSB="2" NAME="M_AXI_IP_AWSIZE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="92" MSB="1" NAME="M_AXI_IP_AWBURST" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="93" NAME="M_AXI_IP_AWLOCK" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="94" MSB="3" NAME="M_AXI_IP_AWCACHE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="95" MSB="2" NAME="M_AXI_IP_AWPROT" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="96" MSB="3" NAME="M_AXI_IP_AWQOS" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="97" NAME="M_AXI_IP_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="98" NAME="M_AXI_IP_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="99" MSB="31" NAME="M_AXI_IP_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IP_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="100" MSB="3" NAME="M_AXI_IP_WSTRB" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[((C_M_AXI_IP_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="101" NAME="M_AXI_IP_WLAST" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="102" NAME="M_AXI_IP_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="103" NAME="M_AXI_IP_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="104" NAME="M_AXI_IP_BID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IP_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="105" MSB="1" NAME="M_AXI_IP_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="106" NAME="M_AXI_IP_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="107" NAME="M_AXI_IP_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="108" NAME="M_AXI_IP_ARID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IP_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="109" MSB="31" NAME="M_AXI_IP_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IP_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="110" MSB="7" NAME="M_AXI_IP_ARLEN" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="111" MSB="2" NAME="M_AXI_IP_ARSIZE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="112" MSB="1" NAME="M_AXI_IP_ARBURST" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="113" NAME="M_AXI_IP_ARLOCK" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="114" MSB="3" NAME="M_AXI_IP_ARCACHE" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="115" MSB="2" NAME="M_AXI_IP_ARPROT" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="116" MSB="3" NAME="M_AXI_IP_ARQOS" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="117" NAME="M_AXI_IP_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="118" NAME="M_AXI_IP_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="119" NAME="M_AXI_IP_RID" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IP_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="120" MSB="31" NAME="M_AXI_IP_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_M_AXI_IP_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="121" MSB="1" NAME="M_AXI_IP_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="122" NAME="M_AXI_IP_RLAST" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="123" NAME="M_AXI_IP_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_IP" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="124" NAME="M_AXI_IP_RREADY" SIGNAME="__NOC__"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWID" DIR="O" MPD_INDEX="125" NAME="M_AXI_DP_AWID" SIGNAME="axi4lite_0_S_AWID" VECFORMULA="[(C_M_AXI_DP_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="126" MSB="31" NAME="M_AXI_DP_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_S_AWADDR" VECFORMULA="[(C_M_AXI_DP_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="127" MSB="7" NAME="M_AXI_DP_AWLEN" RIGHT="0" SIGNAME="axi4lite_0_S_AWLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="128" MSB="2" NAME="M_AXI_DP_AWSIZE" RIGHT="0" SIGNAME="axi4lite_0_S_AWSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="129" MSB="1" NAME="M_AXI_DP_AWBURST" RIGHT="0" SIGNAME="axi4lite_0_S_AWBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWLOCK" DIR="O" MPD_INDEX="130" NAME="M_AXI_DP_AWLOCK" SIGNAME="axi4lite_0_S_AWLOCK"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="131" MSB="3" NAME="M_AXI_DP_AWCACHE" RIGHT="0" SIGNAME="axi4lite_0_S_AWCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="132" MSB="2" NAME="M_AXI_DP_AWPROT" RIGHT="0" SIGNAME="axi4lite_0_S_AWPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="133" MSB="3" NAME="M_AXI_DP_AWQOS" RIGHT="0" SIGNAME="axi4lite_0_S_AWQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWVALID" DIR="O" MPD_INDEX="134" NAME="M_AXI_DP_AWVALID" SIGNAME="axi4lite_0_S_AWVALID"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_AWREADY" DIR="I" MPD_INDEX="135" NAME="M_AXI_DP_AWREADY" SIGNAME="axi4lite_0_S_AWREADY"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="136" MSB="31" NAME="M_AXI_DP_WDATA" RIGHT="0" SIGNAME="axi4lite_0_S_WDATA" VECFORMULA="[(C_M_AXI_DP_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="137" MSB="3" NAME="M_AXI_DP_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_S_WSTRB" VECFORMULA="[((C_M_AXI_DP_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_WLAST" DIR="O" MPD_INDEX="138" NAME="M_AXI_DP_WLAST" SIGNAME="axi4lite_0_S_WLAST"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_WVALID" DIR="O" MPD_INDEX="139" NAME="M_AXI_DP_WVALID" SIGNAME="axi4lite_0_S_WVALID"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_WREADY" DIR="I" MPD_INDEX="140" NAME="M_AXI_DP_WREADY" SIGNAME="axi4lite_0_S_WREADY"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_BID" DIR="I" MPD_INDEX="141" NAME="M_AXI_DP_BID" SIGNAME="axi4lite_0_S_BID" VECFORMULA="[(C_M_AXI_DP_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="142" MSB="1" NAME="M_AXI_DP_BRESP" RIGHT="0" SIGNAME="axi4lite_0_S_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_BVALID" DIR="I" MPD_INDEX="143" NAME="M_AXI_DP_BVALID" SIGNAME="axi4lite_0_S_BVALID"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_BREADY" DIR="O" MPD_INDEX="144" NAME="M_AXI_DP_BREADY" SIGNAME="axi4lite_0_S_BREADY"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARID" DIR="O" MPD_INDEX="145" NAME="M_AXI_DP_ARID" SIGNAME="axi4lite_0_S_ARID" VECFORMULA="[(C_M_AXI_DP_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="146" MSB="31" NAME="M_AXI_DP_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_S_ARADDR" VECFORMULA="[(C_M_AXI_DP_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="147" MSB="7" NAME="M_AXI_DP_ARLEN" RIGHT="0" SIGNAME="axi4lite_0_S_ARLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="148" MSB="2" NAME="M_AXI_DP_ARSIZE" RIGHT="0" SIGNAME="axi4lite_0_S_ARSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="149" MSB="1" NAME="M_AXI_DP_ARBURST" RIGHT="0" SIGNAME="axi4lite_0_S_ARBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARLOCK" DIR="O" MPD_INDEX="150" NAME="M_AXI_DP_ARLOCK" SIGNAME="axi4lite_0_S_ARLOCK"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="151" MSB="3" NAME="M_AXI_DP_ARCACHE" RIGHT="0" SIGNAME="axi4lite_0_S_ARCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="152" MSB="2" NAME="M_AXI_DP_ARPROT" RIGHT="0" SIGNAME="axi4lite_0_S_ARPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="153" MSB="3" NAME="M_AXI_DP_ARQOS" RIGHT="0" SIGNAME="axi4lite_0_S_ARQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARVALID" DIR="O" MPD_INDEX="154" NAME="M_AXI_DP_ARVALID" SIGNAME="axi4lite_0_S_ARVALID"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARREADY" DIR="I" MPD_INDEX="155" NAME="M_AXI_DP_ARREADY" SIGNAME="axi4lite_0_S_ARREADY"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RID" DIR="I" MPD_INDEX="156" NAME="M_AXI_DP_RID" SIGNAME="axi4lite_0_S_RID" VECFORMULA="[(C_M_AXI_DP_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="157" MSB="31" NAME="M_AXI_DP_RDATA" RIGHT="0" SIGNAME="axi4lite_0_S_RDATA" VECFORMULA="[(C_M_AXI_DP_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="158" MSB="1" NAME="M_AXI_DP_RRESP" RIGHT="0" SIGNAME="axi4lite_0_S_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RLAST" DIR="I" MPD_INDEX="159" NAME="M_AXI_DP_RLAST" SIGNAME="axi4lite_0_S_RLAST"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RVALID" DIR="I" MPD_INDEX="160" NAME="M_AXI_DP_RVALID" SIGNAME="axi4lite_0_S_RVALID"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RREADY" DIR="O" MPD_INDEX="161" NAME="M_AXI_DP_RREADY" SIGNAME="axi4lite_0_S_RREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWID" DIR="O" MPD_INDEX="162" NAME="M_AXI_IC_AWID" SIGNAME="axi4_0_S_AWID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="163" MSB="31" NAME="M_AXI_IC_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[(C_M_AXI_IC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="164" MSB="7" NAME="M_AXI_IC_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="165" MSB="2" NAME="M_AXI_IC_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="166" MSB="1" NAME="M_AXI_IC_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="O" MPD_INDEX="167" NAME="M_AXI_IC_AWLOCK" SIGNAME="axi4_0_S_AWLOCK"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="168" MSB="3" NAME="M_AXI_IC_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="169" MSB="2" NAME="M_AXI_IC_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="170" MSB="3" NAME="M_AXI_IC_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="171" NAME="M_AXI_IC_AWVALID" SIGNAME="axi4_0_S_AWVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="172" NAME="M_AXI_IC_AWREADY" SIGNAME="axi4_0_S_AWREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="173" MSB="4" NAME="M_AXI_IC_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[(C_M_AXI_IC_AWUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="174" MSB="31" NAME="M_AXI_IC_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="175" MSB="3" NAME="M_AXI_IC_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[((C_M_AXI_IC_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="176" NAME="M_AXI_IC_WLAST" SIGNAME="axi4_0_S_WLAST"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="177" NAME="M_AXI_IC_WVALID" SIGNAME="axi4_0_S_WVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="178" NAME="M_AXI_IC_WREADY" SIGNAME="axi4_0_S_WREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WUSER" DIR="O" MPD_INDEX="179" NAME="M_AXI_IC_WUSER" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[(C_M_AXI_IC_WUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BID" DIR="I" MPD_INDEX="180" NAME="M_AXI_IC_BID" SIGNAME="axi4_0_S_BID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="181" MSB="1" NAME="M_AXI_IC_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="182" NAME="M_AXI_IC_BVALID" SIGNAME="axi4_0_S_BVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="183" NAME="M_AXI_IC_BREADY" SIGNAME="axi4_0_S_BREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BUSER" DIR="I" MPD_INDEX="184" NAME="M_AXI_IC_BUSER" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[(C_M_AXI_IC_BUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARID" DIR="O" MPD_INDEX="185" NAME="M_AXI_IC_ARID" SIGNAME="axi4_0_S_ARID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="186" MSB="31" NAME="M_AXI_IC_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[(C_M_AXI_IC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="187" MSB="7" NAME="M_AXI_IC_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="188" MSB="2" NAME="M_AXI_IC_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="189" MSB="1" NAME="M_AXI_IC_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="O" MPD_INDEX="190" NAME="M_AXI_IC_ARLOCK" SIGNAME="axi4_0_S_ARLOCK"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="191" MSB="3" NAME="M_AXI_IC_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="192" MSB="2" NAME="M_AXI_IC_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="193" MSB="3" NAME="M_AXI_IC_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="194" NAME="M_AXI_IC_ARVALID" SIGNAME="axi4_0_S_ARVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="195" NAME="M_AXI_IC_ARREADY" SIGNAME="axi4_0_S_ARREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="196" MSB="4" NAME="M_AXI_IC_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[(C_M_AXI_IC_ARUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RID" DIR="I" MPD_INDEX="197" NAME="M_AXI_IC_RID" SIGNAME="axi4_0_S_RID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="198" MSB="31" NAME="M_AXI_IC_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="199" MSB="1" NAME="M_AXI_IC_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="200" NAME="M_AXI_IC_RLAST" SIGNAME="axi4_0_S_RLAST"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="201" NAME="M_AXI_IC_RVALID" SIGNAME="axi4_0_S_RVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="202" NAME="M_AXI_IC_RREADY" SIGNAME="axi4_0_S_RREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RUSER" DIR="I" MPD_INDEX="203" NAME="M_AXI_IC_RUSER" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[(C_M_AXI_IC_RUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWID" DIR="O" MPD_INDEX="204" NAME="M_AXI_DC_AWID" SIGNAME="axi4_0_S_AWID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="205" MSB="31" NAME="M_AXI_DC_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="206" MSB="7" NAME="M_AXI_DC_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="207" MSB="2" NAME="M_AXI_DC_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="208" MSB="1" NAME="M_AXI_DC_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="O" MPD_INDEX="209" NAME="M_AXI_DC_AWLOCK" SIGNAME="axi4_0_S_AWLOCK"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="210" MSB="3" NAME="M_AXI_DC_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="211" MSB="2" NAME="M_AXI_DC_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="212" MSB="3" NAME="M_AXI_DC_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="213" NAME="M_AXI_DC_AWVALID" SIGNAME="axi4_0_S_AWVALID"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="214" NAME="M_AXI_DC_AWREADY" SIGNAME="axi4_0_S_AWREADY"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="215" MSB="4" NAME="M_AXI_DC_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[(C_M_AXI_DC_AWUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="216" MSB="31" NAME="M_AXI_DC_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[(C_M_AXI_DC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="217" MSB="3" NAME="M_AXI_DC_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[((C_M_AXI_DC_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="218" NAME="M_AXI_DC_WLAST" SIGNAME="axi4_0_S_WLAST"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="219" NAME="M_AXI_DC_WVALID" SIGNAME="axi4_0_S_WVALID"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="220" NAME="M_AXI_DC_WREADY" SIGNAME="axi4_0_S_WREADY"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WUSER" DIR="O" MPD_INDEX="221" NAME="M_AXI_DC_WUSER" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[(C_M_AXI_DC_WUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BID" DIR="I" MPD_INDEX="222" NAME="M_AXI_DC_BID" SIGNAME="axi4_0_S_BID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="223" MSB="1" NAME="M_AXI_DC_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="224" NAME="M_AXI_DC_BVALID" SIGNAME="axi4_0_S_BVALID"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="225" NAME="M_AXI_DC_BREADY" SIGNAME="axi4_0_S_BREADY"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BUSER" DIR="I" MPD_INDEX="226" NAME="M_AXI_DC_BUSER" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[(C_M_AXI_DC_BUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARID" DIR="O" MPD_INDEX="227" NAME="M_AXI_DC_ARID" SIGNAME="axi4_0_S_ARID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="228" MSB="31" NAME="M_AXI_DC_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="229" MSB="7" NAME="M_AXI_DC_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="230" MSB="2" NAME="M_AXI_DC_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="231" MSB="1" NAME="M_AXI_DC_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="O" MPD_INDEX="232" NAME="M_AXI_DC_ARLOCK" SIGNAME="axi4_0_S_ARLOCK"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="233" MSB="3" NAME="M_AXI_DC_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="234" MSB="2" NAME="M_AXI_DC_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="235" MSB="3" NAME="M_AXI_DC_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="236" NAME="M_AXI_DC_ARVALID" SIGNAME="axi4_0_S_ARVALID"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="237" NAME="M_AXI_DC_ARREADY" SIGNAME="axi4_0_S_ARREADY"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="238" MSB="4" NAME="M_AXI_DC_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[(C_M_AXI_DC_ARUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RID" DIR="I" MPD_INDEX="239" NAME="M_AXI_DC_RID" SIGNAME="axi4_0_S_RID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="240" MSB="31" NAME="M_AXI_DC_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[(C_M_AXI_DC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="241" MSB="1" NAME="M_AXI_DC_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="242" NAME="M_AXI_DC_RLAST" SIGNAME="axi4_0_S_RLAST"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="243" NAME="M_AXI_DC_RVALID" SIGNAME="axi4_0_S_RVALID"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="244" NAME="M_AXI_DC_RREADY" SIGNAME="axi4_0_S_RREADY"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_RUSER" DIR="I" MPD_INDEX="245" NAME="M_AXI_DC_RUSER" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[(C_M_AXI_DC_RUSER_WIDTH-1):0]"/>
- <PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_Clk" DIR="I" MPD_INDEX="246" NAME="DBG_CLK" SIGNAME="microblaze_0_debug_Dbg_Clk"/>
- <PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_TDI" DIR="I" MPD_INDEX="247" NAME="DBG_TDI" SIGNAME="microblaze_0_debug_Dbg_TDI"/>
- <PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_TDO" DIR="O" MPD_INDEX="248" NAME="DBG_TDO" SIGNAME="microblaze_0_debug_Dbg_TDO"/>
- <PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_Reg_En" DIR="I" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="249" MSB="0" NAME="DBG_REG_EN" RIGHT="7" SIGNAME="microblaze_0_debug_Dbg_Reg_En" VECFORMULA="[0:7]"/>
- <PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_Shift" DIR="I" MPD_INDEX="250" NAME="DBG_SHIFT" SIGNAME="microblaze_0_debug_Dbg_Shift"/>
- <PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_Capture" DIR="I" MPD_INDEX="251" NAME="DBG_CAPTURE" SIGNAME="microblaze_0_debug_Dbg_Capture"/>
- <PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Dbg_Update" DIR="I" MPD_INDEX="252" NAME="DBG_UPDATE" SIGNAME="microblaze_0_debug_Dbg_Update"/>
- <PORT BUS="DEBUG" DEF_SIGNAME="microblaze_0_debug_Debug_Rst" DIR="I" MPD_INDEX="253" NAME="DEBUG_RST" SIGIS="RST" SIGNAME="microblaze_0_debug_Debug_Rst"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="254" MSB="0" NAME="Trace_Instruction" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="255" NAME="Trace_Valid_Instr" SIGNAME="__NOC__"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="256" MSB="0" NAME="Trace_PC" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="257" NAME="Trace_Reg_Write" SIGNAME="__NOC__"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="4" MPD_INDEX="258" MSB="0" NAME="Trace_Reg_Addr" RIGHT="4" SIGNAME="__NOC__" VECFORMULA="[0:4]"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="14" MPD_INDEX="259" MSB="0" NAME="Trace_MSR_Reg" RIGHT="14" SIGNAME="__NOC__" VECFORMULA="[0:14]"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="260" MSB="0" NAME="Trace_PID_Reg" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="261" MSB="0" NAME="Trace_New_Reg_Value" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="262" NAME="Trace_Exception_Taken" SIGNAME="__NOC__"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="4" MPD_INDEX="263" MSB="0" NAME="Trace_Exception_Kind" RIGHT="4" SIGNAME="__NOC__" VECFORMULA="[0:4]"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="264" NAME="Trace_Jump_Taken" SIGNAME="__NOC__"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="265" NAME="Trace_Delay_Slot" SIGNAME="__NOC__"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="266" MSB="0" NAME="Trace_Data_Address" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="267" NAME="Trace_Data_Access" SIGNAME="__NOC__"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="268" NAME="Trace_Data_Read" SIGNAME="__NOC__"/>
- <PORT BUS="TRACE" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="269" NAME="Trace_Data_Write" SIGNAME="__NOC__"/>
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- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_AWREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_WDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_WSTRB"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_WLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_WVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_WREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_BID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_BRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_BVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_BREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_ARREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RDATA"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RLAST"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_DATA="TRUE" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="104" NAME="M_AXI_DC" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_AWREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWUSER"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WSTRB"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WUSER"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_BID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_BRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_BVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_BUSER"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARUSER"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RDATA"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RLAST"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_RREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RUSER"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" IS_INSTRUCTION="TRUE" MHS_INDEX="5" MPD_INDEX="105" NAME="M_AXI_IC" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_AWREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWUSER"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WSTRB"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WUSER"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_BID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_BRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_BVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_BUSER"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARUSER"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RDATA"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RLAST"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_RREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RUSER"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_debug" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="106" NAME="DEBUG" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="DBG_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_TDI"/>
- <PORTMAP DIR="O" PHYSICAL="DBG_TDO"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_REG_EN"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_SHIFT"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_CAPTURE"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_UPDATE"/>
- <PORTMAP DIR="I" PHYSICAL="DEBUG_RST"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MBTRACE2" MPD_INDEX="107" NAME="TRACE" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Trace_Instruction"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Valid_Instr"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_PC"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Reg_Write"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Reg_Addr"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_MSR_Reg"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_PID_Reg"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_New_Reg_Value"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Exception_Taken"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Exception_Kind"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Jump_Taken"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Delay_Slot"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Address"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Access"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Read"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Write"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Write_Value"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Byte_Enable"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_DCache_Req"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_DCache_Hit"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_DCache_Rdy"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_DCache_Read"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_ICache_Req"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_ICache_Hit"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_ICache_Rdy"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_OF_PipeRun"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_EX_PipeRun"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_MEM_PipeRun"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_MB_Halted"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Jump_Hit"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="6" NAME="SFSL0" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL0_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="38" NAME="DRFSL0" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL0_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="7" NAME="MFSL0" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="39" NAME="DWFSL0" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="8" NAME="SFSL1" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL1_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="40" NAME="DRFSL1" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL1_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="9" NAME="MFSL1" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="41" NAME="DWFSL1" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="10" NAME="SFSL2" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL2_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="42" NAME="DRFSL2" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL2_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="11" NAME="MFSL2" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="43" NAME="DWFSL2" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="12" NAME="SFSL3" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL3_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="44" NAME="DRFSL3" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL3_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="13" NAME="MFSL3" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="45" NAME="DWFSL3" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="14" NAME="SFSL4" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL4_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="46" NAME="DRFSL4" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL4_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="15" NAME="MFSL4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="47" NAME="DWFSL4" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="16" NAME="SFSL5" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL5_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="48" NAME="DRFSL5" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL5_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="17" NAME="MFSL5" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="49" NAME="DWFSL5" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="18" NAME="SFSL6" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL6_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="50" NAME="DRFSL6" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL6_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="19" NAME="MFSL6" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="51" NAME="DWFSL6" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="20" NAME="SFSL7" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL7_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="52" NAME="DRFSL7" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL7_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="21" NAME="MFSL7" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="53" NAME="DWFSL7" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="22" NAME="SFSL8" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL8_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="54" NAME="DRFSL8" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL8_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="23" NAME="MFSL8" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="55" NAME="DWFSL8" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="24" NAME="SFSL9" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL9_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="56" NAME="DRFSL9" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL9_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="25" NAME="MFSL9" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="57" NAME="DWFSL9" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="26" NAME="SFSL10" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL10_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="58" NAME="DRFSL10" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL10_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="27" NAME="MFSL10" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="59" NAME="DWFSL10" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="28" NAME="SFSL11" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL11_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="60" NAME="DRFSL11" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL11_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="29" NAME="MFSL11" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="61" NAME="DWFSL11" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="30" NAME="SFSL12" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL12_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="62" NAME="DRFSL12" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL12_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="31" NAME="MFSL12" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="63" NAME="DWFSL12" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="32" NAME="SFSL13" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL13_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="64" NAME="DRFSL13" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL13_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="33" NAME="MFSL13" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="65" NAME="DWFSL13" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="34" NAME="SFSL14" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL14_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="66" NAME="DRFSL14" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL14_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="35" NAME="MFSL14" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="67" NAME="DWFSL14" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="36" NAME="SFSL15" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL15_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="68" NAME="DRFSL15" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL15_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="37" NAME="MFSL15" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="69" NAME="DWFSL15" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="70" NAME="M0_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M0_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M0_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M0_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M0_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="71" NAME="S0_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S0_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S0_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S0_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S0_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="72" NAME="M1_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M1_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M1_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M1_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M1_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="73" NAME="S1_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S1_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S1_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S1_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S1_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="74" NAME="M2_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M2_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M2_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M2_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M2_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="75" NAME="S2_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S2_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S2_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S2_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S2_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="76" NAME="M3_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M3_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M3_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M3_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M3_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="77" NAME="S3_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S3_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S3_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S3_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S3_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="78" NAME="M4_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M4_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M4_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M4_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M4_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="79" NAME="S4_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S4_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S4_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S4_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S4_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="80" NAME="M5_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M5_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M5_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M5_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M5_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="81" NAME="S5_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S5_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S5_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S5_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S5_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="82" NAME="M6_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M6_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M6_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M6_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M6_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="83" NAME="S6_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S6_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S6_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S6_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S6_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="84" NAME="M7_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M7_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M7_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M7_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M7_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="85" NAME="S7_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S7_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S7_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S7_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S7_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="86" NAME="M8_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M8_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M8_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M8_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M8_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="87" NAME="S8_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S8_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S8_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S8_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S8_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="88" NAME="M9_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M9_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M9_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M9_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M9_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="89" NAME="S9_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S9_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S9_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S9_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S9_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="90" NAME="M10_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M10_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M10_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M10_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M10_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="91" NAME="S10_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S10_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S10_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S10_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S10_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="92" NAME="M11_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M11_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M11_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M11_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M11_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="93" NAME="S11_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S11_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S11_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S11_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S11_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="94" NAME="M12_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M12_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M12_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M12_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M12_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="95" NAME="S12_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S12_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S12_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S12_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S12_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="96" NAME="M13_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M13_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M13_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M13_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M13_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="97" NAME="S13_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S13_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S13_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S13_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S13_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="98" NAME="M14_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M14_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M14_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M14_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M14_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="99" NAME="S14_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S14_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S14_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S14_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S14_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="100" NAME="M15_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M15_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M15_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M15_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M15_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="101" NAME="S15_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S15_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S15_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S15_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S15_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_INSTRUCTION="TRUE" IS_VALID="FALSE" MPD_INDEX="103" NAME="IXCL" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_IN_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_IN_READ"/>
- <PORTMAP DIR="I" PHYSICAL="ICACHE_FSL_IN_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="ICACHE_FSL_IN_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="ICACHE_FSL_IN_EXISTS"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_OUT_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_OUT_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_OUT_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_OUT_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="ICACHE_FSL_OUT_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_DATA="TRUE" IS_VALID="FALSE" MPD_INDEX="102" NAME="DXCL" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_IN_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_IN_READ"/>
- <PORTMAP DIR="I" PHYSICAL="DCACHE_FSL_IN_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="DCACHE_FSL_IN_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="DCACHE_FSL_IN_EXISTS"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_OUT_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_OUT_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_OUT_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_OUT_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="DCACHE_FSL_OUT_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" INSTANCE="microblaze_0_d_bram_ctrl" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="microblaze_0_dlmb"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" INSTANCE="microblaze_0_i_bram_ctrl" IS_DATA="FALSE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="microblaze_0_ilmb"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480FFFF" INSTANCE="debug_module" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1080033280" BASENAME="C_BASEADDR" BASEVALUE="0x40600000" HIGHDECIMAL="1080098815" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4060ffff" INSTANCE="RS232_Uart_1" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1073872896" BASENAME="C_BASEADDR" BASEVALUE="0x40020000" HIGHDECIMAL="1073938431" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4002ffff" INSTANCE="LEDs_4Bits" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1073741824" BASENAME="C_BASEADDR" BASEVALUE="0x40000000" HIGHDECIMAL="1073807359" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4000ffff" INSTANCE="Push_Buttons_4Bits" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1092878336" BASENAME="C_BASEADDR" BASEVALUE="0x41240000" HIGHDECIMAL="1093140479" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4127ffff" INSTANCE="ETHERNET" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="262144" SIZEABRV="256K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1105199104" BASENAME="C_BASEADDR" BASEVALUE="0x41e00000" HIGHDECIMAL="1105264639" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41e0ffff" INSTANCE="ETHERNET_dma" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1092616192" BASENAME="C_BASEADDR" BASEVALUE="0x41200000" HIGHDECIMAL="1092681727" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4120ffff" INSTANCE="microblaze_0_intc" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1103101952" BASENAME="C_BASEADDR" BASEVALUE="0x41c00000" HIGHDECIMAL="1103167487" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41c0ffff" INSTANCE="axi_timer_0" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2155872255" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x807FFFFF" INSTANCE="MCB_DDR3" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8388608" SIZEABRV="8M">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- </MEMORYMAP>
- <PERIPHERALS>
- <PERIPHERAL INSTANCE="microblaze_0_d_bram_ctrl"/>
- <PERIPHERAL INSTANCE="microblaze_0_i_bram_ctrl"/>
- <PERIPHERAL INSTANCE="debug_module"/>
- <PERIPHERAL INSTANCE="RS232_Uart_1"/>
- <PERIPHERAL INSTANCE="LEDs_4Bits"/>
- <PERIPHERAL INSTANCE="Push_Buttons_4Bits"/>
- <PERIPHERAL INSTANCE="ETHERNET"/>
- <PERIPHERAL INSTANCE="ETHERNET_dma"/>
- <PERIPHERAL INSTANCE="microblaze_0_intc"/>
- <PERIPHERAL INSTANCE="axi_timer_0"/>
- <PERIPHERAL INSTANCE="MCB_DDR3"/>
- </PERIPHERALS>
- <INTERRUPTINFO TYPE="TARGET">
- <SOURCE INSTANCE="microblaze_0_intc" INTC_INDEX="0"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE BUSSTD="LMB" BUSSTD_PSF="LMB" HWVERSION="2.00.a" INSTANCE="microblaze_0_ilmb" IPTYPE="BUS" MHS_INDEX="3" MODCLASS="BUS" MODTYPE="lmb_v10">
- <DESCRIPTION TYPE="SHORT">Local Memory Bus (LMB) 1.0</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">'The LMB is a fast, local bus for connecting MicroBlaze I and D ports to peripherals and BRAM'</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v2_00_a/doc/lmb_v10.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_LMB_NUM_SLAVES" TYPE="integer" VALUE="1">
- <DESCRIPTION>Number of Bus Slaves </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="1" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>LMB Address Bus Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="2" NAME="C_LMB_DWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>LMB Data Bus Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="3" NAME="C_EXT_RESET_HIGH" TYPE="integer" VALUE="1">
- <DESCRIPTION>Active High External Reset</DESCRIPTION>
- </PARAMETER>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="SYS_RST" SIGNAME="proc_sys_reset_0_BUS_STRUCT_RESET"/>
- <PORT CLKFREQUENCY="100000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="LMB_CLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_Rst" DIR="O" MPD_INDEX="2" NAME="LMB_Rst" SIGNAME="microblaze_0_ilmb_LMB_Rst"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_ABus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="3" MSB="0" NAME="M_ABus" RIGHT="31" SIGNAME="microblaze_0_ilmb_M_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_ReadStrobe" DIR="I" MPD_INDEX="4" NAME="M_ReadStrobe" SIGNAME="microblaze_0_ilmb_M_ReadStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_WriteStrobe" DIR="I" MPD_INDEX="5" NAME="M_WriteStrobe" SIGNAME="microblaze_0_ilmb_M_WriteStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_AddrStrobe" DIR="I" MPD_INDEX="6" NAME="M_AddrStrobe" SIGNAME="microblaze_0_ilmb_M_AddrStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_DBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="7" MSB="0" NAME="M_DBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_M_DBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_BE" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="8" MSB="0" NAME="M_BE" RIGHT="3" SIGNAME="microblaze_0_ilmb_M_BE" VECFORMULA="[0:(C_LMB_DWIDTH+7)/8-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_DBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="9" MSB="0" NAME="Sl_DBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_Sl_DBus" VECFORMULA="[0:(C_LMB_DWIDTH*C_LMB_NUM_SLAVES)-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_Ready" DIR="I" MPD_INDEX="10" NAME="Sl_Ready" SIGNAME="microblaze_0_ilmb_Sl_Ready" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_Wait" DIR="I" MPD_INDEX="11" NAME="Sl_Wait" SIGNAME="microblaze_0_ilmb_Sl_Wait" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_UE" DIR="I" MPD_INDEX="12" NAME="Sl_UE" SIGNAME="microblaze_0_ilmb_Sl_UE" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_CE" DIR="I" MPD_INDEX="13" NAME="Sl_CE" SIGNAME="microblaze_0_ilmb_Sl_CE" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_ABus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="14" MSB="0" NAME="LMB_ABus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_ReadStrobe" DIR="O" MPD_INDEX="15" NAME="LMB_ReadStrobe" SIGNAME="microblaze_0_ilmb_LMB_ReadStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_WriteStrobe" DIR="O" MPD_INDEX="16" NAME="LMB_WriteStrobe" SIGNAME="microblaze_0_ilmb_LMB_WriteStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_AddrStrobe" DIR="O" MPD_INDEX="17" NAME="LMB_AddrStrobe" SIGNAME="microblaze_0_ilmb_LMB_AddrStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_ReadDBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="18" MSB="0" NAME="LMB_ReadDBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_ReadDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_WriteDBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="19" MSB="0" NAME="LMB_WriteDBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_WriteDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_Ready" DIR="O" MPD_INDEX="20" NAME="LMB_Ready" SIGNAME="microblaze_0_ilmb_LMB_Ready"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_Wait" DIR="O" MPD_INDEX="21" NAME="LMB_Wait" SIGNAME="microblaze_0_ilmb_LMB_Wait"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_UE" DIR="O" MPD_INDEX="22" NAME="LMB_UE" SIGNAME="microblaze_0_ilmb_LMB_UE"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_CE" DIR="O" MPD_INDEX="23" NAME="LMB_CE" SIGNAME="microblaze_0_ilmb_LMB_CE"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_BE" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="24" MSB="0" NAME="LMB_BE" RIGHT="3" SIGNAME="microblaze_0_ilmb_LMB_BE" VECFORMULA="[0:(C_LMB_DWIDTH+7)/8-1]"/>
- </PORTS>
- <BUSINTERFACES/>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
- </IOINTERFACES>
- </MODULE>
- <MODULE BUSSTD="LMB" BUSSTD_PSF="LMB" HWVERSION="2.00.a" INSTANCE="microblaze_0_dlmb" IPTYPE="BUS" MHS_INDEX="4" MODCLASS="BUS" MODTYPE="lmb_v10">
- <DESCRIPTION TYPE="SHORT">Local Memory Bus (LMB) 1.0</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">'The LMB is a fast, local bus for connecting MicroBlaze I and D ports to peripherals and BRAM'</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v2_00_a/doc/lmb_v10.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_LMB_NUM_SLAVES" TYPE="integer" VALUE="1">
- <DESCRIPTION>Number of Bus Slaves </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="1" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>LMB Address Bus Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="2" NAME="C_LMB_DWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>LMB Data Bus Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="3" NAME="C_EXT_RESET_HIGH" TYPE="integer" VALUE="1">
- <DESCRIPTION>Active High External Reset</DESCRIPTION>
- </PARAMETER>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="SYS_RST" SIGNAME="proc_sys_reset_0_BUS_STRUCT_RESET"/>
- <PORT CLKFREQUENCY="100000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="LMB_CLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_Rst" DIR="O" MPD_INDEX="2" NAME="LMB_Rst" SIGNAME="microblaze_0_dlmb_LMB_Rst"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_ABus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="3" MSB="0" NAME="M_ABus" RIGHT="31" SIGNAME="microblaze_0_dlmb_M_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_ReadStrobe" DIR="I" MPD_INDEX="4" NAME="M_ReadStrobe" SIGNAME="microblaze_0_dlmb_M_ReadStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_WriteStrobe" DIR="I" MPD_INDEX="5" NAME="M_WriteStrobe" SIGNAME="microblaze_0_dlmb_M_WriteStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_AddrStrobe" DIR="I" MPD_INDEX="6" NAME="M_AddrStrobe" SIGNAME="microblaze_0_dlmb_M_AddrStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_DBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="7" MSB="0" NAME="M_DBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_M_DBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_BE" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="8" MSB="0" NAME="M_BE" RIGHT="3" SIGNAME="microblaze_0_dlmb_M_BE" VECFORMULA="[0:(C_LMB_DWIDTH+7)/8-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_DBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="9" MSB="0" NAME="Sl_DBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_Sl_DBus" VECFORMULA="[0:(C_LMB_DWIDTH*C_LMB_NUM_SLAVES)-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_Ready" DIR="I" MPD_INDEX="10" NAME="Sl_Ready" SIGNAME="microblaze_0_dlmb_Sl_Ready" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_Wait" DIR="I" MPD_INDEX="11" NAME="Sl_Wait" SIGNAME="microblaze_0_dlmb_Sl_Wait" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_UE" DIR="I" MPD_INDEX="12" NAME="Sl_UE" SIGNAME="microblaze_0_dlmb_Sl_UE" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_CE" DIR="I" MPD_INDEX="13" NAME="Sl_CE" SIGNAME="microblaze_0_dlmb_Sl_CE" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_ABus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="14" MSB="0" NAME="LMB_ABus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_ReadStrobe" DIR="O" MPD_INDEX="15" NAME="LMB_ReadStrobe" SIGNAME="microblaze_0_dlmb_LMB_ReadStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_WriteStrobe" DIR="O" MPD_INDEX="16" NAME="LMB_WriteStrobe" SIGNAME="microblaze_0_dlmb_LMB_WriteStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_AddrStrobe" DIR="O" MPD_INDEX="17" NAME="LMB_AddrStrobe" SIGNAME="microblaze_0_dlmb_LMB_AddrStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_ReadDBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="18" MSB="0" NAME="LMB_ReadDBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_ReadDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_WriteDBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="19" MSB="0" NAME="LMB_WriteDBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_WriteDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_Ready" DIR="O" MPD_INDEX="20" NAME="LMB_Ready" SIGNAME="microblaze_0_dlmb_LMB_Ready"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_Wait" DIR="O" MPD_INDEX="21" NAME="LMB_Wait" SIGNAME="microblaze_0_dlmb_LMB_Wait"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_UE" DIR="O" MPD_INDEX="22" NAME="LMB_UE" SIGNAME="microblaze_0_dlmb_LMB_UE"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_CE" DIR="O" MPD_INDEX="23" NAME="LMB_CE" SIGNAME="microblaze_0_dlmb_LMB_CE"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_BE" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="24" MSB="0" NAME="LMB_BE" RIGHT="3" SIGNAME="microblaze_0_dlmb_LMB_BE" VECFORMULA="[0:(C_LMB_DWIDTH+7)/8-1]"/>
- </PORTS>
- <BUSINTERFACES/>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
- </IOINTERFACES>
- </MODULE>
- <MODULE HWVERSION="3.00.a" INSTANCE="microblaze_0_i_bram_ctrl" IPTYPE="PERIPHERAL" MHS_INDEX="5" MODCLASS="MEMORY_CNTLR" MODTYPE="lmb_bram_if_cntlr">
- <DESCRIPTION TYPE="SHORT">LMB BRAM Controller</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller connects to an lmb bus</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v3_00_a/doc/lmb_bram_if_cntlr.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="2" MPD_INDEX="0" MSB="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>LMB BRAM Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00001FFF">
- <DESCRIPTION>LMB BRAM High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0xc0000000">
- <DESCRIPTION>LMB Address Decode Mask</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>LMB Address Bus Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="5" NAME="C_LMB_DWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>LMB Data Bus Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_ECC" TYPE="integer" VALUE="0">
- <DESCRIPTION>Error Correction Code </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="7" NAME="C_INTERCONNECT" TYPE="integer" VALUE="0">
- <DESCRIPTION>Select Interconnect </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_FAULT_INJECT" TYPE="integer" VALUE="0">
- <DESCRIPTION>Fault Inject Registers </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="9" NAME="C_CE_FAILING_REGISTERS" TYPE="integer" VALUE="0">
- <DESCRIPTION>Correctable Error First Failing Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_UE_FAILING_REGISTERS" TYPE="integer" VALUE="0">
- <DESCRIPTION>Uncorrectable Error First Failing Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="11" NAME="C_ECC_STATUS_REGISTERS" TYPE="integer" VALUE="0">
- <DESCRIPTION>ECC Status and Control Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="12" NAME="C_ECC_ONOFF_REGISTER" TYPE="integer" VALUE="0">
- <DESCRIPTION>ECC On/Off Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="13" NAME="C_ECC_ONOFF_RESET_VALUE" TYPE="integer" VALUE="1">
- <DESCRIPTION>ECC On/Off Reset Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="14" NAME="C_CE_COUNTER_WIDTH" TYPE="integer" VALUE="0">
- <DESCRIPTION>Correctable Error Counter Register Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_WRITE_ACCESS" TYPE="integer" VALUE="2">
- <DESCRIPTION>Write Access setting </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="16" NAME="C_SPLB_CTRL_BASEADDR" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
- <DESCRIPTION>Base Address for PLB Interface</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="17" NAME="C_SPLB_CTRL_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>High Address for PLB Interface</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="18" NAME="C_SPLB_CTRL_AWIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="19" NAME="C_SPLB_CTRL_DWIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="20" NAME="C_SPLB_CTRL_P2P" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="21" NAME="C_SPLB_CTRL_MID_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="22" NAME="C_SPLB_CTRL_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="23" NAME="C_SPLB_CTRL_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="24" NAME="C_SPLB_CTRL_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="25" NAME="C_SPLB_CTRL_CLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>Frequency of PLB Slave</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="26" NAME="C_S_AXI_CTRL_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>S_AXI_CTRL Clock Frequency</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="27" NAME="C_S_AXI_CTRL_BASEADDR" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
- <DESCRIPTION>S_AXI_CTRL Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="28" NAME="C_S_AXI_CTRL_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>S_AXI_CTRL High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="29" NAME="C_S_AXI_CTRL_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>S_AXI_CTRL Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="30" NAME="C_S_AXI_CTRL_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>S_AXI_CTRL Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="31" NAME="C_S_AXI_CTRL_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>S_AXI_CTRL Protocol</DESCRIPTION>
- </PARAMETER>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="SLMB" CLKFREQUENCY="100000000" DEF_SIGNAME="clk_100_0000MHzPLL0" DIR="I" MPD_INDEX="0" NAME="LMB_Clk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_Rst" DIR="I" MPD_INDEX="1" NAME="LMB_Rst" SIGIS="RST" SIGNAME="microblaze_0_ilmb_LMB_Rst"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_ABus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="2" MSB="0" NAME="LMB_ABus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_WriteDBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="3" MSB="0" NAME="LMB_WriteDBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_WriteDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_AddrStrobe" DIR="I" MPD_INDEX="4" NAME="LMB_AddrStrobe" SIGNAME="microblaze_0_ilmb_LMB_AddrStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_ReadStrobe" DIR="I" MPD_INDEX="5" NAME="LMB_ReadStrobe" SIGNAME="microblaze_0_ilmb_LMB_ReadStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_WriteStrobe" DIR="I" MPD_INDEX="6" NAME="LMB_WriteStrobe" SIGNAME="microblaze_0_ilmb_LMB_WriteStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_BE" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="7" MSB="0" NAME="LMB_BE" RIGHT="3" SIGNAME="microblaze_0_ilmb_LMB_BE" VECFORMULA="[0:C_LMB_DWIDTH/8-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_DBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="8" MSB="0" NAME="Sl_DBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_Sl_DBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_Ready" DIR="O" MPD_INDEX="9" NAME="Sl_Ready" SIGNAME="microblaze_0_ilmb_Sl_Ready"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_Wait" DIR="O" MPD_INDEX="10" NAME="Sl_Wait" SIGNAME="microblaze_0_ilmb_Sl_Wait"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_UE" DIR="O" MPD_INDEX="11" NAME="Sl_UE" SIGNAME="microblaze_0_ilmb_Sl_UE"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_CE" DIR="O" MPD_INDEX="12" NAME="Sl_CE" SIGNAME="microblaze_0_ilmb_Sl_CE"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst" DIR="O" MPD_INDEX="13" NAME="BRAM_Rst_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk" DIR="O" MPD_INDEX="14" NAME="BRAM_Clk_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN" DIR="O" MPD_INDEX="15" NAME="BRAM_EN_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="16" MSB="0" NAME="BRAM_WEN_A" RIGHT="3" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" VECFORMULA="[0:((C_LMB_DWIDTH+8*C_ECC)/8)-1]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="17" MSB="0" NAME="BRAM_Addr_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="18" MSB="0" NAME="BRAM_Din_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" VECFORMULA="[0:C_LMB_DWIDTH-1+8*C_ECC]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="19" MSB="0" NAME="BRAM_Dout_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" VECFORMULA="[0:C_LMB_DWIDTH-1+8*C_ECC]"/>
- <PORT DIR="O" MPD_INDEX="20" NAME="Interrupt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="21" MSB="0" NAME="SPLB_CTRL_PLB_ABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="22" NAME="SPLB_CTRL_PLB_PAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="23" NAME="SPLB_CTRL_PLB_masterID" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_MID_WIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="24" NAME="SPLB_CTRL_PLB_RNW" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="25" MSB="0" NAME="SPLB_CTRL_PLB_BE" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:((C_SPLB_CTRL_DWIDTH/8)-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="26" MSB="0" NAME="SPLB_CTRL_PLB_size" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="2" MPD_INDEX="27" MSB="0" NAME="SPLB_CTRL_PLB_type" RIGHT="2" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="28" MSB="0" NAME="SPLB_CTRL_PLB_wrDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_DWIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="29" NAME="SPLB_CTRL_Sl_addrAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="30" MSB="0" NAME="SPLB_CTRL_Sl_SSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="SPLB_CTRL_Sl_wait" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="32" NAME="SPLB_CTRL_Sl_rearbitrate" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="33" NAME="SPLB_CTRL_Sl_wrDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="34" NAME="SPLB_CTRL_Sl_wrComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="35" MSB="0" NAME="SPLB_CTRL_Sl_rdDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_DWIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="36" NAME="SPLB_CTRL_Sl_rdDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="37" NAME="SPLB_CTRL_Sl_rdComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="38" NAME="SPLB_CTRL_Sl_MBusy" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="39" NAME="SPLB_CTRL_Sl_MWrErr" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="40" NAME="SPLB_CTRL_Sl_MRdErr" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="41" MSB="0" NAME="SPLB_CTRL_PLB_UABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="42" NAME="SPLB_CTRL_PLB_SAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="43" NAME="SPLB_CTRL_PLB_rdPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="44" NAME="SPLB_CTRL_PLB_wrPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="45" NAME="SPLB_CTRL_PLB_abort" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="46" NAME="SPLB_CTRL_PLB_busLock" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="47" MSB="0" NAME="SPLB_CTRL_PLB_MSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="48" NAME="SPLB_CTRL_PLB_lockErr" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="49" NAME="SPLB_CTRL_PLB_wrBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="50" NAME="SPLB_CTRL_PLB_rdBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="51" NAME="SPLB_CTRL_PLB_wrPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="52" NAME="SPLB_CTRL_PLB_rdPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="53" MSB="0" NAME="SPLB_CTRL_PLB_wrPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="54" MSB="0" NAME="SPLB_CTRL_PLB_rdPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="55" MSB="0" NAME="SPLB_CTRL_PLB_reqPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="15" MPD_INDEX="56" MSB="0" NAME="SPLB_CTRL_PLB_TAttribute" RIGHT="15" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="57" NAME="SPLB_CTRL_Sl_wrBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="58" MSB="0" NAME="SPLB_CTRL_Sl_rdWdAddr" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="59" NAME="SPLB_CTRL_Sl_rdBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="60" NAME="SPLB_CTRL_Sl_MIRQ" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" IS_VALID="FALSE" MPD_INDEX="61" NAME="S_AXI_CTRL_ACLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" IS_VALID="FALSE" MPD_INDEX="62" NAME="S_AXI_CTRL_ARESETN" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="63" MSB="31" NAME="S_AXI_CTRL_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="64" NAME="S_AXI_CTRL_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="65" NAME="S_AXI_CTRL_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="66" MSB="31" NAME="S_AXI_CTRL_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="67" MSB="3" NAME="S_AXI_CTRL_WSTRB" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[((C_S_AXI_CTRL_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="68" NAME="S_AXI_CTRL_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="69" NAME="S_AXI_CTRL_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="70" MSB="1" NAME="S_AXI_CTRL_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="71" NAME="S_AXI_CTRL_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="72" NAME="S_AXI_CTRL_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="73" MSB="31" NAME="S_AXI_CTRL_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="74" NAME="S_AXI_CTRL_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="75" NAME="S_AXI_CTRL_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="76" MSB="31" NAME="S_AXI_CTRL_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="77" MSB="1" NAME="S_AXI_CTRL_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="78" NAME="S_AXI_CTRL_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="79" NAME="S_AXI_CTRL_RREADY" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="microblaze_0_ilmb" BUSSTD="LMB" BUSSTD_PSF="LMB" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="SLMB" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="LMB_Clk"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_Rst"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_ABus"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_WriteDBus"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_AddrStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_ReadStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_WriteStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_BE"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_DBus"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_Ready"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_Wait"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_UE"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_CE"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="BRAM_PORT" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Rst_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Clk_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_EN_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_WEN_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Addr_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Din_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Dout_A"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_VALID="FALSE" MPD_INDEX="2" NAME="SPLB_CTRL" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_ABus"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_PAValid"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_masterID"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_RNW"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_BE"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_size"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_type"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrDBus"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_addrAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_SSize"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wait"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rearbitrate"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrDAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrComp"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdDBus"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdDAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdComp"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MBusy"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MWrErr"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MRdErr"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_UABus"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_SAValid"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPrim"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPrim"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_abort"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_busLock"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_MSize"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_lockErr"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrBurst"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdBurst"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_reqPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_TAttribute"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdWdAddr"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MIRQ"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="3" NAME="S_AXI_CTRL" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" MEMTYPE="MEMORY" MINSIZE="0x800" SIZE="8192" SIZEABRV="8K">
- <SLAVES>
- <SLAVE BUSINTERFACE="SLMB"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB_CTRL_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_SPLB_CTRL_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="SPLB_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S_AXI_CTRL_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S_AXI_CTRL_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="3.00.a" INSTANCE="microblaze_0_d_bram_ctrl" IPTYPE="PERIPHERAL" MHS_INDEX="6" MODCLASS="MEMORY_CNTLR" MODTYPE="lmb_bram_if_cntlr">
- <DESCRIPTION TYPE="SHORT">LMB BRAM Controller</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller connects to an lmb bus</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v3_00_a/doc/lmb_bram_if_cntlr.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="2" MPD_INDEX="0" MSB="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>LMB BRAM Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00001FFF">
- <DESCRIPTION>LMB BRAM High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0xc0000000">
- <DESCRIPTION>LMB Address Decode Mask</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>LMB Address Bus Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="5" NAME="C_LMB_DWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>LMB Data Bus Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_ECC" TYPE="integer" VALUE="0">
- <DESCRIPTION>Error Correction Code </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="7" NAME="C_INTERCONNECT" TYPE="integer" VALUE="0">
- <DESCRIPTION>Select Interconnect </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_FAULT_INJECT" TYPE="integer" VALUE="0">
- <DESCRIPTION>Fault Inject Registers </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="9" NAME="C_CE_FAILING_REGISTERS" TYPE="integer" VALUE="0">
- <DESCRIPTION>Correctable Error First Failing Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_UE_FAILING_REGISTERS" TYPE="integer" VALUE="0">
- <DESCRIPTION>Uncorrectable Error First Failing Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="11" NAME="C_ECC_STATUS_REGISTERS" TYPE="integer" VALUE="0">
- <DESCRIPTION>ECC Status and Control Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="12" NAME="C_ECC_ONOFF_REGISTER" TYPE="integer" VALUE="0">
- <DESCRIPTION>ECC On/Off Register </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="13" NAME="C_ECC_ONOFF_RESET_VALUE" TYPE="integer" VALUE="1">
- <DESCRIPTION>ECC On/Off Reset Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="14" NAME="C_CE_COUNTER_WIDTH" TYPE="integer" VALUE="0">
- <DESCRIPTION>Correctable Error Counter Register Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_WRITE_ACCESS" TYPE="integer" VALUE="2">
- <DESCRIPTION>Write Access setting </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="16" NAME="C_SPLB_CTRL_BASEADDR" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
- <DESCRIPTION>Base Address for PLB Interface</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="17" NAME="C_SPLB_CTRL_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>High Address for PLB Interface</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="18" NAME="C_SPLB_CTRL_AWIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="19" NAME="C_SPLB_CTRL_DWIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="20" NAME="C_SPLB_CTRL_P2P" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="21" NAME="C_SPLB_CTRL_MID_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="22" NAME="C_SPLB_CTRL_NUM_MASTERS" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="23" NAME="C_SPLB_CTRL_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="24" NAME="C_SPLB_CTRL_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="25" NAME="C_SPLB_CTRL_CLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>Frequency of PLB Slave</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="26" NAME="C_S_AXI_CTRL_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>S_AXI_CTRL Clock Frequency</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="27" NAME="C_S_AXI_CTRL_BASEADDR" TYPE="std_logic_vector" VALUE="0xFFFFFFFF">
- <DESCRIPTION>S_AXI_CTRL Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="28" NAME="C_S_AXI_CTRL_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>S_AXI_CTRL High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="29" NAME="C_S_AXI_CTRL_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>S_AXI_CTRL Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="30" NAME="C_S_AXI_CTRL_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>S_AXI_CTRL Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="31" NAME="C_S_AXI_CTRL_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>S_AXI_CTRL Protocol</DESCRIPTION>
- </PARAMETER>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="SLMB" CLKFREQUENCY="100000000" DEF_SIGNAME="clk_100_0000MHzPLL0" DIR="I" MPD_INDEX="0" NAME="LMB_Clk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_Rst" DIR="I" MPD_INDEX="1" NAME="LMB_Rst" SIGIS="RST" SIGNAME="microblaze_0_dlmb_LMB_Rst"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_ABus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="2" MSB="0" NAME="LMB_ABus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_WriteDBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="3" MSB="0" NAME="LMB_WriteDBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_WriteDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_AddrStrobe" DIR="I" MPD_INDEX="4" NAME="LMB_AddrStrobe" SIGNAME="microblaze_0_dlmb_LMB_AddrStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_ReadStrobe" DIR="I" MPD_INDEX="5" NAME="LMB_ReadStrobe" SIGNAME="microblaze_0_dlmb_LMB_ReadStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_WriteStrobe" DIR="I" MPD_INDEX="6" NAME="LMB_WriteStrobe" SIGNAME="microblaze_0_dlmb_LMB_WriteStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_BE" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="7" MSB="0" NAME="LMB_BE" RIGHT="3" SIGNAME="microblaze_0_dlmb_LMB_BE" VECFORMULA="[0:C_LMB_DWIDTH/8-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_DBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="8" MSB="0" NAME="Sl_DBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_Sl_DBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_Ready" DIR="O" MPD_INDEX="9" NAME="Sl_Ready" SIGNAME="microblaze_0_dlmb_Sl_Ready"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_Wait" DIR="O" MPD_INDEX="10" NAME="Sl_Wait" SIGNAME="microblaze_0_dlmb_Sl_Wait"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_UE" DIR="O" MPD_INDEX="11" NAME="Sl_UE" SIGNAME="microblaze_0_dlmb_Sl_UE"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_CE" DIR="O" MPD_INDEX="12" NAME="Sl_CE" SIGNAME="microblaze_0_dlmb_Sl_CE"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst" DIR="O" MPD_INDEX="13" NAME="BRAM_Rst_A" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk" DIR="O" MPD_INDEX="14" NAME="BRAM_Clk_A" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN" DIR="O" MPD_INDEX="15" NAME="BRAM_EN_A" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="16" MSB="0" NAME="BRAM_WEN_A" RIGHT="3" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" VECFORMULA="[0:((C_LMB_DWIDTH+8*C_ECC)/8)-1]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="17" MSB="0" NAME="BRAM_Addr_A" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="18" MSB="0" NAME="BRAM_Din_A" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" VECFORMULA="[0:C_LMB_DWIDTH-1+8*C_ECC]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="19" MSB="0" NAME="BRAM_Dout_A" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" VECFORMULA="[0:C_LMB_DWIDTH-1+8*C_ECC]"/>
- <PORT DIR="O" MPD_INDEX="20" NAME="Interrupt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="21" MSB="0" NAME="SPLB_CTRL_PLB_ABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="22" NAME="SPLB_CTRL_PLB_PAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="23" NAME="SPLB_CTRL_PLB_masterID" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_MID_WIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="24" NAME="SPLB_CTRL_PLB_RNW" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="25" MSB="0" NAME="SPLB_CTRL_PLB_BE" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:((C_SPLB_CTRL_DWIDTH/8)-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="26" MSB="0" NAME="SPLB_CTRL_PLB_size" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="2" MPD_INDEX="27" MSB="0" NAME="SPLB_CTRL_PLB_type" RIGHT="2" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="28" MSB="0" NAME="SPLB_CTRL_PLB_wrDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_DWIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="29" NAME="SPLB_CTRL_Sl_addrAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="30" MSB="0" NAME="SPLB_CTRL_Sl_SSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="SPLB_CTRL_Sl_wait" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="32" NAME="SPLB_CTRL_Sl_rearbitrate" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="33" NAME="SPLB_CTRL_Sl_wrDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="34" NAME="SPLB_CTRL_Sl_wrComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="35" MSB="0" NAME="SPLB_CTRL_Sl_rdDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_DWIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="36" NAME="SPLB_CTRL_Sl_rdDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="37" NAME="SPLB_CTRL_Sl_rdComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="38" NAME="SPLB_CTRL_Sl_MBusy" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="39" NAME="SPLB_CTRL_Sl_MWrErr" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="40" NAME="SPLB_CTRL_Sl_MRdErr" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="41" MSB="0" NAME="SPLB_CTRL_PLB_UABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="42" NAME="SPLB_CTRL_PLB_SAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="43" NAME="SPLB_CTRL_PLB_rdPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="44" NAME="SPLB_CTRL_PLB_wrPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="45" NAME="SPLB_CTRL_PLB_abort" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="46" NAME="SPLB_CTRL_PLB_busLock" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="47" MSB="0" NAME="SPLB_CTRL_PLB_MSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="48" NAME="SPLB_CTRL_PLB_lockErr" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="49" NAME="SPLB_CTRL_PLB_wrBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="50" NAME="SPLB_CTRL_PLB_rdBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="51" NAME="SPLB_CTRL_PLB_wrPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="52" NAME="SPLB_CTRL_PLB_rdPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="53" MSB="0" NAME="SPLB_CTRL_PLB_wrPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="54" MSB="0" NAME="SPLB_CTRL_PLB_rdPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="55" MSB="0" NAME="SPLB_CTRL_PLB_reqPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="15" MPD_INDEX="56" MSB="0" NAME="SPLB_CTRL_PLB_TAttribute" RIGHT="15" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="57" NAME="SPLB_CTRL_Sl_wrBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="58" MSB="0" NAME="SPLB_CTRL_Sl_rdWdAddr" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="59" NAME="SPLB_CTRL_Sl_rdBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="60" NAME="SPLB_CTRL_Sl_MIRQ" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" IS_VALID="FALSE" MPD_INDEX="61" NAME="S_AXI_CTRL_ACLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" IS_VALID="FALSE" MPD_INDEX="62" NAME="S_AXI_CTRL_ARESETN" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="63" MSB="31" NAME="S_AXI_CTRL_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="64" NAME="S_AXI_CTRL_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="65" NAME="S_AXI_CTRL_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="66" MSB="31" NAME="S_AXI_CTRL_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="67" MSB="3" NAME="S_AXI_CTRL_WSTRB" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[((C_S_AXI_CTRL_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="68" NAME="S_AXI_CTRL_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="69" NAME="S_AXI_CTRL_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="70" MSB="1" NAME="S_AXI_CTRL_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="71" NAME="S_AXI_CTRL_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="72" NAME="S_AXI_CTRL_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="73" MSB="31" NAME="S_AXI_CTRL_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="74" NAME="S_AXI_CTRL_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="75" NAME="S_AXI_CTRL_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="76" MSB="31" NAME="S_AXI_CTRL_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="77" MSB="1" NAME="S_AXI_CTRL_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="78" NAME="S_AXI_CTRL_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="79" NAME="S_AXI_CTRL_RREADY" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="microblaze_0_dlmb" BUSSTD="LMB" BUSSTD_PSF="LMB" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="SLMB" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="LMB_Clk"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_Rst"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_ABus"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_WriteDBus"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_AddrStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_ReadStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_WriteStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_BE"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_DBus"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_Ready"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_Wait"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_UE"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_CE"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="BRAM_PORT" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Rst_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Clk_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_EN_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_WEN_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Addr_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Din_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Dout_A"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_VALID="FALSE" MPD_INDEX="2" NAME="SPLB_CTRL" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_ABus"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_PAValid"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_masterID"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_RNW"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_BE"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_size"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_type"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrDBus"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_addrAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_SSize"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wait"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rearbitrate"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrDAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrComp"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdDBus"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdDAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdComp"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MBusy"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MWrErr"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MRdErr"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_UABus"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_SAValid"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPrim"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPrim"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_abort"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_busLock"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_MSize"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_lockErr"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrBurst"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdBurst"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_reqPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_TAttribute"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdWdAddr"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MIRQ"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="3" NAME="S_AXI_CTRL" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" MEMTYPE="MEMORY" MINSIZE="0x800" SIZE="8192" SIZEABRV="8K">
- <SLAVES>
- <SLAVE BUSINTERFACE="SLMB"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB_CTRL_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_SPLB_CTRL_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="SPLB_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S_AXI_CTRL_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S_AXI_CTRL_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="1.00.a" INSTANCE="microblaze_0_bram_block" IPTYPE="PERIPHERAL" MHS_INDEX="7" MODCLASS="MEMORY" MODTYPE="bram_block">
- <DESCRIPTION TYPE="SHORT">Block RAM (BRAM) Block</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">The BRAM Block is a configurable memory module that attaches to a variety of BRAM Interface Controllers.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/bram_block_v1_00_a/doc/bram_block.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_MEMSIZE" TYPE="integer" VALUE="0x2000">
- <DESCRIPTION>Size of BRAM(s) in Bytes</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="1" NAME="C_PORT_DWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>Data Width of Port A and B</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="2" NAME="C_PORT_AWIDTH" TYPE="integer" VALUE="32">
- <DESCRIPTION>Address Width of Port A and B</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="3" NAME="C_NUM_WE" TYPE="integer" VALUE="4">
- <DESCRIPTION>Number of Byte Write Enables</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_FAMILY" TYPE="string" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst" DIR="I" MPD_INDEX="0" NAME="BRAM_Rst_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk" DIR="I" MPD_INDEX="1" NAME="BRAM_Clk_A" SIGIS="CLK" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN" DIR="I" MPD_INDEX="2" NAME="BRAM_EN_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="3" MSB="0" NAME="BRAM_WEN_A" RIGHT="3" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" VECFORMULA="[0:C_NUM_WE-1]"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="4" MSB="0" NAME="BRAM_Addr_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" VECFORMULA="[0:C_PORT_AWIDTH-1]"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="5" MSB="0" NAME="BRAM_Din_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="6" MSB="0" NAME="BRAM_Dout_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst" DIR="I" MPD_INDEX="7" NAME="BRAM_Rst_B" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk" DIR="I" MPD_INDEX="8" NAME="BRAM_Clk_B" SIGIS="CLK" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN" DIR="I" MPD_INDEX="9" NAME="BRAM_EN_B" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="10" MSB="0" NAME="BRAM_WEN_B" RIGHT="3" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" VECFORMULA="[0:C_NUM_WE-1]"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="11" MSB="0" NAME="BRAM_Addr_B" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" VECFORMULA="[0:C_PORT_AWIDTH-1]"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="12" MSB="0" NAME="BRAM_Din_B" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="13" MSB="0" NAME="BRAM_Dout_B" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="PORTA" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Rst_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Clk_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_EN_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_WEN_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Addr_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Din_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Dout_A"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="PORTB" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Rst_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Clk_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_EN_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_WEN_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Addr_B"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Din_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Dout_B"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- </MODULE>
- <MODULE HWVERSION="3.00.a" INSTANCE="proc_sys_reset_0" IPTYPE="PERIPHERAL" MHS_INDEX="8" MODCLASS="PERIPHERAL" MODTYPE="proc_sys_reset">
- <DESCRIPTION TYPE="SHORT">Processor System Reset Module</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Reset management module</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/proc_sys_reset_v3_00_a/doc/proc_sys_reset.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_SUBFAMILY" TYPE="string" VALUE="t">
- <DESCRIPTION>Device Subfamily</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="1" NAME="C_EXT_RST_WIDTH" TYPE="integer" VALUE="4">
- <DESCRIPTION>Number of Clocks Before Input Change is Recognized On The External Reset Input </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="2" NAME="C_AUX_RST_WIDTH" TYPE="integer" VALUE="4">
- <DESCRIPTION>Number of Clocks Before Input Change is Recognized On The Auxiliary Reset Input </DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="3" NAME="C_EXT_RESET_HIGH" TYPE="std_logic" VALUE="1">
- <DESCRIPTION>External Reset Active High </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_AUX_RESET_HIGH" TYPE="std_logic" VALUE="1">
- <DESCRIPTION>Auxiliary Reset Active High </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="5" NAME="C_NUM_BUS_RST" TYPE="integer" VALUE="1">
- <DESCRIPTION>Number of Bus Structure Reset Registered Outputs </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_NUM_PERP_RST" TYPE="integer" VALUE="1">
- <DESCRIPTION>Number of Peripheral Reset Registered Outputs </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="7" NAME="C_NUM_INTERCONNECT_ARESETN" TYPE="integer" VALUE="1">
- <DESCRIPTION>Number of Active Low Interconnect Reset Registered Outputs </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_NUM_PERP_ARESETN" TYPE="integer" VALUE="1">
- <DESCRIPTION>Number of Active Low Peripheral Reset Registered Outputs </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="9" NAME="C_FAMILY" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="Ext_Reset_In" SIGIS="RST" SIGNAME="RESET"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="17" NAME="MB_Reset" SIGIS="RST" SIGNAME="proc_sys_reset_0_MB_Reset"/>
- <PORT CLKFREQUENCY="50000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="0" NAME="Slowest_sync_clk" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="20" NAME="Interconnect_aresetn" SIGIS="RST" SIGNAME="proc_sys_reset_0_Interconnect_aresetn" VECFORMULA="[0:C_NUM_INTERCONNECT_ARESETN-1]"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="10" NAME="Dcm_locked" SIGNAME="proc_sys_reset_0_Dcm_locked"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="3" NAME="MB_Debug_Sys_Rst" SIGIS="RST" SIGNAME="proc_sys_reset_0_MB_Debug_Sys_Rst"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="18" NAME="BUS_STRUCT_RESET" SIGIS="RST" SIGNAME="proc_sys_reset_0_BUS_STRUCT_RESET" VECFORMULA="[0:C_NUM_BUS_RST-1]"/>
- <PORT DIR="I" MPD_INDEX="2" NAME="Aux_Reset_In" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="4" NAME="Core_Reset_Req_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="5" NAME="Chip_Reset_Req_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="6" NAME="System_Reset_Req_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="Core_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="Chip_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="System_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="11" NAME="RstcPPCresetcore_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="12" NAME="RstcPPCresetchip_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="13" NAME="RstcPPCresetsys_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="14" NAME="RstcPPCresetcore_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="15" NAME="RstcPPCresetchip_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="16" NAME="RstcPPCresetsys_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="19" NAME="Peripheral_Reset" SIGIS="RST" SIGNAME="__NOC__" VECFORMULA="[0:C_NUM_PERP_RST-1]"/>
- <PORT DIR="O" MPD_INDEX="21" NAME="Peripheral_aresetn" SIGIS="RST" SIGNAME="__NOC__" VECFORMULA="[0:C_NUM_PERP_ARESETN-1]"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_VALID="FALSE" MPD_INDEX="0" NAME="RESETPPC0" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="Core_Reset_Req_0"/>
- <PORTMAP DIR="I" PHYSICAL="Chip_Reset_Req_0"/>
- <PORTMAP DIR="I" PHYSICAL="System_Reset_Req_0"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetcore_0"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetchip_0"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetsys_0"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_VALID="FALSE" MPD_INDEX="1" NAME="RESETPPC1" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="Core_Reset_Req_1"/>
- <PORTMAP DIR="I" PHYSICAL="Chip_Reset_Req_1"/>
- <PORTMAP DIR="I" PHYSICAL="System_Reset_Req_1"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetcore_1"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetchip_1"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetsys_1"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
- </IOINTERFACES>
- </MODULE>
- <MODULE HWVERSION="4.01.a" INSTANCE="clock_generator_0" IPTYPE="PERIPHERAL" MHS_INDEX="9" MODCLASS="IP" MODTYPE="clock_generator">
- <DESCRIPTION TYPE="SHORT">Clock Generator</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Clock generator for processor system.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/clock_generator_v4_01_a/doc/clock_generator.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_DEVICE" TYPE="STRING" VALUE="6slx45t">
- <DESCRIPTION>Device</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_PACKAGE" TYPE="STRING" VALUE="fgg484">
- <DESCRIPTION>Package</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPEEDGRADE" TYPE="STRING" VALUE="-3">
- <DESCRIPTION>Speed Grade</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="4" NAME="C_CLKIN_FREQ" TYPE="INTEGER" VALUE="200000000">
- <DESCRIPTION>Input Clock Frequency (Hz) </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="5" NAME="C_CLKOUT0_FREQ" TYPE="INTEGER" VALUE="600000000">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_CLKOUT0_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="7" NAME="C_CLKOUT0_GROUP" TYPE="STRING" VALUE="PLL0">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="8" NAME="C_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Buffered </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="9" NAME="C_CLKOUT0_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="10" NAME="C_CLKOUT1_FREQ" TYPE="INTEGER" VALUE="600000000">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="11" NAME="C_CLKOUT1_PHASE" TYPE="INTEGER" VALUE="180">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="12" NAME="C_CLKOUT1_GROUP" TYPE="STRING" VALUE="PLL0">
- <DESCRIPTION>Required Group </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="13" NAME="C_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="14" NAME="C_CLKOUT1_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="15" NAME="C_CLKOUT2_FREQ" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="16" NAME="C_CLKOUT2_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="17" NAME="C_CLKOUT2_GROUP" TYPE="STRING" VALUE="PLL0">
- <DESCRIPTION>Required Group </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="18" NAME="C_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="19" NAME="C_CLKOUT2_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Varaible Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="20" NAME="C_CLKOUT3_FREQ" TYPE="INTEGER" VALUE="125000000">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="21" NAME="C_CLKOUT3_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="22" NAME="C_CLKOUT3_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="23" NAME="C_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="24" NAME="C_CLKOUT3_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="14" MPD_INDEX="25" NAME="C_CLKOUT4_FREQ" TYPE="INTEGER" VALUE="200000000">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="26" NAME="C_CLKOUT4_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="15" MPD_INDEX="27" NAME="C_CLKOUT4_GROUP" TYPE="STRING" VALUE="PLL0">
- <DESCRIPTION>Required Group </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="28" NAME="C_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="29" NAME="C_CLKOUT4_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="16" MPD_INDEX="30" NAME="C_CLKOUT5_FREQ" TYPE="INTEGER" VALUE="50000000">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="31" NAME="C_CLKOUT5_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="17" MPD_INDEX="32" NAME="C_CLKOUT5_GROUP" TYPE="STRING" VALUE="PLL0">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="33" NAME="C_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="34" NAME="C_CLKOUT5_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="35" NAME="C_CLKOUT6_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="36" NAME="C_CLKOUT6_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="37" NAME="C_CLKOUT6_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="38" NAME="C_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="39" NAME="C_CLKOUT6_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="40" NAME="C_CLKOUT7_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="41" NAME="C_CLKOUT7_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="42" NAME="C_CLKOUT7_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="43" NAME="C_CLKOUT7_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="44" NAME="C_CLKOUT7_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="45" NAME="C_CLKOUT8_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="46" NAME="C_CLKOUT8_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="47" NAME="C_CLKOUT8_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="48" NAME="C_CLKOUT8_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="49" NAME="C_CLKOUT8_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="50" NAME="C_CLKOUT9_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="51" NAME="C_CLKOUT9_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="52" NAME="C_CLKOUT9_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="53" NAME="C_CLKOUT9_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="54" NAME="C_CLKOUT9_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION> Varaible Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="55" NAME="C_CLKOUT10_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="56" NAME="C_CLKOUT10_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="57" NAME="C_CLKOUT10_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="58" NAME="C_CLKOUT10_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="59" NAME="C_CLKOUT10_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="60" NAME="C_CLKOUT11_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="61" NAME="C_CLKOUT11_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="62" NAME="C_CLKOUT11_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="63" NAME="C_CLKOUT11_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="64" NAME="C_CLKOUT11_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="65" NAME="C_CLKOUT12_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="66" NAME="C_CLKOUT12_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="67" NAME="C_CLKOUT12_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="68" NAME="C_CLKOUT12_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="69" NAME="C_CLKOUT12_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION> Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="70" NAME="C_CLKOUT13_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="71" NAME="C_CLKOUT13_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="72" NAME="C_CLKOUT13_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="73" NAME="C_CLKOUT13_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="74" NAME="C_CLKOUT13_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="75" NAME="C_CLKOUT14_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="76" NAME="C_CLKOUT14_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="77" NAME="C_CLKOUT14_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="78" NAME="C_CLKOUT14_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="79" NAME="C_CLKOUT14_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="80" NAME="C_CLKOUT15_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="81" NAME="C_CLKOUT15_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="82" NAME="C_CLKOUT15_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="83" NAME="C_CLKOUT15_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="84" NAME="C_CLKOUT15_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION> Variable Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="85" NAME="C_CLKFBIN_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="86" NAME="C_CLKFBIN_DESKEW" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Clock Deskew</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="87" NAME="C_CLKFBOUT_FREQ" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Frequency (Hz)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="88" NAME="C_CLKFBOUT_PHASE" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Required Phase</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="89" NAME="C_CLKFBOUT_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Required Group</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="90" NAME="C_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="TRUE">
- <DESCRIPTION>Buffered</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="91" NAME="C_PSDONE_GROUP" TYPE="STRING" VALUE="NONE">
- <DESCRIPTION>Variable Phase Shift</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="92" NAME="C_EXT_RESET_HIGH" VALUE="1"/>
- <PARAMETER MPD_INDEX="93" NAME="C_CLK_PRIMITIVE_FEEDBACK_BUF" TYPE="BOOLEAN" VALUE="FALSE">
- <DESCRIPTION>Clock Primitive Feedback Buffer</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="94" NAME="C_CLK_GEN" VALUE="UPDATE"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="23" NAME="RST" SIGIS="RST" SIGNAME="RESET"/>
- <PORT CLKFREQUENCY="200000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="CLKIN" SIGIS="CLK" SIGNAME="CLK"/>
- <PORT CLKFREQUENCY="100000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="3" NAME="CLKOUT2" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="50000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="6" NAME="CLKOUT5" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="125000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="CLKOUT3" SIGIS="CLK" SIGNAME="clk_125_0000MHz"/>
- <PORT CLKFREQUENCY="200000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="5" NAME="CLKOUT4" SIGIS="CLK" SIGNAME="clk_200_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="600000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="1" NAME="CLKOUT0" SIGIS="CLK" SIGNAME="clk_600_0000MHzPLL0_nobuf"/>
- <PORT CLKFREQUENCY="600000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="2" NAME="CLKOUT1" SIGIS="CLK" SIGNAME="clk_600_0000MHz180PLL0_nobuf"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="24" NAME="LOCKED" SIGNAME="proc_sys_reset_0_Dcm_locked"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="7" NAME="CLKOUT6" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="8" NAME="CLKOUT7" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="9" NAME="CLKOUT8" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="10" NAME="CLKOUT9" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="11" NAME="CLKOUT10" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="12" NAME="CLKOUT11" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="13" NAME="CLKOUT12" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="14" NAME="CLKOUT13" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="15" NAME="CLKOUT14" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="16" NAME="CLKOUT15" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="17" NAME="CLKFBIN" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="18" NAME="CLKFBOUT" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="I" MPD_INDEX="19" NAME="PSCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="I" MPD_INDEX="20" NAME="PSEN" SIGNAME="__NOC__"/>
- <PORT DIR="I" MPD_INDEX="21" NAME="PSINCDEC" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="22" NAME="PSDONE" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES/>
- </MODULE>
- <MODULE HWVERSION="2.00.b" INSTANCE="debug_module" IPTYPE="PERIPHERAL" MHS_INDEX="10" MODCLASS="DEBUG" MODTYPE="mdm">
- <DESCRIPTION TYPE="SHORT">MicroBlaze Debug Module (MDM)</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Debug module for MicroBlaze Soft Processor.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/mdm_v2_00_b/doc/mdm.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="1" NAME="C_JTAG_CHAIN" TYPE="INTEGER" VALUE="2">
- <DESCRIPTION>Specifies the JTAG user-defined register used </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="C_INTERCONNECT" TYPE="INTEGER" VALUE="2">
- <DESCRIPTION>Specifies the Bus Interface for the JTAG UART </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="3" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x74800000">
- <DESCRIPTION>Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="4" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x7480FFFF">
- <DESCRIPTION>High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="5" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>PLB Address Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>PLB Data Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="7" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>PLB Slave Uses P2P Topology</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="3">
- <DESCRIPTION>Master ID Bus Width of PLB</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="9" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="8">
- <DESCRIPTION>Number of PLB Masters</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>Native Data Bus Width of PLB Slave</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="11" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>PLB Slave is Capable of Bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="12" NAME="C_MB_DBG_PORTS" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Number of MicroBlaze debug ports </DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="13" NAME="C_USE_UART" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Enable JTAG UART </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="14" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="16" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>AXI4LITE protocal</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="4" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="Debug_SYS_Rst" SIGNAME="proc_sys_reset_0_MB_Debug_Sys_Rst"/>
- <PORT DIR="O" MPD_INDEX="0" NAME="Interrupt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DEF_SIGNAME="Ext_BRK" DIR="O" MPD_INDEX="2" NAME="Ext_BRK" SIGNAME="Ext_BRK"/>
- <PORT DEF_SIGNAME="Ext_NM_BRK" DIR="O" MPD_INDEX="3" NAME="Ext_NM_BRK" SIGNAME="Ext_NM_BRK"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="5" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="6" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="7" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="8" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="9" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="10" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[(C_S_AXI_DATA_WIDTH/8-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="11" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="12" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="13" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="14" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="15" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="16" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="17" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="18" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="19" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="20" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="21" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="22" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="23" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="24" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="25" MSB="0" NAME="PLB_ABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="26" MSB="0" NAME="PLB_UABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="27" NAME="PLB_PAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="28" NAME="PLB_SAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="29" NAME="PLB_rdPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="30" NAME="PLB_wrPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="2" MPD_INDEX="31" MSB="0" NAME="PLB_masterID" RIGHT="2" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="32" NAME="PLB_abort" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="33" NAME="PLB_busLock" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="34" NAME="PLB_RNW" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="35" MSB="0" NAME="PLB_BE" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="36" MSB="0" NAME="PLB_MSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="37" MSB="0" NAME="PLB_size" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="2" MPD_INDEX="38" MSB="0" NAME="PLB_type" RIGHT="2" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="39" NAME="PLB_lockErr" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="40" MSB="0" NAME="PLB_wrDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="41" NAME="PLB_wrBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="42" NAME="PLB_rdBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="43" NAME="PLB_wrPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="44" NAME="PLB_rdPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="45" MSB="0" NAME="PLB_wrPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="46" MSB="0" NAME="PLB_rdPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="47" MSB="0" NAME="PLB_reqPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="15" MPD_INDEX="48" MSB="0" NAME="PLB_TAttribute" RIGHT="15" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="49" NAME="Sl_addrAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="50" MSB="0" NAME="Sl_SSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="51" NAME="Sl_wait" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="52" NAME="Sl_rearbitrate" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="53" NAME="Sl_wrDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="54" NAME="Sl_wrComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="55" NAME="Sl_wrBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="56" MSB="0" NAME="Sl_rdDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="57" MSB="0" NAME="Sl_rdWdAddr" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="58" NAME="Sl_rdDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="59" NAME="Sl_rdComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="60" NAME="Sl_rdBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="61" MSB="0" NAME="Sl_MBusy" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="62" MSB="0" NAME="Sl_MWrErr" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="63" MSB="0" NAME="Sl_MRdErr" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="64" MSB="0" NAME="Sl_MIRQ" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Clk" DIR="O" MPD_INDEX="65" NAME="Dbg_Clk_0" SIGNAME="microblaze_0_debug_Dbg_Clk"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_TDI" DIR="O" MPD_INDEX="66" NAME="Dbg_TDI_0" SIGNAME="microblaze_0_debug_Dbg_TDI"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_TDO" DIR="I" MPD_INDEX="67" NAME="Dbg_TDO_0" SIGNAME="microblaze_0_debug_Dbg_TDO"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Reg_En" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="68" MSB="0" NAME="Dbg_Reg_En_0" RIGHT="7" SIGNAME="microblaze_0_debug_Dbg_Reg_En" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Capture" DIR="O" MPD_INDEX="69" NAME="Dbg_Capture_0" SIGNAME="microblaze_0_debug_Dbg_Capture"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Shift" DIR="O" MPD_INDEX="70" NAME="Dbg_Shift_0" SIGNAME="microblaze_0_debug_Dbg_Shift"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Update" DIR="O" MPD_INDEX="71" NAME="Dbg_Update_0" SIGNAME="microblaze_0_debug_Dbg_Update"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Debug_Rst" DIR="O" MPD_INDEX="72" NAME="Dbg_Rst_0" SIGNAME="microblaze_0_debug_Debug_Rst"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="73" NAME="Dbg_Clk_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="74" NAME="Dbg_TDI_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="75" NAME="Dbg_TDO_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="76" MSB="0" NAME="Dbg_Reg_En_1" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="77" NAME="Dbg_Capture_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="78" NAME="Dbg_Shift_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="79" NAME="Dbg_Update_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="80" NAME="Dbg_Rst_1" SIGNAME="__NOC__"/>
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- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="82" NAME="Dbg_TDI_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="83" NAME="Dbg_TDO_2" SIGNAME="__NOC__"/>
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- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="85" NAME="Dbg_Capture_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="86" NAME="Dbg_Shift_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="87" NAME="Dbg_Update_2" SIGNAME="__NOC__"/>
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- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="91" NAME="Dbg_TDO_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="92" MSB="0" NAME="Dbg_Reg_En_3" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="93" NAME="Dbg_Capture_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="94" NAME="Dbg_Shift_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="95" NAME="Dbg_Update_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="96" NAME="Dbg_Rst_3" SIGNAME="__NOC__"/>
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- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="98" NAME="Dbg_TDI_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="99" NAME="Dbg_TDO_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="100" MSB="0" NAME="Dbg_Reg_En_4" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="101" NAME="Dbg_Capture_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="102" NAME="Dbg_Shift_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="103" NAME="Dbg_Update_4" SIGNAME="__NOC__"/>
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- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="107" NAME="Dbg_TDO_5" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="108" MSB="0" NAME="Dbg_Reg_En_5" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="109" NAME="Dbg_Capture_5" SIGNAME="__NOC__"/>
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- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="116" MSB="0" NAME="Dbg_Reg_En_6" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="117" NAME="Dbg_Capture_6" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="118" NAME="Dbg_Shift_6" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="119" NAME="Dbg_Update_6" SIGNAME="__NOC__"/>
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- <PORT BUS="MBDEBUG_7" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="125" NAME="Dbg_Capture_7" SIGNAME="__NOC__"/>
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- <PORT DEF_SIGNAME="bscan_tdo1" DIR="I" MPD_INDEX="136" NAME="bscan_tdo1" SIGNAME="bscan_tdo1"/>
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- <PORT BUS="XMTC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="138" NAME="Ext_JTAG_RESET" SIGNAME="__NOC__"/>
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- </BUSINTERFACE>
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- </PORTMAPS>
- </BUSINTERFACE>
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- </PORTMAPS>
- </BUSINTERFACE>
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- </PORTMAPS>
- </BUSINTERFACE>
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- </PORTMAPS>
- </BUSINTERFACE>
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- </PORTMAPS>
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- </PORTMAPS>
- </BUSINTERFACE>
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- </PORTMAPS>
- </BUSINTERFACE>
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- <PORTMAP DIR="I" PHYSICAL="Dbg_TDO_7"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Reg_En_7"/>
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- <PORTMAP DIR="O" PHYSICAL="Dbg_Shift_7"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Update_7"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Rst_7"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_BSCAN" MPD_INDEX="10" NAME="XMTC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_DRCK"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_RESET"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_SEL"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_CAPTURE"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_SHIFT"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_UPDATE"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_TDI"/>
- <PORTMAP DIR="I" PHYSICAL="Ext_JTAG_TDO"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480FFFF" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="SPLB"/>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="RS232_Uart_1" IPTYPE="PERIPHERAL" MHS_INDEX="11" MODCLASS="PERIPHERAL" MODTYPE="axi_uartlite">
- <DESCRIPTION TYPE="SHORT">AXI UART (Lite)</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Generic UART (Universal Asynchronous Receiver/Transmitter) for AXI.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_uartlite_v1_01_a/doc/axi_uartlite_ds741.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_S_AXI_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="50000000">
- <DESCRIPTION>AXI Clock Frequency </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="2" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40600000">
- <DESCRIPTION>AXI Base Address </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="3" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4060ffff">
- <DESCRIPTION>AXI High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="5" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="6" NAME="C_BAUDRATE" TYPE="INTEGER" VALUE="115200">
- <DESCRIPTION>UART Lite Baud Rate </DESCRIPTION>
- <DESCRIPTION>Baud Rate</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="7" NAME="C_DATA_BITS" TYPE="INTEGER" VALUE="8">
- <DESCRIPTION>Number of Data Bits in a Serial Frame</DESCRIPTION>
- <DESCRIPTION>Data Bits</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="8" NAME="C_USE_PARITY" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Use Parity </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="9" NAME="C_ODD_PARITY" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Parity Type </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>AXI4LITE protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="O" IOS="uart_0" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="21" NAME="TX" SIGNAME="RS232_Uart_1_sout">
- <DESCRIPTION>Serial Data Out</DESCRIPTION>
- </PORT>
- <PORT DIR="I" IOS="uart_0" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="20" NAME="RX" SIGNAME="RS232_Uart_1_sin">
- <DESCRIPTION>Serial Data In</DESCRIPTION>
- </PORT>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="2" NAME="Interrupt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="RS232_Uart_1_Interrupt"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="3" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="4" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="5" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="6" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="7" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="8" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="9" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="10" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="11" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="12" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="13" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="14" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="15" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="16" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="17" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="18" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="19" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="uart_0" TYPE="XIL_UART_V1_hide">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="TX"/>
- <PORTMAP DIR="I" PHYSICAL="RX"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1080033280" BASENAME="C_BASEADDR" BASEVALUE="0x40600000" HIGHDECIMAL="1080098815" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4060ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="4"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="LEDs_4Bits" IPTYPE="PERIPHERAL" MHS_INDEX="12" MODCLASS="PERIPHERAL" MODTYPE="axi_gpio">
- <DESCRIPTION TYPE="SHORT">AXI General Purpose IO</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the AXI bus.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_gpio_v1_01_a/doc/ds744_axi_gpio.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40020000">
- <DESCRIPTION>AXI Base Address </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4002ffff">
- <DESCRIPTION>AXI High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="3" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="5" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="4">
- <DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
- <DESCRIPTION>GPIO Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="7" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="9" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="11" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
- <DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="12" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Enable Channel 2 </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="13" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="14" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
- <DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>AXI4LITE protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_INSTANTIATED="TRUE" LEFT="3" LSB="0" MHS_INDEX="0" MPD_INDEX="21" MSB="3" NAME="GPIO_IO_O" RIGHT="0" SIGNAME="LEDs_4Bits_TRI_O" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="2" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="3" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="4" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="5" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="6" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="7" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="8" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="9" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="10" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="11" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="12" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="13" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="14" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="15" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="16" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="17" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="18" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="19" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="gpio_0" LEFT="3" LSB="0" MPD_INDEX="20" MSB="3" NAME="GPIO_IO_I" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" LEFT="3" LSB="0" MPD_INDEX="22" MSB="3" NAME="GPIO_IO_T" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="23" MSB="31" NAME="GPIO2_IO_I" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="24" MSB="31" NAME="GPIO2_IO_O" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="25" MSB="31" NAME="GPIO2_IO_T" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="gpio_0" IS_THREE_STATE="TRUE" LEFT="3" LSB="0" MPD_INDEX="26" MSB="3" NAME="GPIO_IO" RIGHT="0" SIGNAME="__NOC__" TRI_I="GPIO_IO_I" TRI_O="GPIO_IO_O" TRI_T="GPIO_IO_T" VECFORMULA="[(C_GPIO_WIDTH-1):0]">
- <DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
- </PORT>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="gpio_0" IS_THREE_STATE="TRUE" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="27" MSB="31" NAME="GPIO2_IO" RIGHT="0" SIGNAME="__NOC__" TRI_I="GPIO2_IO_I" TRI_O="GPIO2_IO_O" TRI_T="GPIO2_IO_T" VECFORMULA="[(C_GPIO2_WIDTH-1):0]">
- <DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
- </PORT>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="gpio_0" TYPE="XIL_AXI_GPIO_V1">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="GPIO_IO_O"/>
- <PORTMAP DIR="I" PHYSICAL="GPIO_IO_I"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO_IO_T"/>
- <PORTMAP DIR="I" PHYSICAL="GPIO2_IO_I"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO2_IO_O"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO2_IO_T"/>
- <PORTMAP DIR="IO" PHYSICAL="GPIO_IO"/>
- <PORTMAP DIR="IO" PHYSICAL="GPIO2_IO"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1073872896" BASENAME="C_BASEADDR" BASEVALUE="0x40020000" HIGHDECIMAL="1073938431" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4002ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="Push_Buttons_4Bits" IPTYPE="PERIPHERAL" MHS_INDEX="13" MODCLASS="PERIPHERAL" MODTYPE="axi_gpio">
- <DESCRIPTION TYPE="SHORT">AXI General Purpose IO</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the AXI bus.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_gpio_v1_01_a/doc/ds744_axi_gpio.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40000000">
- <DESCRIPTION>AXI Base Address </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4000ffff">
- <DESCRIPTION>AXI High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="3" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="5" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="4">
- <DESCRIPTION>GPIO Data Channel Width</DESCRIPTION>
- <DESCRIPTION>GPIO Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>GPIO2 Data Channel Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="7" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Channel 1 is Input Only </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Channel 2 is Input Only </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="9" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>GPIO Supports Interrupts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>Channel 1 Data Out Default Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="11" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff">
- <DESCRIPTION>Channel 1 Tri-state Default Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="12" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Enable Channel 2 </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="13" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000">
- <DESCRIPTION>Channel 2 Data Out Default Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="14" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff">
- <DESCRIPTION>Channel 2 Tri-state Default Value </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>AXI4LITE protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="gpio_0" IS_INSTANTIATED="TRUE" LEFT="3" LSB="0" MHS_INDEX="0" MPD_INDEX="20" MSB="3" NAME="GPIO_IO_I" RIGHT="0" SIGNAME="Push_Buttons_4Bits_TRI_I" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="19" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="Push_Buttons_4Bits_IP2INTC_Irpt"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="2" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="3" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="4" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="5" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="6" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="7" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="8" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="9" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="10" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="11" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="12" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="13" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="14" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="15" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="16" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="17" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="18" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" LEFT="3" LSB="0" MPD_INDEX="21" MSB="3" NAME="GPIO_IO_O" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" LEFT="3" LSB="0" MPD_INDEX="22" MSB="3" NAME="GPIO_IO_T" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="23" MSB="31" NAME="GPIO2_IO_I" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="24" MSB="31" NAME="GPIO2_IO_O" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="25" MSB="31" NAME="GPIO2_IO_T" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="gpio_0" IS_THREE_STATE="TRUE" LEFT="3" LSB="0" MPD_INDEX="26" MSB="3" NAME="GPIO_IO" RIGHT="0" SIGNAME="__NOC__" TRI_I="GPIO_IO_I" TRI_O="GPIO_IO_O" TRI_T="GPIO_IO_T" VECFORMULA="[(C_GPIO_WIDTH-1):0]">
- <DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
- </PORT>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="gpio_0" IS_THREE_STATE="TRUE" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="27" MSB="31" NAME="GPIO2_IO" RIGHT="0" SIGNAME="__NOC__" TRI_I="GPIO2_IO_I" TRI_O="GPIO2_IO_O" TRI_T="GPIO2_IO_T" VECFORMULA="[(C_GPIO2_WIDTH-1):0]">
- <DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
- </PORT>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="gpio_0" TYPE="XIL_AXI_GPIO_V1">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="GPIO_IO_I"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO_IO_O"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO_IO_T"/>
- <PORTMAP DIR="I" PHYSICAL="GPIO2_IO_I"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO2_IO_O"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO2_IO_T"/>
- <PORTMAP DIR="IO" PHYSICAL="GPIO_IO"/>
- <PORTMAP DIR="IO" PHYSICAL="GPIO2_IO"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1073741824" BASENAME="C_BASEADDR" BASEVALUE="0x40000000" HIGHDECIMAL="1073807359" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4000ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="3"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="1.02.a" INSTANCE="MCB_DDR3" IPTYPE="PERIPHERAL" MHS_INDEX="14" MODCLASS="MEMORY_CNTLR" MODTYPE="axi_s6_ddrx">
- <DESCRIPTION TYPE="SHORT">AXI S6 Memory Controller(DDR/DDR2/DDR3)</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Spartan-6 memory controller</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_s6_ddrx_v1_02_a/doc/axi_s6_ddrx.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_MCB_LOC" VALUE="MEMC3"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="1" NAME="C_MCB_RZQ_LOC" TYPE="STRING" VALUE="K7"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="2" NAME="C_MCB_ZIO_LOC" TYPE="STRING" VALUE="R7"/>
- <PARAMETER MPD_INDEX="3" NAME="C_MCB_PERFORMANCE" TYPE="STRING" VALUE="STANDARD"/>
- <PARAMETER MPD_INDEX="4" NAME="C_BYPASS_CORE_UCF" VALUE="0"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="5" NAME="C_S0_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x80000000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="6" NAME="C_S0_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x807FFFFF"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="7" NAME="C_S1_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="8" NAME="C_S1_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="9" NAME="C_S2_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="10" NAME="C_S2_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="11" NAME="C_S3_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="12" NAME="C_S3_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="13" NAME="C_S4_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="14" NAME="C_S4_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="15" NAME="C_S5_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="16" NAME="C_S5_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="17" NAME="C_MEM_TYPE" TYPE="STRING" VALUE="DDR3"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="18" NAME="C_MEM_PARTNO" TYPE="STRING" VALUE="MT41J64M16XX-187E"/>
- <PARAMETER MPD_INDEX="19" NAME="C_MEM_BASEPARTNO" TYPE="STRING" VALUE="NOT_SET"/>
- <PARAMETER MPD_INDEX="20" NAME="C_NUM_DQ_PINS" TYPE="INTEGER" VALUE="16"/>
- <PARAMETER MPD_INDEX="21" NAME="C_MEM_ADDR_WIDTH" TYPE="INTEGER" VALUE="13"/>
- <PARAMETER MPD_INDEX="22" NAME="C_MEM_BANKADDR_WIDTH" TYPE="INTEGER" VALUE="3"/>
- <PARAMETER MPD_INDEX="23" NAME="C_MEM_NUM_COL_BITS" TYPE="INTEGER" VALUE="10"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="24" NAME="C_MEM_TRAS" TYPE="INTEGER" VALUE="37500"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="25" NAME="C_MEM_TRCD" TYPE="INTEGER" VALUE="13130"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="26" NAME="C_MEM_TREFI" TYPE="INTEGER" VALUE="7800000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="27" NAME="C_MEM_TRFC" TYPE="INTEGER" VALUE="160000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="28" NAME="C_MEM_TRP" TYPE="INTEGER" VALUE="13130"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="29" NAME="C_MEM_TWR" TYPE="INTEGER" VALUE="15000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="30" NAME="C_MEM_TRTP" TYPE="INTEGER" VALUE="7500"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="31" NAME="C_MEM_TWTR" TYPE="INTEGER" VALUE="7500"/>
- <PARAMETER MPD_INDEX="32" NAME="C_PORT_CONFIG" TYPE="STRING" VALUE="B32_B32_B32_B32"/>
- <PARAMETER MPD_INDEX="33" NAME="C_SKIP_IN_TERM_CAL" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="34" NAME="C_SKIP_IN_TERM_CAL_VALUE" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="35" NAME="C_MEMCLK_PERIOD" TYPE="INTEGER" VALUE="3333"/>
- <PARAMETER MPD_INDEX="36" NAME="C_MEM_ADDR_ORDER" TYPE="STRING" VALUE="ROW_BANK_COLUMN"/>
- <PARAMETER MPD_INDEX="37" NAME="C_MEM_TZQINIT_MAXCNT" TYPE="INTEGER" VALUE="512"/>
- <PARAMETER MPD_INDEX="38" NAME="C_MEM_CAS_LATENCY" TYPE="INTEGER" VALUE="6"/>
- <PARAMETER MPD_INDEX="39" NAME="C_SIMULATION" TYPE="STRING" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="40" NAME="C_MEM_DDR1_2_ODS" TYPE="STRING" VALUE="FULL"/>
- <PARAMETER MPD_INDEX="41" NAME="C_MEM_DDR1_2_ADDR_CONTROL_SSTL_ODS" TYPE="STRING" VALUE="CLASS_II"/>
- <PARAMETER MPD_INDEX="42" NAME="C_MEM_DDR1_2_DATA_CONTROL_SSTL_ODS" TYPE="STRING" VALUE="CLASS_II"/>
- <PARAMETER MPD_INDEX="43" NAME="C_MEM_DDR2_RTT" TYPE="STRING" VALUE="150OHMS"/>
- <PARAMETER MPD_INDEX="44" NAME="C_MEM_DDR2_DIFF_DQS_EN" TYPE="STRING" VALUE="YES"/>
- <PARAMETER MPD_INDEX="45" NAME="C_MEM_DDR2_3_PA_SR" TYPE="STRING" VALUE="FULL"/>
- <PARAMETER MPD_INDEX="46" NAME="C_MEM_DDR2_3_HIGH_TEMP_SR" TYPE="STRING" VALUE="NORMAL"/>
- <PARAMETER MPD_INDEX="47" NAME="C_MEM_DDR3_CAS_WR_LATENCY" TYPE="INTEGER" VALUE="5"/>
- <PARAMETER MPD_INDEX="48" NAME="C_MEM_DDR3_CAS_LATENCY" TYPE="INTEGER" VALUE="6"/>
- <PARAMETER MPD_INDEX="49" NAME="C_MEM_DDR3_ODS" TYPE="STRING" VALUE="DIV6"/>
- <PARAMETER MPD_INDEX="50" NAME="C_MEM_DDR3_RTT" TYPE="STRING" VALUE="DIV4"/>
- <PARAMETER MPD_INDEX="51" NAME="C_MEM_DDR3_AUTO_SR" TYPE="STRING" VALUE="ENABLED"/>
- <PARAMETER MPD_INDEX="52" NAME="C_MEM_MOBILE_PA_SR" TYPE="STRING" VALUE="FULL"/>
- <PARAMETER MPD_INDEX="53" NAME="C_MEM_MDDR_ODS" TYPE="STRING" VALUE="FULL"/>
- <PARAMETER MPD_INDEX="54" NAME="C_ARB_ALGORITHM" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="55" NAME="C_ARB_NUM_TIME_SLOTS" TYPE="INTEGER" VALUE="12"/>
- <PARAMETER MPD_INDEX="56" NAME="C_ARB_TIME_SLOT_0" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000000001010011"/>
- <PARAMETER MPD_INDEX="57" NAME="C_ARB_TIME_SLOT_1" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000001010011000"/>
- <PARAMETER MPD_INDEX="58" NAME="C_ARB_TIME_SLOT_2" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000010011000001"/>
- <PARAMETER MPD_INDEX="59" NAME="C_ARB_TIME_SLOT_3" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000011000001010"/>
- <PARAMETER MPD_INDEX="60" NAME="C_ARB_TIME_SLOT_4" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000000001010011"/>
- <PARAMETER MPD_INDEX="61" NAME="C_ARB_TIME_SLOT_5" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000001010011000"/>
- <PARAMETER MPD_INDEX="62" NAME="C_ARB_TIME_SLOT_6" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000010011000001"/>
- <PARAMETER MPD_INDEX="63" NAME="C_ARB_TIME_SLOT_7" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000011000001010"/>
- <PARAMETER MPD_INDEX="64" NAME="C_ARB_TIME_SLOT_8" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000000001010011"/>
- <PARAMETER MPD_INDEX="65" NAME="C_ARB_TIME_SLOT_9" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000001010011000"/>
- <PARAMETER MPD_INDEX="66" NAME="C_ARB_TIME_SLOT_10" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000010011000001"/>
- <PARAMETER MPD_INDEX="67" NAME="C_ARB_TIME_SLOT_11" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000011000001010"/>
- <PARAMETER MPD_INDEX="68" NAME="C_S0_AXI_ENABLE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="69" NAME="C_S0_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="70" NAME="C_S0_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="3"/>
- <PARAMETER MPD_INDEX="71" NAME="C_S0_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="72" NAME="C_S0_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="73" NAME="C_S0_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="74" NAME="C_S0_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="75" NAME="C_S0_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="76" NAME="C_S0_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000"/>
- <PARAMETER MPD_INDEX="77" NAME="C_S0_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="78" NAME="C_S0_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="79" NAME="C_S0_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="80" NAME="C_INTERCONNECT_S0_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="81" NAME="C_INTERCONNECT_S0_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="82" NAME="C_S1_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="83" NAME="C_S1_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="84" NAME="C_S1_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="85" NAME="C_S1_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="86" NAME="C_S1_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="87" NAME="C_S1_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="88" NAME="C_S1_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="89" NAME="C_S1_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="90" NAME="C_S1_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000F"/>
- <PARAMETER MPD_INDEX="91" NAME="C_S1_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="92" NAME="C_S1_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="93" NAME="C_S1_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="94" NAME="C_INTERCONNECT_S1_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="95" NAME="C_INTERCONNECT_S1_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="96" NAME="C_S2_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="97" NAME="C_S2_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="98" NAME="C_S2_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="99" NAME="C_S2_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="100" NAME="C_S2_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="101" NAME="C_S2_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="102" NAME="C_S2_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="103" NAME="C_S2_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="104" NAME="C_S2_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000F"/>
- <PARAMETER MPD_INDEX="105" NAME="C_S2_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="106" NAME="C_S2_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="107" NAME="C_S2_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="108" NAME="C_INTERCONNECT_S2_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="109" NAME="C_INTERCONNECT_S2_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="110" NAME="C_S3_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="111" NAME="C_S3_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="112" NAME="C_S3_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="113" NAME="C_S3_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="114" NAME="C_S3_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="115" NAME="C_S3_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="116" NAME="C_S3_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="117" NAME="C_S3_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="118" NAME="C_S3_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000F"/>
- <PARAMETER MPD_INDEX="119" NAME="C_S3_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="120" NAME="C_S3_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="121" NAME="C_S3_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="122" NAME="C_INTERCONNECT_S3_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="123" NAME="C_INTERCONNECT_S3_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="124" NAME="C_S4_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="125" NAME="C_S4_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="126" NAME="C_S4_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="127" NAME="C_S4_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="128" NAME="C_S4_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="129" NAME="C_S4_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="130" NAME="C_S4_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="131" NAME="C_S4_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="132" NAME="C_S4_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000F"/>
- <PARAMETER MPD_INDEX="133" NAME="C_S4_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="134" NAME="C_S4_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="135" NAME="C_S4_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="136" NAME="C_INTERCONNECT_S4_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="137" NAME="C_INTERCONNECT_S4_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="138" NAME="C_S5_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="139" NAME="C_S5_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="140" NAME="C_S5_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="141" NAME="C_S5_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="142" NAME="C_S5_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="143" NAME="C_S5_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="144" NAME="C_S5_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="145" NAME="C_S5_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="146" NAME="C_S5_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000F"/>
- <PARAMETER MPD_INDEX="147" NAME="C_S5_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="148" NAME="C_S5_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="149" NAME="C_S5_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="150" NAME="C_INTERCONNECT_S5_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="151" NAME="C_INTERCONNECT_S5_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="152" NAME="C_MCB_USE_EXTERNAL_BUFPLL" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="153" NAME="C_SYS_RST_PRESENT" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S0_AXI_MASTERS" VALUE="microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S0_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S0_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S0_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" NAME="C_INTERCONNECT_S0_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S0_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="17" NAME="mcbx_dram_clk" SIGIS="CLK" SIGNAME="mcbx_dram_clk"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="18" NAME="mcbx_dram_clk_n" SIGIS="CLK" SIGNAME="mcbx_dram_clk_n"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="16" NAME="mcbx_dram_cke" SIGNAME="mcbx_dram_cke"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="26" NAME="mcbx_dram_odt" SIGNAME="mcbx_dram_odt"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="13" NAME="mcbx_dram_ras_n" SIGNAME="mcbx_dram_ras_n"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="14" NAME="mcbx_dram_cas_n" SIGNAME="mcbx_dram_cas_n"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="15" NAME="mcbx_dram_we_n" SIGNAME="mcbx_dram_we_n"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="24" NAME="mcbx_dram_udm" SIGNAME="mcbx_dram_udm"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="25" NAME="mcbx_dram_ldm" SIGNAME="mcbx_dram_ldm"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="memory_0" IS_INSTANTIATED="TRUE" LEFT="2" LSB="0" MHS_INDEX="9" MPD_INDEX="12" MSB="2" NAME="mcbx_dram_ba" RIGHT="0" SIGNAME="mcbx_dram_ba" VECFORMULA="[C_MEM_BANKADDR_WIDTH-1:0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="memory_0" IS_INSTANTIATED="TRUE" LEFT="12" LSB="0" MHS_INDEX="10" MPD_INDEX="11" MSB="12" NAME="mcbx_dram_addr" RIGHT="0" SIGNAME="mcbx_dram_addr" VECFORMULA="[C_MEM_ADDR_WIDTH-1:0]"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="27" NAME="mcbx_dram_ddr3_rst" SIGNAME="mcbx_dram_ddr3_rst"/>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" LEFT="15" LSB="0" MHS_INDEX="12" MPD_INDEX="19" MSB="15" NAME="mcbx_dram_dq" RIGHT="0" SIGNAME="mcbx_dram_dq" VECFORMULA="[C_NUM_DQ_PINS-1:0]"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="13" MPD_INDEX="20" NAME="mcbx_dram_dqs" SIGNAME="mcbx_dram_dqs"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="14" MPD_INDEX="21" NAME="mcbx_dram_dqs_n" SIGNAME="mcbx_dram_dqs_n"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="15" MPD_INDEX="22" NAME="mcbx_dram_udqs" SIGNAME="mcbx_dram_udqs"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="16" MPD_INDEX="23" NAME="mcbx_dram_udqs_n" SIGNAME="mcbx_dram_udqs_n"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="17" MPD_INDEX="28" NAME="rzq" SIGNAME="rzq"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="18" MPD_INDEX="29" NAME="zio" SIGNAME="zio"/>
- <PORT BUS="S0_AXI" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="19" MPD_INDEX="32" NAME="s0_axi_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="100000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="20" MPD_INDEX="30" NAME="ui_clk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="600000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="21" MPD_INDEX="0" NAME="sysclk_2x" SIGIS="CLK" SIGNAME="clk_600_0000MHzPLL0_nobuf"/>
- <PORT CLKFREQUENCY="600000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="22" MPD_INDEX="1" NAME="sysclk_2x_180" SIGIS="CLK" SIGNAME="clk_600_0000MHz180PLL0_nobuf"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="23" MPD_INDEX="10" NAME="SYS_RST" SIGIS="RST" SIGNAME="proc_sys_reset_0_BUS_STRUCT_RESET"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="24" MPD_INDEX="4" NAME="PLL_LOCK" SIGNAME="proc_sys_reset_0_Dcm_locked"/>
- <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="2" NAME="pll_ce_0" SIGNAME="__NOC__"/>
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- <PORTMAP DIR="I" PHYSICAL="s0_axi_awaddr"/>
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- <PORTMAP DIR="I" PHYSICAL="s0_axi_awcache"/>
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- <PORTMAP DIR="I" PHYSICAL="s0_axi_rready"/>
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- <MASTER BUSINTERFACE="M_AXI_DC" INSTANCE="microblaze_0"/>
- <MASTER BUSINTERFACE="M_AXI_IC" INSTANCE="microblaze_0"/>
- <MASTER BUSINTERFACE="M_AXI_SG" INSTANCE="ETHERNET_dma"/>
- <MASTER BUSINTERFACE="M_AXI_MM2S" INSTANCE="ETHERNET_dma"/>
- <MASTER BUSINTERFACE="M_AXI_S2MM" INSTANCE="ETHERNET_dma"/>
- </MASTERS>
- </BUSINTERFACE>
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- <PORTMAP DIR="I" PHYSICAL="s1_axi_awaddr"/>
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- <PORTMAP DIR="I" PHYSICAL="s1_axi_awcache"/>
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- <PORTMAP DIR="I" PHYSICAL="s1_axi_awqos"/>
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- <PORTMAP DIR="I" PHYSICAL="s1_axi_wlast"/>
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- <PORTMAP DIR="O" PHYSICAL="s1_axi_bid"/>
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- <PORTMAP DIR="O" PHYSICAL="s1_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arid"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_araddr"/>
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- <PORTMAP DIR="I" PHYSICAL="s1_axi_arsize"/>
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- <PORTMAP DIR="I" PHYSICAL="s1_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_arready"/>
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- <PORTMAP DIR="O" PHYSICAL="s1_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
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- <PORTMAP DIR="I" PHYSICAL="s2_axi_awaddr"/>
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- <PORTMAP DIR="I" PHYSICAL="s2_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_awready"/>
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- <PORTMAP DIR="I" PHYSICAL="s2_axi_wlast"/>
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- <PORTMAP DIR="I" PHYSICAL="s2_axi_araddr"/>
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- <PORTMAP DIR="I" PHYSICAL="s2_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arburst"/>
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- <PORTMAP DIR="I" PHYSICAL="s2_axi_arcache"/>
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- <PORTMAP DIR="I" PHYSICAL="s2_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="3" NAME="S3_AXI" PROTOCOL="AXI4" TYPE="SLAVE">
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- <PORTMAP DIR="I" PHYSICAL="s3_axi_awaddr"/>
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- <PORTMAP DIR="I" PHYSICAL="s3_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_wdata"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_wstrb"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_wlast"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_wready"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_bid"/>
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- <PORTMAP DIR="O" PHYSICAL="s3_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_bready"/>
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- <PORTMAP DIR="I" PHYSICAL="s3_axi_araddr"/>
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- <PORTMAP DIR="I" PHYSICAL="s3_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arburst"/>
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- <PORTMAP DIR="I" PHYSICAL="s3_axi_arcache"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arprot"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="4" NAME="S4_AXI" PROTOCOL="AXI4" TYPE="SLAVE">
- <PORTMAPS>
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- <PORTMAP DIR="I" PHYSICAL="s4_axi_awid"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awlen"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awsize"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awburst"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awlock"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awcache"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awprot"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awqos"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_wdata"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_wstrb"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_wlast"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_wready"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_bid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arid"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_araddr"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arlen"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arburst"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arlock"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arcache"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arprot"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="5" NAME="S5_AXI" PROTOCOL="AXI4" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_aresetn"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awid"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awlen"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awsize"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awburst"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awlock"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awcache"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awprot"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awqos"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_wdata"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_wstrb"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_wlast"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_wready"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_bid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arid"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_araddr"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arlen"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arburst"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arlock"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arcache"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arprot"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="memory_0" TYPE="hide_122_XIL_MEMORY_V1">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_clk"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_clk_n"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_cke"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_odt"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_ras_n"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_cas_n"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_we_n"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_udm"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_ldm"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_ba"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_addr"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_ddr3_rst"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_dq"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_dqs"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_dqs_n"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_udqs"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_udqs_n"/>
- <PORTMAP DIR="IO" PHYSICAL="rzq"/>
- <PORTMAP DIR="IO" PHYSICAL="zio"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2155872255" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x807FFFFF" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="8388608" SIZEABRV="8M">
- <SLAVES>
- <SLAVE BUSINTERFACE="S0_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S1_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S1_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S1_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S2_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S2_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S2_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S3_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S3_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S3_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S4_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S4_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S4_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S5_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S5_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S5_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="2.01.a" INSTANCE="ETHERNET" IPTYPE="PERIPHERAL" MHS_INDEX="15" MODCLASS="PERIPHERAL" MODTYPE="axi_ethernet">
- <DESCRIPTION TYPE="SHORT">AXI Ethernet</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">AXI Ethernet MAC</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_ethernet_v2_01_a/doc/ds759_axi_ethernet.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO EXPIRESON="Jan-30-2016" ICON_NAME="ps_core_preferred" STATE="Hardware Evaluation" TYPE="Hardware_Evaluation"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>AXI Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="1" NAME="C_AXI_STR_TXC_TDATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Stream Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="2" NAME="C_AXI_STR_TXD_TDATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Stream Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="3" NAME="C_AXI_STR_RXS_TDATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Stream Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_AXI_STR_RXD_TDATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Stream Bus Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="5" NAME="C_AXI_STR_TXC_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_CTRL">
- <DESCRIPTION>AXI Stream Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_AXI_STR_TXD_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_DATA">
- <DESCRIPTION>AXI Stream Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="7" NAME="C_AXI_STR_RXS_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_CTRL">
- <DESCRIPTION>AXI Stream Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_AXI_STR_RXD_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_DATA">
- <DESCRIPTION>AXI Stream Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="9" NAME="C_AXI_STR_AVBTX_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_AVB_TX">
- <DESCRIPTION>AXI Stream Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_AXI_STR_AVBRX_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_AVB_RX">
- <DESCRIPTION>AXI Stream Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_S_AXI_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="50000000">
- <DESCRIPTION>AXI Clock Freq in HZ</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="26" MPD_INDEX="13" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x41240000">
- <DESCRIPTION>Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="27" MPD_INDEX="14" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4127ffff">
- <DESCRIPTION>High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Address Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="16" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Data Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_S_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>AXI ID Width </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="18" NAME="C_TRANS" TYPE="STRING" VALUE="A">
- <DESCRIPTION>Spartan 6 Transceiver Side</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="19" NAME="C_PHYADDR" TYPE="std_logic_vector" VALUE="0B00001">
- <DESCRIPTION>PHY Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="20" NAME="C_INCLUDE_IO" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Include IO and BUFG as Needed for the PHY Interface Selected</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="21" NAME="C_TYPE" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Type of TEMAC</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="22" NAME="C_PHY_TYPE" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Physical Interface Type</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="23" NAME="C_HALFDUP" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Enable Half Duplex mode</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="24" NAME="C_TXMEM" TYPE="INTEGER" VALUE="4096">
- <DESCRIPTION>TX Memory Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="25" NAME="C_RXMEM" TYPE="INTEGER" VALUE="4096">
- <DESCRIPTION>RX Memory Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="26" NAME="C_TXCSUM" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Enable TX Checksum Offload</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="27" NAME="C_RXCSUM" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Enable RX Checksum Offload</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="28" NAME="C_TXVLAN_TRAN" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Transmit VLAN translation</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="29" NAME="C_RXVLAN_TRAN" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Receive VLAN translation</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="30" NAME="C_TXVLAN_TAG" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Transmit VLAN tagging</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="14" MPD_INDEX="31" NAME="C_RXVLAN_TAG" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Receive VLAN tagging</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="15" MPD_INDEX="32" NAME="C_TXVLAN_STRP" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Transmit VLAN stripping</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="16" MPD_INDEX="33" NAME="C_RXVLAN_STRP" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Receive VLAN stripping</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="17" MPD_INDEX="34" NAME="C_MCAST_EXTEND" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Receive Extended Multicast Address Filtering</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="18" MPD_INDEX="35" NAME="C_STATS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Statistics Counters</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="19" MPD_INDEX="36" NAME="C_AVB" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Audio Video Bridging (AVB) - license required</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="37" NAME="C_SIMULATION" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Simulation Mode</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="20" NAME="C_INTERCONNECT_S_AXI_IS_ACLK_ASYNC" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="21" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="22" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="23" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="24" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="25" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="IO" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" IS_THREE_STATE="TRUE" MHS_INDEX="0" MPD_INDEX="108" NAME="MDIO" SIGNAME="ETHERNET_MDIO" TRI_I="MDIO_I" TRI_O="MDIO_O" TRI_T="MDIO_T"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="83" NAME="MDC" SIGNAME="ETHERNET_MDC"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="65" NAME="GMII_TX_ER" SIGNAME="ETHERNET_TX_ER"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" LEFT="7" LSB="0" MHS_INDEX="3" MPD_INDEX="63" MSB="7" NAME="GMII_TXD" RIGHT="0" SIGNAME="ETHERNET_TXD" VECFORMULA="[7:0]"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="64" NAME="GMII_TX_EN" SIGNAME="ETHERNET_TX_EN"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="60" NAME="MII_TX_CLK" SIGNAME="ETHERNET_MII_TX_CLK"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="66" NAME="GMII_TX_CLK" SIGNAME="ETHERNET_TX_CLK"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" LEFT="7" LSB="0" MHS_INDEX="7" MPD_INDEX="67" MSB="7" NAME="GMII_RXD" RIGHT="0" SIGNAME="ETHERNET_RXD" VECFORMULA="[7:0]"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="69" NAME="GMII_RX_ER" SIGNAME="ETHERNET_RX_ER"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="70" NAME="GMII_RX_CLK" SIGNAME="ETHERNET_RX_CLK"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="68" NAME="GMII_RX_DV" SIGNAME="ETHERNET_RX_DV"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="48" NAME="PHY_RST_N" SIGNAME="ETHERNET_PHY_RST_N"/>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="125000000" DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="49" NAME="GTX_CLK" SIGIS="CLK" SIGNAME="clk_125_0000MHz"/>
- <PORT CLKFREQUENCY="200000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="14" MPD_INDEX="52" NAME="REF_CLK" SIGIS="CLK" SIGNAME="clk_200_0000MHzPLL0"/>
- <PORT BUS="AXI_STR_TXD" CLKFREQUENCY="100000000" DEF_SIGNAME="ACLK" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="15" MPD_INDEX="20" NAME="AXI_STR_TXD_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="AXI_STR_TXC" CLKFREQUENCY="100000000" DEF_SIGNAME="ACLK" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="16" MPD_INDEX="27" NAME="AXI_STR_TXC_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="AXI_STR_RXD" CLKFREQUENCY="100000000" DEF_SIGNAME="ACLK" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="17" MPD_INDEX="34" NAME="AXI_STR_RXD_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="AXI_STR_RXS" CLKFREQUENCY="100000000" DEF_SIGNAME="ACLK" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="18" MPD_INDEX="41" NAME="AXI_STR_RXS_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="ARESETN" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="19" MPD_INDEX="21" NAME="AXI_STR_TXD_ARESETN" SIGIS="RST" SIGNAME="AXI_STR_TXD_ARESETN"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="ARESETN" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="20" MPD_INDEX="28" NAME="AXI_STR_TXC_ARESETN" SIGIS="RST" SIGNAME="AXI_STR_TXC_ARESETN"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="ARESETN" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="21" MPD_INDEX="35" NAME="AXI_STR_RXD_ARESETN" SIGIS="RST" SIGNAME="AXI_STR_RXD_ARESETN"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="ARESETN" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="22" MPD_INDEX="42" NAME="AXI_STR_RXS_ARESETN" SIGIS="RST" SIGNAME="AXI_STR_RXS_ARESETN"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="23" MPD_INDEX="2" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="ETHERNET_INTERRUPT"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="3" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="4" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="5" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="6" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="7" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="8" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="9" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="10" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="11" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="12" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="13" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="14" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="15" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="16" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="17" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="18" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="19" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TVALID" DIR="I" MPD_INDEX="22" NAME="AXI_STR_TXD_TVALID" SIGNAME="ETHERNET_dma_txd_TVALID"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TREADY" DIR="O" MPD_INDEX="23" NAME="AXI_STR_TXD_TREADY" SIGNAME="ETHERNET_dma_txd_TREADY"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TLAST" DIR="I" MPD_INDEX="24" NAME="AXI_STR_TXD_TLAST" SIGNAME="ETHERNET_dma_txd_TLAST"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TKEEP" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="25" MSB="3" NAME="AXI_STR_TXD_TKEEP" RIGHT="0" SIGNAME="ETHERNET_dma_txd_TKEEP" VECFORMULA="[3:0]"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="26" MSB="31" NAME="AXI_STR_TXD_TDATA" RIGHT="0" SIGNAME="ETHERNET_dma_txd_TDATA" VECFORMULA="[31:0]"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TVALID" DIR="I" MPD_INDEX="29" NAME="AXI_STR_TXC_TVALID" SIGNAME="ETHERNET_dma_txc_TVALID"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TREADY" DIR="O" MPD_INDEX="30" NAME="AXI_STR_TXC_TREADY" SIGNAME="ETHERNET_dma_txc_TREADY"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TLAST" DIR="I" MPD_INDEX="31" NAME="AXI_STR_TXC_TLAST" SIGNAME="ETHERNET_dma_txc_TLAST"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TKEEP" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="32" MSB="3" NAME="AXI_STR_TXC_TKEEP" RIGHT="0" SIGNAME="ETHERNET_dma_txc_TKEEP" VECFORMULA="[3:0]"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="33" MSB="31" NAME="AXI_STR_TXC_TDATA" RIGHT="0" SIGNAME="ETHERNET_dma_txc_TDATA" VECFORMULA="[31:0]"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TVALID" DIR="O" MPD_INDEX="36" NAME="AXI_STR_RXD_TVALID" SIGNAME="ETHERNET_dma_rxd_TVALID"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TREADY" DIR="I" MPD_INDEX="37" NAME="AXI_STR_RXD_TREADY" SIGNAME="ETHERNET_dma_rxd_TREADY"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TLAST" DIR="O" MPD_INDEX="38" NAME="AXI_STR_RXD_TLAST" SIGNAME="ETHERNET_dma_rxd_TLAST"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TKEEP" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="39" MSB="3" NAME="AXI_STR_RXD_TKEEP" RIGHT="0" SIGNAME="ETHERNET_dma_rxd_TKEEP" VECFORMULA="[3:0]"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="40" MSB="31" NAME="AXI_STR_RXD_TDATA" RIGHT="0" SIGNAME="ETHERNET_dma_rxd_TDATA" VECFORMULA="[31:0]"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TVALID" DIR="O" MPD_INDEX="43" NAME="AXI_STR_RXS_TVALID" SIGNAME="ETHERNET_dma_rxs_TVALID"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TREADY" DIR="I" MPD_INDEX="44" NAME="AXI_STR_RXS_TREADY" SIGNAME="ETHERNET_dma_rxs_TREADY"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TLAST" DIR="O" MPD_INDEX="45" NAME="AXI_STR_RXS_TLAST" SIGNAME="ETHERNET_dma_rxs_TLAST"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TKEEP" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="46" MSB="3" NAME="AXI_STR_RXS_TKEEP" RIGHT="0" SIGNAME="ETHERNET_dma_rxs_TKEEP" VECFORMULA="[3:0]"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="47" MSB="31" NAME="AXI_STR_RXS_TDATA" RIGHT="0" SIGNAME="ETHERNET_dma_rxs_TDATA" VECFORMULA="[31:0]"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="50" NAME="MGT_CLK_P" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="51" NAME="MGT_CLK_N" SIGNAME="__NOC__"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_VALID="FALSE" LEFT="3" LSB="0" MPD_INDEX="53" MSB="3" NAME="MII_TXD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="54" NAME="MII_TX_EN" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="55" NAME="MII_TX_ER" SIGNAME="__NOC__"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_VALID="FALSE" LEFT="3" LSB="0" MPD_INDEX="56" MSB="3" NAME="MII_RXD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="57" NAME="MII_RX_DV" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="58" NAME="MII_RX_ER" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="59" NAME="MII_RX_CLK" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="61" NAME="MII_COL" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="62" NAME="MII_CRS" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" MPD_INDEX="71" NAME="GMII_COL" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" MPD_INDEX="72" NAME="GMII_CRS" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="73" NAME="TXP" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="74" NAME="TXN" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="75" NAME="RXP" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="76" NAME="RXN" SIGNAME="__NOC__"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_VALID="FALSE" LEFT="3" LSB="0" MPD_INDEX="77" MSB="3" NAME="RGMII_TXD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="78" NAME="RGMII_TX_CTL" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="79" NAME="RGMII_TXC" SIGNAME="__NOC__"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_VALID="FALSE" LEFT="3" LSB="0" MPD_INDEX="80" MSB="3" NAME="RGMII_RXD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="81" NAME="RGMII_RX_CTL" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="82" NAME="RGMII_RXC" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" MPD_INDEX="84" NAME="MDIO_I" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" MPD_INDEX="85" NAME="MDIO_O" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" MPD_INDEX="86" NAME="MDIO_T" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="87" NAME="AXI_STR_AVBTX_ACLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="88" NAME="AXI_STR_AVBTX_ARESETN" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="89" NAME="AXI_STR_AVBTX_TVALID" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="90" NAME="AXI_STR_AVBTX_TREADY" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="91" NAME="AXI_STR_AVBTX_TLAST" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="92" MSB="7" NAME="AXI_STR_AVBTX_TDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="93" NAME="AXI_STR_AVBTX_TUSER" SIGNAME="__NOC__" VECFORMULA="[0:0]"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="94" NAME="AXI_STR_AVBRX_ACLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="95" NAME="AXI_STR_AVBRX_ARESETN" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="96" NAME="AXI_STR_AVBRX_TVALID" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="97" NAME="AXI_STR_AVBRX_TLAST" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="98" MSB="7" NAME="AXI_STR_AVBRX_TDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="99" NAME="AXI_STR_AVBRX_TUSER" SIGNAME="__NOC__" VECFORMULA="[0:0]"/>
- <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="100" NAME="RTC_CLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="101" NAME="AV_INTERRUPT_10MS" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="102" NAME="AV_INTERRUPT_PTP_TX" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="103" NAME="AV_INTERRUPT_PTP_RX" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DIR="O" ENDIAN="LITTLE" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="104" MSB="31" NAME="AV_RTC_NANOSECFIELD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[31:0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IS_VALID="FALSE" LEFT="47" LSB="0" MPD_INDEX="105" MSB="47" NAME="AV_RTC_SECFIELD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[47:0]"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="106" NAME="AV_CLK_8K" SIGNAME="__NOC__"/>
- <PORT DIR="O" ENDIAN="LITTLE" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="107" MSB="31" NAME="AV_RTC_NANOSECFIELD_1722" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[31:0]"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_txd" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="2" NAME="AXI_STR_TXD" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_TXD_TREADY"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_TKEEP"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_TDATA"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_txc" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="1" NAME="AXI_STR_TXC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_TXC_TREADY"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_TKEEP"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_TDATA"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_rxd" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="AXI_STR_RXD" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXD_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_TREADY"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXD_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXD_TKEEP"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXD_TDATA"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_rxs" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="AXI_STR_RXS" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_TREADY"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXS_TKEEP"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXS_TDATA"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="5" NAME="AXI_STR_AVBTX" PROTOCOL="XIL_AXI_STREAM_ETH_AVB_TX" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBTX_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBTX_TREADY"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_TUSER"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="6" NAME="AXI_STR_AVBRX" PROTOCOL="XIL_AXI_STREAM_ETH_AVB_RX" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBRX_ARESETN"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_TUSER"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="AXIETHERNETIF" TYPE="XIL_AXIETHERNET_V1">
- <PORTMAPS>
- <PORTMAP DIR="IO" PHYSICAL="MDIO"/>
- <PORTMAP DIR="O" PHYSICAL="MDC"/>
- <PORTMAP DIR="O" PHYSICAL="GMII_TX_ER"/>
- <PORTMAP DIR="O" PHYSICAL="GMII_TXD"/>
- <PORTMAP DIR="O" PHYSICAL="GMII_TX_EN"/>
- <PORTMAP DIR="I" PHYSICAL="MII_TX_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="GMII_TX_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_RXD"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_RX_ER"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_RX_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_RX_DV"/>
- <PORTMAP DIR="O" PHYSICAL="PHY_RST_N"/>
- <PORTMAP DIR="I" PHYSICAL="GTX_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="MGT_CLK_P"/>
- <PORTMAP DIR="I" PHYSICAL="MGT_CLK_N"/>
- <PORTMAP DIR="O" PHYSICAL="MII_TXD"/>
- <PORTMAP DIR="O" PHYSICAL="MII_TX_EN"/>
- <PORTMAP DIR="O" PHYSICAL="MII_TX_ER"/>
- <PORTMAP DIR="I" PHYSICAL="MII_RXD"/>
- <PORTMAP DIR="I" PHYSICAL="MII_RX_DV"/>
- <PORTMAP DIR="I" PHYSICAL="MII_RX_ER"/>
- <PORTMAP DIR="I" PHYSICAL="MII_RX_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="MII_COL"/>
- <PORTMAP DIR="I" PHYSICAL="MII_CRS"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_COL"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_CRS"/>
- <PORTMAP DIR="O" PHYSICAL="TXP"/>
- <PORTMAP DIR="O" PHYSICAL="TXN"/>
- <PORTMAP DIR="I" PHYSICAL="RXP"/>
- <PORTMAP DIR="I" PHYSICAL="RXN"/>
- <PORTMAP DIR="O" PHYSICAL="RGMII_TXD"/>
- <PORTMAP DIR="O" PHYSICAL="RGMII_TX_CTL"/>
- <PORTMAP DIR="O" PHYSICAL="RGMII_TXC"/>
- <PORTMAP DIR="I" PHYSICAL="RGMII_RXD"/>
- <PORTMAP DIR="I" PHYSICAL="RGMII_RX_CTL"/>
- <PORTMAP DIR="I" PHYSICAL="RGMII_RXC"/>
- <PORTMAP DIR="I" PHYSICAL="MDIO_I"/>
- <PORTMAP DIR="O" PHYSICAL="MDIO_O"/>
- <PORTMAP DIR="O" PHYSICAL="MDIO_T"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1092878336" BASENAME="C_BASEADDR" BASEVALUE="0x41240000" HIGHDECIMAL="1093140479" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4127ffff" MEMTYPE="REGISTER" MINSIZE="0x40000" SIZE="262144" SIZEABRV="256K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="0"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="3.00.a" INSTANCE="ETHERNET_dma" IPTYPE="PERIPHERAL" MHS_INDEX="16" MODCLASS="PERIPHERAL" MODTYPE="axi_dma">
- <DESCRIPTION TYPE="SHORT">AXI DMA Engine</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">AXI MemoryMap to/from AXI Stream Direct Memory Access Engine</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_dma_v3_00_a/doc/axi_dma_ds781.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_S_AXI_LITE_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Lite Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="1" NAME="C_S_AXI_LITE_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Lite Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="2" NAME="C_DLYTMR_RESOLUTION" TYPE="INTEGER" VALUE="1250">
- <DESCRIPTION>Delay Timer Counter Resolution </DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="3" NAME="C_PRMRY_IS_ACLK_ASYNC" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Primary clock Is Asynchronous </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="4" NAME="C_SG_INCLUDE_DESC_QUEUE" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Include Scatter Gather Descriptor Queuing</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="5" NAME="C_SG_INCLUDE_STSCNTRL_STRM" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Include AXI Status and Control Streams</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="6" NAME="C_SG_USE_STSAPP_LENGTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Use Status Stream App Length</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="7" NAME="C_SG_LENGTH_WIDTH" TYPE="INTEGER" VALUE="16">
- <DESCRIPTION>Buffer Length Field Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="8" NAME="C_M_AXI_SG_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI SG Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="9" NAME="C_M_AXI_SG_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI SG Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Control Stream Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="11" NAME="C_S_AXIS_S2MM_STS_TDATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Status Stream Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="12" NAME="C_INCLUDE_MM2S" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Include MM2S Channel</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="13" NAME="C_INCLUDE_MM2S_DRE" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Include MM2S Data Realignment Engine</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="14" NAME="C_MM2S_BURST_SIZE" TYPE="INTEGER" VALUE="16">
- <DESCRIPTION>Maximum Memory Map Burst Size for MM2S</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_M_AXI_MM2S_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>MM2S Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="16" NAME="C_M_AXI_MM2S_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>MM2S Memory Map Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="17" NAME="C_M_AXIS_MM2S_TDATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>MM2S Stream Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="18" NAME="C_INCLUDE_S2MM" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Include S2MM Channel</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="19" NAME="C_INCLUDE_S2MM_DRE" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Include S2MM Data Realignment Engine</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="20" NAME="C_S2MM_BURST_SIZE" TYPE="INTEGER" VALUE="16">
- <DESCRIPTION>Maximum Memory Map Burst Size for S2MM (data beats)</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="21" NAME="C_M_AXI_S2MM_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>S2MM Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="22" NAME="C_M_AXI_S2MM_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>S2MM Memory Map Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="23" NAME="C_S_AXIS_S2MM_TDATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>S2MM Stream Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="24" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="32" MPD_INDEX="25" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x41e00000">
- <DESCRIPTION>Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="33" MPD_INDEX="26" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x41e0ffff">
- <DESCRIPTION>High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="27" NAME="C_S_AXI_LITE_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>AXI Lite Clock Frequency</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="28" NAME="C_M_AXI_SG_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>AXI Scatter Gather Clock Frequency</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="29" NAME="C_M_AXI_MM2S_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>AXI MM2S Clock Frequency</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="30" NAME="C_M_AXI_S2MM_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000">
- <DESCRIPTION>AXI S2MM Clock Frequency</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="31" NAME="C_S_AXI_LITE_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>AXI Lite Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="32" NAME="C_S_AXI_LITE_SUPPORTS_READ" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>AXI Lite Supports Read Access</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="33" NAME="C_S_AXI_LITE_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>AXI Lite Supports Write Access</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="34" NAME="C_M_AXI_SG_PROTOCOL" TYPE="STRING" VALUE="AXI4">
- <DESCRIPTION>AXI SG Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="35" NAME="C_M_AXI_SG_SUPPORTS_THREADS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>AXI SG Support Threads</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="36" NAME="C_M_AXI_SG_THREAD_ID_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Base Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="37" NAME="C_M_AXI_SG_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>AXI SG Supports Narrow Bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="38" NAME="C_M_AXI_SG_SUPPORTS_READ" TYPE="STRING" VALUE="1">
- <DESCRIPTION>AXI SG Generates Read Accesses</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="39" NAME="C_M_AXI_SG_SUPPORTS_WRITE" TYPE="STRING" VALUE="1">
- <DESCRIPTION>AXI SG Generates Write Accesses</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="40" NAME="C_M_AXI_MM2S_PROTOCOL" TYPE="STRING" VALUE="AXI4">
- <DESCRIPTION>AXI MM2S Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="41" NAME="C_M_AXI_MM2S_SUPPORTS_THREADS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>AXI MM2S Support Threads</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="42" NAME="C_M_AXI_MM2S_THREAD_ID_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>AXI MM2S Thread ID Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="43" NAME="C_M_AXI_MM2S_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>AXI MM2S Supports Narrow Bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="44" NAME="C_M_AXI_MM2S_SUPPORTS_READ" TYPE="STRING" VALUE="1">
- <DESCRIPTION>AXI MM2S Generates Read Accesses</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="45" NAME="C_M_AXI_MM2S_SUPPORTS_WRITE" TYPE="STRING" VALUE="0">
- <DESCRIPTION>AXI MM2S Generates Write Accesses</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="46" NAME="C_INTERCONNECT_M_AXI_MM2S_READ_ISSUING" TYPE="INTEGER" VALUE="4">
- <DESCRIPTION>AXI MM2S Interface Read Issuing</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="47" NAME="C_INTERCONNECT_M_AXI_MM2S_READ_FIFO_DEPTH" TYPE="INTEGER" VALUE="512">
- <DESCRIPTION>AXI MM2S Interface Read FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="48" NAME="C_M_AXI_S2MM_PROTOCOL" TYPE="STRING" VALUE="AXI4">
- <DESCRIPTION>AXI S2MM Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="49" NAME="C_M_AXI_S2MM_SUPPORTS_THREADS" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>AXI S2MM Support Threads</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="50" NAME="C_M_AXI_S2MM_THREAD_ID_WIDTH" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>AXI S2MM Thread ID Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="51" NAME="C_M_AXI_S2MM_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>AXI S2MM Supports Narrow Bursts</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="52" NAME="C_M_AXI_S2MM_SUPPORTS_WRITE" TYPE="STRING" VALUE="1">
- <DESCRIPTION>AXI S2MM Generates Write Accesses</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="53" NAME="C_M_AXI_S2MM_SUPPORTS_READ" TYPE="STRING" VALUE="0">
- <DESCRIPTION>AXI S2MM Generates Read Accesses</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="54" NAME="C_INTERCONNECT_M_AXI_S2MM_WRITE_ISSUING" TYPE="INTEGER" VALUE="4">
- <DESCRIPTION>AXI S2MM Interface Write Issuing</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="55" NAME="C_INTERCONNECT_M_AXI_S2MM_WRITE_FIFO_DEPTH" TYPE="INTEGER" VALUE="512">
- <DESCRIPTION>AXI S2MM Interface Write FIFO Depth</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="56" NAME="C_M_AXIS_MM2S_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_DATA">
- <DESCRIPTION>AXI MM2S Stream Interface Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="57" NAME="C_S_AXIS_S2MM_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_DATA">
- <DESCRIPTION>AXI S2MM Stream Interface Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="58" NAME="C_M_AXIS_CNTRL_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_CTRL">
- <DESCRIPTION>AXI MM2S Control Stream Interface Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="59" NAME="C_S_AXIS_STS_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_CTRL">
- <DESCRIPTION>AXI S2MM Status Stream Interface Protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="12" NAME="C_INTERCONNECT_S_AXI_LITE_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="13" NAME="C_INTERCONNECT_S_AXI_LITE_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="14" NAME="C_INTERCONNECT_S_AXI_LITE_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="15" NAME="C_INTERCONNECT_S_AXI_LITE_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="16" NAME="C_INTERCONNECT_S_AXI_LITE_B_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="17" NAME="C_INTERCONNECT_M_AXI_SG_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="18" NAME="C_INTERCONNECT_M_AXI_SG_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="19" NAME="C_INTERCONNECT_M_AXI_SG_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="20" NAME="C_INTERCONNECT_M_AXI_SG_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="21" NAME="C_INTERCONNECT_M_AXI_SG_B_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="22" NAME="C_INTERCONNECT_M_AXI_MM2S_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="23" NAME="C_INTERCONNECT_M_AXI_MM2S_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="24" NAME="C_INTERCONNECT_M_AXI_MM2S_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="25" NAME="C_INTERCONNECT_M_AXI_MM2S_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="26" NAME="C_INTERCONNECT_M_AXI_MM2S_B_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="27" NAME="C_INTERCONNECT_M_AXI_S2MM_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="28" NAME="C_INTERCONNECT_M_AXI_S2MM_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="29" NAME="C_INTERCONNECT_M_AXI_S2MM_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="30" NAME="C_INTERCONNECT_M_AXI_S2MM_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="31" NAME="C_INTERCONNECT_M_AXI_S2MM_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="S_AXI_LITE" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="s_axi_lite_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="M_AXI_SG" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="m_axi_sg_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="M_AXI_MM2S:M_AXIS_CNTRL" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="m_axi_mm2s_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="M_AXI_S2MM:S_AXIS_STS" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="m_axi_s2mm_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="RESET_OUT_N" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="63" NAME="mm2s_prmry_reset_out_n" SIGNAME="AXI_STR_TXD_ARESETN"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="RESET_OUT_N" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="69" NAME="mm2s_cntrl_reset_out_n" SIGNAME="AXI_STR_TXC_ARESETN"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="RESET_OUT_N" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="91" NAME="s2mm_prmry_reset_out_n" SIGNAME="AXI_STR_RXD_ARESETN"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="RESET_OUT_N" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="97" NAME="s2mm_sts_reset_out_n" SIGNAME="AXI_STR_RXS_ARESETN"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="103" NAME="mm2s_introut" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="ETHERNET_dma_mm2s_introut"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="104" NAME="s2mm_introut" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="ETHERNET_dma_s2mm_introut"/>
- <PORT BUS="S_AXI_LITE:M_AXI_SG:M_AXI_MM2S:M_AXI_S2MM:S_AXIS_STS:M_AXIS_CNTRL:M_AXIS_MM2S:S_AXIS_S2MM" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="4" NAME="axi_resetn" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="5" NAME="s_axi_lite_awvalid" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="6" NAME="s_axi_lite_awready" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="7" MSB="31" NAME="s_axi_lite_awaddr" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[C_S_AXI_LITE_ADDR_WIDTH-1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="8" NAME="s_axi_lite_wvalid" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="9" NAME="s_axi_lite_wready" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="10" MSB="31" NAME="s_axi_lite_wdata" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[C_S_AXI_LITE_DATA_WIDTH-1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="11" MSB="1" NAME="s_axi_lite_bresp" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="12" NAME="s_axi_lite_bvalid" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="13" NAME="s_axi_lite_bready" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="14" NAME="s_axi_lite_arvalid" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="15" NAME="s_axi_lite_arready" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="16" MSB="31" NAME="s_axi_lite_araddr" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[C_S_AXI_LITE_ADDR_WIDTH-1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="17" NAME="s_axi_lite_rvalid" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="18" NAME="s_axi_lite_rready" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="19" MSB="31" NAME="s_axi_lite_rdata" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[C_S_AXI_LITE_DATA_WIDTH-1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="20" MSB="1" NAME="s_axi_lite_rresp" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="21" MSB="31" NAME="m_axi_sg_awaddr" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[C_M_AXI_SG_ADDR_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="22" MSB="7" NAME="m_axi_sg_awlen" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="23" MSB="2" NAME="m_axi_sg_awsize" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="24" MSB="1" NAME="m_axi_sg_awburst" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="25" MSB="2" NAME="m_axi_sg_awprot" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="26" MSB="3" NAME="m_axi_sg_awcache" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="27" NAME="m_axi_sg_awvalid" SIGNAME="axi4_0_S_AWVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="28" NAME="m_axi_sg_awready" SIGNAME="axi4_0_S_AWREADY"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="29" MSB="31" NAME="m_axi_sg_wdata" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[C_M_AXI_SG_DATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="30" MSB="3" NAME="m_axi_sg_wstrb" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(C_M_AXI_SG_DATA_WIDTH/8)-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="31" NAME="m_axi_sg_wlast" SIGNAME="axi4_0_S_WLAST"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="32" NAME="m_axi_sg_wvalid" SIGNAME="axi4_0_S_WVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="33" NAME="m_axi_sg_wready" SIGNAME="axi4_0_S_WREADY"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="34" MSB="1" NAME="m_axi_sg_bresp" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="35" NAME="m_axi_sg_bvalid" SIGNAME="axi4_0_S_BVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="36" NAME="m_axi_sg_bready" SIGNAME="axi4_0_S_BREADY"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="37" MSB="31" NAME="m_axi_sg_araddr" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[C_M_AXI_SG_ADDR_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="38" MSB="7" NAME="m_axi_sg_arlen" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="39" MSB="2" NAME="m_axi_sg_arsize" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="40" MSB="1" NAME="m_axi_sg_arburst" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="41" MSB="2" NAME="m_axi_sg_arprot" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="42" MSB="3" NAME="m_axi_sg_arcache" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="43" NAME="m_axi_sg_arvalid" SIGNAME="axi4_0_S_ARVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="44" NAME="m_axi_sg_arready" SIGNAME="axi4_0_S_ARREADY"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="45" MSB="31" NAME="m_axi_sg_rdata" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[C_M_AXI_SG_DATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="46" MSB="1" NAME="m_axi_sg_rresp" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="47" NAME="m_axi_sg_rlast" SIGNAME="axi4_0_S_RLAST"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="48" NAME="m_axi_sg_rvalid" SIGNAME="axi4_0_S_RVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="49" NAME="m_axi_sg_rready" SIGNAME="axi4_0_S_RREADY"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="50" MSB="31" NAME="m_axi_mm2s_araddr" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[C_M_AXI_MM2S_ADDR_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="51" MSB="7" NAME="m_axi_mm2s_arlen" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="52" MSB="2" NAME="m_axi_mm2s_arsize" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="53" MSB="1" NAME="m_axi_mm2s_arburst" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="54" MSB="2" NAME="m_axi_mm2s_arprot" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="55" MSB="3" NAME="m_axi_mm2s_arcache" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="56" NAME="m_axi_mm2s_arvalid" SIGNAME="axi4_0_S_ARVALID"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="57" NAME="m_axi_mm2s_arready" SIGNAME="axi4_0_S_ARREADY"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="58" MSB="31" NAME="m_axi_mm2s_rdata" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[C_M_AXI_MM2S_DATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="59" MSB="1" NAME="m_axi_mm2s_rresp" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="60" NAME="m_axi_mm2s_rlast" SIGNAME="axi4_0_S_RLAST"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="61" NAME="m_axi_mm2s_rvalid" SIGNAME="axi4_0_S_RVALID"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="62" NAME="m_axi_mm2s_rready" SIGNAME="axi4_0_S_RREADY"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="64" MSB="31" NAME="m_axis_mm2s_tdata" RIGHT="0" SIGNAME="ETHERNET_dma_txd_TDATA" VECFORMULA="[C_M_AXIS_MM2S_TDATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TKEEP" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="65" MSB="3" NAME="m_axis_mm2s_tkeep" RIGHT="0" SIGNAME="ETHERNET_dma_txd_TKEEP" VECFORMULA="[(C_M_AXIS_MM2S_TDATA_WIDTH/8)-1:0]"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TVALID" DIR="O" MPD_INDEX="66" NAME="m_axis_mm2s_tvalid" SIGNAME="ETHERNET_dma_txd_TVALID"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TREADY" DIR="I" MPD_INDEX="67" NAME="m_axis_mm2s_tready" SIGNAME="ETHERNET_dma_txd_TREADY"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TLAST" DIR="O" MPD_INDEX="68" NAME="m_axis_mm2s_tlast" SIGNAME="ETHERNET_dma_txd_TLAST"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="70" MSB="31" NAME="m_axis_mm2s_cntrl_tdata" RIGHT="0" SIGNAME="ETHERNET_dma_txc_TDATA" VECFORMULA="[C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TKEEP" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="71" MSB="3" NAME="m_axis_mm2s_cntrl_tkeep" RIGHT="0" SIGNAME="ETHERNET_dma_txc_TKEEP" VECFORMULA="[(C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH/8)-1:0]"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TVALID" DIR="O" MPD_INDEX="72" NAME="m_axis_mm2s_cntrl_tvalid" SIGNAME="ETHERNET_dma_txc_TVALID"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TREADY" DIR="I" MPD_INDEX="73" NAME="m_axis_mm2s_cntrl_tready" SIGNAME="ETHERNET_dma_txc_TREADY"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TLAST" DIR="O" MPD_INDEX="74" NAME="m_axis_mm2s_cntrl_tlast" SIGNAME="ETHERNET_dma_txc_TLAST"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="75" MSB="31" NAME="m_axi_s2mm_awaddr" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[C_M_AXI_S2MM_ADDR_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="76" MSB="7" NAME="m_axi_s2mm_awlen" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="77" MSB="2" NAME="m_axi_s2mm_awsize" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="78" MSB="1" NAME="m_axi_s2mm_awburst" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="79" MSB="2" NAME="m_axi_s2mm_awprot" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="80" MSB="3" NAME="m_axi_s2mm_awcache" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="81" NAME="m_axi_s2mm_awvalid" SIGNAME="axi4_0_S_AWVALID"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="82" NAME="m_axi_s2mm_awready" SIGNAME="axi4_0_S_AWREADY"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="83" MSB="31" NAME="m_axi_s2mm_wdata" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[C_M_AXI_S2MM_DATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="84" MSB="3" NAME="m_axi_s2mm_wstrb" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(C_M_AXI_S2MM_DATA_WIDTH/8)-1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="85" NAME="m_axi_s2mm_wlast" SIGNAME="axi4_0_S_WLAST"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="86" NAME="m_axi_s2mm_wvalid" SIGNAME="axi4_0_S_WVALID"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="87" NAME="m_axi_s2mm_wready" SIGNAME="axi4_0_S_WREADY"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="88" MSB="1" NAME="m_axi_s2mm_bresp" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="89" NAME="m_axi_s2mm_bvalid" SIGNAME="axi4_0_S_BVALID"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="90" NAME="m_axi_s2mm_bready" SIGNAME="axi4_0_S_BREADY"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="92" MSB="31" NAME="s_axis_s2mm_tdata" RIGHT="0" SIGNAME="ETHERNET_dma_rxd_TDATA" VECFORMULA="[C_S_AXIS_S2MM_TDATA_WIDTH-1:0]"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TKEEP" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="93" MSB="3" NAME="s_axis_s2mm_tkeep" RIGHT="0" SIGNAME="ETHERNET_dma_rxd_TKEEP" VECFORMULA="[(C_S_AXIS_S2MM_TDATA_WIDTH/8)-1:0]"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TVALID" DIR="I" MPD_INDEX="94" NAME="s_axis_s2mm_tvalid" SIGNAME="ETHERNET_dma_rxd_TVALID"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TREADY" DIR="O" MPD_INDEX="95" NAME="s_axis_s2mm_tready" SIGNAME="ETHERNET_dma_rxd_TREADY"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TLAST" DIR="I" MPD_INDEX="96" NAME="s_axis_s2mm_tlast" SIGNAME="ETHERNET_dma_rxd_TLAST"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="98" MSB="31" NAME="s_axis_s2mm_sts_tdata" RIGHT="0" SIGNAME="ETHERNET_dma_rxs_TDATA" VECFORMULA="[C_S_AXIS_S2MM_STS_TDATA_WIDTH-1:0]"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TKEEP" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="99" MSB="3" NAME="s_axis_s2mm_sts_tkeep" RIGHT="0" SIGNAME="ETHERNET_dma_rxs_TKEEP" VECFORMULA="[(C_S_AXIS_S2MM_STS_TDATA_WIDTH/8)-1:0]"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TVALID" DIR="I" MPD_INDEX="100" NAME="s_axis_s2mm_sts_tvalid" SIGNAME="ETHERNET_dma_rxs_TVALID"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TREADY" DIR="O" MPD_INDEX="101" NAME="s_axis_s2mm_sts_tready" SIGNAME="ETHERNET_dma_rxs_TREADY"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TLAST" DIR="I" MPD_INDEX="102" NAME="s_axis_s2mm_sts_tlast" SIGNAME="ETHERNET_dma_rxs_TLAST"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI_LITE" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_wready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_wdata"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_arready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_araddr"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_rready"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_rresp"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="M_AXI_SG" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awaddr"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awlen"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awsize"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awburst"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awprot"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awcache"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_awready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_wdata"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_wstrb"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_wlast"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_wvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_wready"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_bresp"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_bvalid"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_bready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_araddr"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arlen"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arsize"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arburst"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arprot"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arcache"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_arready"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_rdata"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_rresp"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_rlast"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_rvalid"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="M_AXI_MM2S" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_araddr"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arlen"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arsize"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arburst"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arprot"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arcache"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_arready"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_rdata"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_rresp"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_rlast"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_rvalid"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_txc" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="6" NAME="M_AXIS_CNTRL" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_aclk"/>
- <PORTMAP DIR="O" PHYSICAL="mm2s_cntrl_reset_out_n"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_cntrl_tdata"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_cntrl_tkeep"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_cntrl_tvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axis_mm2s_cntrl_tready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_cntrl_tlast"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="M_AXI_S2MM" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awaddr"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awlen"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awsize"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awburst"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awprot"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awcache"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_awready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_wdata"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_wstrb"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_wlast"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_wvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_wready"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_bresp"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_bvalid"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_bready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_rxs" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="7" NAME="S_AXIS_STS" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_aclk"/>
- <PORTMAP DIR="O" PHYSICAL="s2mm_sts_reset_out_n"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_sts_tdata"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_sts_tkeep"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_sts_tvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axis_s2mm_sts_tready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_sts_tlast"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_txd" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="M_AXIS_MM2S" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="mm2s_prmry_reset_out_n"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_tdata"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_tkeep"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_tvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axis_mm2s_tready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_tlast"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_rxd" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="5" NAME="S_AXIS_S2MM" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="s2mm_prmry_reset_out_n"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_tdata"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_tkeep"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_tvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axis_s2mm_tready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_tlast"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1105199104" BASENAME="C_BASEADDR" BASEVALUE="0x41e00000" HIGHDECIMAL="1105264639" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41e0ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_LITE"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="1"/>
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="2"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="microblaze_0_intc" IPTYPE="PERIPHERAL" MHS_INDEX="17" MODCLASS="INTERRUPT_CNTLR" MODTYPE="axi_intc">
- <DESCRIPTION TYPE="SHORT">AXI Interrupt Controller</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">intc core attached to the AXI</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_intc_v1_01_a/doc/ds747_axi_intc.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x41200000">
- <DESCRIPTION>AXI Base Address </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4120ffff">
- <DESCRIPTION>AXI High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="3" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Data Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="5" NAME="C_NUM_INTR_INPUTS" TYPE="INTEGER" VALUE="6">
- <DESCRIPTION>Number of Interrupt Inputs </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="6" NAME="C_KIND_OF_INTR" TYPE="std_logic_vector" VALUE="0b11111111111111111111111111000011">
- <DESCRIPTION>Type of Interrupt for Each Input </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="7" NAME="C_KIND_OF_EDGE" TYPE="std_logic_vector" VALUE="0b11111111111111111111111111111111">
- <DESCRIPTION>Type of Each Edge Senstive Interrupt </DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="8" NAME="C_KIND_OF_LVL" TYPE="std_logic_vector" VALUE="0b11111111111111111111111111111111">
- <DESCRIPTION>Type of Each Level Sensitive Interrupt </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="9" NAME="C_HAS_IPR" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Support IPR </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_HAS_SIE" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Support SIE </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="11" NAME="C_HAS_CIE" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Support CIE </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="12" NAME="C_HAS_IVR" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>Support IVR </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="13" NAME="C_IRQ_IS_LEVEL" TYPE="INTEGER" VALUE="1">
- <DESCRIPTION>IRQ Output Use Level </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="14" NAME="C_IRQ_ACTIVE" TYPE="std_logic" VALUE="1">
- <DESCRIPTION>The Sense of IRQ Output </DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>AXI4LITE protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="2" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="20" NAME="IRQ" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="microblaze_0_interrupt">
- <DESCRIPTION>Interrupt Request Output</DESCRIPTION>
- </PORT>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="I" ENDIAN="LITTLE" IS_INSTANTIATED="TRUE" LEFT="5" LSB="0" MHS_INDEX="2" MPD_INDEX="19" MSB="5" NAME="INTR" RIGHT="0" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="ETHERNET_INTERRUPT & ETHERNET_dma_mm2s_introut & ETHERNET_dma_s2mm_introut & Push_Buttons_4Bits_IP2INTC_Irpt & RS232_Uart_1_Interrupt & axi_timer_0_Interrupt" VECFORMULA="[(C_NUM_INTR_INPUTS-1):0]">
- <SIGNALS>
- <SIGNAL NAME="ETHERNET_INTERRUPT"/>
- <SIGNAL NAME="ETHERNET_dma_mm2s_introut"/>
- <SIGNAL NAME="ETHERNET_dma_s2mm_introut"/>
- <SIGNAL NAME="Push_Buttons_4Bits_IP2INTC_Irpt"/>
- <SIGNAL NAME="RS232_Uart_1_Interrupt"/>
- <SIGNAL NAME="axi_timer_0_Interrupt"/>
- </SIGNALS>
- <DESCRIPTION>Interrupt Inputs</DESCRIPTION>
- </PORT>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="2" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="3" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="4" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="5" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="6" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="7" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="8" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="9" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="10" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="11" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="12" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="13" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="14" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="15" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="16" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="17" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="18" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1092616192" BASENAME="C_BASEADDR" BASEVALUE="0x41200000" HIGHDECIMAL="1092681727" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4120ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO INTC_INDEX="0" TYPE="CONTROLLER">
- <SOURCE INSTANCE="ETHERNET" PRIORITY="0" SIGNAME="ETHERNET_INTERRUPT"/>
- <SOURCE INSTANCE="ETHERNET_dma" PRIORITY="1" SIGNAME="ETHERNET_dma_mm2s_introut"/>
- <SOURCE INSTANCE="ETHERNET_dma" PRIORITY="2" SIGNAME="ETHERNET_dma_s2mm_introut"/>
- <SOURCE INSTANCE="Push_Buttons_4Bits" PRIORITY="3" SIGNAME="Push_Buttons_4Bits_IP2INTC_Irpt"/>
- <SOURCE INSTANCE="RS232_Uart_1" PRIORITY="4" SIGNAME="RS232_Uart_1_Interrupt"/>
- <SOURCE INSTANCE="axi_timer_0" PRIORITY="5" SIGNAME="axi_timer_0_Interrupt"/>
- <TARGET INSTANCE="microblaze_0"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="axi_timer_0" IPTYPE="PERIPHERAL" MHS_INDEX="18" MODCLASS="PERIPHERAL" MODTYPE="axi_timer">
- <DESCRIPTION TYPE="SHORT">AXI Timer/Counter</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Timer counter with AXI interface</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_timer_v1_01_a/doc/axi_timer_ds764.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE">
- <DESCRIPTION>AXI4LITE protocol</DESCRIPTION>
- </PARAMETER>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6">
- <DESCRIPTION>Device Family</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="2" NAME="C_COUNT_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>The Width of Counter in Timer</DESCRIPTION>
- <DESCRIPTION>Count Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="3" NAME="C_ONE_TIMER_ONLY" TYPE="INTEGER" VALUE="0">
- <DESCRIPTION>Only One Timer is present</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="4" NAME="C_TRIG0_ASSERT" TYPE="std_logic" VALUE="1">
- <DESCRIPTION>TRIG0 Active Level</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="5" NAME="C_TRIG1_ASSERT" TYPE="std_logic" VALUE="1">
- <DESCRIPTION>TRIG1 Active Level</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="6" NAME="C_GEN0_ASSERT" TYPE="std_logic" VALUE="1">
- <DESCRIPTION>GEN0 Active Level</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="7" NAME="C_GEN1_ASSERT" TYPE="std_logic" VALUE="1">
- <DESCRIPTION>GEN1 Active Level</DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="8" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x41c00000">
- <DESCRIPTION>AXI Base Address </DESCRIPTION>
- </PARAMETER>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="9" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x41c0ffff">
- <DESCRIPTION>AXI High Address</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="10" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Address Width</DESCRIPTION>
- </PARAMETER>
- <PARAMETER MPD_INDEX="11" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32">
- <DESCRIPTION>AXI Data Width</DESCRIPTION>
- </PARAMETER>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="7" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="5" NAME="Interrupt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="axi_timer_0_Interrupt"/>
- <PORT DIR="I" MPD_INDEX="0" NAME="CaptureTrig0" SIGNAME="__NOC__">
- <DESCRIPTION>Capture Trig 0</DESCRIPTION>
- </PORT>
- <PORT DIR="I" MPD_INDEX="1" NAME="CaptureTrig1" SIGNAME="__NOC__">
- <DESCRIPTION>Capture Trig 1</DESCRIPTION>
- </PORT>
- <PORT DIR="O" MPD_INDEX="2" NAME="GenerateOut0" SIGNAME="__NOC__">
- <DESCRIPTION>Generate Out 0</DESCRIPTION>
- </PORT>
- <PORT DIR="O" MPD_INDEX="3" NAME="GenerateOut1" SIGNAME="__NOC__">
- <DESCRIPTION>Generate Out 1</DESCRIPTION>
- </PORT>
- <PORT DIR="O" MPD_INDEX="4" NAME="PWM0" SIGNAME="__NOC__">
- <DESCRIPTION>Pulse Width Modulation 0</DESCRIPTION>
- </PORT>
- <PORT DIR="I" MPD_INDEX="6" NAME="Freeze" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="8" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="9" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="10" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="11" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="12" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="13" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="14" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="15" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="16" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="17" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="18" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="19" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="20" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="21" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="22" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="23" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="24" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="25" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1103101952" BASENAME="C_BASEADDR" BASEVALUE="0x41c00000" HIGHDECIMAL="1103167487" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41c0ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="5"/>
- </INTERRUPTINFO>
- </MODULE>
- </MODULES>
-
-</EDKSYSTEM>
\ No newline at end of file
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system_bd.bmm b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system_bd.bmm
deleted file mode 100644
index 4ccd72ac6c..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/SDK/SDK_Export/hw/system_bd.bmm
+++ /dev/null
@@ -1,32 +0,0 @@
-// BMM LOC annotation file.
-//
-// Release 13.1 - Data2MEM O.40d, build 1.9 Aug 19, 2010
-// Copyright (c) 1995-2011 Xilinx, Inc. All rights reserved.
-
-
-///////////////////////////////////////////////////////////////////////////////
-//
-// Processor 'microblaze_0', ID 100, memory map.
-//
-///////////////////////////////////////////////////////////////////////////////
-
-ADDRESS_MAP microblaze_0 MICROBLAZE-LE 100
-
-
- ///////////////////////////////////////////////////////////////////////////////
- //
- // Processor 'microblaze_0' address space 'microblaze_0_bram_block_combined' 0x00000000:0x00001FFF (8 KBytes).
- //
- ///////////////////////////////////////////////////////////////////////////////
-
- ADDRESS_SPACE microblaze_0_bram_block_combined RAMB16 [0x00000000:0x00001FFF]
- BUS_BLOCK
- microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_0 [31:24] INPUT = microblaze_0_bram_block_combined_0.mem PLACED = X3Y26;
- microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_1 [23:16] INPUT = microblaze_0_bram_block_combined_1.mem PLACED = X3Y28;
- microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_2 [15:8] INPUT = microblaze_0_bram_block_combined_2.mem PLACED = X2Y30;
- microblaze_0_bram_block/microblaze_0_bram_block/ramb16bwer_3 [7:0] INPUT = microblaze_0_bram_block_combined_3.mem PLACED = X2Y28;
- END_BUS_BLOCK;
- END_ADDRESS_SPACE;
-
-END_ADDRESS_MAP;
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgBLKD_Dimensions.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgBLKD_Dimensions.xsl
deleted file mode 100644
index 31625c0c48..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgBLKD_Dimensions.xsl
+++ /dev/null
@@ -1,180 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-
-<!--
-<xsl:output method="xml"
- version="1.0"
- encoding="UTF-8" indent="yes"
- doctype-public="-//W3C//DTD SVG Tiny 1.1//EN"
- doctype-system="http://www.w3.org/Graphics/SVG/1.1/DTD/svg11-tiny.dtd"/>
--->
-
-<!--
- ======================================================
- BUS INTERFACE DIMENSIONS
- ======================================================
--->
-
-<xsl:variable name="BLKD_BIF_H" select="16"/>
-<xsl:variable name="BLKD_BIF_W" select="32"/>
-
-<xsl:variable name="BLKD_BIFC_H" select="24"/>
-<xsl:variable name="BLKD_BIFC_W" select="24"/>
-
-<xsl:variable name="BLKD_BIFC_dx" select="ceiling($BLKD_BIFC_W div 5)"/>
-<xsl:variable name="BLKD_BIFC_dy" select="ceiling($BLKD_BIFC_H div 5)"/>
-<xsl:variable name="BLKD_BIFC_Hi" select="($BLKD_BIFC_H - ($BLKD_BIFC_dy * 2))"/>
-<xsl:variable name="BLKD_BIFC_Wi" select="($BLKD_BIFC_W - ($BLKD_BIFC_dx * 2))"/>
-
-<xsl:variable name="BLKD_BIF_TYPE_ONEWAY" select="'OneWay'"/>
-
-<!--
- ======================================================
- GLOLBAL BUS INTERFACE DIMENSIONS
- (Define for global MdtSVG_BifShapes.xsl which is used across all
- diagrams to define the shapes of bifs the same across all diagrams)
- ======================================================
--->
-
-<xsl:variable name="BIF_H" select="$BLKD_BIF_H"/>
-<xsl:variable name="BIF_W" select="$BLKD_BIF_W"/>
-
-<xsl:variable name="BIFC_H" select="$BLKD_BIFC_H"/>
-<xsl:variable name="BIFC_W" select="$BLKD_BIFC_W"/>
-
-<xsl:variable name="BIFC_dx" select="$BLKD_BIFC_dx"/>
-<xsl:variable name="BIFC_dy" select="$BLKD_BIFC_dy"/>
-
-<xsl:variable name="BIFC_Hi" select="$BLKD_BIFC_Hi"/>
-<xsl:variable name="BIFC_Wi" select="$BLKD_BIFC_Wi"/>
-
-
-<!--
- ======================================================
- BUS DIMENSIONS
- ======================================================
--->
-
-<xsl:variable name="BLKD_P2P_BUS_W" select="($BLKD_BUS_ARROW_H - ($BLKD_BUS_ARROW_G * 2))"/>
-<xsl:variable name="BLKD_SBS_LANE_H" select="($BLKD_MOD_H + ($BLKD_BIF_H * 2))"/>
-<xsl:variable name="BLKD_BUS_LANE_W" select="($BLKD_BIF_W + ($BLKD_MOD_BIF_GAP_H * 2))"/>
-<xsl:variable name="BLKD_BUS_ARROW_W" select="ceiling($BLKD_BIFC_W div 3)"/>
-<xsl:variable name="BLKD_BUS_ARROW_H" select="ceiling($BLKD_BIFC_H div 2)"/>
-<xsl:variable name="BLKD_BUS_ARROW_G" select="ceiling($BLKD_BIFC_W div 12)"/>
-
-
-<!--
- ======================================================
- IO PORT DIMENSIONS
- ======================================================
--->
-
-<xsl:variable name="BLKD_IOP_H" select="16"/>
-<xsl:variable name="BLKD_IOP_W" select="16"/>
-<xsl:variable name="BLKD_IOP_SPC" select="12"/>
-
-
-<!--
- ======================================================
- INTERRUPT NOTATION DIMENSIONS
- ======================================================
--->
-
-<xsl:variable name="BLKD_INTR_W" select="18"/>
-<xsl:variable name="BLKD_INTR_H" select="18"/>
-
-<!--
- ======================================================
- MODULE DIMENSIONS
- ======================================================
--->
-
-<xsl:variable name="BLKD_MOD_IO_GAP" select="8"/>
-
-<xsl:variable name="BLKD_MOD_W" select="( ($BLKD_BIF_W * 2) + ($BLKD_MOD_BIF_GAP_H * 1) + ($BLKD_MOD_LANE_W * 2))"/>
-<xsl:variable name="BLKD_MOD_H" select="($BLKD_MOD_LABEL_H + ($BLKD_BIF_H * 1) + ($BLKD_MOD_BIF_GAP_V * 1) + ($BLKD_MOD_LANE_H * 2))"/>
-
-<xsl:variable name="BLKD_MOD_BIF_GAP_H" select="ceiling($BLKD_BIF_H div 4)"/>
-<xsl:variable name="BLKD_MOD_BIF_GAP_V" select="ceiling($BLKD_BIFC_H div 2)"/>
-
-<xsl:variable name="BLKD_MOD_LABEL_W" select="(($BLKD_BIF_W * 2) + $BLKD_MOD_BIF_GAP_H)"/>
-<xsl:variable name="BLKD_MOD_LABEL_H" select="(($BLKD_BIF_H * 2) + ceiling($BLKD_BIF_H div 3))"/>
-
-<xsl:variable name="BLKD_MOD_LANE_W" select="ceiling($BLKD_BIF_W div 3)"/>
-<xsl:variable name="BLKD_MOD_LANE_H" select="ceiling($BLKD_BIF_H div 4)"/>
-
-<xsl:variable name="BLKD_MOD_EDGE_W" select="ceiling($BLKD_MOD_LANE_W div 2)"/>
-<xsl:variable name="BLKD_MOD_SHAPES_G" select="($BLKD_BIF_W + $BLKD_BIF_W)"/>
-
-<xsl:variable name="BLKD_MOD_BKTLANE_H" select="$BLKD_BIF_H"/>
-<xsl:variable name="BLKD_MOD_BKTLANE_W" select="$BLKD_BIF_H"/>
-
-<xsl:variable name="BLKD_MOD_BUCKET_G" select="ceiling($BLKD_BIF_W div 2)"/>
-
-<xsl:variable name="BLKD_MPMC_MOD_H" select="(($BLKD_BIF_H * 1) + ($BLKD_MOD_BIF_GAP_V * 2) + ($BLKD_MOD_LANE_H * 2))"/>
-
-
-<!--
- ======================================================
- GLOBAL DIAGRAM DIMENSIONS
- ======================================================
--->
-
-<xsl:variable name="BLKD_IORCHAN_H" select="$BLKD_BIF_H"/>
-<xsl:variable name="BLKD_IORCHAN_W" select="$BLKD_BIF_H"/>
-
-<xsl:variable name="BLKD_PRTCHAN_H" select="($BLKD_BIF_H * 2) + ceiling($BLKD_BIF_H div 2)"/>
-<xsl:variable name="BLKD_PRTCHAN_W" select="($BLKD_BIF_H * 2) + ceiling($BLKD_BIF_H div 2) + 8"/>
-
-<xsl:variable name="BLKD_DRAWAREA_MIN_W" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * 3) + ($BLKD_MOD_BUCKET_G * 2)))"/>
-
-<xsl:variable name="BLKD_INNER_X" select="($BLKD_PRTCHAN_W + $BLKD_IORCHAN_W + $BLKD_INNER_GAP)"/>
-<xsl:variable name="BLKD_INNER_Y" select="($BLKD_PRTCHAN_H + $BLKD_IORCHAN_H + $BLKD_INNER_GAP)"/>
-<xsl:variable name="BLKD_INNER_GAP" select="ceiling($BLKD_MOD_W div 2)"/>
-
-<xsl:variable name="BLKD_SBS2IP_GAP" select="$BLKD_MOD_H"/>
-<xsl:variable name="BLKD_BRIDGE_GAP" select="($BLKD_BUS_LANE_W * 4)"/>
-<xsl:variable name="BLKD_IP2UNK_GAP" select="$BLKD_MOD_H"/>
-<xsl:variable name="BLKD_PROC2SBS_GAP" select="($BLKD_BIF_H * 2)"/>
-<xsl:variable name="BLKD_IOR2PROC_GAP" select="$BLKD_BIF_W"/>
-<xsl:variable name="BLKD_MPMC2PROC_GAP" select="($BLKD_BIF_H * 2)"/>
-<xsl:variable name="BLKD_SPECS2KEY_GAP" select="$BLKD_BIF_W"/>
-<xsl:variable name="BLKD_DRAWAREA2KEY_GAP" select="ceiling($BLKD_BIF_W div 3)"/>
-
-<xsl:variable name="BLKD_KEY_H" select="250"/>
-<xsl:variable name="BLKD_KEY_W" select="($BLKD_DRAWAREA_MIN_W + ceiling($BLKD_DRAWAREA_MIN_W div 2.5))"/>
-
-
-<xsl:variable name="BLKD_SPECS_H" select="100"/>
-<xsl:variable name="BLKD_SPECS_W" select="300"/>
-
-
-
-<xsl:variable name="BLKD_BKT_MODS_PER_ROW" select="3"/>
-
-<!--
-<xsl:template name="Print_Dimensions">
- <xsl:message>MOD_LABEL_W : <xsl:value-of select="$MOD_LABEL_W"/></xsl:message>
- <xsl:message>MOD_LABEL_H : <xsl:value-of select="$MOD_LABEL_H"/></xsl:message>
-
- <xsl:message>MOD_LANE_W : <xsl:value-of select="$MOD_LANE_W"/></xsl:message>
- <xsl:message>MOD_LANE_H : <xsl:value-of select="$MOD_LANE_H"/></xsl:message>
-
- <xsl:message>MOD_EDGE_W : <xsl:value-of select="$MOD_EDGE_W"/></xsl:message>
- <xsl:message>MOD_SHAPES_G : <xsl:value-of select="$MOD_SHAPES_G"/></xsl:message>
-
- <xsl:message>MOD_BKTLANE_W : <xsl:value-of select="$MOD_BKTLANE_W"/></xsl:message>
- <xsl:message>MOD_BKTLANE_H : <xsl:value-of select="$MOD_BKTLANE_H"/></xsl:message>
- <xsl:message>MOD_BUCKET_G : <xsl:value-of select="$MOD_BUCKET_G"/></xsl:message>
-
-</xsl:template>
--->
-
-</xsl:stylesheet>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgDiag_Colors.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgDiag_Colors.xsl
deleted file mode 100644
index 1c97a4dee3..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgDiag_Colors.xsl
+++ /dev/null
@@ -1,150 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<!-- Generic colors, shared between modules like webpages diagrams and pdfs -->
-
-<xsl:variable name="COL_XLNX" select="'#AA0017'"/>
-
-<xsl:variable name="COL_BLACK" select="'#000000'"/>
-<xsl:variable name="COL_WHITE" select="'#FFFFFF'"/>
-
-<xsl:variable name="COL_GRAY" select="'#CECECE'"/>
-<xsl:variable name="COL_GRAY_LT" select="'#E1E1E1'"/>
-<xsl:variable name="COL_GRAY_DK" select="'#B1B1B1'"/>
-
-<xsl:variable name="COL_YELLOW" select="'#FFFFDD'"/>
-<xsl:variable name="COL_YELLOW_LT" select="'#FFFFEE'"/>
-
-<xsl:variable name="COL_RED" select="'#AA0000'"/>
-
-<xsl:variable name="COL_GREEN" select="'#33CC33'"/>
-
-<xsl:variable name="COL_BLUE_LT" select="'#AAAAFF'"/>
-
-<!-- Colors specific to the Diagrams -->
-<xsl:variable name="COL_BG" select="'#CCCCCC'"/>
-<xsl:variable name="COL_BG_LT" select="'#EEEEEE'"/>
-<xsl:variable name="COL_BG_UNK" select="'#DDDDDD'"/>
-
-<xsl:variable name="COL_PROC_BG" select="'#FFCCCC'"/>
-<xsl:variable name="COL_PROC_BG_MB" select="'#222222'"/>
-<xsl:variable name="COL_PROC_BG_PP" select="'#90001C'"/>
-<xsl:variable name="COL_PROC_BG_USR" select="'#666699'"/>
-
-<xsl:variable name="COL_MPMC_BG" select="'#8B0800'"/>
-
-<xsl:variable name="COL_MOD_BG" select="'#F0F0F0'"/>
-<xsl:variable name="COL_MOD_SPRT" select="'#888888'"/>
-<xsl:variable name="COL_MOD_MPRT" select="'#888888'"/>
-
-<xsl:variable name="COL_IORING" select="'#000088'"/>
-<xsl:variable name="COL_IORING_LT" select="'#CCCCFF'"/>
-<xsl:variable name="COL_SYSPRT" select="'#0000BB'"/>
-
-<xsl:variable name="COL_INTCS">
- <INTCCOLOR INDEX="0" RGB="#FF9900"/>
- <INTCCOLOR INDEX="1" RGB="#00CCCC"/>
- <INTCCOLOR INDEX="2" RGB="#33FF33"/>
- <INTCCOLOR INDEX="3" RGB="#FF00CC"/>
- <INTCCOLOR INDEX="4" RGB="#99FF33"/>
- <INTCCOLOR INDEX="5" RGB="#0066CC"/>
- <INTCCOLOR INDEX="6" RGB="#9933FF"/>
- <INTCCOLOR INDEX="7" RGB="#3300FF"/>
- <INTCCOLOR INDEX="8" RGB="#00FF33"/>
- <INTCCOLOR INDEX="9" RGB="#FF3333"/>
-</xsl:variable>
-
-<xsl:variable name="COL_BUSSTDS">
- <BUSCOLOR BUSSTD="AXI" RGB="#0084AB" RGB_LT="#D0E6EF" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="XIL" RGB="#990066" RGB_LT="#CC3399" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="OCM" RGB="#0000DD" RGB_LT="#9999DD" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="OPB" RGB="#339900" RGB_LT="#CCDDCC" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
-
- <BUSCOLOR BUSSTD="LMB" RGB="#7777FF" RGB_LT="#DDDDFF" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="FSL" RGB="#CC00CC" RGB_LT="#FFBBFF" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="DCR" RGB="#6699FF" RGB_LT="#BBDDFF" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="FCB" RGB="#8C00FF" RGB_LT="#CCCCFF" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
-
- <BUSCOLOR BUSSTD="PLB" RGB="#FF5500" RGB_LT="#FFBB00" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="PLBV34" RGB="#FF5500" RGB_LT="#FFBB00" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="PLBV46" RGB="#BB9955" RGB_LT="#FFFFDD" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="PLBV46_P2P" RGB="#BB9955" RGB_LT="#FFFFDD" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
-
- <BUSCOLOR BUSSTD="USER" RGB="#009999" RGB_LT="#00CCCC" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="KEY" RGB="#444444" RGB_LT="#888888" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
- <BUSCOLOR BUSSTD="GRAYSCALE" RGB="#444444" RGB_LT="#888888" RGB_DK="#85C3D9" RGB_TXT="#FFFFFF"/>
-</xsl:variable>
-<xsl:variable name = "COL_BUSSTDS_NUMOF" select="count(exsl:node-set($COL_BUSSTDS)/BUSCOLOR)"/>
-
-<xsl:template name="F_BusStd2RGB">
- <xsl:param name="iBusStd" select="'USER'"/>
-
- <xsl:choose>
- <xsl:when test="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB">
- <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = 'USER')]/@RGB"/>
- </xsl:otherwise>
- </xsl:choose>
-</xsl:template>
-
-<xsl:template name="F_BusStd2RGB_LT">
- <xsl:param name="iBusStd" select="'USER'"/>
-
- <xsl:choose>
- <xsl:when test="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB_LT">
- <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB_LT"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = 'USER')]/@RGB_LT"/>
- </xsl:otherwise>
- </xsl:choose>
-</xsl:template>
-
-<xsl:template name="F_BusStd2RGB_DK">
- <xsl:param name="iBusStd" select="'USER'"/>
- <xsl:choose>
- <xsl:when test="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB_DK">
- <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB_DK"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = 'USER')]/@RGB_DK"/>
- </xsl:otherwise>
- </xsl:choose>
-</xsl:template>
-
-<xsl:template name="F_BusStd2RGB_TXT">
- <xsl:param name="iBusStd" select="'USER'"/>
- <xsl:choose>
- <xsl:when test="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB_TXT">
- <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = $iBusStd)]/@RGB_TXT"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR[(@BUSSTD = 'USER')]/@RGB_TXT"/>
- </xsl:otherwise>
- </xsl:choose>
-</xsl:template>
-
-<xsl:template name="F_IntcIdx2RGB">
- <xsl:param name="iIntcIdx" select="'0'"/>
-
- <xsl:variable name="index_" select="$iIntcIdx mod 9"/>
-
- <xsl:choose>
- <xsl:when test="exsl:node-set($COL_INTCS)/INTCCOLOR[(@INDEX = $index_)]/@RGB">
- <xsl:value-of select="exsl:node-set($COL_INTCS)/INTCCOLOR[(@INDEX = $index_)]/@RGB"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="exsl:node-set($COL_INTCS)/INTCCOLOR[(@INDEX = '0')]/@RGB"/>
- </xsl:otherwise>
- </xsl:choose>
-</xsl:template>
-
-</xsl:stylesheet>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgDiag_Globals.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgDiag_Globals.xsl
deleted file mode 100644
index c066fad3aa..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgDiag_Globals.xsl
+++ /dev/null
@@ -1,168 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-<!DOCTYPE stylesheet [
- <!ENTITY UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ">
- <!ENTITY LOWERCASE "abcdefghijklmnopqrstuvwxyz">
-
- <!ENTITY UPPER2LOWER " '&UPPERCASE;' , '&LOWERCASE;' ">
- <!ENTITY LOWER2UPPER " '&LOWERCASE;' , '&UPPERCASE;' ">
-
- <!ENTITY ALPHALOWER "ABCDEFxX0123456789">
- <!ENTITY HEXUPPER "ABCDEFxX0123456789">
- <!ENTITY HEXLOWER "abcdefxX0123456789">
- <!ENTITY HEXU2L " '&HEXLOWER;' , '&HEXUPPER;' ">
-
- <!ENTITY ALLMODS "MODULE[(@INSTANCE)]">
- <!ENTITY BUSMODS "MODULE[(@MODCLASS ='BUS')]">
- <!ENTITY CPUMODS "MODULE[(@MODCLASS ='PROCESSOR')]">
-
- <!ENTITY MODIOFS "MODULE/IOINTERFACES/IOINTERFACE">
- <!ENTITY ALLIOFS "&MODIOFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
-
- <!ENTITY V11MODBIFS "MODULE/BUSINTERFACE">
- <!ENTITY V12MODBIFS "MODULE/BUSINTERFACES/BUSINTERFACE">
- <!ENTITY V11ALLBIFS "&V11MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and @TYPE and @BUSSTD]">
- <!ENTITY V12ALLBIFS "&V12MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and @TYPE and @BUSSTD]">
-
- <!ENTITY V11MODPORTS "MODULE/PORT">
- <!ENTITY V12MODPORTS "MODULE/PORTS/PORT">
- <!ENTITY V11ALLPORTS "&V11MODPORTS;[ (not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <!ENTITY V12ALLPORTS "&V12MODPORTS;[ (not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <!ENTITY V11NDFPORTS "&V11MODPORTS;[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (not(@BUS) and not(@IOS)))]">
- <!ENTITY V12NDFPORTS "&V12MODPORTS;[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (not(@BUS) and not(@IOS)))]">
- <!ENTITY V11DEFPORTS "&V11MODPORTS;[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ((@BUS) or (@IOS)))]">
- <!ENTITY V12DEFPORTS "&V12MODPORTS;[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ((@BUS) or (@IOS)))]">
-]>
-
-<!--
- <!ENTITY MSTBIFS "&MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (@TYPE = 'MASTER')]">
- <!ENTITY SLVBIFS "&MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (@TYPE = 'SLAVE')]">
- <!ENTITY MOSBIFS "&MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ((@TYPE = 'MASTER') or (@TYPE = 'SLAVE'))]">
- <!ENTITY P2PBIFS "&MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ((@TYPE = 'TARGET') or (@TYPE = 'INITIATOR'))]">
--->
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math exsl dyn xlink">
-<!--
- ======================================================
- EDK SYSTEM (EDWARD) Globals.
- ======================================================
--->
-
-<xsl:variable name="G_SYS_ROOT" select="/"/>
-<!--
-<xsl:variable name="G_SYS_DOC" select="dyn:evaluate($G_SYS_ROOT)"/>
-<xsl:variable name="G_SYS_DOC" select="dyn:evaluate($G_SYS_ROOT)"/>
- -->
-<xsl:variable name="G_SYS" select="$G_SYS_ROOT/EDKSYSTEM"/>
-<xsl:variable name="G_SYS_TIMESTAMP" select="$G_SYS/@TIMESTAMP"/>
-<xsl:variable name="G_SYS_EDKVERSION" select="$G_SYS/@EDKVERSION"/>
-
-<xsl:variable name="G_SYS_INFO" select="$G_SYS/SYSTEMINFO"/>
-<xsl:variable name="G_SYS_INFO_PKG" select="$G_SYS_INFO/@PACKAGE"/>
-<xsl:variable name="G_SYS_INFO_DEV" select="$G_SYS_INFO/@DEVICE"/>
-<xsl:variable name="G_SYS_INFO_ARCH" select="$G_SYS_INFO/@ARCH"/>
-<xsl:variable name="G_SYS_INFO_SPEED" select="$G_SYS_INFO/@SPEEDGRADE"/>
-
-<xsl:variable name="G_SYS_MODS" select="$G_SYS/MODULES"/>
-<xsl:variable name="G_SYS_EXPS" select="$G_SYS/EXTERNALPORTS"/>
-
-<!-- INDEX KEYS FOR FAST ACCESS -->
-<xsl:key name="G_MAP_MODULES" match="&ALLMODS;" use="@INSTANCE"/>
-<xsl:key name="G_MAP_PROCESSORS" match="&CPUMODS;" use="@INSTANCE"/>
-
-<xsl:key name="G_MAP_BUSSES" match="&BUSMODS;" use="@INSTANCE"/>
-<xsl:key name="G_MAP_BUSSES" match="&BUSMODS;" use="@BUSSTD"/>
-<xsl:key name="G_MAP_BUSSES" match="&BUSMODS;" use="@BUSSTD_PSF"/>
-
-<xsl:key name="G_MAP_ALL_IOFS" match="&ALLIOFS;" use="../../@INSTANCE"/>
-
-<xsl:key name="G_MAP_ALL_BIFS" match="&V11ALLBIFS;" use="@TYPE"/>
-<xsl:key name="G_MAP_ALL_BIFS" match="&V12ALLBIFS;" use="@TYPE"/>
-<xsl:key name="G_MAP_ALL_BIFS" match="&V11ALLBIFS;" use="@BUSSTD"/>
-<xsl:key name="G_MAP_ALL_BIFS" match="&V12ALLBIFS;" use="@BUSSTD"/>
-<xsl:key name="G_MAP_ALL_BIFS" match="&V11ALLBIFS;" use="@BUSSTD_PSF"/>
-<xsl:key name="G_MAP_ALL_BIFS" match="&V12ALLBIFS;" use="@BUSSTD_PSF"/>
-<xsl:key name="G_MAP_ALL_BIFS" match="&V11ALLBIFS;" use="../@INSTANCE"/>
-<xsl:key name="G_MAP_ALL_BIFS" match="&V12ALLBIFS;" use="../../@INSTANCE"/>
-
-<!--
-<xsl:key name="G_MAP_ALL_BIFS_BY_BUS" match="&ALLBIFS;" use="@BUSNAME"/>
-<xsl:key name="G_MAP_ALL_BIFS_BY_STD" match="&ALLBIFS;" use="@BUSSTD"/>
-<xsl:key name="G_MAP_ALL_BIFS_BY_STD" match="&ALLBIFS;" use="@BUSSTD_PSF"/>
-
-
-<xsl:key name="G_MAP_MST_BIFS" match="&MSTBIFS;" use="@BUSNAME"/>
-<xsl:key name="G_MAP_SLV_BIFS" match="&SLVBIFS;" use="@BUSNAME"/>
-<xsl:key name="G_MAP_MOS_BIFS" match="&MOSBIFS;" use="@BUSNAME"/>
-
-<xsl:key name="G_MAP_P2P_BIFS" match="&P2PBIFS;" use="@BUSNAME"/>
-<xsl:key name="G_MAP_P2P_BIFS" match="&P2PBIFS;" use="@BUSSTD"/>
-<xsl:key name="G_MAP_P2P_BIFS" match="&P2PBIFS;" use="@BUSSTD_PSF"/>
--->
-
-<xsl:key name="G_MAP_ALL_PORTS" match="&V11ALLPORTS;" use="../@INSTANCE"/>
-<xsl:key name="G_MAP_ALL_PORTS" match="&V12ALLPORTS;" use="../../@INSTANCE"/>
-<xsl:key name="G_MAP_DEF_PORTS" match="&V11DEFPORTS;" use="../@INSTANCE"/> <!-- Default ports -->
-<xsl:key name="G_MAP_DEF_PORTS" match="&V12DEFPORTS;" use="../../@INSTANCE"/> <!-- Default ports -->
-<xsl:key name="G_MAP_NDF_PORTS" match="&V11NDFPORTS;" use="../@INSTANCE"/> <!-- Non Default ports -->
-<xsl:key name="G_MAP_NDF_PORTS" match="&V12NDFPORTS;" use="../../@INSTANCE"/> <!-- Non Default ports -->
-
-<xsl:variable name="G_BIFTYPES">
-
- <BIFTYPE TYPE="SLAVE"/>
- <BIFTYPE TYPE="MASTER"/>
- <BIFTYPE TYPE="MASTER_SLAVE"/>
-
- <BIFTYPE TYPE="TARGET"/>
- <BIFTYPE TYPE="INITIATOR"/>
-
- <BIFTYPE TYPE="MONITOR"/>
-
- <BIFTYPE TYPE="USER"/>
- <BIFTYPE TYPE="TRANSPARENT"/>
-
-</xsl:variable>
-<xsl:variable name="G_BIFTYPES_NUMOF" select="count(exsl:node-set($G_BIFTYPES)/BIFTYPE)"/>
-
-<xsl:variable name="G_IFTYPES">
- <IFTYPE TYPE="SLAVE"/>
- <IFTYPE TYPE="MASTER"/>
- <IFTYPE TYPE="MASTER_SLAVE"/>
-
- <IFTYPE TYPE="TARGET"/>
- <IFTYPE TYPE="INITIATOR"/>
-
- <IFTYPE TYPE="MONITOR"/>
-
- <IFTYPE TYPE="USER"/>
-<!--
- <IFTYPE TYPE="TRANSPARENT"/>
--->
-</xsl:variable>
-<xsl:variable name="G_IFTYPES_NUMOF" select="count(exsl:node-set($G_IFTYPES)/IFTYPE)"/>
-
-<xsl:variable name="G_BUSSTDS">
-
- <BUSSTD NAME="AXI"/>
- <BUSSTD NAME="XIL"/>
- <BUSSTD NAME="OCM"/>
- <BUSSTD NAME="OPB"/>
- <BUSSTD NAME="LMB"/>
- <BUSSTD NAME="FSL"/>
- <BUSSTD NAME="DCR"/>
- <BUSSTD NAME="FCB"/>
- <BUSSTD NAME="PLB"/>
- <BUSSTD NAME="PLB34"/>
- <BUSSTD NAME="PLBV46"/>
- <BUSSTD NAME="PLBV46_P2P"/>
-
- <BUSSTD NAME="USER"/>
- <BUSSTD NAME="KEY"/>
-</xsl:variable>
-<xsl:variable name="G_BUSSTDS_NUMOF" select="count(exsl:node-set($G_BUSSTDS)/BUSSTD)"/>
-
-</xsl:stylesheet>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgDiag_StyleDefs.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgDiag_StyleDefs.xsl
deleted file mode 100644
index 88282dee51..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtSvgDiag_StyleDefs.xsl
+++ /dev/null
@@ -1,584 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<!--
-<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
- doctype-public="-//W3C//DTD SVG 1.0//EN"
- doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
--->
-
-<!--
- ======================================================
- Function to put TEXT CSS and other Internal
- Styling properties directly into the output
- svg. The Qt 4.3 Renderer
- cannot handle separate CSS StyleSheets
- ======================================================
--->
-<xsl:template name="F_WriteText">
-
- <xsl:param name="iClass" select="'_UNKNOWN_'"/>
- <xsl:param name="iText" select="' '"/>
- <xsl:param name="iX" select="'0'"/>
- <xsl:param name="iY" select="'0'"/>
-
-<!--
- <xsl:message>TEXT <xsl:value-of select="$iText"/></xsl:message>
- <xsl:message>CLASS <xsl:value-of select="$iClass"/></xsl:message>
--->
-
- <xsl:element name="text">
- <xsl:attribute name="x"><xsl:value-of select="$iX"/></xsl:attribute>
- <xsl:attribute name="y"><xsl:value-of select="$iY"/></xsl:attribute>
-
- <xsl:choose>
-
- <xsl:when test="$iClass = 'sharedbus_label'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'12pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Courier Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'p2pbus_label'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Courier Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'p2pbus_label_horiz'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'12pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="writing-mode"><xsl:value-of select="'tb'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Courier Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
-
- <xsl:when test="$iClass = 'bif_label'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Courier Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'bc_ipinst'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Courier Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'bc_iptype'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_XLNX"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'iogrp_label'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_IORING"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'mpmc_title'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_WHITE"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'16pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'oblique'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'mpmc_biflabel'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_WHITE"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'intr_symbol'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'bkt_label'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'9pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'ipclass_label'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'9pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'key_header'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'key_title'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_XLNX"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'14pt'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'key_label'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'key_label_small'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'900'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
-
- <xsl:when test="$iClass = 'key_label_ul'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="text-decoration"><xsl:value-of select="'underline'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
-
- <xsl:when test="$iClass = 'ipd_portlabel'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'ipd_biflabel'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'normal'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'ipd_iptype'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_XLNX"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Verdana Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'ipd_ipname'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'8pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Courier Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'blkd_spec_name'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'start'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:when test="$iClass = 'blkd_spec_value_mid'">
- <xsl:attribute name="fill"><xsl:value-of select="$COL_BLACK"/></xsl:attribute>
- <xsl:attribute name="stroke"><xsl:value-of select="'none'"/></xsl:attribute>
- <xsl:attribute name="font-size"><xsl:value-of select="'10pt'"/></xsl:attribute>
- <xsl:attribute name="font-style"><xsl:value-of select="'italic'"/></xsl:attribute>
- <xsl:attribute name="font-weight"><xsl:value-of select="'bold'"/></xsl:attribute>
- <xsl:attribute name="text-anchor"><xsl:value-of select="'middle'"/></xsl:attribute>
- <xsl:attribute name="font-family"><xsl:value-of select="'Courier Arial Helvetica san-serif'"/></xsl:attribute>
- </xsl:when>
-
- <xsl:otherwise><xsl:message>UNKNOWN Text style class <xsl:value-of select="$iClass"/></xsl:message></xsl:otherwise>
- </xsl:choose>
-
- <xsl:value-of select="$iText"/>
- </xsl:element>
-
-</xsl:template>
-
-</xsl:stylesheet>
-
-<!--
- text.ioplblgrp {
- fill: #000088;
- stroke: none;
- font-size: 10pt;
- font-style: normal;
- font-weight: 900;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
- text.iplabel {
- fill: #000000;
- stroke: none;
- font-size: 8pt;
- font-style: italic;
- font-weight: 800;
- text-anchor: middle;
- font-family: Courier Arial Helvetica sans-serif;
- }
-
- text.iptype {
- fill: #AA0017;
- stroke: none;
- font-size: 8pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.busintlabel {
- fill: #810017;
- stroke: none;
- font-size: 7pt;
- font-style: italic;
- font-weight: 900;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.mpmcbiflabel {
- fill: #FFFFFF;
- stroke: none;
- font-size: 6pt;
- font-style: normal;
- font-weight: 900;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.buslabel {
- fill: #CC3333;
- stroke: none;
- font-size: 8pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
-
-
- text.ipclass {
- fill: #000000;
- stroke: none;
- font-size: 7pt;
- font-style: normal;
- font-weight: bold;
- text-anchor: start;
- font-family: Times Arial Helvetica sans-serif;
- }
-
- text.procclass {
- fill: #000000;
- stroke: none;
- font-size: 7pt;
- font-style: normal;
- font-weight: bold;
- text-anchor: middle;
- font-family: Times Arial Helvetica sans-serif;
- }
-
-
- text.portlabel {
- fill: #000000;
- stroke: none;
- font-size: 8pt;
- font-style: normal;
- font-weight: bold;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.ipdbiflbl {
- fill: #000000;
- stroke: none;
- font-size: 8pt;
- font-style: normal;
- font-weight: bold;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.mmMHeader {
- fill: #FFFFFF;
- stroke: none;
- font-size: 10pt;
- font-style: normal;
- font-weight: bold;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.mmSHeader {
- fill: #810017;
- stroke: none;
- font-size: 10pt;
- font-style: normal;
- font-weight: bold;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
-
-
- text.dbglabel {
- fill: #555555;
- stroke: none;
- font-size: 8pt;
- font-style: normal;
- font-weight: 900;
- text-anchor: middle;
- font-family: Times Arial Helvetica sans-serif;
- }
-
- text.iopnumb {
- fill: #555555;
- stroke: none;
- font-size: 10pt;
- font-style: normal;
- font-weight: 900;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
-
-
- tspan.iopgrp {
- fill: #000000;
- stroke: none;
- font-size: 8pt;
- font-style: normal;
- font-weight: 900;
- text-anchor: middle;
- baseline-shift:super;
- font-family: Arial Courier san-serif;
- }
-
-
- text.biflabel {
- fill: #000000;
- stroke: none;
- font-size: 6pt;
- font-style: normal;
- font-weight: 900;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
-
- }
-
- text.p2pbuslabel {
- fill: #000000;
- stroke: none;
- font-size: 10pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: start;
- writing-mode: tb;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.mpbuslabel {
- fill: #000000;
- stroke: none;
- font-size: 6pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: start;
- writing-mode: tb;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
-
- text.sharedbuslabel {
- fill: #000000;
- stroke: none;
- font-size: 10pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: start;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
-
- text.splitbustxt {
- fill: #000000;
- stroke: none;
- font-size: 6pt;
- font-style: normal;
- font-weight: bold;
- text-anchor: middle;
- font-family: sans-serif;
- }
-
- text.horizp2pbuslabel {
- fill: #000000;
- stroke: none;
- font-size: 6pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: start;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
-
-
- text.keytitle {
- fill: #AA0017;
- stroke: none;
- font-size: 12pt;
- font-weight: bold;
- text-anchor: middle;
- font-family: Arial Helvetica sans-serif;
- }
-
- text.keyheader {
- fill: #000000;
- stroke: none;
- font-size: 10pt;
- font-weight: bold;
- text-anchor: middle;
- font-family: Arial Helvetica sans-serif;
- }
-
- text.keylabel {
- fill: #000000;
- stroke: none;
- font-size: 8pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: start;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.keylblul {
- fill: #000000;
- stroke: none;
- font-size: 8pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: start;
- text-decoration: underline;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.specsheader {
- fill: #000000;
- stroke: none;
- font-size: 10pt;
- font-weight: bold;
- text-anchor: start;
- font-family: Arial Helvetica sans-serif;
- }
-
- text.specsvalue {
- fill: #000000;
- stroke: none;
- font-size: 8pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: start;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.specsvaluemid {
- fill: #000000;
- stroke: none;
- font-size: 8pt;
- font-style: italic;
- font-weight: bold;
- text-anchor: middle;
- font-family: Verdana Arial Helvetica sans-serif;
- }
-
- text.intrsymbol {
- fill: #000000;
- stroke: none;
- font-size: 8pt;
- font-weight: bold;
- text-anchor: start;
- font-family: Arial Helvetica sans-serif;
- }
-
--->
\ No newline at end of file
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_BusLaneSpaces.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_BusLaneSpaces.xsl
deleted file mode 100644
index 89b61569f0..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_BusLaneSpaces.xsl
+++ /dev/null
@@ -1,2758 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<!--
-<xsl:output method="xml"
- version="1.0"
- encoding="UTF-8"
- indent="yes"
- doctype-public="-//W3C//DTD SVG 1.0//EN"
- doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
--->
-
-<!--
- ===========================================================
- Handle Bucket connections to the shared busses./
-
- ===========================================================
--->
-
-<xsl:template name="BCLaneSpace_BucketToSharedBus">
-
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:param name="iBifType" select="'NONE'"/>
- <xsl:param name="iBusName" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast_W" select="0"/>
- <xsl:param name="iStackToWest_W" select="0"/>
- <xsl:param name="iLaneInSpace_X" select="0"/>
- <xsl:param name="iSpaceSharedBus_Y" select="0"/>
-
-<!--
- <xsl:message>Stack To East <xsl:value-of select="$iStackToEast"/></xsl:message>
- <xsl:message>Stack to West <xsl:value-of select="$iStackToWest"/></xsl:message>
- <xsl:message>Stack to East Width <xsl:value-of select="$iStackToEast_W"/></xsl:message>
- <xsl:message>Stack to West Width <xsl:value-of select="$iStackToWest_W"/></xsl:message>
- <xsl:message>Shared Bus Y <xsl:value-of select="$iSpaceSharedBus_Y"/></xsl:message>
- <xsl:message>Lane in space X <xsl:value-of select="$iLaneInSpace_X"/></xsl:message>
--->
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="sbs_idx_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE= $iBusName)]/@BUS_INDEX"/>
- <xsl:variable name="sbs_name_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@BUS_INDEX = $sbs_idx_)]/@BUSNAME"/>
-
- <xsl:variable name="sbs_bc_y_" select="($iSpaceSharedBus_Y + ($sbs_idx_ * $BLKD_SBS_LANE_H))"/>
-
- <xsl:variable name="bktshp_hori_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@BUS_INDEX = $sbs_idx_)]/@STACK_HORIZ_INDEX"/>
- <xsl:variable name="bktshp_vert_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@BUS_INDEX = $sbs_idx_)]/@SHAPE_VERTI_INDEX"/>
-
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($iStackToWest_W div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($iStackToEast_W div 2)"/>
-
-<!--
- <xsl:message>Ext Shape to West <xsl:value-of select="$extSpaceWest_W_"/></xsl:message>
- <xsl:message>Ext Shape to East <xsl:value-of select="$extSpaceEast_W_"/></xsl:message>
--->
- <xsl:variable name="bktshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$bktshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$bktshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="sbsStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:if test="($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_)">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:if>
-
- <xsl:if test="not($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_)">0</xsl:if>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="vert_line_x_" select="($iLaneInSpace_X + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="vert_line_y1_" select="($iSpaceSharedBus_Y + ($sbs_idx_ * $BLKD_SBS_LANE_H) + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="vert_line_y2_" select="($bktshp_Y_ + ceiling($BLKD_MOD_W div 2) + $sbsStack_H_diff_)"/>
- <xsl:variable name="bcInSpace_X_" select="($iLaneInSpace_X + ceiling($BLKD_BIFC_W div 2) - ceiling($BLKD_BUS_ARROW_W div 2))"/>
-
-
-<!--
- <xsl:message>Shared Bus Y <xsl:value-of select="$G_SharedBus_Y"/></xsl:message>
- <xsl:message>Vert Bus Y <xsl:value-of select="$vert_line_y1_"/></xsl:message>
- <xsl:message>vert y1 <xsl:value-of select="$vert_line_y1_"/></xsl:message>
- <xsl:message>vert y2 <xsl:value-of select="$vert_line_y2_"/></xsl:message>
--->
-
- <xsl:variable name="horz_line_y_" select="$vert_line_y2_"/>
- <xsl:variable name="horz_line_x1_" select="$vert_line_x_"/>
- <xsl:variable name="horz_line_x2_" select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_)"/>
-
- <xsl:variable name="v_bus_ul_x_" select="$vert_line_x_"/>
- <xsl:variable name="v_bus_ul_y_" select="$vert_line_y1_"/>
- <xsl:variable name="v_bus_width_" select="$BLKD_P2P_BUS_W"/>
-
- <xsl:variable name="v_bus_height_" select="(($vert_line_y2_ - $vert_line_y1_) - ceiling($BLKD_BIFC_H div 2))"/>
-
- <xsl:variable name="h_bus_ul_x_" select="$v_bus_ul_x_"/>
- <xsl:variable name="h_bus_ul_y_" select="$vert_line_y2_ - $BLKD_BIFC_H + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
- <xsl:variable name="h_bus_width_" select="ceiling($space_W_ div 2) + $extSpaceEast_W_"/>
- <xsl:variable name="h_bus_height_" select="$BLKD_P2P_BUS_W"/>
-
-<!--
- <xsl:variable name="h_bus_width_" select="($space_W_ + ceiling(($extSpaceWest_W_ + $extSpaceEast_W_) div 2) - $BLKD_BIFC_W)"/>
- <xsl:message>v bus x <xsl:value-of select="$v_bus_ul_x_"/></xsl:message>
- <xsl:message>v bus y <xsl:value-of select="$v_bus_ul_y_"/></xsl:message>
- <xsl:message>v bus w <xsl:value-of select="$v_bus_width_"/></xsl:message>
- <xsl:message>v bus y1 <xsl:value-of select="$vert_line_y1_"/></xsl:message>
- <xsl:message>v bus y2 <xsl:value-of select="$vert_line_y2_"/></xsl:message>
- <xsl:message>v bus h <xsl:value-of select="$v_bus_height_"/></xsl:message>
- <xsl:message>h bus w <xsl:value-of select="$h_bus_width_"/></xsl:message>
--->
-
-
- <!-- Draw rectangular parts of the bus -->
- <rect x="{$v_bus_ul_x_}"
- y="{$v_bus_ul_y_ - 2}"
- width= "{$v_bus_width_}"
- height="{$v_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
-
- <rect x="{$h_bus_ul_x_}"
- y="{$h_bus_ul_y_ - 5}"
- width= "{$h_bus_width_}"
- height="{$h_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
-<!--
--->
-
-</xsl:template>
-
-<!--
- ===========================================================
- Handle Processor's Shared bus connections.
- ===========================================================
--->
-
-<xsl:template name="BCLaneSpace_ProcBifToSharedBus">
-
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:param name="iBusName" select="'NONE'"/>
- <xsl:param name="iBifType" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast_W" select="0"/>
- <xsl:param name="iStackToWest_W" select="0"/>
- <xsl:param name="iLaneInSpace_X" select="0"/>
- <xsl:param name="iSpaceSharedBus_Y" select="0"/>
-
-<!--
- <xsl:message>Proc Bus Std <xsl:value-of select="$iBusStd"/></xsl:message>
- <xsl:message>Proc Bus Name <xsl:value-of select="$iBusName"/></xsl:message>
- <xsl:message>Proc Bif Type <xsl:value-of select="$iBifType"/></xsl:message>
--->
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="sbs_idx_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE= $iBusName)]/@BUS_INDEX"/>
- <xsl:variable name="sbs_bc_y_" select="($iSpaceSharedBus_Y + ($sbs_idx_ * $BLKD_SBS_LANE_H))"/>
- <xsl:variable name="procInst_" select="BUSCONN/@INSTANCE"/>
-
-
-<!--
- <xsl:message>Shared Bus Idx <xsl:value-of select="$sbs_idx_"/></xsl:message>
- <xsl:message>Proc inst <xsl:value-of select="$procInst_"/></xsl:message>
--->
-
- <xsl:variable name="procBif_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * BUSCONN/@BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
- <xsl:variable name="procBifName_" select="BUSCONN/@BUSINTERFACE"/>
- <xsl:variable name="procBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $procInst_)]/BUSINTERFACE[(@NAME = $procBifName_)]/@BIF_X"/>
- <xsl:variable name="procBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $procInst_)]/BUSINTERFACE[(@NAME = $procBifName_)]/@TYPE"/>
-
- <xsl:variable name="procshp_hori_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $procInst_)]/@STACK_HORIZ_INDEX"/>
- <xsl:variable name="procshp_vert_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $procInst_)]/@SHAPE_VERTI_INDEX"/>
-
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($iStackToWest_W div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($iStackToEast_W div 2)"/>
-
-
-<!--
- <xsl:message>Ext Space to West <xsl:value-of select="$extSpaceWest_W_"/></xsl:message>
- <xsl:message>Ext Space to East <xsl:value-of select="$extSpaceEast_W_"/></xsl:message>
-
- <xsl:message>Ext Space to East <xsl:value-of select="$extSpaceEast_W_"/></xsl:message>
- <xsl:message>Stack horiz <xsl:value-of select="$procshp_hori_idx_"/></xsl:message>
- <xsl:message>Stack verti <xsl:value-of select="$procshp_vert_idx_"/></xsl:message>
- <xsl:message>Proc Bif Y <xsl:value-of select="$procBif_Y_"/></xsl:message>
--->
-
- <xsl:variable name="procshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$procshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$procshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <xsl:variable name="procStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($procshp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($procshp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bc_Y_" select="($procshp_Y_ + $procBif_Y_ + ceiling($BIF_H div 2) + $procStack_H_diff_) - ceiling($BLKD_BIFC_H div 2)"/>
-<!--
- <xsl:variable name="bc_x_" select="($laneInSpace_X + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="bc_x_" select="0"/>
- <xsl:message>Test</xsl:message>
--->
-
- <xsl:variable name="bc_X_">
- <xsl:choose>
- <xsl:when test="$procBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($BLKD_MOD_W div 2) + $BLKD_BIFC_W))"/>
-<!--
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_)"/>
- <xsl:value-of select="($space_W_ - ceiling($BLKD_MOD_W div 2))"/>
- <xsl:value-of select="$space_W_ + $extSpaceEast_W_"/>
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($BLKD_MOD_W div 2) + $BLKD_BIFC_W))"/>
--->
- </xsl:when>
- <xsl:when test="$procBifSide_ = '1'">
- <xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <!-- Place the bus connectijon -->
- <use x="{$bc_X_}" y="{$bc_Y_}" xlink:href="#{$iBusStd}_busconn_{$procBifType_}"/>
-<!--
--->
- <xsl:variable name="vert_line_x_" select="($iLaneInSpace_X + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="vert_line_y1_" select="($procshp_Y_ + $procBif_Y_ + ceiling($BLKD_BIF_H div 2) + $procStack_H_diff_)"/>
- <xsl:variable name="vert_line_y2_" select="($iSpaceSharedBus_Y + ($sbs_idx_ * $BLKD_SBS_LANE_H) + ceiling($BLKD_BIFC_W div 2))"/>
-
-<!--
- <xsl:message>Vert line Y1 <xsl:value-of select="$vert_line_y1_"/></xsl:message>
- <xsl:message>Vert line Y2 <xsl:value-of select="$vert_line_y2_"/></xsl:message>
--->
-
- <xsl:variable name="v_bus_ul_y_">
- <xsl:choose>
- <xsl:when test="$vert_line_y1_ > $vert_line_y2_">
- <xsl:value-of select="$vert_line_y2_"/>
- </xsl:when>
- <xsl:when test="$vert_line_y2_ > $vert_line_y1_">
- <xsl:value-of select="$vert_line_y1_"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="v_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="($vert_line_x_ + $BLKD_MOD_BIF_GAP_H)"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="($vert_line_x_ - $BLKD_MOD_BIF_GAP_H)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="v_bus_width_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="v_bus_height_">
- <xsl:choose>
- <xsl:when test="$vert_line_y1_ > $vert_line_y2_">
- <xsl:value-of select="($vert_line_y1_ - $vert_line_y2_) - $BLKD_P2P_BUS_W"/>
- </xsl:when>
- <xsl:when test="$vert_line_y2_ > $vert_line_y1_">
- <xsl:value-of select="($vert_line_y2_ - $vert_line_y1_) - $BLKD_P2P_BUS_W"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="($bc_X_ + $BLKD_BIFC_W - ceiling(($BLKD_BIFC_W - $BLKD_BIFC_Wi) div 2))"/>
-<!--
- <xsl:value-of select="$v_bus_ul_x_"/>
--->
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="$v_bus_ul_x_"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_y_">
- <xsl:choose>
- <xsl:when test="$vert_line_y1_ > $vert_line_y2_">
- <xsl:value-of select="$vert_line_y2_ - ceiling($BLKD_P2P_BUS_W div 2)"/>
- </xsl:when>
- <xsl:when test="$vert_line_y2_ > $vert_line_y1_">
- <xsl:value-of select="$vert_line_y1_ - ceiling($BLKD_P2P_BUS_W div 2)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="h_bus_height_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="h_bus_width_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="$v_bus_ul_x_ - $h_bus_ul_x_ + $BLKD_P2P_BUS_W"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="($bc_X_ - $v_bus_ul_x_) + ceiling(($BLKD_BIFC_W - $BLKD_BIFC_Wi) div 2) + 1"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:if test="(@ORIENTED = 'WEST')">
- </xsl:if>
-
- <xsl:message>bc_X_ <xsl:value-of select="$bc_X_"/></xsl:message>
- <xsl:message>v_bus_ul_x <xsl:value-of select="$v_bus_ul_x_"/></xsl:message>
- <xsl:message>h_bus_width <xsl:value-of select="$h_bus_width_"/></xsl:message>
- <xsl:message>h_bus_ul_y <xsl:value-of select="$h_bus_ul_y_"/></xsl:message>
--->
-
- <rect x="{$v_bus_ul_x_}"
- y="{$v_bus_ul_y_ + 2}"
- width= "{$v_bus_width_}"
- height="{$v_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
-
- <rect x="{$h_bus_ul_x_}"
- y="{$h_bus_ul_y_}"
- width= "{$h_bus_width_}"
- height="{$h_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
-</xsl:template>
-
-<!--
- ===========================================================
- Handle non Processor Sharedebus connections.
- ===========================================================
--->
-
-<xsl:template name="BCLaneSpace_NonProcBifToSharedBus">
-
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:param name="iBifType" select="'NONE'"/>
- <xsl:param name="iBusName" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast_W" select="0"/>
- <xsl:param name="iStackToWest_W" select="0"/>
- <xsl:param name="iLaneInSpace_X" select="0"/>
- <xsl:param name="iSpaceSharedBus_Y" select="0"/>
-
-
- <xsl:variable name="sbs_idx_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE= $iBusName)]/@BUS_INDEX"/>
- <xsl:variable name="sbs_bc_y_" select="($iSpaceSharedBus_Y + ($sbs_idx_ * $BLKD_SBS_LANE_H))"/>
-<!--
- <xsl:variable name="sbs_bc_y_" select="($G_SharedBus_Y + ($sbs_idx_ * $BLKD_SBS_LANE_H))"/>
--->
-
- <xsl:variable name="cmplxInst_" select="BUSCONN/@INSTANCE"/>
-
- <xsl:variable name="cmplxBif_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * BUSCONN/@BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
- <xsl:variable name="cmplxBifName_" select="BUSCONN/@BUSINTERFACE"/>
- <xsl:variable name="cmplxBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $cmplxInst_)]/BUSINTERFACE[(@NAME = $cmplxBifName_)]/@BIF_X"/>
- <xsl:variable name="cmplxBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $cmplxInst_)]/BUSINTERFACE[(@NAME = $cmplxBifName_)]/@TYPE"/>
-
- <xsl:variable name="cmplxshp_hori_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $cmplxInst_)])]/@STACK_HORIZ_INDEX"/>
- <xsl:variable name="cmplxshp_vert_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $cmplxInst_)])]/@SHAPE_VERTI_INDEX"/>
-
- <xsl:variable name="is_abvSbs_" select="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[MODULE[(@INSTANCE = $cmplxInst_)]]/@IS_ABVSBS)"/>
- <xsl:variable name="is_blwSbs_" select="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[MODULE[(@INSTANCE = $cmplxInst_)]]/@IS_BLWSBS)"/>
-
-<!--
- <xsl:message>iStackToEast <xsl:value-of select="$iStackToEast"/></xsl:message>
- <xsl:message>iStackToWest <xsl:value-of select="$iStackToWest"/></xsl:message>
- <xsl:message><xsl:value-of select="$cmplxInst_"/> : <xsl:value-of select="$is_blwSbs_"/></xsl:message>
- <xsl:message><xsl:value-of select="$cmplxInst_"/> : <xsl:value-of select="$is_abvSbs_"/></xsl:message>
- <xsl:message><xsl:value-of select="$cmplxInst_"/> : <xsl:value-of select="$is_blwSbs_"/></xsl:message>
- <xsl:message><xsl:value-of select="$cmplxInst_"/> : <xsl:value-of select="$is_abvSbs_"/></xsl:message>
- <xsl:message>Stack horiz <xsl:value-of select="$cmplxshp_hori_idx_"/></xsl:message>
- <xsl:message>Stack verti <xsl:value-of select="$cmplxshp_vert_idx_"/></xsl:message>
- <xsl:message>Proc Bif Y <xsl:value-of select="$procBif_Y_"/></xsl:message>
--->
-
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($iStackToWest_W div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($iStackToEast_W div 2)"/>
-
- <xsl:variable name="cmplxshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$cmplxshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$cmplxshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Complex shape Y <xsl:value-of select="$cmplxshp_Y_"/></xsl:message>
--->
-
- <xsl:variable name="stackToEast_">
- <xsl:choose>
- <xsl:when test="not($iStackToEast = 'NONE')"><xsl:value-of select="$iStackToEast"/></xsl:when>
- <xsl:otherwise>NONE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="stackToWest_">
- <xsl:choose>
- <xsl:when test=" not($iStackToWest = 'NONE')"><xsl:value-of select="$iStackToWest"/></xsl:when>
- <xsl:when test="(not($iStackToEast = 'NONE') and not($iStackToEast = '0'))"><xsl:value-of select="($iStackToEast - 1)"/></xsl:when>
- <xsl:otherwise>NONE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="cmplxStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($stackToEast_ = 'NONE') or ($stackToWest_ = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($stackToEast_ = 'NONE') or ($stackToWest_ = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$stackToWest_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$stackToEast_"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($cmplxshp_hori_idx_ = $stackToEast_) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($cmplxshp_hori_idx_ = $stackToWest_) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="bc_Y_" select="($cmplxshp_Y_ + $cmplxBif_Y_ + ceiling($BIF_H div 2) + $cmplxStack_H_diff_) - ceiling($BLKD_BIFC_H div 2)"/>
-
-
-<!--
- <xsl:message>Sstack H Diff <xsl:value-of select="$cmplxStack_H_diff_"/></xsl:message>
- <xsl:message>BC Y <xsl:value-of select="$bc_Y_"/></xsl:message>
- <xsl:variable name="bc_x_" select="($laneInSpace_X + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="bc_x_" select="0"/>
--->
- <xsl:variable name="bc_X_">
- <xsl:choose>
- <xsl:when test="$cmplxBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($BLKD_MOD_W div 2) + $BLKD_BIFC_W))"/>
- </xsl:when>
- <xsl:when test="$cmplxBifSide_ = '1'">
- <xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <use x="{$bc_X_}" y="{$bc_Y_}" xlink:href="#{$iBusStd}_busconn_{$cmplxBifType_}"/>
-
- <xsl:variable name="vert_line_x_" select="($iLaneInSpace_X + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="vert_line_y1_" select="($cmplxshp_Y_ + $cmplxBif_Y_ + ceiling($BLKD_BIF_H div 2) + $cmplxStack_H_diff_)"/>
- <xsl:variable name="vert_line_y2_" select="($iSpaceSharedBus_Y + ($sbs_idx_ * $BLKD_SBS_LANE_H) + ceiling($BLKD_BIFC_W div 2))"/>
-
- <xsl:variable name="v_bus_ul_y_">
- <xsl:choose>
- <xsl:when test="$vert_line_y1_ > $vert_line_y2_">
- <xsl:value-of select="$vert_line_y2_"/>
- </xsl:when>
- <xsl:when test="$vert_line_y2_ > $vert_line_y1_">
- <xsl:value-of select="$vert_line_y1_"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="v_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="($vert_line_x_ + $BLKD_MOD_BIF_GAP_H)"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="($vert_line_x_ - $BLKD_MOD_BIF_GAP_H)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="v_bus_width_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="v_bus_height_">
- <xsl:choose>
- <xsl:when test="$vert_line_y1_ > $vert_line_y2_">
- <xsl:value-of select="($vert_line_y1_ - $vert_line_y2_) - $BLKD_P2P_BUS_W + 8"/>
- </xsl:when>
- <xsl:when test="$vert_line_y2_ > $vert_line_y1_">
- <xsl:value-of select="($vert_line_y2_ - $vert_line_y1_) - $BLKD_P2P_BUS_W + 8"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="($bc_X_ + $BLKD_BIFC_W - ceiling(($BLKD_BIFC_W - $BLKD_BIFC_Wi) div 2))"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="$v_bus_ul_x_"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_y_">
- <xsl:choose>
-
- <xsl:when test="($is_blwSbs_ = 'TRUE') and ($vert_line_y1_ > $vert_line_y2_)">
- <xsl:value-of select="$vert_line_y1_ - ceiling($BLKD_P2P_BUS_W div 2)"/>
- </xsl:when>
- <xsl:when test="($is_blwSbs_ = 'TRUE') and ($vert_line_y2_ > $vert_line_y1_)">
- <xsl:value-of select="$vert_line_y2_ - ceiling($BLKD_P2P_BUS_W div 2)"/>
- </xsl:when>
-
- <xsl:when test="($is_abvSbs_ = 'TRUE') and ($vert_line_y1_ > $vert_line_y2_)">
- <xsl:value-of select="$vert_line_y2_ - ceiling($BLKD_P2P_BUS_W div 2)"/>
- </xsl:when>
- <xsl:when test="($is_abvSbs_ = 'TRUE') and ($vert_line_y2_ > $vert_line_y1_)">
- <xsl:value-of select="$vert_line_y1_ - ceiling($BLKD_P2P_BUS_W div 2)"/>
- </xsl:when>
-
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="h_bus_height_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="h_bus_width_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="$v_bus_ul_x_ - $h_bus_ul_x_ + $BLKD_P2P_BUS_W"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="($bc_X_ - $v_bus_ul_x_) + ceiling(($BLKD_BIFC_W - $BLKD_BIFC_Wi) div 2) + 1"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
- <rect x="{$v_bus_ul_x_}"
- y="{$v_bus_ul_y_ - 2}"
- width= "{$v_bus_width_}"
- height="{$v_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
-
- <rect x="{$h_bus_ul_x_}"
- y="{$h_bus_ul_y_}"
- width= "{$h_bus_width_}"
- height="{$h_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
-
-</xsl:template>
-
-<!--
- ===========================================================
- Handle connections from processors to Memory UNITs
- ===========================================================
--->
-
-
-<xsl:template name="BCLaneSpace_ProcBifToMemoryUnit">
-
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:param name="iBusName" select="'NONE'"/>
- <xsl:param name="iBifType" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast_W" select="0"/>
- <xsl:param name="iStackToWest_W" select="0"/>
- <xsl:param name="iLaneInSpace_X" select="0"/>
-
- <xsl:variable name="bcInSpace_X_" select="$iLaneInSpace_X"/>
- <xsl:variable name="procInstance_" select="BUSCONN[@IS_PROCCONN]/@INSTANCE"/>
- <xsl:variable name="mem_procshp_hori_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $procInstance_)]/@STACK_HORIZ_INDEX"/>
- <xsl:variable name="mem_procshp_vert_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $procInstance_)]/@SHAPE_VERTI_INDEX"/>
-
- <xsl:variable name="mem_procshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$mem_procshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$mem_procshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($iStackToWest_W div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($iStackToEast_W div 2)"/>
-
- <xsl:variable name="cmplxStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($mem_procshp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($mem_procshp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="mem_procStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($mem_procshp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($mem_procshp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <!-- Store the conns in a variable -->
- <xsl:variable name="memConn_heights_">
-
- <xsl:for-each select="BUSCONN">
-
- <xsl:variable name="bifName_" select="@BUSINTERFACE"/>
-
-
- <xsl:choose>
- <xsl:when test="@IS_PROCCONN and @BIF_Y">
-
- <xsl:variable name="procBif_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
- <xsl:variable name="procBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $procInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="procBusName_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $procInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSNAME"/>
- <xsl:variable name="procBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $procInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
- <xsl:variable name="bcProc_Y_" select="($mem_procshp_Y_ + $procBif_Y_ + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $mem_procStack_H_diff_)"/>
- <xsl:variable name="bcProc_X_">
- <xsl:choose>
- <xsl:when test="$procBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($BLKD_MOD_W div 2) + $BLKD_BIFC_W))"/>
- </xsl:when>
- <xsl:when test="$procBifSide_ = '1'">
- <xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <MEMCONN X="{$bcProc_X_}" Y="{$bcProc_Y_}" BUSNAME="{$procBusName_}" BUSSTD="{$iBusStd}" TYPE="{$procBifType_}" BIFSIDE="{$procBifSide_}"/>
-
- </xsl:when>
-
- <xsl:otherwise>
-
- <xsl:variable name="memcInstance_" select="@INSTANCE"/>
- <xsl:variable name="memcshp_vert_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[MODULE[(@INSTANCE = $memcInstance_)]]/@SHAPE_VERTI_INDEX"/>
- <xsl:variable name="memcBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $memcInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
- <xsl:variable name="memcBif_Y_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $memcInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_Y"/>
-
- <xsl:variable name="memshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$mem_procshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$memcshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="memcMOD_W_" select="(($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[MODULE[(@INSTANCE = $memcInstance_)]]/@MODS_W) * $BLKD_MOD_W)"/>
-
- <xsl:variable name="procBif_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
-
- <xsl:variable name="memcConn_Y_">
- <xsl:choose>
- <xsl:when test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[MODULE[(@INSTANCE = $memcInstance_)]]/@MODS_H = 1)">
- <xsl:value-of select="($memshp_Y_ + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V) + ($memcBif_Y_ * ($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V)) + ceiling($BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $cmplxStack_H_diff_)"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="($memshp_Y_ + $BLKD_MOD_H + $BLKD_MOD_LANE_H + ($memcBif_Y_ * ($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V)) + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $cmplxStack_H_diff_)"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="memcConn_X_">
- <xsl:choose>
- <xsl:when test="$memcBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($memcMOD_W_ div 2) + $BLKD_BIFC_W))"/>
- </xsl:when>
- <xsl:when test="$memcBifSide_ = '1'">
- <xsl:value-of select="ceiling($memcMOD_W_ div 2)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="memcBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $memcInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="memcBusName_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $memcInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSNAME"/>
-
- <MEMCONN X="{$memcConn_X_}" Y="{$memcConn_Y_}" BUSNAME="{$memcBusName_}" BUSSTD="{$iBusStd}" TYPE="{$memcBifType_}" BIFSIDE="{$memcBifSide_}"/>
-
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:variable>
-
-
- <!-- Draw the busconnection and horizontal lines.-->
- <xsl:for-each select="exsl:node-set($memConn_heights_)/MEMCONN">
-
- <xsl:variable name="bus_x_" select="($bcInSpace_X_ + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="bus_y_" select="@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
-
- <xsl:variable name="adjusted_X_">
- <xsl:choose>
- <xsl:when test="((@X < ($bus_x_ + $BLKD_BUS_ARROW_W)) and (@BIFSIDE ='0'))">
- <xsl:value-of select="(@X + $BLKD_P2P_BUS_W)"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="@X"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_x_dx_">
- <xsl:choose>
- <xsl:when test="((@X < ($bus_x_ + $BLKD_BUS_ARROW_W)) and (@BIFSIDE='0'))">
- <xsl:value-of select="$BLKD_P2P_BUS_W"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0'">
- <xsl:value-of select="($bus_x_ - $h_bus_ul_x_dx_)"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1'">
- <xsl:value-of select="(@X + $BLKD_BIFC_W + $BLKD_BUS_ARROW_W)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_y_" select="$bus_y_"/>
-
- <xsl:variable name="h_bus_height_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="h_bus_width_">
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0'">
- <xsl:value-of select="($adjusted_X_ - $bus_x_ - $BLKD_BUS_ARROW_W)"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1'">
- <xsl:value-of select="$bus_x_ - $h_bus_ul_x_"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <!-- Place the bus connection -->
- <use x="{@X}" y="{@Y}" xlink:href="#{@BUSSTD}_busconn_{@TYPE}"/>
-
- <!-- Draw the arrow -->
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0'">
- <use x="{@X - $BLKD_BUS_ARROW_W}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowEast"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1'">
- <use x="{(@X + $BLKD_BIFC_W)}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowWest"/>
- </xsl:when>
- </xsl:choose>
-
-
- <!-- Draw the horizontal part of the bus -->
- <rect x="{$h_bus_ul_x_}"
- y="{$h_bus_ul_y_}"
- width= "{$h_bus_width_}"
- height="{$h_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
- </xsl:for-each>
-
- <xsl:variable name="busTop_" select="math:min(exsl:node-set($memConn_heights_)/MEMCONN/@Y)"/>
- <xsl:variable name="busBot_" select="math:max(exsl:node-set($memConn_heights_)/MEMCONN/@Y)"/>
- <xsl:variable name="busName_" select="exsl:node-set($memConn_heights_)/MEMCONN/@BUSNAME"/>
- <xsl:variable name="busSide_" select="exsl:node-set($memConn_heights_)/MEMCONN/@BIFSIDE"/>
- <xsl:variable name="leftmost_x_" select="math:min(exsl:node-set($memConn_heights_)/MEMCONN/@X)"/>
-
-<!-- Hack to fix CR473515 -->
- <xsl:variable name="v_bus_x_dx_">
- <xsl:choose>
- <xsl:when test="(($busSide_ = '0') and (($leftmost_x_ - ($bcInSpace_X_ + $BLKD_P2P_BUS_W)) <= $BLKD_P2P_BUS_W))">-4</xsl:when>
- <xsl:otherwise><xsl:value-of select="$BLKD_P2P_BUS_W"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="v_bus_y_" select="$busTop_ + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
- <xsl:variable name="v_bus_x_">
- <xsl:choose>
- <xsl:when test="$busSide_ ='0'">
- <xsl:value-of select="($bcInSpace_X_ + $v_bus_x_dx_)"/>
- </xsl:when>
- <xsl:when test="$busSide_ ='1'">
- <xsl:value-of select="($bcInSpace_X_ + $BLKD_P2P_BUS_W)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <!-- Draw the vertical part of the bus -->
- <rect x="{$v_bus_x_}"
- y="{$v_bus_y_}"
- width= "{$BLKD_P2P_BUS_W}"
- height="{($busBot_ - $busTop_) + $BLKD_P2P_BUS_W}"
- style="stroke:none; fill:{$busColor_}"/>
-
-<!-- Hack to fix CR473515 -->
- <xsl:if test="($busSide_ ='0')">
- <rect x="{$v_bus_x_}"
- y="{$v_bus_y_ + ($busBot_ - $busTop_)}"
- width= "{$BLKD_P2P_BUS_W * 2}"
- height="{$BLKD_P2P_BUS_W}"
- style="stroke:none; fill:{$busColor_}"/>
- </xsl:if>
-
-<!--
- <xsl:message>v_bus_x <xsl:value-of select="$v_bus_x_"/></xsl:message>
--->
-
- <!-- Place the bus label.-->
-<!--
- <text class="p2pbuslabel"
- x="{$bcInSpace_X_ + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6}"
- y="{$busTop_ + ($BLKD_BUS_ARROW_H * 3)}">
- <xsl:value-of select="$busName_"/>
- </text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($bcInSpace_X_ + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6)"/>
- <xsl:with-param name="iY" select="($busTop_ + ($BLKD_BUS_ARROW_H * 3))"/>
- <xsl:with-param name="iText" select="$busName_"/>
- <xsl:with-param name="iClass" select="'p2pbus_label'"/>
- </xsl:call-template>
-
-</xsl:template>
-
-
-<!--
- ===========================================================
- Handle generic Point to Point connections
- ===========================================================
--->
-
-<xsl:template name="BCLaneSpace_PointToPoint">
-
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:param name="iBifType" select="'NONE'"/>
- <xsl:param name="iBusName" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast_W" select="0"/>
- <xsl:param name="iStackToWest_W" select="0"/>
- <xsl:param name="iLaneInSpace_X" select="0"/>
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="busColor_lt_">
- <xsl:call-template name="F_BusStd2RGB_LT">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($iStackToWest_W div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($iStackToEast_W div 2)"/>
-
- <xsl:variable name="bcInSpace_X_" select="($iLaneInSpace_X + ceiling($BLKD_BIFC_W div 2) - ceiling($BLKD_BUS_ARROW_W div 2))"/>
- <xsl:variable name="p2pInstance_" select="BUSCONN[(@BIF_Y)]/@INSTANCE"/>
-
- <xsl:variable name="p2pshp_hori_idx_">
- <xsl:choose>
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $p2pInstance_)]">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $p2pInstance_)]/@STACK_HORIZ_INDEX"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $p2pInstance_)])]/@STACK_HORIZ_INDEX"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="p2pshp_vert_idx_">
- <xsl:choose>
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $p2pInstance_)]">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $p2pInstance_)]/@SHAPE_VERTI_INDEX"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $p2pInstance_)])]/@SHAPE_VERTI_INDEX"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:variable name="p2pshp_hori_idx_" select="/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $procInstance_)]/@STACK_HORIZ_INDEX"/>
- <xsl:variable name="p2pshp_vert_idx_" select="/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $procInstance_)]/@SHAPE_VERTI_INDEX"/>
--->
-
- <xsl:variable name="p2pshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$p2pshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$p2pshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="cmplxStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($p2pshp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($p2pshp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="procStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($p2pshp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($p2pshp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
-
- <!-- Store the conns in a variable -->
- <xsl:variable name="p2pConn_heights_">
-
- <xsl:for-each select="BUSCONN">
-
- <xsl:variable name="bifName_" select="@BUSINTERFACE"/>
-
- <xsl:choose>
- <xsl:when test="@IS_PROCCONN and @BIF_Y">
-
-<!--
- <xsl:message>Proc <xsl:value-of select="$procInstance_"/></xsl:message>
--->
- <xsl:variable name="procBif_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
- <xsl:variable name="procBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $p2pInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="procBusName_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $p2pInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSNAME"/>
- <xsl:variable name="procBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $p2pInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
-
- <xsl:variable name="bcProc_Y_" select="($p2pshp_Y_ + $procBif_Y_ + ceiling($BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $procStack_H_diff_)"/>
- <xsl:variable name="bcProc_X_">
- <xsl:choose>
- <xsl:when test="$procBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($BLKD_MOD_W div 2) + $BLKD_BIFC_W))"/>
- </xsl:when>
- <xsl:when test="$procBifSide_ = '1'">
- <xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <P2PCONN X="{$bcProc_X_}" Y="{$bcProc_Y_}" BUSNAME= "{$procBusName_}" BUSSTD="{$iBusStd}" TYPE="{$procBifType_}" BIFSIDE="{$procBifSide_}"/>
-
-<!--
- <xsl:message>bcProc_X_ <xsl:value-of select="$bcProc_X_"/></xsl:message>
- <xsl:message>bcProc_Y_ <xsl:value-of select="$bcProc_Y_"/></xsl:message>
- <P2PCONN X="{$bcInSpace_X_}" Y="{$bcProc_Y_}" BUSSTD="{$busStd}" TYPE="{$procBifType_}" BIFSIDE="{$procBifSide_}" STACK_ID=""/>
--->
- </xsl:when>
-
- <xsl:otherwise>
-
- <xsl:variable name="modInstance_" select="@INSTANCE"/>
- <xsl:variable name="modshp_vert_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[MODULE[(@INSTANCE = $modInstance_)]]/@SHAPE_VERTI_INDEX"/>
- <xsl:variable name="modBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
- <xsl:variable name="modBif_Y_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_Y"/>
- <xsl:variable name="modBc_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * $modBif_Y_) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
-
-<!--
- <xsl:message>Memory Instance <xsl:value-of select="$procInstance_"/></xsl:message>
--->
-
- <xsl:variable name="modshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$p2pshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$modshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="modBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="modBusName_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSNAME"/>
- <xsl:variable name="bcMod_Y_" select="($modshp_Y_ + $modBc_Y_ + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $cmplxStack_H_diff_)"/>
- <xsl:variable name="bcMod_X_">
- <xsl:choose>
- <xsl:when test="$modBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($BLKD_MOD_W div 2) + $BLKD_BIFC_W))"/>
- </xsl:when>
- <xsl:when test="$modBifSide_ = '1'">
- <xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message>Bc Bif Y <xsl:value-of select="$modBif_Y_"/></xsl:message>
- <xsl:message>Bc Mod Y <xsl:value-of select="$modBc_Y_"/></xsl:message>
- <xsl:message>Bc Mod X <xsl:value-of select="$bcMod_X_"/></xsl:message>
- <P2PCONN X="{$bcInSpace_X_}" Y="{$bcMod_Y_}" BUSSTD="{$busStd}" TYPE="{$modBifType_}" BIFSIDE="{$modBifSide_}"/>
--->
- <P2PCONN X="{$bcMod_X_}" Y="{$bcMod_Y_}" BUSNAME="{$modBusName_}" BUSSTD="{$iBusStd}" TYPE="{$modBifType_}" BIFSIDE="{$modBifSide_}"/>
-
- </xsl:otherwise>
-
- </xsl:choose>
- </xsl:for-each>
- </xsl:variable>
-
-
- <xsl:variable name="busTop_" select="math:min(exsl:node-set($p2pConn_heights_)/P2PCONN/@Y)"/>
- <xsl:variable name="busBot_" select="math:max(exsl:node-set($p2pConn_heights_)/P2PCONN/@Y)"/>
- <xsl:variable name="v_bus_y_" select="$busTop_ + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
- <xsl:variable name="busName_" select="exsl:node-set($p2pConn_heights_)/P2PCONN/@BUSNAME"/>
- <xsl:variable name="busStd_" select="exsl:node-set($p2pConn_heights_)/P2PCONN/@BUSSTD"/>
-<!--
--->
- <!-- Draw the vertical part of the bus -->
- <xsl:if test="$busStd_ = 'PLBV46_P2P'">
- <rect x="{$bcInSpace_X_ + $BLKD_P2P_BUS_W}"
- y="{$v_bus_y_}"
- width= "{$BLKD_P2P_BUS_W}"
- height="{($busBot_ - $busTop_) + $BLKD_P2P_BUS_W}"
- style="stroke:{$COL_WHITE};stroke-width:1.5;fill:{$busColor_}"/>
- </xsl:if>
-
- <xsl:if test="not($busStd_ = 'PLBV46_P2P')">
- <rect x="{$bcInSpace_X_ + $BLKD_P2P_BUS_W}"
- y="{$v_bus_y_}"
- width= "{$BLKD_P2P_BUS_W}"
- height="{($busBot_ - $busTop_) + $BLKD_P2P_BUS_W}"
- style="stroke:none;fill:{$busColor_}"/>
- </xsl:if>
-
-<!-- -->
-
-<!--
- style="stroke:{$busColor_lt_};stroke-width:1;stroke-opacity:0.9;fill-opacity:2.0;fill:{$busColor_}"/>
--->
-
- <!-- Place the bus label.-->
-<!--
- <text class="p2pbuslabel"
- x="{$bcInSpace_X_ + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6}"
- y="{$busTop_ + ($BLKD_BUS_ARROW_H * 3)}">
- <xsl:value-of select="$busName_"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($bcInSpace_X_ + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6)"/>
- <xsl:with-param name="iY" select="($busTop_ + ($BLKD_BUS_ARROW_H * 3))"/>
- <xsl:with-param name="iText" select="$busName_"/>
- <xsl:with-param name="iClass" select="'p2pbus_label'"/>
- </xsl:call-template>
-
- <!-- Draw the busconnection and horizontal lines.-->
- <xsl:for-each select="exsl:node-set($p2pConn_heights_)/P2PCONN">
-
- <xsl:variable name="bus_x_" select="($bcInSpace_X_ + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="bus_y_" select="@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
-
- <xsl:variable name="h_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0'">
- <xsl:value-of select="$bus_x_"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1'">
- <xsl:value-of select="(@X + $BLKD_BIFC_W + $BLKD_BUS_ARROW_W) - 1"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_y_" select="$bus_y_"/>
-
- <xsl:variable name="h_bus_height_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="h_bus_width_">
-<!--
- <xsl:message>BIFSIDE <xsl:value-of select="@BIFSIDE"/></xsl:message>
- <xsl:message>BUSSTD <xsl:value-of select="@BUSSTD"/></xsl:message>
- <xsl:message>TYPE <xsl:value-of select="@TYPE"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0'">
- <xsl:value-of select="(@X - $bus_x_ - $BLKD_BUS_ARROW_W)"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1'">
- <xsl:value-of select="$bus_x_ - $h_bus_ul_x_ + 1"/>
- </xsl:when>
-
- </xsl:choose>
- </xsl:variable>
-
- <!-- Draw Bus connection-->
- <use x="{@X}" y="{@Y}" xlink:href="#{@BUSSTD}_busconn_{@TYPE}"/>
-
- <!-- Draw the arrow -->
- <xsl:choose>
- <xsl:when test="((@BIFSIDE='0') and not((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{@X - $BLKD_BUS_ARROW_W}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowEast"/>
- </xsl:when>
- <xsl:when test="((@BIFSIDE='1') and not((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{(@X + $BLKD_BIFC_W)}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowWest"/>
- </xsl:when>
-
- <xsl:when test="((@BIFSIDE='0') and ((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{@X - $BLKD_BUS_ARROW_W}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowHInitiator"/>
- </xsl:when>
-
- <xsl:when test="((@BIFSIDE='1') and ((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{(@X + $BLKD_BIFC_W)}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowHInitiator"/>
- </xsl:when>
-
- </xsl:choose>
-
- <!-- Draw the horizontal part of the bus -->
- <rect x="{$h_bus_ul_x_}"
- y="{$h_bus_ul_y_}"
- width= "{$h_bus_width_}"
- height="{$h_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
-
- </xsl:for-each>
-
-<!--
- <xsl:variable name="busTop_" select="math:min(exsl:node-set($p2pConn_heights_)/P2PCONN/@Y)"/>
- <xsl:variable name="busBot_" select="math:max(exsl:node-set($p2pConn_heights_)/P2PCONN/@Y)"/>
- <xsl:variable name="v_bus_y_" select="$busTop_ + ceiling($BLKD_BIFC_H div 2) - ceiling($P2P_BUS_W div 2)"/>
- <xsl:variable name="busName_" select="exsl:node-set($p2pConn_heights_)/P2PCONN/@BUSNAME"/>
--->
- <!-- Draw the vertical part of the bus -->
-<!--
- <rect x="{$bcInSpace_X_ + $P2P_BUS_W}"
- y="{$v_bus_y_}"
- width= "{$P2P_BUS_W}"
- height="{($busBot_ - $busTop_) + $P2P_BUS_W}"
- style="stroke:{$COL_WHITE};stroke-width:1;stroke-opacity:0.9;fill-opacity:2.0;fill:{$busColor_}"/>
--->
-
-<!--
- style="stroke:{$busColor_lt_};stroke-width:1;stroke-opacity:0.9;fill-opacity:2.0;fill:{$busColor_}"/>
--->
- <!-- Place the bus label.-->
-<!--
- <text class="p2pbuslabel"
- x="{$bcInSpace_X_ + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6}"
- y="{$busTop_ + ($BLKD_BUS_ARROW_H * 3)}">
- <xsl:value-of select="$busName_"/>
- </text>
--->
-
-
-</xsl:template>
-
-
-
-<!--
- ===========================================================
- Handle MultiStack Point to Point connections
- ===========================================================
--->
-
-<xsl:template name="BCLaneSpace_MultiStack_PointToPoint">
-
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:param name="iBusName" select="'NONE'"/>
- <xsl:param name="iBifType" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast_W" select="0"/>
- <xsl:param name="iStackToWest_W" select="0"/>
- <xsl:param name="iLaneInSpace_X" select="0"/>
-
-<!--
- <xsl:message>Stack To East <xsl:value-of select="$iStackToEast"/></xsl:message>
- <xsl:message>Stack to West <xsl:value-of select="$iStackToWest"/></xsl:message>
- <xsl:message>Stack to East Width <xsl:value-of select="$iStackToEast_W"/></xsl:message>
- <xsl:message>Stack to West Width <xsl:value-of select="$iStackToWest_W"/></xsl:message>
- <xsl:message>Lane in space X <xsl:value-of select="$iLaneInSpace_X"/></xsl:message>
- <xsl:message>Shared Bus Y <xsl:value-of select="$iSpaceSharedBus_Y"/></xsl:message>
--->
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($iStackToWest_W div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($iStackToEast_W div 2)"/>
-
- <!-- Store the connections in a variable -->
- <xsl:variable name="bcInSpace_X_" select="($iLaneInSpace_X + ceiling($BLKD_BIFC_W div 2) - ceiling($BLKD_BUS_ARROW_W div 2))"/>
-
- <xsl:variable name="multiConns_">
-
- <xsl:for-each select="BUSCONN">
-
- <xsl:variable name="bifName_" select="@BUSINTERFACE"/>
- <xsl:variable name="multiInstance_" select="@INSTANCE"/>
- <xsl:variable name="mulshp_hori_idx_">
- <xsl:choose>
- <xsl:when test="@IS_PROCCONN">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $multiInstance_)]/@STACK_HORIZ_INDEX"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $multiInstance_)])]/@STACK_HORIZ_INDEX"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="mulshp_vert_idx_">
- <xsl:choose>
- <xsl:when test="@IS_PROCCONN">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $multiInstance_)]/@SHAPE_VERTI_INDEX"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $multiInstance_)])]/@SHAPE_VERTI_INDEX"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message>Shape Horiz <xsl:value-of select="$mulshp_hori_idx_"/></xsl:message>
- <xsl:message>Shape Verti <xsl:value-of select="$mulshp_vert_idx_"/></xsl:message>
--->
-
- <xsl:variable name="mulshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$mulshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$mulshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="cmplxStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($mulshp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($mulshp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="procStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($mulshp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($mulshp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:choose>
-
- <xsl:when test="@IS_PROCCONN and @BIF_Y">
-
- <xsl:variable name="procBif_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
-
- <xsl:variable name="procBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $multiInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="procBusName_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $multiInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSNAME"/>
- <xsl:variable name="procBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $multiInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
-
- <xsl:variable name="bcProc_Y_" select="($mulshp_Y_ + $procBif_Y_ + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $procStack_H_diff_)"/>
-
- <xsl:variable name="bcProc_X_">
- <xsl:choose>
- <xsl:when test="$procBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($BLKD_MOD_W div 2) + $BLKD_BIFC_W))"/>
-<!--
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - ceiling($BLKD_MOD_W div 2))"/>
--->
- </xsl:when>
- <xsl:when test="$procBifSide_ = '1'">
- <xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <MULTICONN X="{$bcProc_X_}" Y="{$bcProc_Y_}" BUSNAME="{$procBusName_}" BUSSTD="{$iBusStd}" TYPE="{$procBifType_}" BIFSIDE="{$procBifSide_}" IS_PROC="TRUE"/>
- </xsl:when>
-
- <xsl:otherwise>
-
- <xsl:variable name="modType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $multiInstance_)]/@MODCLASS"/>
- <xsl:variable name="modBif_Y_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $multiInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_Y"/>
- <xsl:variable name="modBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $multiInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
- <xsl:variable name="modBusStd_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $multiInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSSTD"/>
- <xsl:variable name="memcMOD_W_" select="(($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[MODULE[(@INSTANCE = $multiInstance_)]]/@MODS_W) * $BLKD_MOD_W)"/>
-
- <xsl:variable name="modBc_Y_">
- <xsl:choose>
- <xsl:when test="($modType_ = 'MEMORY_CNTLR') and (($modBusStd_ = 'LMB') or ($modBusStd_= 'OCM'))">
- <xsl:value-of select="$BLKD_MOD_H + $BLKD_MOD_LANE_H + ((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * $modBif_Y_))"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * $modBif_Y_) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-<!--
- <xsl:message><xsl:value-of select="$multiInstance_"/>.<xsl:value-of select="$bifName_"/>:Y = <xsl:value-of select="$modBif_Y_"/></xsl:message>
- <xsl:message><xsl:value-of select="$multiInstance_"/>.<xsl:value-of select="$bifName_"/>:BcY = <xsl:value-of select="$modBc_Y_"/></xsl:message>
- <xsl:message><xsl:value-of select="$multiInstance_"/>.<xsl:value-of select="$bifName_"/>:TcY = <xsl:value-of select="($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V)"/></xsl:message>
--->
-
- <xsl:variable name="modBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $multiInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="modBusName_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $multiInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSNAME"/>
-
-<!--
- <xsl:variable name="bcMod_Y_" select="($mulshp_Y_ + $modBc_Y_ + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2))"/>
--->
- <xsl:variable name="bcMod_Y_" select="($mulshp_Y_ + $modBc_Y_ + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $cmplxStack_H_diff_)"/>
-
- <xsl:variable name="bcMod_X_">
- <xsl:choose>
- <xsl:when test="$modBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($memcMOD_W_ div 2) + $BLKD_BIFC_W))"/>
-<!--
- -->
- </xsl:when>
- <xsl:when test="$modBifSide_ = '1'">
- <xsl:value-of select="ceiling($memcMOD_W_ div 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <MULTICONN X="{$bcMod_X_}" Y="{$bcMod_Y_}" BUSNAME="{$modBusName_}" BUSSTD="{$iBusStd}" TYPE="{$modBifType_}" BIFSIDE="{$modBifSide_}" IS_MOD="TRUE"/>
-<!--
- <MULTICONN X="{$bcInSpace_X_}" Y="{$bcMod_Y_}" BUSSTD="{$busStd}" TYPE="{$modBifType_}" BIFSIDE="{$modBifSide_}"/>
--->
-
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:variable>
-
- <!-- Draw the busconnection and horizontal lines.-->
- <xsl:for-each select="exsl:node-set($multiConns_)/MULTICONN">
-
- <xsl:variable name="bus_x_" select="($bcInSpace_X_ + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="bus_y_" select="@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
-
-<!--
- <xsl:value-of select="$bus_x_"/>
--->
- <xsl:variable name="h_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0' and (@IS_PROC)">
- <xsl:value-of select="$bus_x_ - $BLKD_P2P_BUS_W"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='0' and (@IS_MOD)">
- <xsl:value-of select="$bus_x_ - $BLKD_P2P_BUS_W"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1' and (@IS_PROC)">
- <xsl:value-of select="(@X + $BLKD_BIFC_W + $BLKD_BUS_ARROW_W)"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1' and (@IS_MOD)">
- <xsl:value-of select="(@X + $BLKD_BIFC_W + $BLKD_BUS_ARROW_W)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_y_" select="$bus_y_"/>
- <xsl:variable name="h_bus_height_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="h_bus_width_">
-<!--
- <xsl:message>BUSSTD <xsl:value-of select="@BUSSTD"/></xsl:message>
- <xsl:message>BIFSIDE <xsl:value-of select="@BIFSIDE"/></xsl:message>
- <xsl:message>TYPE <xsl:value-of select="@TYPE"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0' and (@IS_PROC)">
- <xsl:value-of select="(@X - $bus_x_ - $BLKD_P2P_BUS_W)"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='0' and (@IS_MOD)">
- <xsl:value-of select="(@X - $bus_x_ - $BLKD_BUS_ARROW_W)"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1' and (@IS_PROC)">
- <xsl:value-of select="$bus_x_ - $h_bus_ul_x_ - $BLKD_BUS_ARROW_W - $BLKD_P2P_BUS_W"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1' and (@IS_MOD)">
- <xsl:value-of select="$BLKD_P2P_BUS_W + $BLKD_BUS_ARROW_W "/>
-<!--
- <xsl:value-of select="$bus_x_ - $h_bus_ul_x_"/>
- -->
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
-<!--
- <xsl:message>h_bus_x_ <xsl:value-of select="$h_bus_ul_x_"/></xsl:message>
- <xsl:message>BIFSIDE <xsl:value-of select="@BIFSIDE"/></xsl:message>
- <xsl:message>h_bus_width_ <xsl:value-of select="$h_bus_width_"/></xsl:message>
- -->
-
- <!-- Draw the horizontal part of the bus -->
- <xsl:if test="($h_bus_width_ > 0)">
- <rect x="{$h_bus_ul_x_}"
- y="{$h_bus_ul_y_}"
- width= "{$h_bus_width_}"
- height="{$h_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
- </xsl:if>
-
-
- <!-- Draw the arrow -->
- <xsl:choose>
- <xsl:when test="((@BIFSIDE='0') and not((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{@X - $BLKD_BUS_ARROW_W}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowEast"/>
- </xsl:when>
- <xsl:when test="((@BIFSIDE='1') and not((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{(@X + $BLKD_BIFC_W)}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowWest"/>
- </xsl:when>
-
- <xsl:when test="((@BIFSIDE='0') and ((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{@X - $BLKD_BUS_ARROW_W}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowHInitiator"/>
- </xsl:when>
-
- <xsl:when test="((@BIFSIDE='1') and ((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{(@X + $BLKD_BIFC_W)}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowHInitiator"/>
- </xsl:when>
-
- </xsl:choose>
-
- <use x="{@X}" y="{@Y}" xlink:href="#{@BUSSTD}_busconn_{@TYPE}"/>
- </xsl:for-each>
-
- <xsl:variable name="busTop_" select="math:min(exsl:node-set($multiConns_)/MULTICONN/@Y)"/>
- <xsl:variable name="busBot_" select="math:max(exsl:node-set($multiConns_)/MULTICONN/@Y)"/>
- <xsl:variable name="v_bus_y_" select="$busTop_ + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
- <xsl:variable name="busName_" select="exsl:node-set($multiConns_)/MULTICONN/@BUSNAME"/>
-
-<!--
--->
- <!-- Draw the vertical part of the bus -->
- <rect x="{$bcInSpace_X_ - $BLKD_P2P_BUS_W}"
- y="{$v_bus_y_}"
- width= "{$BLKD_P2P_BUS_W}"
- height="{($busBot_ - $busTop_) + $BLKD_P2P_BUS_W}"
- style="stroke:none; fill:{$busColor_}"/>
-<!--
- <xsl:message>v_bus_x_ <xsl:value-of select="($bcInSpace_X_ + $BLKD_P2P_BUS_W)"/></xsl:message>
- -->
-
- <!-- Place the bus label.-->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($bcInSpace_X_ + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6)"/>
- <xsl:with-param name="iY" select="($busTop_ + ($BLKD_BUS_ARROW_H * 3))"/>
- <xsl:with-param name="iText" select="$busName_"/>
- <xsl:with-param name="iClass" select="'p2pbus_label'"/>
- </xsl:call-template>
-
-</xsl:template>
-
-
-<!--
- ===========================================================
- Handle Processor to processor connections
- ===========================================================
--->
-<xsl:template name="BCLaneSpace_ProcToProc">
-
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:param name="iBusName" select="'NONE'"/>
- <xsl:param name="iBifType" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast_W" select="0"/>
- <xsl:param name="iStackToWest_W" select="0"/>
- <xsl:param name="iLaneInSpace_X" select="0"/>
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($iStackToWest_W div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($iStackToEast_W div 2)"/>
-
- <xsl:variable name="pr2pr_StackToWest_" select="math:min(BUSCONN/@STACK_HORIZ_INDEX)"/>
- <xsl:variable name="pr2pr_StackToEast_" select="math:max(BUSCONN/@STACK_HORIZ_INDEX)"/>
- <xsl:variable name="proc2procConn_heights_">
-
- <xsl:for-each select="BUSCONN">
-
- <xsl:variable name="procInstance_" select="@INSTANCE"/>
- <xsl:variable name="bifName_" select="@BUSINTERFACE"/>
- <xsl:variable name="procshp_hori_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $procInstance_)]/@STACK_HORIZ_INDEX"/>
- <xsl:variable name="procshp_vert_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $procInstance_)]/@SHAPE_VERTI_INDEX"/>
- <xsl:variable name="procshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$procshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$procshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="procStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($pr2pr_StackToEast_ = 'NONE') or ($pr2pr_StackToWest_ = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($pr2pr_StackToEast_ = 'NONE') or ($pr2pr_StackToWest_ = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$pr2pr_StackToWest_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$pr2pr_StackToEast_"/>
- </xsl:call-template>
- </xsl:variable>
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($procshp_hori_idx_ = $pr2pr_StackToEast_) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($procshp_hori_idx_ = $pr2pr_StackToWest_) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <!-- Store the conns in a variable -->
- <xsl:variable name="procBif_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
-
- <xsl:variable name="procBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $procInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="procBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $procInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
-
- <xsl:variable name="bcInSpace_X_">
- <xsl:choose>
- <xsl:when test="$procBifSide_ = '1'"><xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/></xsl:when>
- <xsl:when test="$procBifSide_ = '0'"><xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - ceiling($BLKD_MOD_W div 2) - $BLKD_BIFC_W)"/></xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bcProc_Y_" select="($procshp_Y_ + $procBif_Y_ + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $procStack_H_diff_)"/>
-<!--
- <xsl:message>Conn X <xsl:value-of select="$bcInSpace_X_"/></xsl:message>
- <xsl:message>Conn Y <xsl:value-of select="$bcProc_Y_"/></xsl:message>
--->
-
- <PR2PRCONN X="{$bcInSpace_X_}" Y="{$bcProc_Y_}" BUSSTD="{$iBusStd}" TYPE="{$procBifType_}" BIFSIDE="{$procBifSide_}" SHAPE_ID="{$procshp_hori_idx_}"/>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:variable name="pr2prLeft_" select="math:min(exsl:node-set($proc2procConn_heights_)/PR2PRCONN/@SHAPE_ID)"/>
- <xsl:variable name="pr2prRght_" select="math:max(exsl:node-set($proc2procConn_heights_)/PR2PRCONN/@SHAPE_ID)"/>
-
- <xsl:variable name="pr2pr_stack_Left_X_">
- <xsl:call-template name="F_Calc_Stack_X">
- <xsl:with-param name="iStackIdx" select="$pr2prLeft_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="pr2pr_stack_Rght_X_">
- <xsl:call-template name="F_Calc_Stack_X">
- <xsl:with-param name="iStackIdx" select="$pr2prRght_"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Left stack X <xsl:value-of select="$pr2pr_stack_Left_X_"/></xsl:message>
- <xsl:message>Rght stack X <xsl:value-of select="$pr2pr_stack_Rght_X_"/></xsl:message>
--->
- <xsl:variable name="pr2pr_space_W_" select="($pr2pr_stack_Rght_X_ - $pr2pr_stack_Left_X_)"/>
-
-
- <xsl:variable name="pr2pr_extStackEast_W_">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="$pr2prRght_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="pr2pr_extStackWest_W_">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="$pr2prLeft_"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Space W <xsl:value-of select="$pr2pr_space_W_"/></xsl:message>
- <xsl:message>Rght stack <xsl:value-of select="$pr2pr_extStackEast_W_"/></xsl:message>
- <xsl:message>Left stack <xsl:value-of select="$pr2pr_extStackWest_W_"/></xsl:message>
--->
-
- <xsl:variable name="connLeft_X_" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:variable name="connRght_X_" select="($pr2pr_space_W_ - ceiling($pr2pr_extStackWest_W_ div 2) + ceiling($pr2pr_extStackEast_W_ div 2) - ceiling($BLKD_MOD_W div 2) - $BLKD_BIFC_W)"/>
-
- <!-- Draw the busconnections .-->
- <xsl:for-each select="exsl:node-set($proc2procConn_heights_)/PR2PRCONN">
- <xsl:variable name="conn_X_">
- <xsl:choose>
- <xsl:when test="@BIFSIDE = '1'"><xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/></xsl:when>
- <xsl:when test="@BIFSIDE = '0'"><xsl:value-of select="($pr2pr_space_W_ - ceiling($pr2pr_extStackWest_W_ div 2) + ceiling($pr2pr_extStackEast_W_ div 2) - ceiling($BLKD_MOD_W div 2) - $BLKD_BIFC_W)"/></xsl:when>
-<!--
- <xsl:when test="@BIFSIDE = '0'"><xsl:value-of select="($pr2pr_space_W_ + $pr2pr_extStackWest_W_ + $pr2pr_extStackEast_W_ - ceiling($BLKD_MOD_W div 2) - $BLKD_BIFC_W)"/></xsl:when>
--->
- </xsl:choose>
- </xsl:variable>
-
- <use x="{$conn_X_}" y="{@Y}" xlink:href="#{@BUSSTD}_busconn_{@TYPE}"/>
- </xsl:for-each>
-
- <xsl:variable name="bc_Y_" select="math:min(exsl:node-set($proc2procConn_heights_)/PR2PRCONN/@Y)"/>
- <xsl:variable name="bcLeft_" select="math:min(exsl:node-set($proc2procConn_heights_)/PR2PRCONN/@X)"/>
- <xsl:variable name="bcRght_" select="math:max(exsl:node-set($proc2procConn_heights_)/PR2PRCONN/@X)"/>
-
- <xsl:variable name="leftType_" select="(exsl:node-set($proc2procConn_heights_)/PR2PRCONN[(@X = $bcLeft_)]/@TYPE)"/>
- <xsl:variable name="rghtType_" select="(exsl:node-set($proc2procConn_heights_)/PR2PRCONN[(@X = $bcRght_)]/@TYPE)"/>
-
- <xsl:call-template name="Draw_Proc2ProcBus">
- <xsl:with-param name="iBc_Y" select="$bc_Y_"/>
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- <xsl:with-param name="iBusName" select="$iBusName"/>
- <xsl:with-param name="iLeftType" select="$leftType_"/>
- <xsl:with-param name="iRghtType" select="$rghtType_"/>
- <xsl:with-param name="iBcLeft_X" select="$connLeft_X_ + $BLKD_BIFC_W"/>
- <xsl:with-param name="iBcRght_X" select="$connRght_X_"/>
- </xsl:call-template>
-
-</xsl:template>
-
-<!--
- ===========================================================
- Handle connections to the MPMC
- ===========================================================
--->
-<xsl:template name="BCLaneSpace_ToStandAloneMPMC">
-
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:param name="iBusName" select="'NONE'"/>
- <xsl:param name="iBifType" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast_W" select="0"/>
- <xsl:param name="iStackToWest_W" select="0"/>
- <xsl:param name="iLaneInSpace_X" select="0"/>
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="busColor_lt_">
- <xsl:call-template name="F_BusStd2RGB_LT">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($iStackToWest_W div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($iStackToEast_W div 2)"/>
-
- <xsl:variable name="bcInSpace_X_" select="($iLaneInSpace_X + ceiling($BLKD_BIFC_W div 2) - ceiling($BLKD_BUS_ARROW_W div 2))"/>
- <xsl:variable name="p2pInstance_" select="BUSCONN[(@BIF_Y)]/@INSTANCE"/>
-
- <xsl:variable name="p2pshp_hori_idx_">
- <xsl:choose>
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $p2pInstance_)]">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $p2pInstance_)]/@STACK_HORIZ_INDEX"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $p2pInstance_)])]/@STACK_HORIZ_INDEX"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="p2pshp_vert_idx_">
- <xsl:choose>
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $p2pInstance_)]">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $p2pInstance_)]/@SHAPE_VERTI_INDEX"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $p2pInstance_)])]/@SHAPE_VERTI_INDEX"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="p2pshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$p2pshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$p2pshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="cmplxStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
-
- <xsl:choose>
- <xsl:when test="(($p2pshp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($p2pshp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="procStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>stack to west H <xsl:value-of select="$stackToWest_AbvSbs_H_"/></xsl:message>
- <xsl:message>stack to east H <xsl:value-of select="$stackToEast_AbvSbs_H_"/></xsl:message>
--->
- <xsl:choose>
- <xsl:when test="(($p2pshp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($p2pshp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
-
- <!-- Store the conns in a variable -->
- <xsl:variable name="p2pConn_heights_">
-
- <xsl:for-each select="BUSCONN">
-
- <xsl:variable name="bifName_" select="@BUSINTERFACE"/>
-
- <xsl:choose>
- <xsl:when test="@IS_PROCCONN and @BIF_Y">
-
-<!--
- <xsl:message>Proc <xsl:value-of select="$procInstance_"/></xsl:message>
--->
- <xsl:variable name="procBif_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
- <xsl:variable name="procBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $p2pInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="procBusName_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $p2pInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSNAME"/>
- <xsl:variable name="procBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $p2pInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
-
- <xsl:variable name="bcProc_Y_" select="($p2pshp_Y_ + $procBif_Y_ + ceiling($BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $procStack_H_diff_)"/>
- <xsl:variable name="bcProc_X_">
- <xsl:choose>
- <xsl:when test="$procBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($BLKD_MOD_W div 2) + $BLKD_BIFC_W))"/>
- </xsl:when>
- <xsl:when test="$procBifSide_ = '1'">
- <xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <P2PCONN X="{$bcProc_X_}" Y="{$bcProc_Y_}" BUSNAME= "{$procBusName_}" BUSSTD="{$iBusStd}" TYPE="{$procBifType_}" BIFSIDE="{$procBifSide_}"/>
-
- </xsl:when>
-
- <xsl:otherwise>
-
- <xsl:variable name="modInstance_" select="@INSTANCE"/>
- <xsl:variable name="modshp_vert_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[MODULE[(@INSTANCE = $modInstance_)]]/@SHAPE_VERTI_INDEX"/>
- <xsl:variable name="modBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
- <xsl:variable name="modBif_Y_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_Y"/>
- <xsl:variable name="modBc_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * $modBif_Y_) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
-
-<!--
- <xsl:message>Memory Instance <xsl:value-of select="$procInstance_"/></xsl:message>
--->
-
- <xsl:variable name="modshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$p2pshp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$modshp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="modBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="modBusName_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSNAME"/>
- <xsl:variable name="bcMod_Y_" select="($modshp_Y_ + $modBc_Y_ + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $cmplxStack_H_diff_)"/>
- <xsl:variable name="bcMod_X_">
- <xsl:choose>
- <xsl:when test="$modBifSide_ = '0'">
- <xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - (ceiling($BLKD_MOD_W div 2) + $BLKD_BIFC_W))"/>
- </xsl:when>
- <xsl:when test="$modBifSide_ = '1'">
- <xsl:value-of select="ceiling($BLKD_MOD_W div 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <P2PCONN X="{$bcMod_X_}" Y="{$bcMod_Y_}" BUSNAME="{$modBusName_}" BUSSTD="{$iBusStd}" TYPE="{$modBifType_}" BIFSIDE="{$modBifSide_}"/>
-
- </xsl:otherwise>
-
- </xsl:choose>
- </xsl:for-each>
- </xsl:variable>
-
-
- <xsl:variable name="busTop_" select="math:min(exsl:node-set($p2pConn_heights_)/P2PCONN/@Y)"/>
- <xsl:variable name="busBot_" select="math:max(exsl:node-set($p2pConn_heights_)/P2PCONN/@Y)"/>
- <xsl:variable name="v_bus_y_" select="$busTop_ + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
-
- <xsl:variable name="busName_" select="exsl:node-set($p2pConn_heights_)/P2PCONN/@BUSNAME"/>
- <xsl:variable name="busStd_" select="exsl:node-set($p2pConn_heights_)/P2PCONN/@BUSSTD"/>
-
- <!-- Draw the vertical part of the bus -->
- <!-- Place the bus label.-->
- <!-- Draw the busconnection and horizontal lines.-->
- <xsl:for-each select="exsl:node-set($p2pConn_heights_)/P2PCONN">
-
- <xsl:variable name="bus_x_" select="($bcInSpace_X_ + ceiling($BLKD_BIFC_W div 2))"/>
- <xsl:variable name="bus_y_" select="@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
-
- <xsl:variable name="h_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0'">
- <xsl:value-of select="$bus_x_"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1'">
- <xsl:value-of select="(@X + $BLKD_BIFC_W + $BLKD_BUS_ARROW_W) - 1"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_y_" select="$bus_y_"/>
-
- <xsl:variable name="h_bus_height_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="h_bus_width_">
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0'">
- <xsl:value-of select="(@X - $bus_x_ - $BLKD_BUS_ARROW_W)"/>
- </xsl:when>
- <xsl:when test="@BIFSIDE='1'">
- <xsl:value-of select="$bus_x_ - $h_bus_ul_x_ + 1"/>
- </xsl:when>
-
- </xsl:choose>
- </xsl:variable>
-
- <!-- Draw Bus connection-->
- <use x="{@X}" y="{@Y}" xlink:href="#{@BUSSTD}_busconn_{@TYPE}"/>
-
- <!-- Draw the arrow -->
- <xsl:choose>
- <xsl:when test="((@BIFSIDE='0') and not((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{@X - $BLKD_BUS_ARROW_W}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowEast"/>
- </xsl:when>
- <xsl:when test="((@BIFSIDE='1') and not((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{(@X + $BLKD_BIFC_W)}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowWest"/>
- </xsl:when>
-
- <xsl:when test="((@BIFSIDE='0') and ((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{@X - $BLKD_BUS_ARROW_W}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowHInitiator"/>
- </xsl:when>
-
- <xsl:when test="((@BIFSIDE='1') and ((@BUSSTD = 'FSL') and ((@TYPE = 'INITIATOR') or (@TYPE = 'MASTER'))))">
- <use x="{(@X + $BLKD_BIFC_W)}" y="{@Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2)}" xlink:href="#{@BUSSTD}_BusArrowHInitiator"/>
- </xsl:when>
-
- </xsl:choose>
-
- <!-- Draw the horizontal part of the bus -->
- <rect x="{$h_bus_ul_x_}"
- y="{$h_bus_ul_y_}"
- width= "{$h_bus_width_}"
- height="{$h_bus_height_}"
-
- style="stroke:none; fill:{$busColor_}"/>
-
- <!--
- Draw the vertical part of the bus. The MPMC BIF and the top arrow will
- be added later when the main drawing happens.
- -->
- <xsl:variable name="v_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@BIFSIDE='0'"><xsl:value-of select="($h_bus_ul_x_)"/></xsl:when>
- <xsl:when test="@BIFSIDE='1'"><xsl:value-of select="($h_bus_ul_x_ + $h_bus_width_ - $BLKD_P2P_BUS_W)"/></xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <rect x="{$v_bus_ul_x_}"
- y="0"
- width= "{$BLKD_P2P_BUS_W}"
- height="{$h_bus_ul_y_}"
- style="stroke:none; fill:{$busColor_}"/>
- </xsl:for-each>
-
-</xsl:template>
-
-
-
-<!--
- ======================================================================
- Handle Split connections, (connections that go between adjacent stacks)
- ======================================================================
--->
-
-<xsl:template name="BCLaneSpace_SplitConn">
-
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:param name="iBusName" select="'NONE'"/>
- <xsl:param name="iBifType" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast_W" select="0"/>
- <xsl:param name="iStackToWest_W" select="0"/>
- <xsl:param name="iLaneInSpace_X" select="0"/>
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($iStackToWest_W div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($iStackToEast_W div 2)"/>
-
-
- <xsl:variable name="bifName_" select="BUSCONN/@BUSINTERFACE"/>
- <xsl:variable name="shpInstance_" select="BUSCONN/@INSTANCE"/>
-
-<!--
- <xsl:message>Found a split connection on <xsl:value-of select="$shpInstance_"/></xsl:message>
--->
-
-
- <xsl:variable name="shp_hori_idx_">
-
- <xsl:choose>
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $shpInstance_)]">
- <xsl:value-of select="/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $shpInstance_)]/@STACK_HORIZ_INDEX"/>
- </xsl:when>
-
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $shpInstance_)])]">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $shpInstance_)])]/@STACK_HORIZ_INDEX"/>
- </xsl:when>
- <xsl:otherwise>_unknown_</xsl:otherwise>
- </xsl:choose>
-
- </xsl:variable>
-
- <xsl:variable name="shp_vert_idx_">
-
- <xsl:choose>
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $shpInstance_)]">
- <xsl:value-of select="/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $shpInstance_)]/@SHAPE_VERTI_INDEX"/>
- </xsl:when>
-
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $shpInstance_)])]">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $shpInstance_)])]/@SHAPE_VERTI_INDEX"/>
- </xsl:when>
- <xsl:otherwise>_unknown_</xsl:otherwise>
- </xsl:choose>
-
- </xsl:variable>
-
- <xsl:variable name="splitshp_Width_">
-
- <xsl:choose>
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $shpInstance_)]">
- <xsl:value-of select="$BLKD_MOD_W"/>
- </xsl:when>
-
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $shpInstance_)])]/@MODS_W">
-<!--
- <xsl:message>Using mods width on <xsl:value-of select="$shpInstance_"/></xsl:message>
--->
- <xsl:value-of select="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(MODULE[(@INSTANCE = $shpInstance_)])]/@MODS_W * $BLKD_MOD_W)"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$BLKD_MOD_W"/>
- </xsl:otherwise>
- </xsl:choose>
-
- </xsl:variable>
-
-<!--
- <xsl:message>Found width of <xsl:value-of select="$splitshp_Width_"/></xsl:message>
--->
-
-
- <xsl:variable name="splitshp_Y_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$shp_hori_idx_"/>
- <xsl:with-param name="iVertiIdx" select="$shp_vert_idx_"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <xsl:variable name="splitStack_H_diff_">
- <xsl:choose>
- <xsl:when test=" (($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="not(($iStackToEast = 'NONE') or ($iStackToWest = 'NONE'))">
-
- <xsl:variable name="stackToWest_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackToEast_AbvSbs_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:choose>
- <xsl:when test="(($shp_hori_idx_ = $iStackToEast) and ($stackToWest_AbvSbs_H_ > $stackToEast_AbvSbs_H_))">
- <xsl:value-of select="($stackToWest_AbvSbs_H_ - $stackToEast_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:when test="(($shp_hori_idx_ = $iStackToWest) and ($stackToEast_AbvSbs_H_ > $stackToWest_AbvSbs_H_))">
- <xsl:value-of select="($stackToEast_AbvSbs_H_ - $stackToWest_AbvSbs_H_)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="splitBif_Y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * BUSCONN/@BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
- <xsl:variable name="splitBusStd_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $shpInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BUSSTD"/>
- <xsl:variable name="splitBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $shpInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@TYPE"/>
- <xsl:variable name="splitBifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $shpInstance_)]/BUSINTERFACE[(@NAME = $bifName_)]/@BIF_X"/>
-
- <xsl:variable name="bcInSpace_X_">
- <xsl:choose>
- <xsl:when test="$splitBifSide_ = '1'"><xsl:value-of select="ceiling($splitshp_Width_ div 2)"/></xsl:when>
- <xsl:when test="$splitBifSide_ = '0'"><xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - ceiling($splitshp_Width_ div 2) - $BLKD_BIFC_W)"/></xsl:when>
- </xsl:choose>
-
- </xsl:variable>
-
- <xsl:variable name="bcBus_X_">
- <xsl:choose>
- <xsl:when test="$splitBifSide_ = '1'"><xsl:value-of select="$bcInSpace_X_"/></xsl:when>
- <xsl:when test="$splitBifSide_ = '0'"><xsl:value-of select="($space_W_ + $extSpaceWest_W_ + $extSpaceEast_W_ - ceiling($BLKD_MOD_W div 2) - $BLKD_BIFC_W)"/></xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bcSplit_Y_">
- <xsl:choose>
- <xsl:when test="(BUSCONN/@IS_MEMCONN) and (($splitBusStd_ = 'LMB') or ($splitBusStd_ = 'OCM'))">
-<!--
- <xsl:message>Found memory conn split connection on <xsl:value-of select="$shpInstance_"/> </xsl:message>
--->
- <xsl:value-of select="($splitshp_Y_ + $BLKD_MOD_H + $BLKD_MOD_BIF_GAP_V + (BUSCONN/@BIF_Y * ($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V)) + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $splitStack_H_diff_)"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="($splitshp_Y_ + $splitBif_Y_ + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2) + $splitStack_H_diff_)"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <use x="{$bcInSpace_X_}" y="{$bcSplit_Y_}" xlink:href="#{@BUSSTD}_busconn_{$splitBifType_}"/>
-
-
- <xsl:call-template name="Draw_SplitConnBus">
- <xsl:with-param name="iBc_Y" select="$bcSplit_Y_"/>
- <xsl:with-param name="iBc_X" select="$bcInSpace_X_"/>
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- <xsl:with-param name="iBc_Type" select="$splitBifType_"/>
- <xsl:with-param name="iBc_Side" select="$splitBifSide_"/>
- <xsl:with-param name="iBusName" select="$iBusName"/>
- </xsl:call-template>
-
-
-</xsl:template>
-
-
-<xsl:template name="Define_BusLaneSpace">
-
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
-
-<!--
- <xsl:message>Input Stack to West <xsl:value-of select="$iStackToWest"/></xsl:message>
- <xsl:message>Input Stack to East <xsl:value-of select="$iStackToEast"/></xsl:message>
--->
-
- <xsl:variable name="stackToEast_">
- <xsl:choose>
- <xsl:when test="not($iStackToEast = 'NONE')"><xsl:value-of select="$iStackToEast"/></xsl:when>
- <xsl:otherwise>NONE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="stackToWest_">
- <xsl:choose>
- <xsl:when test=" not($iStackToWest = 'NONE')"><xsl:value-of select="$iStackToWest"/></xsl:when>
- <xsl:when test="(not($iStackToEast = 'NONE') and not($iStackToEast = '0'))"><xsl:value-of select="($iStackToEast - 1)"/></xsl:when>
- <xsl:otherwise>NONE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="spaceAbvSbs_H_">
- <xsl:call-template name="F_Calc_Space_AbvSbs_Height">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="spaceBlwSbs_H_">
- <xsl:call-template name="F_Calc_Space_BlwSbs_Height">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <xsl:variable name="space_H_" select="($spaceAbvSbs_H_ + $BLKD_PROC2SBS_GAP + $G_Total_SharedBus_H + $spaceBlwSbs_H_)"/>
- <xsl:variable name="space_W_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="spaceSharedBus_Y_" select="$spaceAbvSbs_H_ + $BLKD_PROC2SBS_GAP"/>
-
- <xsl:variable name="space_name_">
- <xsl:call-template name="F_generate_Space_Name">
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name = "stackToWest_W_">
- <xsl:choose>
- <xsl:when test="(($iStackToEast = '0') and ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="(($iStackToEast = 'NONE') and not($iStackToWest = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:when test="(not($iStackToEast = '0') and not($iStackToEast = 'NONE') and ($iStackToWest = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="($iStackToEast - 1)"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name = "stackToEast_W_">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($stackToWest_W_ div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($stackToEast_W_ div 2)"/>
-
- <g id="{$space_name_}">
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[((@EAST = $iStackToEast) or (($iStackToEast = 'NONE') and (@WEST = $iStackToWest)))]/BUSCONNLANE[@BUSSTD and @BUSNAME]">
-
- <xsl:variable name="busStd_" select="@BUSSTD"/>
- <xsl:variable name="busName_" select="@BUSNAME"/>
- <xsl:variable name="busLane_X_" select="@BUSLANE_X"/>
-
-<!--
- <xsl:variable name="eastBusLane_X_">
- <xsl:choose>
- <xsl:when test="(@BUSLANE_X = 0)"><xsl:value-of select="@BUSLANE_X"/></xsl:when>
- <xsl:otherwise><xsl:value-of select="(@BUSLANE_X - 1)"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
--->
- <xsl:variable name="eastBusLane_X_" select="@BUSLANE_X"/>
- <xsl:variable name="laneInSpace_X_">
- <xsl:choose>
- <xsl:when test="(@ORIENTED = 'EAST')">
- <xsl:value-of select="($extSpaceWest_W_ + ($eastBusLane_X_ * $BLKD_BUS_LANE_W) - $BLKD_BUS_ARROW_W - $BLKD_P2P_BUS_W)"/>
- </xsl:when>
- <xsl:otherwise><xsl:value-of select="($extSpaceWest_W_ + (@BUSLANE_X * $BLKD_BUS_LANE_W))"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:choose>
-<!--
- ===========================================================
- Handle Bucket connections to the shared busses.
- ===========================================================
--->
- <xsl:when test="@BUSLANE_X and @IS_BKTCONN and BUSCONN[@TYPE] and $G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $busName_)]/@BUS_INDEX">
- <xsl:call-template name="BCLaneSpace_BucketToSharedBus">
- <xsl:with-param name="iBusName" select="$busName_"/>
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBifType" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $busName_)]/BUSINTERFACE/@TYPE"/>
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- <xsl:with-param name="iStackToEast_W" select="$stackToEast_W_"/>
- <xsl:with-param name="iStackToWest_W" select="$stackToWest_W_"/>
- <xsl:with-param name="iLaneInSpace_X" select="$laneInSpace_X_"/>
- <xsl:with-param name="iSpaceSharedBus_Y" select="$spaceSharedBus_Y_"/>
- </xsl:call-template>
- </xsl:when>
-
-<!--
- ===========================================================
- Handle Processor's Shared bus connections.
- ===========================================================
--->
- <xsl:when test="@BUSLANE_X and @IS_SBSCONN and not(@IS_MPMCCONN) and BUSCONN[@BIF_Y and @IS_PROCCONN and @INSTANCE and @BUSINTERFACE] and $G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $busName_)]/@BUS_INDEX">
- <xsl:call-template name="BCLaneSpace_ProcBifToSharedBus">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBusName" select="$busName_"/>
- <xsl:with-param name="iBifType" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $busName_)]/BUSINTERFACE/@TYPE"/>
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- <xsl:with-param name="iStackToEast_W" select="$stackToEast_W_"/>
- <xsl:with-param name="iStackToWest_W" select="$stackToWest_W_"/>
- <xsl:with-param name="iLaneInSpace_X" select="$laneInSpace_X_"/>
- <xsl:with-param name="iSpaceSharedBus_Y" select="$spaceSharedBus_Y_"/>
- </xsl:call-template>
-<!--
--->
- </xsl:when>
-
-<!--
- ===========================================================
- Handle non Processor Shared Bus connections.
- ===========================================================
--->
- <xsl:when test="@BUSLANE_X and @IS_SBSCONN and not(@IS_MPMCCONN) and BUSCONN[@BIF_Y and not(@IS_PROCCONN) and @INSTANCE and @BUSINTERFACE] and /EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $busName_)]/@BUS_INDEX">
- <xsl:call-template name="BCLaneSpace_NonProcBifToSharedBus">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBusName" select="$busName_"/>
- <xsl:with-param name="iBifType" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $busName_)]/BUSINTERFACE/@TYPE"/>
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- <xsl:with-param name="iStackToEast_W" select="$stackToEast_W_"/>
- <xsl:with-param name="iStackToWest_W" select="$stackToWest_W_"/>
- <xsl:with-param name="iLaneInSpace_X" select="$laneInSpace_X_"/>
- <xsl:with-param name="iSpaceSharedBus_Y" select="$spaceSharedBus_Y_"/>
- </xsl:call-template>
-<!--
--->
- </xsl:when>
-
-<!--
- ===========================================================
- Handle connections from processors to Memory UNITs
- ===========================================================
--->
- <xsl:when test="@BUSLANE_X and @IS_MEMCONN and not(@IS_MULTISTK) and BUSCONN[@BIF_Y and @IS_PROCCONN and not(@IS_SPLITCONN) and @INSTANCE and @BUSINTERFACE]">
- <xsl:call-template name="BCLaneSpace_ProcBifToMemoryUnit">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBusName" select="$busName_"/>
- <xsl:with-param name="iBifType" select="BUSCONN/@TYPE"/>
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- <xsl:with-param name="iStackToEast_W" select="$stackToEast_W_"/>
- <xsl:with-param name="iStackToWest_W" select="$stackToWest_W_"/>
- <xsl:with-param name="iLaneInSpace_X" select="$laneInSpace_X_"/>
- </xsl:call-template>
-<!--
--->
- </xsl:when>
-
-
-<!--
- ===========================================================
- Handle generic Point to Point connections
- ===========================================================
--->
- <xsl:when test="@BUSLANE_X and not(@IS_MULTISTK) and not(@IS_MPMCCONN) and not(@IS_MEMCONN) and not(@IS_SBSCONN) and BUSCONN[@BIF_Y and @INSTANCE and @BUSINTERFACE and not(@IS_SPLITCONN)]">
- <xsl:call-template name="BCLaneSpace_PointToPoint">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBusName" select="$busName_"/>
- <xsl:with-param name="iBifType" select="BUSCONN/@TYPE"/>
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- <xsl:with-param name="iStackToEast_W" select="$stackToEast_W_"/>
- <xsl:with-param name="iStackToWest_W" select="$stackToWest_W_"/>
- <xsl:with-param name="iLaneInSpace_X" select="$laneInSpace_X_"/>
- </xsl:call-template>
-<!--
--->
- </xsl:when>
-
-<!--
- ===========================================================
- Handle MultiStack Point to Point connections
- ===========================================================
--->
- <xsl:when test="@BUSLANE_X and (@IS_MULTISTK) and not(@IS_SBSCONN) and BUSCONN[@BIF_Y and @IS_PROCCONN and @INSTANCE and @BUSINTERFACE]">
- <xsl:call-template name="BCLaneSpace_MultiStack_PointToPoint">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBusName" select="$busName_"/>
- <xsl:with-param name="iBifType" select="BUSCONN/@TYPE"/>
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- <xsl:with-param name="iStackToEast_W" select="$stackToEast_W_"/>
- <xsl:with-param name="iStackToWest_W" select="$stackToWest_W_"/>
- <xsl:with-param name="iLaneInSpace_X" select="$laneInSpace_X_"/>
- </xsl:call-template>
- </xsl:when>
-
-<!--
- ===========================================================
- Handle Processor to processor connections
- ===========================================================
--->
- <xsl:when test="(@IS_PROC2PROC and (count(BUSCONN[@BIF_Y and @INSTANCE and @BUSINTERFACE]) = 2))">
- <xsl:call-template name="BCLaneSpace_ProcToProc">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBusName" select="$busName_"/>
- <xsl:with-param name="iBifType" select="BUSCONN/@TYPE"/>
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- <xsl:with-param name="iStackToEast_W" select="$stackToEast_W_"/>
- <xsl:with-param name="iStackToWest_W" select="$stackToWest_W_"/>
- <xsl:with-param name="iLaneInSpace_X" select="$laneInSpace_X_"/>
- </xsl:call-template>
- </xsl:when>
-<!--
- ===========================================================
- Handle connections to the StandAlone MPMC
- ===========================================================
--->
- <xsl:when test="@BUSLANE_X and (@IS_MPMCCONN) and not(@IS_SBSCONN) and BUSCONN[(@BIF_Y and @INSTANCE and @BUSINTERFACE)]">
-<!--
--->
- <xsl:call-template name="BCLaneSpace_ToStandAloneMPMC">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBusName" select="$busName_"/>
- <xsl:with-param name="iBifType" select="BUSCONN/@TYPE"/>
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- <xsl:with-param name="iStackToEast_W" select="$stackToEast_W_"/>
- <xsl:with-param name="iStackToWest_W" select="$stackToWest_W_"/>
- <xsl:with-param name="iLaneInSpace_X" select="$laneInSpace_X_"/>
- </xsl:call-template>
- </xsl:when>
-
-<!--
- ===========================================================
- Handle Split connections, (connections that go between non adjacent stacks)
- ===========================================================
--->
- <xsl:when test="(BUSCONN[@BIF_Y and @INSTANCE and @BUSINTERFACE and @IS_SPLITCONN])">
- <xsl:call-template name="BCLaneSpace_SplitConn">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBusName" select="$busName_"/>
- <xsl:with-param name="iBifType" select="BUSCONN/@TYPE"/>
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- <xsl:with-param name="iStackToEast_W" select="$stackToEast_W_"/>
- <xsl:with-param name="iStackToWest_W" select="$stackToWest_W_"/>
- <xsl:with-param name="iLaneInSpace_X" select="$laneInSpace_X_"/>
- </xsl:call-template>
-<!--
--->
- </xsl:when>
-
- </xsl:choose>
-
- </xsl:for-each>
- </g>
-
-</xsl:template>
-
-<xsl:template name="Define_BusLaneSpaces">
-
- <xsl:variable name="lastStack_" select="(/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH) - 1"/>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[@EAST]">
- <xsl:sort select="@EAST" data-type="number"/>
-
- <xsl:call-template name="Define_BusLaneSpace">
- <xsl:with-param name="iStackToEast" select="@EAST"/>
- </xsl:call-template>
- </xsl:for-each>
-
-<!--
- <xsl:message>Last Stack <xsl:value-of select="$lastStack_"/></xsl:message>
--->
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(@WEST = $lastStack_)]">
- <xsl:call-template name="Define_BusLaneSpace">
- <xsl:with-param name="iStackToWest" select="$lastStack_"/>
- </xsl:call-template>
- </xsl:for-each>
-
-</xsl:template>
-
-</xsl:stylesheet>
\ No newline at end of file
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Busses.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Busses.xsl
deleted file mode 100644
index b95ad1144f..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Busses.xsl
+++ /dev/null
@@ -1,546 +0,0 @@
-<?xml version="1.0" standalone="no"?>
- <xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<!--
-<xsl:output method="xml"
- version="1.0"
- encoding="UTF-8"
- indent="yes"
- doctype-public="-//W3C//DTD SVG 1.0//EN"
- doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
--->
-
-<xsl:template name="Define_Busses">
-<!--
- <xsl:param name="drawarea_w" select="500"/>
- <xsl:param name="drawarea_h" select="500"/>
--->
-
- <xsl:for-each select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR">
-
- <xsl:call-template name="Define_BusArrowsEastWest">
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
-
- <xsl:call-template name="Define_BusArrowsNorthSouth">
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
-
- <xsl:call-template name="Define_SplitBusses">
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
- <xsl:call-template name="Define_SharedBus">
- <xsl:with-param name="iBusStd" select="'AXI'"/>
- </xsl:call-template>
-
- <xsl:call-template name="Define_SharedBus">
- <xsl:with-param name="iBusStd" select="'OPB'"/>
- </xsl:call-template>
-
- <xsl:call-template name="Define_SharedBus">
- <xsl:with-param name="iBusStd" select="'PLB'"/>
- </xsl:call-template>
-
- <xsl:call-template name="Define_SharedBus">
- <xsl:with-param name="iBusStd" select="'PLBV46'"/>
- </xsl:call-template>
-
- <xsl:call-template name="Define_SharedBus_Group"/>
-
-</xsl:template>
-
-<xsl:template name="Define_BusArrowsEastWest">
- <xsl:param name="iBusStd" select="'PLB'"/>
-
- <xsl:variable name="busStdColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="busStdColor_lt_">
- <xsl:call-template name="F_BusStd2RGB_LT">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <g id="{$iBusStd}_BusArrowEast">
- <path class="bus"
- d="M 0,0
- L {$BLKD_BUS_ARROW_W}, {ceiling($BLKD_BUS_ARROW_H div 2)}
- L 0,{$BLKD_BUS_ARROW_H},
- Z" style="stroke:none; fill:{$busStdColor_}"/>
- </g>
-
- <g id="{$iBusStd}_BusArrowWest">
- <use x="0" y="0" xlink:href="#{$iBusStd}_BusArrowEast" transform="scale(-1,1) translate({$BLKD_BUS_ARROW_W * -1},0)"/>
- </g>
-
- <g id="{$iBusStd}_BusArrowHInitiator">
- <rect x="0"
- y="{$BLKD_BUS_ARROW_G}"
- width= "{$BLKD_BUS_ARROW_W}"
- height="{$BLKD_P2P_BUS_W}"
- style="stroke:none; fill:{$busStdColor_}"/>
- </g>
-
-</xsl:template>
-
-<!--
- <xsl:param name="bus_col" select="'OPB'"/>
--->
-
-<xsl:template name="Define_BusArrowsNorthSouth">
- <xsl:param name="iBusStd" select="'PLB'"/>
-
- <xsl:variable name="busStdColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="busStdColor_lt_">
- <xsl:call-template name="F_BusStd2RGB_LT">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <g id="{$iBusStd}_BusArrowSouth">
- <path class="bus"
- d="M 0,0
- L {$BLKD_BUS_ARROW_H},0
- L {ceiling($BLKD_BUS_ARROW_H div 2)}, {$BLKD_BUS_ARROW_W}
- Z" style="stroke:none; fill:{$busStdColor_}"/>
- </g>
-
- <g id="{$iBusStd}_BusArrowNorth">
- <use x="0" y="0" xlink:href="#{$iBusStd}_BusArrowSouth" transform="scale(1,-1) translate(0,{$BLKD_BUS_ARROW_H * -1})"/>
- </g>
-
- <g id="{$iBusStd}_BusArrowInitiator">
- <rect x="{$BLKD_BUS_ARROW_G}"
- y="0"
- width= "{$BLKD_BUS_ARROW_W - ($BLKD_BUS_ARROW_G * 2)}"
- height="{$BLKD_BUS_ARROW_H}"
- style="stroke:none; fill:{$busStdColor_}"/>
- </g>
-
-</xsl:template>
-
-
-<xsl:template name="Draw_P2PBus">
-
- <xsl:param name="iBusX" select="0"/>
- <xsl:param name="iBusTop" select="0"/>
- <xsl:param name="iBusBot" select="0"/>
- <xsl:param name="iBusStd" select="'_bstd_'"/>
- <xsl:param name="iBusName" select="'_p2pbus_'"/>
- <xsl:param name="iBotBifType" select="'_unk_'"/>
- <xsl:param name="iTopBifType" select="'_unk_'"/>
-
- <xsl:variable name="busStdColor_">
- <xsl:choose>
-
- <xsl:when test="@BUSSTD">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="not($iBusStd = '_bstd_')">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'TRS'"/>
- </xsl:call-template>
- </xsl:otherwise>
-
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="p2pH_" select="($iBusBot - $iBusTop) - ($BLKD_BUS_ARROW_H * 2)"/>
-
- <xsl:variable name="botArrow_">
- <xsl:choose>
- <xsl:when test="((($iBotBifType = 'INITIATOR') or ($iBotBifType = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowInitiator</xsl:when>
- <xsl:otherwise>BusArrowSouth</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="topArrow_">
- <xsl:choose>
- <xsl:when test="((($iTopBifType = 'INITIATOR') or ($iTopBifType = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowInitiator</xsl:when>
- <xsl:otherwise>BusArrowNorth</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="@BUSSTD">
- <use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
- y="{$iBusTop + ($BLKD_BIFC_H - $BLKD_BUS_ARROW_H) + $BLKD_BUS_ARROW_H}"
- xlink:href="#{@BUSSTD}_{$topArrow_}"/>
-
- <use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
- y="{$iBusBot - $BLKD_BUS_ARROW_H}"
- xlink:href="#{@BUSSTD}_{$botArrow_}"/>
- </xsl:if>
-
- <xsl:if test="(not(@BUSSTD) and not($iBusStd = '_bstd_'))">
- <use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
- y="{$iBusTop + ($BLKD_BIFC_H - $BLKD_BUS_ARROW_H) + $BLKD_BUS_ARROW_H}"
- xlink:href="#{$iBusStd}_{$topArrow_}"/>
-
- <use x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2)}"
- y="{$iBusBot - $BLKD_BUS_ARROW_H}"
- xlink:href="#{$iBusStd}_{$botArrow_}"/>
- </xsl:if>
-
-
- <rect x="{($iBusX + ceiling($BLKD_BIFC_W div 2)) - ceiling($BLKD_BUS_ARROW_W div 2) + $BLKD_BUS_ARROW_G}"
- y="{$iBusTop + $BLKD_BIFC_H + $BLKD_BUS_ARROW_H}"
- height= "{$p2pH_ - ($BLKD_BUS_ARROW_H * 2)}"
- width="{$BLKD_BUS_ARROW_W - ($BLKD_BUS_ARROW_G * 2)}"
- style="stroke:none; fill:{$busStdColor_}"/>
-
-<!--
- <text class="p2pbuslabel"
- x="{$iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4}"
- y="{$iBusTop + ($BLKD_BUS_ARROW_H * 3)}">
- <xsl:value-of select="$iBusName"/>
- </text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4)"/>
- <xsl:with-param name="iY" select="($iBusTop + ($BLKD_BUS_ARROW_H * 3))"/>
- <xsl:with-param name="iText" select="$iBusName"/>
- <xsl:with-param name="iClass" select="'p2pbus_label'"/>
- </xsl:call-template>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iBusName)]/@GROUP">
-<!--
- <text class="ioplblgrp"
- x="{$iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6}"
- y="{$iBusTop + ($BLKD_BUS_ARROW_H * 10)}">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iBusName)]/@GROUP"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(iBusX + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 6)"/>
- <xsl:with-param name="iY" select="($iBusTop + ($BLKD_BUS_ARROW_H * 10))"/>
- <xsl:with-param name="iText" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iBusName)]/@GROUP"/>
- <xsl:with-param name="iClass" select="'iogrp_label'"/>
- </xsl:call-template>
-
- </xsl:if>
-
-</xsl:template>
-
-
-<xsl:template name="Draw_Proc2ProcBus">
-
- <xsl:param name="iBc_Y" select="0"/>
- <xsl:param name="iBusStd" select="'_bstd_'"/>
- <xsl:param name="iBusName" select="'_p2pbus_'"/>
- <xsl:param name="iBcLeft_X" select="0"/>
- <xsl:param name="iBcRght_X" select="0"/>
- <xsl:param name="iLeftBifType" select="'_unk_'"/>
- <xsl:param name="iRghtBifType" select="'_unk_'"/>
-
- <xsl:variable name="busStdColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="pr2pr_W_" select="($iBcRght_X - $iBcLeft_X)"/>
-
- <xsl:variable name="leftArrow_">
- <xsl:choose>
- <xsl:when test="((($iLeftBifType = 'INITIATOR') or ($iLeftBifType = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowHInitiator</xsl:when>
- <xsl:otherwise>BusArrowWest</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="rghtArrow_">
- <xsl:choose>
- <xsl:when test="((($iRghtBifType = 'INITIATOR') or ($iRghtBifType = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowHInitiator</xsl:when>
- <xsl:otherwise>BusArrowEast</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="bus_Y_" select="($iBc_Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2))"/>
-
- <use x="{$iBcLeft_X}" y="{$bus_Y_}" xlink:href="#{$iBusStd}_{$leftArrow_}"/>
- <use x="{$iBcRght_X - $BLKD_BUS_ARROW_W}" y="{$bus_Y_}" xlink:href="#{$iBusStd}_{$rghtArrow_}"/>
-
- <rect x="{$iBcLeft_X + $BLKD_BUS_ARROW_W}"
- y="{$bus_Y_ + $BLKD_BUS_ARROW_G}"
- width= "{$pr2pr_W_ - (2 * $BLKD_BUS_ARROW_W)}"
- height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busStdColor_}"/>
-
-<!--
- <text class="horizp2pbuslabel"
- x="{$iBcLeft_X + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4}"
- y="{($bus_Y_)}"><xsl:value-of select="$iBusName"/></text>
-
- <text class="horizp2pbuslabel"
- x="{$iBcRght_X - (string-length($iBusName) * 8)}"
- y="{($bus_Y_)}"><xsl:value-of select="$iBusName"/></text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($iBcLeft_X + $BLKD_BUS_ARROW_W + ceiling($BLKD_BUS_ARROW_W div 2) + ceiling($BLKD_BUS_ARROW_W div 4) + 4)"/>
- <xsl:with-param name="iY" select="$bus_Y_"/>
- <xsl:with-param name="iText" select="$iBusName"/>
- <xsl:with-param name="iClass" select="'p2pbus_label'"/>
- </xsl:call-template>
-
-<!--
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(iBcRght_X - (string-length($iBusName) * 8))"/>
- <xsl:with-param name="iY" select="$bus_Y_"/>
- <xsl:with-param name="iText" select="$iBusName"/>
- <xsl:with-param name="iClass" select="'p2pbus_label'"/>
- </xsl:call-template>
-
--->
-
-</xsl:template>
-
-
-<xsl:template name="Draw_SplitConnBus">
-
- <xsl:param name="iBc_X" select="0"/>
- <xsl:param name="iBc_Y" select="0"/>
- <xsl:param name="iBc_Type" select="'_unk_'"/>
- <xsl:param name="iBc_Side" select="'_unk_'"/>
- <xsl:param name="iBusStd" select="'_bstd_'"/>
- <xsl:param name="iBusName" select="'_p2pbus_'"/>
-
- <xsl:variable name="busStdColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="connArrow_">
- <xsl:choose>
- <xsl:when test="((($iBc_Type = 'INITIATOR') or ($iBc_Type = 'MASTER')) and ($iBusStd = 'FSL'))">BusArrowHInitiator</xsl:when>
- <xsl:otherwise>BusArrowEast</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="arrow_Y_" select="($iBc_Y + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_BUS_ARROW_H div 2))"/>
-
- <xsl:variable name="bus_X_">
- <xsl:choose>
- <xsl:when test="$iBc_Side = '0'"><xsl:value-of select="($iBc_X - ($BLKD_BUS_ARROW_W * 2))"/></xsl:when>
- <xsl:when test="$iBc_Side = '1'"><xsl:value-of select="($iBc_X + $BLKD_BIFC_W + $BLKD_BUS_ARROW_W)"/></xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <use x="{$bus_X_}" y="{$arrow_Y_}" xlink:href="#{$busStd}_BusArrowHInitiator"/>
--->
-
- <xsl:variable name="arrow_X_">
- <xsl:choose>
- <xsl:when test="$iBc_Side = '0'"><xsl:value-of select="($iBc_X - $BLKD_BUS_ARROW_W)"/></xsl:when>
- <xsl:when test="$iBc_Side = '1'"><xsl:value-of select="($iBc_X + $BLKD_BIFC_W)"/></xsl:when>
- </xsl:choose>
- </xsl:variable>
- <xsl:choose>
- <xsl:when test="(($iBusStd = 'FSL') and (($iBc_Type = 'MASTER') or ($iBc_Type = 'INITIATOR')))">
- <use x="{$arrow_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_{$connArrow_}"/>
- <use x="{$bus_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_BusArrowHInitiator"/>
- </xsl:when>
- <xsl:when test="(($iBc_Side = '1') and not($iBusStd = 'FSL') and (($iBc_Type = 'MASTER') or ($iBc_Type = 'INITIATOR')))">
- <use x="{$arrow_X_ - $BLKD_BIFC_W}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_SplitBus_WEST"/>
- </xsl:when>
- <xsl:when test="(($iBc_Side = '1') and (($iBc_Type = 'SLAVE') or ($iBc_Type = 'TARGET') or ($iBc_Type = 'USER')))">
- <use x="{$arrow_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_SplitBus_EAST"/>
- </xsl:when>
- <xsl:otherwise>
- <use x="{$arrow_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_{$connArrow_}"/>
- <use x="{$bus_X_}" y="{$arrow_Y_}" xlink:href="#{$iBusStd}_BusArrowHInitiator"/>
- </xsl:otherwise>
- </xsl:choose>
-
- <xsl:variable name="text_X_">
- <xsl:choose>
- <xsl:when test="$iBc_Side = '0'"><xsl:value-of select="($bus_X_ - $BLKD_BUS_ARROW_W - (string-length($iBusName) * 5))"/></xsl:when>
- <xsl:when test="$iBc_Side = '1'"><xsl:value-of select="($bus_X_ + $BLKD_BUS_ARROW_W)"/></xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
-<!--
- <text class="horizp2pbuslabel"
- x="{$text_X_}"
- y="{($arrow_Y_)}">
- <xsl:value-of select="$iBusName"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="$text_X_"/>
- <xsl:with-param name="iY" select="$arrow_Y_"/>
- <xsl:with-param name="iText" select="$iBusName"/>
- <xsl:with-param name="iClass" select="'p2pbus_label'"/>
- </xsl:call-template>
-
-</xsl:template>
-
-
-<xsl:template name="Define_SharedBus">
-
- <xsl:param name="iBusStd" select="'PLB46'"/>
-
- <xsl:variable name="sharedbus_w_" select="($G_Total_DrawArea_W - ($BLKD_INNER_GAP * 2))"/>
-
- <xsl:variable name="busStdColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="busStdColor_lt_">
- <xsl:call-template name="F_BusStd2RGB_LT">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <g id="{$iBusStd}_SharedBus">
- <use x="0" y="0" xlink:href="#{$iBusStd}_BusArrowWest"/>
- <use x="{$sharedbus_w_ - $BLKD_BUS_ARROW_W}" y="0" xlink:href="#{$iBusStd}_BusArrowEast"/>
-
- <rect x="{$BLKD_BUS_ARROW_W}"
- y="{$BLKD_BUS_ARROW_G}"
- width= "{$sharedbus_w_ - ($BLKD_BUS_ARROW_W * 2)}"
- height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busStdColor_}"/>
- </g>
-</xsl:template>
-
-
-<xsl:template name="Define_SplitBusses">
-
- <xsl:param name="iBusStd" select="'FSL'"/>
-
- <xsl:variable name="busStdColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="bifc_r_" select="ceiling($BLKD_BIFC_W div 3)"/>
-
- <g id="{$iBusStd}_SplitBus_EAST">
- <use x="0" y="0" xlink:href="#{$iBusStd}_BusArrowWest"/>
-
- <rect x="{$BLKD_BUS_ARROW_W}"
- y="{$BLKD_BUS_ARROW_G}"
- width= "{$BLKD_BIFC_W}"
- height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busStdColor_}"/>
-
- </g>
-
- <xsl:variable name="splbus_w_" select="($BLKD_BUS_ARROW_W + $BLKD_BIFC_W + $BLKD_BIFC_Wi)"/>
-
- <g id="{$iBusStd}_SplitBus_WEST">
- <use x="0" y="0" xlink:href="#{$iBusStd}_SplitBus_EAST" transform="scale(-1,1) translate({$splbus_w_ * -1},0)"/>
- </g>
-
- <g id="{$iBusStd}_SplitBus_OneWay">
-
- <rect x="0"
- y="{$BLKD_BUS_ARROW_G}"
- width= "{($BLKD_BUS_ARROW_W * 2)}"
- height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$busStdColor_}"/>
-
- <rect x="{($BLKD_BUS_ARROW_W * 2)}"
- y="0"
- width= "{$BLKD_BUS_ARROW_H}"
- height="{$BLKD_BUS_ARROW_H}" style="stroke:none; fill:{$busStdColor_}"/>
-
- </g>
-</xsl:template>
-
-
-<xsl:template name="Define_SharedBus_Group">
-
-<!-- The Bridges go into the shared bus shape -->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE">
-
- <xsl:variable name="modInst_" select="@INSTANCE"/>
- <xsl:variable name="modType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInst_)]/@MODTYPE"/>
-
- <xsl:call-template name="Define_Peripheral">
- <xsl:with-param name="iModVori" select="'normal'"/>
- <xsl:with-param name="iModInst" select="$modInst_"/>
- <xsl:with-param name="iModType" select="$modType_"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
-<g id="group_sharedBusses">
-
- <!-- Draw the shared bus shapes first -->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSSHAPES/MODULE">
- <xsl:variable name="instance_" select="@INSTANCE"/>
-
- <xsl:variable name="busStd_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $instance_)]/@BUSSTD"/>
- <xsl:variable name="busIndex_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $instance_)]/@BUS_INDEX"/>
-
- <xsl:variable name="busY_" select="($busIndex_ * $BLKD_SBS_LANE_H)"/>
-
- <use x="0" y="{$busY_}" xlink:href="#{$busStd_}_SharedBus"/>
-
-<!--
- <text class="sharedbuslabel"
- x="8"
- y="{$busY_ + $BLKD_BUS_ARROW_H + 10}">
- <xsl:value-of select="$instance_"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'8'"/>
- <xsl:with-param name="iY" select="($busY_ + $BLKD_BUS_ARROW_H + 10)"/>
- <xsl:with-param name="iText" select="$instance_"/>
- <xsl:with-param name="iClass" select="'sharedbus_label'"/>
- </xsl:call-template>
- </xsl:for-each>
-
-</g>
-
-<g id="KEY_SharedBus">
- <use x="0" y="0" xlink:href="#KEY_BusArrowWest"/>
- <use x="30" y="0" xlink:href="#KEY_BusArrowEast"/>
-
- <xsl:variable name="key_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'KEY'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <rect x="{$BLKD_BUS_ARROW_W}"
- y="{$BLKD_BUS_ARROW_G}"
- width= "{30 - $BLKD_BUS_ARROW_W}"
- height="{$BLKD_BUS_ARROW_H - (2 * $BLKD_BUS_ARROW_G)}" style="stroke:none; fill:{$key_col_}"/>
-</g>
-
-</xsl:template>
-
-</xsl:stylesheet>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Functions.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Functions.xsl
deleted file mode 100644
index 5b091aba59..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Functions.xsl
+++ /dev/null
@@ -1,1112 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- extension-element-prefixes="math dyn exsl xlink">
-<!--
-xmlns:svg="http://www.w3.org/2000/svg"
-<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
- doctype-public="-//W3C//DTD SVG 1.0//EN"
- doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
--->
-
-<xsl:template name="F_Calc_Proc_Height">
- <xsl:param name="iProcInst" select="_processor_"/>
-
- <xsl:variable name="tot_bifs_h_">
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $iProcInst)]/@BIFS_H)">0</xsl:if>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $iProcInst)]/@BIFS_H">
- <xsl:variable name="bifs_h_" select="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $iProcInst)]/@BIFS_H)"/>
- <xsl:value-of select="(($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_H) * $bifs_h_)"/>
- </xsl:if>
- </xsl:variable>
-
- <xsl:value-of select="(($BLKD_MOD_LANE_H * 2) + $tot_bifs_h_ + ($BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_H))"/>
-</xsl:template>
-
-<xsl:template name="F_Calc_Max_Proc_Height">
-
- <!-- Store the heights in a variable -->
- <xsl:variable name="proc_heights_">
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE)">
- <PROC HEIGHT="0"/>
- </xsl:if>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE">
- <xsl:variable name="procInst_" select="@INSTANCE"/>
- <xsl:variable name="proc_height_">
- <xsl:call-template name="F_Calc_Proc_Height">
- <xsl:with-param name="iProcInst" select="$procInst_"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Found Proc height as <xsl:value-of select="$proc_height_"/></xsl:message>
--->
- <PROC HEIGHT="{$proc_height_}"/>
- </xsl:for-each>
- </xsl:variable>
-
- <!-- Return the max of them -->
-<!--
- <xsl:message>Found Proc ax as <xsl:value-of select="math:max(exsl:node-set($proc_heights_)/PROC/@HEIGHT)"/></xsl:message>
--->
-
- <xsl:value-of select="math:max(exsl:node-set($proc_heights_)/PROC/@HEIGHT)"/>
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Proc_MemoryUnits_Height">
- <xsl:param name="iProcInst" select="_processor_"/>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@PROCESSOR = $iProcInst) and (@MODCLASS = 'MEMORY_UNIT'))])">0</xsl:if>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@PROCESSOR = $iProcInst) and (@MODCLASS='MEMORY_UNIT'))]">
-
- <xsl:variable name="peri_gap_">
- <xsl:choose>
- <xsl:when test="not(@CSTACK_INDEX)">
- <xsl:value-of select="$BLKD_BIF_H"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <!-- Store the all memory unit heights in a variable -->
- <xsl:variable name="memU_heights_">
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@PROCESSOR = $iProcInst) and (@MODCLASS='MEMORY_UNIT'))]">
-<!--
- <xsl:variable name="unitId_" select="@PSTACK_MODS_Y"/>
--->
- <xsl:variable name="unitHeight_">
- <xsl:call-template name="F_Calc_MemoryUnit_Height">
- <xsl:with-param name="iShapeId" select="@SHAPE_ID"/>
- </xsl:call-template>
- </xsl:variable>
-
- <MEM_UNIT HEIGHT="{$unitHeight_ + $peri_gap_}"/>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:value-of select="sum(exsl:node-set($memU_heights_)/MEM_UNIT/@HEIGHT)"/>
- </xsl:if>
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Proc_Peripherals_Height">
- <xsl:param name="iProcInst" select="_processor_"/>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@PROCESSOR = $iProcInst) and not(@MODCLASS = 'MEMORY_UNIT'))])">0</xsl:if>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@PROCESSOR = $iProcInst) and not(@MODCLASS='MEMORY_UNIT'))]">
-
- <xsl:variable name="peri_gap_">
- <xsl:if test="@CSTACK_INDEX">
- <xsl:value-of select="$BLKD_BIF_H"/>
- </xsl:if>
- <xsl:if test="not(@IS_CSTACK)">0</xsl:if>
- </xsl:variable>
-
- <!-- Store the all peripheral heights in a variable -->
- <xsl:variable name="peri_heights_">
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@PROCESSOR = $iProcInst) and not(@MODCLASS='MEMORY_UNIT'))]">
- <xsl:for-each select="MODULE">
-<!--
- <xsl:message><xsl:value-of select="@INSTANCE"/></xsl:message>
--->
- <xsl:variable name="peri_height_">
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="@INSTANCE"/>
- </xsl:call-template>
- </xsl:variable>
- <PERI HEIGHT="{$peri_height_ + $peri_gap_}"/>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:value-of select="sum(exsl:node-set($peri_heights_)/PERI/@HEIGHT)"/>
- </xsl:if>
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Space_AbvSbs_Height">
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
-
-
- <xsl:variable name = "stackAbvSbs_West_H_">
- <xsl:choose>
- <xsl:when test="(($iStackToEast = '0') and ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="(($iStackToEast = 'NONE') and not($iStackToWest = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:when test="(not($iStackToEast = '0') and ($iStackToWest = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="($iStackToEast - 1)"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name = "stackAbvSbs_East_H_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackAbvSbs_heights_">
- <STACK HEIGHT="{$stackAbvSbs_East_H_}"/>
- <STACK HEIGHT="{$stackAbvSbs_West_H_}"/>
- </xsl:variable>
-
- <xsl:value-of select="math:max(exsl:node-set($stackAbvSbs_heights_)/STACK/@HEIGHT)"/>
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Space_BlwSbs_Height">
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
-
- <xsl:variable name = "stackBlwSbs_West_H_">
- <xsl:choose>
- <xsl:when test="(($iStackToEast = '0') and ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="(($iStackToEast = 'NONE') and not($iStackToWest = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_BlwSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:when test="(not($iStackToEast = '0') and ($iStackToWest = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_BlwSbs_Height">
- <xsl:with-param name="iStackIdx" select="($iStackToEast - 1)"/>
- </xsl:call-template>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name = "stackBlwSbs_East_H_">
- <xsl:call-template name="F_Calc_Stack_BlwSbs_Height">
- <xsl:with-param name="iStackIdx" select="$iStackToEast"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stackBlwSbs_heights_">
- <STACK HEIGHT="{$stackBlwSbs_East_H_}"/>
- <STACK HEIGHT="{$stackBlwSbs_West_H_}"/>
- </xsl:variable>
-
- <xsl:value-of select="math:max(exsl:node-set($stackBlwSbs_heights_)/STACK/@HEIGHT)"/>
-</xsl:template>
-
-
-
-<xsl:template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:param name="iStackIdx" select="100"/>
-<!--
- <xsl:message>^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</xsl:message>
--->
-
- <xsl:if test="(not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@IS_ABVSBS))]) and
- not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@STACK_HORIZ_INDEX = $iStackIdx)]))"><xsl:value-of select="$BLKD_PROC2SBS_GAP"/></xsl:if>
-
- <xsl:if test="(($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@IS_ABVSBS))]) or
- ($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[ (@STACK_HORIZ_INDEX = $iStackIdx)]))">
-
-<!--
- <xsl:variable name="peri_gap_">
- <xsl:value-of select="$BLKD_BIF_H"/>
- <xsl:choose>
- <xsl:when test="(@SHAPE_VERTI_INDEX)">
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
--->
-
-<!--
- <xsl:message>The gap is <xsl:value-of select="$peri_gap_"/></xsl:message>
- <xsl:message>The gap is <xsl:value-of select="$peri_gap_"/></xsl:message>
- <xsl:message>================================</xsl:message>
- <xsl:message>================================</xsl:message>
- <xsl:message>This is above <xsl:value-of select="@INSTANCE"/></xsl:message>
- <xsl:message><xsl:value-of select="@INSTANCE"/> : <xsl:value-of select="$peri_height_"/></xsl:message>
--->
-
-
- <!-- Store the all peripheral heights in a variable -->
- <xsl:variable name="peri_heights_">
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and not(@MODCLASS = 'MEMORY_UNIT') and (@IS_ABVSBS))]">
- <xsl:for-each select="MODULE">
-<!--
- <xsl:message>This is above <xsl:value-of select="@INSTANCE"/></xsl:message>
--->
-
- <xsl:variable name="peri_height_">
-<!--
- <xsl:call-template name="F_Calc_Shape_Height">
- <xsl:with-param name="shapeId" select="@SHAPE_ID"/>
- </xsl:call-template>
--->
-
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="@INSTANCE"/>
- </xsl:call-template>
- </xsl:variable>
-
- <PERI HEIGHT="{$peri_height_ + $BLKD_BIF_H}"/>
- </xsl:for-each>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@MODCLASS = 'MEMORY_UNIT') and (@IS_ABVSBS))]">
-
- <xsl:variable name="memu_height_">
- <xsl:call-template name="F_Calc_MemoryUnit_Height">
- <xsl:with-param name="iShapeId" select="@SHAPE_ID"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Mem_Unit : <xsl:value-of select="@SHAPE_ID"/> : <xsl:value-of select="$memu_height_ + $peri_gap_"/></xsl:message>
--->
- <PERI HEIGHT="{$memu_height_ + $BLKD_BIF_H}"/>
-
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@IS_ABVSBS))]">
-
- <xsl:variable name="proc_height_">
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="@INSTANCE"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>===================================</xsl:message>
- <xsl:message>Processor : <xsl:value-of select="@INSTANCE"/> : <xsl:value-of select="$peri_height_ + $peri_gap_"/></xsl:message>
- <PERI HEIGHT="{$proc_height_ + $BLKD_PROC2SBS_GAP }"/>
--->
- <PERI HEIGHT="{$proc_height_ + $BLKD_BIF_H}"/>
-
- </xsl:for-each>
-
- </xsl:variable>
-
-<!--
- <xsl:message><xsl:value-of select="@INSTANCE"/> : <xsl:value-of select="$peri_height_ + $peri_gap_"/></xsl:message>
- <xsl:message>================================</xsl:message>
--->
-
-<!--
- <xsl:message>^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^^</xsl:message>
--->
- <xsl:value-of select="sum(exsl:node-set($peri_heights_)/PERI/@HEIGHT)"/>
- </xsl:if>
-
-</xsl:template>
-
-<xsl:template name="F_Calc_Stack_BlwSbs_Height">
- <xsl:param name="iStackIdx" select="100"/>
-
- <!-- Store the all peripheral heights in a variable -->
- <xsl:variable name="stack_heights_">
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@IS_BLWSBS))])">
- <STACKSHAPE HEIGHT="0"/>
- </xsl:if>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@IS_BLWSBS))]">
-
- <xsl:variable name="peri_gap_">
- <xsl:choose>
- <xsl:when test="(@SHAPE_VERTI_INDEX)">
- <xsl:value-of select="$BLKD_BIF_H"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and not(@MODCLASS = 'MEMORY_UNIT') and (@IS_BLWSBS))]">
- <xsl:for-each select="MODULE">
-<!--
- <xsl:message>This is below <xsl:value-of select="@INSTANCE"/></xsl:message>
--->
- <xsl:variable name="peri_height_">
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="@INSTANCE"/>
- </xsl:call-template>
- </xsl:variable>
-
- <STACKSHAPE HEIGHT="{$peri_height_ + $peri_gap_}"/>
- </xsl:for-each>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@MODCLASS = 'MEMORY_UNIT') and (@IS_BLWSBS))]">
-
- <xsl:variable name="memu_height_">
- <xsl:call-template name="F_Calc_MemoryUnit_Height">
- <xsl:with-param name="iShapeId" select="@SHAPE_ID"/>
- </xsl:call-template>
- </xsl:variable>
-
- <STACKSHAPE HEIGHT="{$memu_height_ + $peri_gap_}"/>
-
-<!--
- <xsl:message>Mem_Unit : <xsl:value-of select="@SHAPE_ID"/> : <xsl:value-of select="$memu_height_ + $peri_gap_"/></xsl:message>
--->
-
- </xsl:for-each>
- </xsl:if>
-
- <xsl:variable name="sbsBuckets_H_">
- <xsl:call-template name="F_Calc_Stack_SbsBuckets_Height">
- <xsl:with-param name="iStackIdx" select="$iStackIdx"/>
- </xsl:call-template>
- </xsl:variable>
-
- <STACKSHAPE HEIGHT="{$sbsBuckets_H_}"/>
-<!--
- <xsl:message>Sbs Bucket H : <xsl:value-of select="$sbsBuckets_H_"/></xsl:message>
--->
- </xsl:variable>
-
-<!--
- <xsl:message>vvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvvv</xsl:message>
--->
- <xsl:value-of select="sum(exsl:node-set($stack_heights_)/STACKSHAPE/@HEIGHT)"/>
-
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Stack_SbsBuckets_Height">
- <xsl:param name="iStackIdx" select="1000"/>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@STACK_HORIZ_INDEX = $iStackIdx)])">0</xsl:if>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@STACK_HORIZ_INDEX = $iStackIdx)]">
-
- <!-- Store the all buckets heights in a variable -->
- <xsl:variable name="bkt_heights_">
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@STACK_HORIZ_INDEX = $iStackIdx)]">
-
- <xsl:variable name="bkt_height_">
- <xsl:call-template name="F_Calc_SbsBucket_Height">
- <xsl:with-param name="iBucketId" select="@BUS_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-<!--
- <xsl:message>Found shared buckets height as <xsl:value-of select="$bkt_height_"/></xsl:message>
--->
- <BKT HEIGHT="{$bkt_height_ + $BLKD_BIF_H}"/>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:value-of select="sum(exsl:node-set($bkt_heights_)/BKT/@HEIGHT)"/>
- </xsl:if>
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Max_Stack_BlwSbs_Height">
-
- <!-- Store the heights in a variable -->
- <xsl:variable name="blwSbs_heights_">
-
- <!-- Default, in case there are no modules or ports -->
- <BLW HEIGHT="0"/>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(@EAST < $G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH)]">
-
-<!--
- <xsl:message>Found a space of index <xsl:value-of select="@EAST"/></xsl:message>
--->
-
- <xsl:variable name="stack_height_">
- <xsl:call-template name="F_Calc_Stack_BlwSbs_Height">
- <xsl:with-param name="iStackIdx" select="@EAST"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <BLW HEIGHT="{$stack_height_}"/>
-
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(@WEST = ($G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH -1))]">
-
-<!--
- <xsl:message>Last stack of index <xsl:value-of select="@WEST"/></xsl:message>
--->
-
- <xsl:variable name="stack_height_">
- <xsl:call-template name="F_Calc_Stack_BlwSbs_Height">
- <xsl:with-param name="iStackIdx" select="@WEST"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <BLW HEIGHT="{$stack_height_}"/>
-
- </xsl:for-each>
-
-
- </xsl:variable>
-
-<!--
- <xsl:message>Found Blw Sbs max as <xsl:value-of select="math:max(exsl:node-set($blwSbs_heights_)/BLW/@HEIGHT)"/></xsl:message>
--->
- <!-- Return the max of them -->
- <xsl:value-of select="math:max(exsl:node-set($blwSbs_heights_)/BLW/@HEIGHT)"/>
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Max_Stack_AbvSbs_Height">
-
- <!-- Store the heights in a variable -->
- <xsl:variable name="abvSbs_heights_">
-
- <!-- Default, in case there are no modules or ports -->
- <ABV HEIGHT="0"/>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(@EAST < $G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH)]">
-
-<!--
- <xsl:message>Found a space of index <xsl:value-of select="@EAST"/></xsl:message>
--->
-
- <xsl:variable name="stack_height_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="@EAST"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Found stack of width <xsl:value-of select="$stack_width_"/></xsl:message>
- <xsl:message>==============================</xsl:message>
--->
-
- <ABV HEIGHT="{$stack_height_}"/>
-
- </xsl:for-each>
-
-
- </xsl:variable>
-
-<!--
- <xsl:message>Found Blw Sbs max as <xsl:value-of select="math:max(exsl:node-set($blwSbs_heights_)/BLW/@HEIGHT)"/></xsl:message>
--->
- <!-- Return the max of them -->
- <xsl:value-of select="math:max(exsl:node-set($abvSbs_heights_)/ABV/@HEIGHT)"/>
-</xsl:template>
-
-
-<xsl:template name="F_Calc_MultiProc_Stack_Height">
- <xsl:param name="iMPStack_Blkd_X" select="100"/>
-
- <xsl:variable name="mpStk_ShpHeights_">
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@HAS_MULTIPROCCONNS) and (@PSTACK_BLKD_X = $iMPStack_Blkd_X))])">
- <MPSHAPE HEIGHT="0"/>
- </xsl:if>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@HAS_MULTIPROCCONNS) and (@PSTACK_BLKD_X = $iMPStack_Blkd_X))]">
- <xsl:variable name="shpClass_" select="@MODCLASS"/>
- <xsl:variable name="shpHeight_">
- <xsl:choose>
- <xsl:when test="$shpClass_ = 'PERIPHERAL'">
-<!--
- <xsl:message>Found Multi Proc Peripheral</xsl:message>
--->
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="MODULE/@INSTANCE"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:when test="$shpClass_ = 'MEMORY_UNIT'">
-<!--
- <xsl:message>Found Multi Proc Memory Unit</xsl:message>
--->
- <xsl:call-template name="F_Calc_MemoryUnit_Height">
- <xsl:with-param name="iShapeIndex" select="@CSHAPE_INDEX"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message>Found <xsl:value-of select="$shpHeight_"/></xsl:message>
--->
-
- <MPSHAPE HEIGHT="{$shpHeight_}"/>
- </xsl:for-each>
- </xsl:variable>
-
-<!--
- <xsl:message>Found stack of height <xsl:value-of select="sum(exsl:node-set($mpStk_ShpHeights_)/MPSHAPE/@HEIGHT)"/></xsl:message>
--->
-
- <xsl:value-of select="sum(exsl:node-set($mpStk_ShpHeights_)/MPSHAPE/@HEIGHT)"/>
-</xsl:template>
-
-<xsl:template name="F_Calc_Max_MultiProc_Stack_Height">
-
- <!-- Store the heights in a variable -->
-
- <xsl:variable name="mpStks_Heights_">
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE)">
- <MPSTK HEIGHT="0"/>
- </xsl:if>
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@PSTACK_BLKD_X)]">
- <xsl:variable name="mpstack_height_">
- <xsl:call-template name="F_Calc_MultiProc_Stack_Height">
- <xsl:with-param name="iMPStack_Blkd_X" select="(@PSTACK_BLKD_X + 1)"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Found <xsl:value-of select="$mpstack_height_"/></xsl:message>
--->
- <MPSTK HEIGHT="{$mpstack_height_}"/>
- </xsl:for-each>
-
- </xsl:variable>
-
- <!-- Return the max of them -->
- <xsl:value-of select="math:max(exsl:node-set($mpStks_Heights_)/MPSTK/@HEIGHT)"/>
-
-</xsl:template>
-
-
-
-<xsl:template name="F_Calc_Stack_Shape_Y">
-
- <xsl:param name="iHorizIdx" select="100"/>
- <xsl:param name="iVertiIdx" select="100"/>
-
-
-<!--
- <xsl:param name="sbsGap" select="0"/>
- <xsl:variable name="numSBSs_" select="count($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSSHAPES/MODULE)"/>
- <xsl:variable name="sbs_LANE_H_" select="($numSBSs_ * $BLKD_SBS_LANE_H)"/>
- <xsl:variable name="sbsGap_" select="($BLKD_PROC2SBS_GAP + $sbs_LANE_H_)"/>
--->
-
- <xsl:variable name="sbsGap_" select="((count($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSSHAPES/MODULE) * $BLKD_SBS_LANE_H) + $BLKD_PROC2SBS_GAP)"/>
-
- <xsl:if test="(not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iHorizIdx) and ((@SHAPE_VERTI_INDEX = $iVertiIdx) or ($iVertiIdx = 100)))]) and
- not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[( (@STACK_HORIZ_INDEX = $iHorizIdx) and ((@SHAPE_VERTI_INDEX = $iVertiIdx) or ($iVertiIdx = 100)))]) and
- not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[( (@STACK_HORIZ_INDEX = $iHorizIdx) and ((@SHAPE_VERTI_INDEX = $iVertiIdx) or ($iVertiIdx = 100)))]))">0</xsl:if>
-
-
-<!--
- <xsl:if test="(not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iHorizIdx) and ((@SHAPE_VERTI_INDEX = $iVertiIdx) or ($iVertiIdx = 100)))]) and
- not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[( (@STACK_HORIZ_INDEX = $iHorizIdx) and ((@SHAPE_VERTI_INDEX = $iVertiIdx) or ($iVertiIdx = 100)))]) and
- not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[( (@STACK_HORIZ_INDEX = $iHorizIdx) and ((@SHAPE_VERTI_INDEX = $iVertiIdx) or ($iVertiIdx = 100)))]))">
- <xsl:message>Something is missing </xsl:message>
- </xsl:if>
--->
-
- <xsl:if test="(($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iHorizIdx) and ((@SHAPE_VERTI_INDEX = $iVertiIdx) or ($iVertiIdx = 100)))]) or
- ($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[( (@STACK_HORIZ_INDEX = $iHorizIdx) and ((@SHAPE_VERTI_INDEX = $iVertiIdx) or ($iVertiIdx = 100)))]) or
- ($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[( (@STACK_HORIZ_INDEX = $iHorizIdx) and ((@SHAPE_VERTI_INDEX = $iVertiIdx) or ($iVertiIdx = 100)))]))">
- <!-- Store the spaces above this one in a variable -->
- <xsl:variable name="spaces_above_">
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iHorizIdx) and (@SHAPE_VERTI_INDEX < $iVertiIdx))])">
- <SPACE HEIGHT="0"/>
- </xsl:if>
-
- <!-- Store the height of all peripherals and memory units above this one-->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iHorizIdx) and (@SHAPE_VERTI_INDEX < $iVertiIdx))]">
-
- <xsl:if test="not(@MODCLASS='MEMORY_UNIT')">
- <xsl:variable name="peri_height_">
- <xsl:call-template name="F_Calc_Shape_Height">
- <xsl:with-param name="iShapeId" select="@SHAPE_ID"/>
- </xsl:call-template>
- </xsl:variable>
-<!--
- <xsl:message>Found peri height <xsl:value-of select="$peri_height_"/></xsl:message>
--->
- <SPACE HEIGHT="{$peri_height_ + $BLKD_BIF_H}"/>
- </xsl:if>
-
- <xsl:if test="(@MODCLASS='MEMORY_UNIT')">
- <xsl:variable name="memu_height_">
- <xsl:call-template name="F_Calc_MemoryUnit_Height">
- <xsl:with-param name="iShapeId" select="@SHAPE_ID"/>
- </xsl:call-template>
- </xsl:variable>
-<!--
- <xsl:message>Found unit height <xsl:value-of select="$memu_height_"/></xsl:message>
--->
- <SPACE HEIGHT="{$memu_height_ + $BLKD_BIF_H}"/>
- </xsl:if>
-
- </xsl:for-each>
-
- <!-- Store the height of all the processors above this one-->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[((@STACK_HORIZ_INDEX = $iHorizIdx) and (@SHAPE_VERTI_INDEX < $iVertiIdx))]">
- <xsl:variable name="proc_height_">
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="@INSTANCE"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Found Proc height <xsl:value-of select="$proc_height_ + $BLKD_BIF_H"/></xsl:message>
--->
- <SPACE HEIGHT="{$proc_height_ + $BLKD_BIF_H}"/>
- </xsl:for-each>
-
- <!-- If its a peripheral that is below the shared busses, or its a shared bus bucket -->
- <!-- add the height of the shared busses and the processor. -->
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iHorizIdx) and (@SHAPE_VERTI_INDEX = $iVertiIdx))]/@IS_BLWSBS)">
- <SPACE HEIGHT="{$sbsGap_}"/>
- </xsl:if>
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[((@STACK_HORIZ_INDEX = $iHorizIdx) and (@SHAPE_VERTI_INDEX = $iVertiIdx))])">
- <SPACE HEIGHT="{$sbsGap_}"/>
- </xsl:if>
-
- <!-- Store the height of all shared bus buckets above this one-->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[((@STACK_HORIZ_INDEX = $iHorizIdx) and (@SHAPE_VERTI_INDEX < $iVertiIdx))]">
- <xsl:variable name="bkt_height_">
- <xsl:call-template name="F_Calc_SbsBucket_Height">
- <xsl:with-param name="iBucketId" select="@BUS_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Found bucket height <xsl:value-of select="$bkt_height_ + $BLKD_BIF_H"/></xsl:message>
--->
-
- <SPACE HEIGHT="{$bkt_height_ + $BLKD_BIF_H}"/>
- </xsl:for-each>
-
- </xsl:variable>
-
- <xsl:value-of select="sum(exsl:node-set($spaces_above_)/SPACE/@HEIGHT)"/>
- </xsl:if>
-
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Max_BusConnLane_BifY">
-
- <xsl:param name="iBusName" select="'_busname_'"/>
-
- <!-- Store the heights in a variable -->
- <xsl:variable name="busConnYs_">
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/BUSCONNS/BUSCONNLANE/BUSCONN)">
- <BUSCONNY HEIGHT="0"/>
- </xsl:if>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/BUSCONNS/BUSCONNLANE[(@BUSNAME = $iBusName)]/BUSCONN">
-
- <xsl:variable name="peri_cstk_y_">
- <xsl:call-template name="F_Calc_CStackShapesAbv_Height">
- <xsl:with-param name="iCStackIndex" select="../@CSTACK_INDEX"/>
- <xsl:with-param name="ICStackModY" select="@CSTACK_MODS_Y"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="peri_bif_dy_">
- <xsl:value-of select="(($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_H) * @BIF_Y)"/>
- </xsl:variable>
-
- <xsl:variable name="peri_bc_y_">
- <xsl:value-of select="($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_H + $peri_bif_dy_ + ceiling($BLKD_BIF_H div 2)) - ceiling($BLKD_BIFC_H div 2)"/>
- </xsl:variable>
-
-<!--
- <xsl:message>Found a busconn lane</xsl:message>
--->
- <BUSCONNY HEIGHT="{$peri_cstk_y_ + $peri_bif_dy_ + $peri_bc_y_}"/>
- </xsl:for-each>
-
- </xsl:variable>
-
- <!-- Return the max of them -->
- <xsl:value-of select="math:max(exsl:node-set($busConnYs_)/BUSCONNY/@HEIGHT)"/>
-
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Min_BusConnLane_BifY">
-
- <xsl:param name="iBusName" select="'_busname_'"/>
-
- <!-- Store the heights in a variable -->
- <xsl:variable name="busConnYs_">
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/BUSCONNS/BUSCONNLANE/BUSCONN)">
- <BUSCONNY HEIGHT="0"/>
- </xsl:if>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/BUSCONNS/BUSCONNLANE[(@BUSNAME = $iBusName)]/BUSCONN">
-
- <xsl:variable name="peri_cstk_y_">
- <xsl:call-template name="F_Calc_CStackShapesAbv_Height">
- <xsl:with-param name="iCStackIndex" select="../@CSTACK_INDEX"/>
- <xsl:with-param name="iCStackModY" select="@CSTACK_MODS_Y"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="peri_bif_dy_">
- <xsl:value-of select="(($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_H) * @BIF_Y)"/>
- </xsl:variable>
-
- <xsl:variable name="peri_bc_y_">
- <xsl:value-of select="($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_H + $peri_bif_dy_ + ceiling($BLKD_BIF_H div 2)) - ceiling($BLKD_BIFC_H div 2)"/>
- </xsl:variable>
-
-<!--
- <xsl:message>Found a busconn lane</xsl:message>
--->
- <BUSCONNY HEIGHT="{$peri_cstk_y_ + $peri_bc_y_}"/>
- </xsl:for-each>
-
- </xsl:variable>
-
- <!-- Return the min of them -->
- <xsl:value-of select="math:min(exsl:node-set($busConnYs_)/BUSCONNY/@HEIGHT)"/>
-
-</xsl:template>
-
-<xsl:template name="F_Calc_Stack_Height">
- <xsl:param name="iStackIdx" select="100"/>
-
-<!--
- <xsl:message>Calculating height for Stack Index <xsl:value-of select="$iStackIdx"/></xsl:message>
--->
-
-
- <xsl:variable name="stack_height_">
- <!-- if this is called with no vert index of a shape
- it defaults to the total height of the stack -->
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="$iStackIdx"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Calculated height for Stack as <xsl:value-of select="$stack_height_"/></xsl:message>
--->
- <xsl:value-of select="$stack_height_"/>
-</xsl:template>
-
-<!--
--->
-
-
-<xsl:template name="F_Calc_Stack_Width">
- <xsl:param name="iStackIdx" select="100"/>
-
-<!--
- <xsl:message>=============Stack Idx <xsl:value-of select="$iStackIdx"/>====</xsl:message>
--->
- <xsl:variable name="shape_widths_">
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[@STACK_HORIZ_INDEX = $iStackIdx])">
- <SHAPE WIDTH="0"/>
- </xsl:if>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[@STACK_HORIZ_INDEX = $iStackIdx])">
- <SHAPE WIDTH="0"/>
- </xsl:if>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@STACK_HORIZ_INDEX = $iStackIdx)]">
-<!--
- <xsl:variable name="proc_w_">
- <xsl:value-of select="$BLKD_MOD_W"/>
- </xsl:variable>
- <xsl:message>Found processor of width <xsl:value-of select="$proc_w_"/></xsl:message>
--->
- <SHAPE WIDTH="{$BLKD_MOD_W}"/>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@STACK_HORIZ_INDEX = $iStackIdx)]">
-
- <xsl:variable name="shpClass_" select="@MODCLASS"/>
- <xsl:variable name="shape_w_">
- <xsl:choose>
-
- <xsl:when test="$shpClass_ = 'PERIPHERAL'">
- <xsl:value-of select="$BLKD_MOD_W"/>
- </xsl:when>
-
- <xsl:when test="$shpClass_ = 'MEMORY_UNIT'">
- <xsl:value-of select="($BLKD_MOD_W * @MODS_W)"/>
- </xsl:when>
-
- <xsl:otherwise>0</xsl:otherwise>
-
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message>Found shape width <xsl:value-of select="$shape_w_"/></xsl:message>
--->
-
- <SHAPE WIDTH="{$shape_w_}"/>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@STACK_HORIZ_INDEX = $iStackIdx)]">
- <xsl:variable name="bucket_w_">
- <xsl:value-of select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * @MODS_W) + ($BLKD_MOD_BUCKET_G * (@MODS_W - 1))))"/>
- </xsl:variable>
-
-<!--
- <xsl:message>Found bucket of width <xsl:value-of select="$bucket_w_"/></xsl:message>
--->
- <SHAPE WIDTH="{$bucket_w_}"/>
- </xsl:for-each>
-
- </xsl:variable>
-
- <xsl:value-of select="math:max(exsl:node-set($shape_widths_)/SHAPE/@WIDTH)"/>
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Stack_X">
- <xsl:param name="iStackIdx" select="0"/>
-<!--
- <xsl:message>Looking for stack indexes less than <xsl:value-of select="$iStackIdx"/></xsl:message>
--->
-
- <!-- Store the stack widths in a variable -->
- <xsl:variable name="stackspace_widths_">
-
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH = $iStackIdx)">
- <STACKSPACE WIDTH="{$BLKD_BUS_LANE_W}"/>
- </xsl:if>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES[(@STACK_HORIZ_INDEX < $iStackIdx)])">
- <STACKSPACE WIDTH="0"/>
- </xsl:if>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES[(@STACK_HORIZ_INDEX < $iStackIdx)])">
- <STACKSPACE WIDTH="0"/>
- </xsl:if>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/SBSBUCKETS/SBSBUCKET[(@STACK_HORIZ_INDEX < $iStackIdx)])">
- <STACKSPACE WIDTH="0"/>
- </xsl:if>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(@EAST <= $iStackIdx)]">
-
-<!--
- <xsl:message>==============================</xsl:message>
- <xsl:message>Found a space of index <xsl:value-of select="@EAST"/></xsl:message>
- <xsl:message>Bus lane space width <xsl:value-of select="@BUSLANES_W"/></xsl:message>
- <xsl:message>Bus lane space is <xsl:value-of select="$space_width_"/></xsl:message>
- <xsl:variable name="space_width_" select="($BLKD_BUS_LANE_W * @BUSLANES_W)"/>
--->
-
- <xsl:variable name="East_">
- <xsl:choose>
- <xsl:when test="@EAST"><xsl:value-of select="@EAST"/></xsl:when>
- <xsl:otherwise>'NONE'</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="West_">
- <xsl:choose>
- <xsl:when test="@WEST"><xsl:value-of select="@WEST"/></xsl:when>
- <xsl:otherwise>NONE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message>1 - West_ <xsl:value-of select="$West_"/></xsl:message>
- <xsl:message>1 - East_ <xsl:value-of select="$East_"/></xsl:message>
--->
- <xsl:variable name="space_width_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToWest" select="$West_"/>
- <xsl:with-param name="iStackToEast" select="$East_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stack_width_">
- <xsl:if test="not(@EAST = $iStackIdx)">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="@EAST"/>
- </xsl:call-template>
- </xsl:if>
- <xsl:if test="(@EAST = $iStackIdx)">0</xsl:if>
- </xsl:variable>
-<!--
- <xsl:message>Found stack of width <xsl:value-of select="$stack_width_"/></xsl:message>
- <xsl:message>==============================</xsl:message>
--->
- <STACKSPACE WIDTH="{$stack_width_ + $space_width_}"/>
-
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(not(@EAST) and (@WEST = ($iStackIdx -1)))]">
- <xsl:variable name="space_width_" select="($BLKD_BUS_LANE_W * @BUSLANES_W)"/>
-<!--
- <xsl:message>Found end space of <xsl:value-of select="$space_width_"/></xsl:message>
--->
- <STACKSPACE WIDTH="{$space_width_}"/>
- </xsl:for-each>
-
-
- </xsl:variable>
-
- <xsl:value-of select="sum(exsl:node-set($stackspace_widths_)/STACKSPACE/@WIDTH)"/>
-
-</xsl:template>
-
-<xsl:template name="F_Calc_Space_Width">
-
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
-
-<!--
- <xsl:message>Stack to West <xsl:value-of select="$stackToWest"/></xsl:message>
- <xsl:message>Stack to East <xsl:value-of select="$stackToEast"/></xsl:message>
--->
-
- <xsl:variable name="spaceWidth_">
- <xsl:choose>
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[((@EAST = $iStackToEast) or (not($iStackToWest = 'NONE') and (@WEST = $iStackToWest)))]">
- <xsl:value-of select="((($G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[((@EAST = $iStackToEast) or (not($iStackToWest = 'NONE') and (@WEST = $iStackToWest)))]/@BUSLANES_W) + 1) * $BLKD_BUS_LANE_W)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message>Space width <xsl:value-of select="$spaceWidth_"/></xsl:message>
--->
-
- <xsl:value-of select="$spaceWidth_"/>
-</xsl:template>
-
-
-<xsl:template name="F_Calc_Space_X">
-
- <xsl:param name="iStackToWest" select="'NONE'"/>
- <xsl:param name="iStackToEast" select="'NONE'"/>
-
-<!--
- <xsl:message>Stack East <xsl:value-of select="$stackToEast"/></xsl:message>
- <xsl:message>Stack West <xsl:value-of select="$stackToWest"/></xsl:message>
--->
-
- <!-- Store the stack widths in a variable -->
-
-<!--
- <xsl:message>Looking for stack indexes less than <xsl:value-of select="$stackIdx"/></xsl:message>
--->
-
- <xsl:variable name="stackspace_widths_">
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES[(@STACK_HORIZ_INDEX < $iStackToEast)])">
- <STACKSPACE WIDTH="0"/>
- </xsl:if>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES[(@STACK_HORIZ_INDEX < $iStackToEast)])">
- <STACKSPACE WIDTH="0"/>
- </xsl:if>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/SBSBUCKETS/SBSBUCKET[(@STACK_HORIZ_INDEX < $iStackToEast)])">
- <STACKSPACE WIDTH="0"/>
- </xsl:if>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[((@EAST < $iStackToEast) or (not($iStackToWest = 'NONE') and (@EAST <= $iStackToWest)))]">
-
-<!--
- <xsl:message>==============================</xsl:message>
- <xsl:message>Found a space of index <xsl:value-of select="@EAST"/></xsl:message>
--->
-
- <xsl:variable name="East_">
- <xsl:choose>
- <xsl:when test="@EAST"><xsl:value-of select="@EAST"/></xsl:when>
- <xsl:otherwise>'NONE'</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="West_">
- <xsl:choose>
- <xsl:when test="@WEST"><xsl:value-of select="@WEST"/></xsl:when>
- <xsl:otherwise>NONE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-<!--
- <xsl:message>2 - West_ <xsl:value-of select="$West_"/></xsl:message>
- <xsl:message>2 - East_ <xsl:value-of select="$East_"/></xsl:message>
- -->
- <xsl:variable name="space_width_">
- <xsl:call-template name="F_Calc_Space_Width">
- <xsl:with-param name="iStackToWest" select="$West_"/>
- <xsl:with-param name="iStackToEast" select="$East_"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:variable name="space_width_" select="($BLKD_BUS_LANE_W * @BUSLANES_W)"/>
- <xsl:message>Bus lane space width <xsl:value-of select="@BUSLANES_W"/></xsl:message>
- <xsl:message>Bus lane space is <xsl:value-of select="$space_width_"/></xsl:message>
--->
-
- <xsl:variable name="stack_width_">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="@EAST"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Found stack of width <xsl:value-of select="$stack_width_"/></xsl:message>
- <xsl:message>==============================</xsl:message>
--->
-
- <STACKSPACE WIDTH="{$stack_width_ + $space_width_}"/>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:variable name = "stackToWest_W_">
- <xsl:choose>
- <xsl:when test="(($iStackToEast = '0') and ($iStackToWest = 'NONE'))">0</xsl:when>
- <xsl:when test="(($iStackToEast = 'NONE') and not($iStackToWest = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:when test="(not($iStackToEast = '0') and ($iStackToWest = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="($iStackToEast - 1)"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:variable name = "stackToEast_W_">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="stackIdx" select="$stackToEast"/>
- </xsl:call-template>
- </xsl:variable>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($stackToEast_W_ div 2)"/>
--->
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($stackToWest_W_ div 2)"/>
-
- <xsl:value-of select="sum(exsl:node-set($stackspace_widths_)/STACKSPACE/@WIDTH) - $extSpaceWest_W_"/>
-</xsl:template>
-
-</xsl:stylesheet>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Globals.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Globals.xsl
deleted file mode 100644
index 87bd7f3992..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Globals.xsl
+++ /dev/null
@@ -1,115 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<xsl:variable name="G_ROOT" select="/"/>
-
-<!--
- ===========================================================================
- CALCULATE GLOBAL VARIABLES BASED ON BLKDIAGRAM DEF IN INPUT XML
- ===========================================================================
--->
-
-<xsl:variable name="G_Total_StandAloneMpmc_H">
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/MPMCSHAPE">
- <xsl:value-of select="($BLKD_MPMC_MOD_H + $BLKD_MPMC2PROC_GAP)"/>
- </xsl:if>
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/MPMCSHAPE)">0</xsl:if>
-</xsl:variable>
-
-<xsl:variable name="G_Max_Stack_BlwSbs_H">
- <xsl:call-template name="F_Calc_Max_Stack_BlwSbs_Height"/>
-</xsl:variable>
-
-<xsl:variable name="G_Max_Stack_AbvSbs_H">
- <xsl:call-template name="F_Calc_Max_Stack_AbvSbs_Height"/>
-</xsl:variable>
-
-<xsl:variable name="G_Total_Stacks_W">
- <xsl:call-template name="F_Calc_Stack_X">
- <xsl:with-param name="iStackIdx" select="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH)"/>
- </xsl:call-template>
-</xsl:variable>
-
-<xsl:variable name="G_NumOfSharedBusses" select="count($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSSHAPES/MODULE)"/>
-<xsl:variable name="G_Total_SharedBus_H" select="($G_NumOfSharedBusses * $BLKD_SBS_LANE_H)"/>
-
-<xsl:variable name="G_NumOfBridges" select="count($G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE)"/>
-<xsl:variable name="G_Total_Bridges_W" select="(($G_NumOfBridges * ($BLKD_MOD_W + ($BLKD_BUS_LANE_W * 2))) + $BLKD_BRIDGE_GAP)"/>
-
-<xsl:variable name="G_Total_DrawArea_CLC" select="($G_Total_Stacks_W + $G_Total_Bridges_W + ($BLKD_INNER_GAP * 2))"/>
-
-<xsl:variable name="G_Total_DrawArea_W">
- <xsl:if test="$G_Total_DrawArea_CLC > ($BLKD_KEY_W + $BLKD_SPECS_W + $BLKD_SPECS2KEY_GAP)">
- <xsl:value-of select="$G_Total_DrawArea_CLC"/>
- </xsl:if>
- <xsl:if test="not($G_Total_DrawArea_CLC > ($BLKD_KEY_W + $BLKD_SPECS2KEY_GAP + $BLKD_SPECS_W))">
- <xsl:value-of select="($BLKD_KEY_W + $BLKD_SPECS_W + $BLKD_SPECS2KEY_GAP)"/>
- </xsl:if>
-</xsl:variable>
-
-<xsl:variable name="G_IpBucketMods_H">
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/IPBUCKET/@MODS_H"><xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/IPBUCKET/@MODS_H"/></xsl:if>
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/IPBUCKET/@MODS_H)">0</xsl:if>
-</xsl:variable>
-<xsl:variable name="G_Total_IpBucket_H" select="($G_IpBucketMods_H * ($BLKD_MOD_H + $BLKD_BIF_H))"/>
-
-<xsl:variable name="G_Total_UnkBucket_H">
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET">
-
- <xsl:variable name="unkBucketMods_H_">
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@MODS_H"><xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@MODS_H"/></xsl:if>
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@MODS_H)">0</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="total_UnkMod_H_" select="($unkBucketMods_H_ * ($BLKD_MOD_H + $BLKD_BIF_H))"/>
-
- <xsl:variable name="unkBucketBifs_H_">
- <xsl:if test="/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@BIFS_H"><xsl:value-of select="/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@BIFS_H"/></xsl:if>
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/@BIFS_H)">0</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="total_UnkBif_H_" select="($unkBucketBifs_H_ * ($BLKD_MOD_H + $BLKD_BIF_H))"/>
-
- <xsl:value-of select="($total_UnkBif_H_ + $total_UnkMod_H_)"/>
- </xsl:if>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET)">0</xsl:if>
-</xsl:variable>
-
-<xsl:variable name="G_SharedBus_Y" select="($BLKD_INNER_Y + $G_Total_StandAloneMpmc_H + $G_Max_Stack_AbvSbs_H + $BLKD_PROC2SBS_GAP)"/>
-
-<!-- ===========================================================================
- Calculate the width of the Block Diagram based on the total number of
- buslanes and modules in the design. If there are no buslanes or modules,
- a default width, just wide enough to display the KEY and SPECS is used
- =========================================================================== -->
-<xsl:variable name="G_Total_Blkd_W" select="($G_Total_DrawArea_W + (($BLKD_PRTCHAN_W + $BLKD_IORCHAN_W)* 2))"/>
-<xsl:variable name="G_Total_Diag_W" select="$G_Total_Blkd_W"/>
-
-<!-- =========================================================================== -->
-<!-- Calculate the height of the Block Diagram based on the total number of -->
-<!-- buslanes and modules in the design. Take into account special shapes such -->
-<!-- as MultiProc shapes. -->
-<!-- =========================================================================== -->
-
-
-<xsl:variable name="G_Total_DrawArea_H" select="($G_Total_StandAloneMpmc_H + $G_Max_Stack_AbvSbs_H + $BLKD_PROC2SBS_GAP + $G_Total_SharedBus_H + $G_Max_Stack_BlwSbs_H + $BLKD_SBS2IP_GAP + $G_Total_IpBucket_H + $BLKD_IP2UNK_GAP + $G_Total_UnkBucket_H + ($BLKD_INNER_GAP * 2))"/>
-<xsl:variable name="G_Total_Blkd_H" select="($G_Total_DrawArea_H + (($BLKD_PRTCHAN_H + $BLKD_IORCHAN_H)* 2))"/>
-
-<xsl:variable name="G_Total_Diag_H">
- <xsl:if test="($IN_TESTMODE = 'TRUE')">
- <xsl:message>Generating Blkdiagram in TestMode </xsl:message>
- <xsl:value-of select="$G_Total_Blkd_H"/>
- </xsl:if>
- <xsl:if test="(not($IN_TESTMODE) or ($IN_TESTMODE = 'FALSE'))">
- <xsl:value-of select="($G_Total_Blkd_H + $BLKD_DRAWAREA2KEY_GAP + $BLKD_KEY_H)"/>
- </xsl:if>
-</xsl:variable>
-
-</xsl:stylesheet>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_IOPorts.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_IOPorts.xsl
deleted file mode 100644
index 4a9d671424..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_IOPorts.xsl
+++ /dev/null
@@ -1,495 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-<xsl:stylesheet version="1.0"
- xmlns:svg="http://www.w3.org/2000/svg"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-<!--
-<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
- doctype-public="-//W3C//DTD SVG Tiny 1.1//EN"
- doctype-system="http://www.w3.org/Graphics/SVG/1.1/DTD/svg11-tiny.dtd"/>
--->
-
-<!-- ======================= DEF BLOCK =============================== -->
-<xsl:template name="Define_IOPorts">
-
- <xsl:variable name="key_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'KEY'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="key_lt_col_">
- <xsl:call-template name="F_BusStd2RGB_LT">
- <xsl:with-param name="iBusStd" select="'KEY'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <g id="G_IOPort">
- <rect
- x="0"
- y="0"
- width= "{$BLKD_IOP_W}"
- height="{$BLKD_IOP_H}"
- fill="{$COL_IORING_LT}"
- stroke="{$COL_IORING}"
- stroke-width="1"/>
-
- <path d="M 0,0
- L {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
- L 0,{$BLKD_IOP_H}
- Z"
- stroke="none"
- fill="{$COL_SYSPRT}"/>
- </g>
-
- <g id="G_BIPort">
- <rect
- x="0"
- y="0"
- width= "{$BLKD_IOP_W}"
- height="{$BLKD_IOP_H}" style="fill:{$COL_IORING_LT}; stroke:{$COL_IORING}; stroke-width:1"/>
-
- <path class="btop"
- d="M 0,{ceiling($BLKD_IOP_H div 2)}
- {ceiling($BLKD_IOP_W div 2)},0
- {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
- Z" style="stroke:none; fill:{$COL_SYSPRT}"/>
-
- <path class="bbot"
- d="M 0,{ceiling($BLKD_IOP_H div 2)}
- {ceiling($BLKD_IOP_W div 2)},{$BLKD_IOP_H}
- {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
- Z" style="stroke:none; fill:{$COL_SYSPRT}"/>
-
- </g>
-
- <g id="KEY_IOPort">
- <rect
- x="0"
- y="0"
- width= "{$BLKD_IOP_W}"
- height="{$BLKD_IOP_H}" style="fill:{$key_lt_col_}; stroke:none;"/>
-
- <path class="ioport"
- d="M 0,0
- L {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
- L 0,{$BLKD_IOP_H}
- Z" style="stroke:none; fill:{$key_col_}"/>
- </g>
-
- <g id="KEY_BIPort">
- <rect
- x="0"
- y="0"
- width= "{$BLKD_IOP_W}"
- height="{$BLKD_IOP_H}" style="fill:{$key_lt_col_}; stroke:none;"/>
-
- <path class="btop"
- d="M 0,{ceiling($BLKD_IOP_H div 2)}
- {ceiling($BLKD_IOP_W div 2)},0
- {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
- Z" style="stroke:none; fill:{$key_col_}"/>
-
- <path class="bbot"
- d="M 0,{ceiling($BLKD_IOP_H div 2)}
- {ceiling($BLKD_IOP_W div 2)},{$BLKD_IOP_H}
- {$BLKD_IOP_W},{ceiling($BLKD_IOP_H div 2)}
- Z" style="stroke:none; fill:{$key_col_}"/>
- </g>
-
- <g id="KEY_INPort">
- <use x="0" y="0" xlink:href="#KEY_IOPort"/>
- <rect
- x="{$BLKD_IOP_W}"
- y="0"
- width= "{ceiling($BLKD_IOP_W div 2)}"
- height="{$BLKD_IOP_H}" style="fill:{$COL_SYSPRT}; stroke:none;"/>
- </g>
-
- <g id="KEY_OUTPort">
- <use x="0" y="0" xlink:href="#KEY_IOPort" transform="scale(-1,1) translate({$BLKD_IOP_W * -1},0)"/>
- <rect
- x="{$BLKD_IOP_W}"
- y="0"
- width= "{ceiling($BLKD_IOP_W div 2)}"
- height="{$BLKD_IOP_H}" style="fill:{$COL_SYSPRT}; stroke:none;"/>
- </g>
-
- <g id="KEY_INOUTPort">
- <use x="0" y="0" xlink:href="#KEY_BIPort"/>
- <rect
- x="{$BLKD_IOP_W}"
- y="0"
- width= "{ceiling($BLKD_IOP_W div 2)}"
- height="{$BLKD_IOP_H}" style="fill:{$COL_SYSPRT}; stroke:none;"/>
- </g>
-</xsl:template>
-
-<!-- ======================= DRAW BLOCK =============================== -->
-
-<xsl:template name="Draw_IOPorts">
-
- <xsl:variable name="ports_count_" select="count($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT)"/>
-
- <xsl:if test="($ports_count_ > 30)">
- <xsl:call-template name="Draw_IOPorts_4Sides"/>
- </xsl:if>
-
- <xsl:if test="($ports_count_ <= 30)">
- <xsl:call-template name="Draw_IOPorts_2Sides"/>
- </xsl:if>
-</xsl:template>
-
-<xsl:template name="Draw_IOPorts_2Sides">
-
- <xsl:variable name="ports_count_" select="count($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT)"/>
- <xsl:variable name="ports_per_side_" select="ceiling($ports_count_ div 2)"/>
-
- <xsl:variable name="h_ofs_">
- <xsl:value-of select="$BLKD_PRTCHAN_W + ceiling(($G_Total_DrawArea_W - (($ports_per_side_ * $BLKD_IOP_W) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
- </xsl:variable>
-
- <xsl:variable name="v_ofs_">
- <xsl:value-of select="$BLKD_PRTCHAN_H + ceiling(($G_Total_DrawArea_H - (($ports_per_side_ * $BLKD_IOP_H) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
- </xsl:variable>
-
-
- <xsl:for-each select="EXTERNALPORTS/PORT">
- <xsl:sort data-type="number" select="@INDEX" order="ascending"/>
-
- <xsl:variable name="poffset_" select="0"/>
- <xsl:variable name="pcount_" select="$poffset_ + (position() -1)"/>
-
- <xsl:variable name="pdir_">
- <xsl:choose>
- <xsl:when test="(@DIR='I' or @DIR='IN' or @DIR='INPUT')">I</xsl:when>
- <xsl:when test="(@DIR='O' or @DIR='OUT' or @DIR='OUTPUT')">O</xsl:when>
- <xsl:when test="(@DIR='IO' or @DIR='INOUT')">B</xsl:when>
- <xsl:otherwise>I</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="pside_">
- <xsl:choose>
- <xsl:when test="($pcount_ >= ($ports_per_side_ * 0) and ($pcount_ < ($ports_per_side_ * 1)))">W</xsl:when>
- <xsl:when test="($pcount_ >= ($ports_per_side_ * 1) and ($pcount_ < ($ports_per_side_ * 2)))">E</xsl:when>
- <xsl:otherwise>D</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="pdec_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')"><xsl:value-of select="($ports_per_side_ * 0)"/></xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="($ports_per_side_ * 1)"/></xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="px_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')"><xsl:value-of select="($BLKD_PRTCHAN_W - $BLKD_IOP_W)"/></xsl:when>
- <xsl:when test="($pside_ = 'S')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)) - 2)"/></xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="($BLKD_PRTCHAN_W + ($BLKD_IORCHAN_W * 2) + $G_Total_DrawArea_W)"/></xsl:when>
- <xsl:when test="($pside_ = 'N')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)))"/></xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="py_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
- <xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_PRTCHAN_H + ($BLKD_IORCHAN_H * 2) + $G_Total_DrawArea_H)"/></xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
- <xsl:when test="($pside_ = 'N')"><xsl:value-of select="($BLKD_PRTCHAN_H - $BLKD_IOP_H)"/></xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="prot_">
- <xsl:choose>
- <xsl:when test="(($pside_ = 'W') and ($pdir_ = 'I'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'S') and ($pdir_ = 'I'))">-90</xsl:when>
- <xsl:when test="(($pside_ = 'E') and ($pdir_ = 'I'))">180</xsl:when>
- <xsl:when test="(($pside_ = 'N') and ($pdir_ = 'I'))">90</xsl:when>
-
- <xsl:when test="(($pside_ = 'W') and ($pdir_ = 'O'))">180</xsl:when>
- <xsl:when test="(($pside_ = 'S') and ($pdir_ = 'O'))">90</xsl:when>
- <xsl:when test="(($pside_ = 'E') and ($pdir_ = 'O'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'N') and ($pdir_ = 'O'))">-90</xsl:when>
-
- <xsl:when test="(($pside_ = 'W') and ($pdir_ = 'B'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'S') and ($pdir_ = 'B'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'E') and ($pdir_ = 'B'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'N') and ($pdir_ = 'B'))">0</xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="txo_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')">-10</xsl:when>
- <xsl:when test="($pside_ = 'S')">6</xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="(($BLKD_IOP_W * 2) - 4)"/></xsl:when>
- <xsl:when test="($pside_ = 'N')">6</xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="tyo_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
- <xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_IOP_H * 2) + 4"/></xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
- <xsl:when test="($pside_ = 'N')">-2</xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="$pdir_ = 'B'">
- <use x="{$px_}"
- y="{$py_}"
- id="{@NAME}"
- xlink:href="#G_BIPort"
- transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
- </xsl:if>
-
- <xsl:if test="(($pside_ = 'S') and not($pdir_ = 'B'))">
- <rect
- x="{$px_}"
- y="{$py_}"
- width= "{$BLKD_IOP_W}"
- height="{$BLKD_IOP_H}" style="stroke:{$COL_IORING}; stroke-width:1"/>
- </xsl:if>
-
- <xsl:if test="not($pdir_ = 'B')">
- <use x="{$px_}"
- y="{$py_}"
- id="{@NAME}"
- xlink:href="#G_IOPort"
- transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
- </xsl:if>
-
- <text class="iopnumb"
- x="{$px_ + $txo_}"
- y="{$py_ + $tyo_}">
- <xsl:value-of select="@INDEX"/><tspan class="iopgrp"><xsl:value-of select="@GROUP"/></tspan>
- </text>
-
- </xsl:for-each>
-
-</xsl:template>
-
-
-<xsl:template name="Draw_IOPorts_4Sides">
-
- <xsl:variable name="ports_count_" select="count($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT)"/>
- <xsl:variable name="ports_per_side_" select="ceiling($ports_count_ div 4)"/>
-
- <xsl:variable name="h_ofs_">
- <xsl:value-of select="$BLKD_PRTCHAN_W + ceiling(($G_Total_DrawArea_W - (($ports_per_side_ * $BLKD_IOP_W) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
- </xsl:variable>
-
- <xsl:variable name="v_ofs_">
- <xsl:value-of select="$BLKD_PRTCHAN_H + ceiling(($G_Total_DrawArea_H - (($ports_per_side_ * $BLKD_IOP_H) + (($ports_per_side_ - 1) * $BLKD_IOP_SPC))) div 2)"/>
- </xsl:variable>
-
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT">
- <xsl:sort data-type="number" select="@INDEX" order="ascending"/>
-
- <xsl:variable name="poffset_" select="0"/>
- <xsl:variable name="pcount_" select="$poffset_ + (position() -1)"/>
-
- <xsl:variable name="pdir_">
- <xsl:choose>
- <xsl:when test="(@DIR='I' or @DIR='IN' or @DIR='INPUT')">I</xsl:when>
- <xsl:when test="(@DIR='O' or @DIR='OUT' or @DIR='OUTPUT')">O</xsl:when>
- <xsl:when test="(@DIR='IO' or @DIR='INOUT')">B</xsl:when>
- <xsl:otherwise>I</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="pside_">
- <xsl:choose>
- <xsl:when test="($pcount_ >= ($ports_per_side_ * 0) and ($pcount_ < ($ports_per_side_ * 1)))">W</xsl:when>
- <xsl:when test="($pcount_ >= ($ports_per_side_ * 1) and ($pcount_ < ($ports_per_side_ * 2)))">S</xsl:when>
- <xsl:when test="($pcount_ >= ($ports_per_side_ * 2) and ($pcount_ < ($ports_per_side_ * 3)))">E</xsl:when>
- <xsl:when test="($pcount_ >= ($ports_per_side_ * 3) and ($pcount_ < ($ports_per_side_ * 4)))">N</xsl:when>
- <xsl:otherwise>D</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="pdec_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')"><xsl:value-of select="($ports_per_side_ * 0)"/></xsl:when>
- <xsl:when test="($pside_ = 'S')"><xsl:value-of select="($ports_per_side_ * 1)"/></xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="($ports_per_side_ * 2)"/></xsl:when>
- <xsl:when test="($pside_ = 'N')"><xsl:value-of select="($ports_per_side_ * 3)"/></xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="px_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')"><xsl:value-of select="($BLKD_PRTCHAN_W - $BLKD_IOP_W)"/></xsl:when>
- <xsl:when test="($pside_ = 'S')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)) - 2)"/></xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="($BLKD_PRTCHAN_W + ($BLKD_IORCHAN_W * 2) + $G_Total_DrawArea_W)"/></xsl:when>
- <xsl:when test="($pside_ = 'N')"><xsl:value-of select="($h_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_W)))"/></xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="py_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
- <xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_PRTCHAN_H + ($BLKD_IORCHAN_H * 2) + $G_Total_DrawArea_H)"/></xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="($v_ofs_ + (((position() - 1) - $pdec_) * ($BLKD_IOP_SPC + $BLKD_IOP_H)))"/></xsl:when>
- <xsl:when test="($pside_ = 'N')"><xsl:value-of select="($BLKD_PRTCHAN_H - $BLKD_IOP_H)"/></xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="prot_">
- <xsl:choose>
- <xsl:when test="(($pside_ = 'W') and ($pdir_ = 'I'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'S') and ($pdir_ = 'I'))">-90</xsl:when>
- <xsl:when test="(($pside_ = 'E') and ($pdir_ = 'I'))">180</xsl:when>
- <xsl:when test="(($pside_ = 'N') and ($pdir_ = 'I'))">90</xsl:when>
-
- <xsl:when test="(($pside_ = 'W') and ($pdir_ = 'O'))">180</xsl:when>
- <xsl:when test="(($pside_ = 'S') and ($pdir_ = 'O'))">90</xsl:when>
- <xsl:when test="(($pside_ = 'E') and ($pdir_ = 'O'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'N') and ($pdir_ = 'O'))">-90</xsl:when>
-
- <xsl:when test="(($pside_ = 'W') and ($pdir_ = 'B'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'S') and ($pdir_ = 'B'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'E') and ($pdir_ = 'B'))">0</xsl:when>
- <xsl:when test="(($pside_ = 'N') and ($pdir_ = 'B'))">0</xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="txo_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')">-14</xsl:when>
- <xsl:when test="($pside_ = 'S')">8</xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="(($BLKD_IOP_W * 2) - 4)"/></xsl:when>
- <xsl:when test="($pside_ = 'N')">8</xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="tyo_">
- <xsl:choose>
- <xsl:when test="($pside_ = 'W')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
- <xsl:when test="($pside_ = 'S')"><xsl:value-of select="($BLKD_IOP_H * 2) + 4"/></xsl:when>
- <xsl:when test="($pside_ = 'E')"><xsl:value-of select="ceiling($BLKD_IOP_H div 2) + 6"/></xsl:when>
- <xsl:when test="($pside_ = 'N')">-2</xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="$pdir_ = 'B'">
- <use x="{$px_}"
- y="{$py_}"
- id="{@NAME}"
- xlink:href="#G_BIPort"
- transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
- </xsl:if>
-
- <xsl:if test="(($pside_ = 'S') and not($pdir_ = 'B'))">
- <rect
- x="{$px_}"
- y="{$py_}"
- width= "{$BLKD_IOP_W}"
- height="{$BLKD_IOP_H}" style="stroke:{$COL_IORING}; stroke-width:1"/>
- </xsl:if>
-
- <xsl:if test="not($pdir_ = 'B')">
- <use x="{$px_}"
- y="{$py_}"
- id="{@NAME}"
- xlink:href="#G_IOPort"
- transform="rotate({$prot_},{$px_ + ceiling($BLKD_IOP_W div 2)},{$py_ + ceiling($BLKD_IOP_H div 2)})"/>
- </xsl:if>
-
- <text class="iopnumb"
- x="{$px_ + $txo_}"
- y="{$py_ + $tyo_}"><xsl:value-of select="@INDEX"/><tspan class="iopgrp"><xsl:value-of select="@GROUP"/></tspan>
- </text>
-
- </xsl:for-each>
-
-</xsl:template>
-
-<xsl:template name="Define_ExtPortsTable">
-
-<!--
- <xsl:if test="$oriented_= 'WEST'"><xsl:value-of select="$proc2procX_ - (string-length(@BUSNAME) * 6)"/></xsl:if>
- <xsl:variable name="max_name_" select="math:max(string-length($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT/@NAME))"/>
- <xsl:variable name="max_sgnm_" select="math:max(string-length($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT/@SIGNAME))"/>
-
- <xsl:message>MAX NAME <xsl:value-of select="$max_name_"/></xsl:message>
- <xsl:message>MAX SIG <xsl:value-of select="$max_sgnm_"/></xsl:message>
--->
-
- <xsl:variable name="ext_ports_">
- <xsl:if test="not($G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT)">
- <EXTPORT NAME="__none__" SIGNAME="__none_" NAMELEN="0" SIGLEN="0"/>
- </xsl:if>
- <xsl:if test="$G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT">
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/EXTERNALPORTS/PORT">
- <EXTPORT NAME="{@NAME}" SIGNAME="{@SIGNAME}" NAMELEN="{string-length(@NAME)}" SIGLEN="{string-length(@SIGNAME)}"/>
- </xsl:for-each>
- </xsl:if>
- </xsl:variable>
-
- <xsl:variable name="max_name_" select="math:max(exsl:node-set($ext_ports_)/EXTPORT/@NAMELEN)"/>
- <xsl:variable name="max_sign_" select="math:max(exsl:node-set($ext_ports_)/EXTPORT/@SIGLEN)"/>
-
- <xsl:variable name="h_font_" select="12"/>
- <xsl:variable name="w_font_" select="12"/>
-
- <xsl:variable name="w_num_" select="($w_font_ * 5)"/>
- <xsl:variable name="w_dir_" select="($w_font_ * 3)"/>
- <xsl:variable name="w_lsbmsb_" select="($w_font_ * 9)"/>
- <xsl:variable name="w_attr_" select="($w_font_ * 4)"/>
- <xsl:variable name="w_name_" select="($w_font_ * $max_name_)"/>
- <xsl:variable name="w_sign_" select="($w_font_ * $max_sign_)"/>
-
- <xsl:variable name="w_table_" select="($w_num_ + $w_name_ + $w_dir_ + $w_sign_ + $w_attr_)"/>
-
-<!--
- <xsl:message>MAX NAME <xsl:value-of select="$max_name_"/></xsl:message>
- <xsl:message>MAX SIG <xsl:value-of select="$max_sign_"/></xsl:message>
-
- <xsl:message>W NUM <xsl:value-of select="$w_num_"/></xsl:message>
- <xsl:message>W DIR <xsl:value-of select="$w_dir_"/></xsl:message>
- <xsl:message>W NAM <xsl:value-of select="$w_name_"/></xsl:message>
- <xsl:message>W SIG <xsl:value-of select="$w_sign_"/></xsl:message>
- <xsl:message>W ATT <xsl:value-of select="$w_attr_"/></xsl:message>
-
- <xsl:message>W TABLE <xsl:value-of select="$w_table_"/></xsl:message>
--->
-
- <g id="BlkDiagram_ExtPortsTable">
- <rect
- x="0"
- y="0"
- width= "{$w_table_}"
- height="{$h_font_}" style="fill:{$COL_RED}; stroke:none; stroke-width:1"/>
- </g>
-
-
-
-</xsl:template>
-
-<!-- ======================= END MAIN BLOCK =========================== -->
-
-</xsl:stylesheet>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Main.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Main.xsl
deleted file mode 100644
index 7fe3adb352..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Main.xsl
+++ /dev/null
@@ -1,1566 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-
-<!--
- xmlns:svg="http://www.w3.org/2000/svg"
- ===============================================
- INCLUDES
- ===============================================
- -->
-<xsl:include href="MdtSvgBLKD_Dimensions.xsl"/>
-
-<xsl:include href="MdtSvgDiag_Colors.xsl"/>
-<xsl:include href="MdtSvgDiag_Globals.xsl"/>
-<xsl:include href="MdtSvgDiag_StyleDefs.xsl"/>
-
-<xsl:include href="MdtTinySvgDiag_BifShapes.xsl"/>
-
-<xsl:include href="MdtTinySvgBLKD_IOPorts.xsl"/>
-<xsl:include href="MdtTinySvgBLKD_Busses.xsl"/>
-<xsl:include href="MdtTinySvgBLKD_Globals.xsl"/>
-<xsl:include href="MdtTinySvgBLKD_Functions.xsl"/>
-<xsl:include href="MdtTinySvgBLKD_Peripherals.xsl"/>
-<xsl:include href="MdtTinySvgBLKD_Processors.xsl"/>
-<xsl:include href="MdtTinySvgBLKD_BusLaneSpaces.xsl"/>
-
-<xsl:output method="xml"
- version="1.0"
- indent="yes"
- encoding="UTF-8"
- doctype-public="-//W3C//DTD SVG 1.1//EN"
- doctype-system="http://www.w3.org/Graphics/SVG/1.1/svg11-tiny.dtd"/>
-
-<!--
- ===============================================
- PARAMETERS
- ===============================================
- -->
-
-<xsl:param name="ADD_VIEWBOX" select="'FALSE'"/>
-<xsl:param name="IN_TESTMODE" select="'FALSE'"/>
-
-
-<!--
-<xsl:param name="CSS_SVG_DIAGRAMS" select="'MdtSvgDiag_StyleDefs.css'"/>
-<xsl:param name="CSS_SVG_DIAGRAMS" select="'__INTERNAL__'"/>
- -->
-
-<!--
- ======================================================
- MAIN BLOCKDIAGRAM TEMPLATE
- ======================================================
--->
-<xsl:template match="EDKSYSTEM[not(BLKDIAGRAM)]">
- <xsl:message>ERROT: Project is missing BLKDIAGRAM Element. Cannot generate.</xsl:message>
-</xsl:template>
-
-<xsl:template match="EDKSYSTEM[BLKDIAGRAM]">
-
-<!--
-<xsl:message>STCK_W is <xsl:value-of select="$G_Total_Stacks_W"/></xsl:message>
-<xsl:message>BRDG_W is <xsl:value-of select="$G_Total_Bridges_W"/></xsl:message>
-<xsl:message>MPMC is <xsl:value-of select="$G_Total_StandAloneMpmc_H"/></xsl:message>
-<xsl:message>MPMC is <xsl:value-of select="$G_Total_StandAloneMpmc_H"/></xsl:message>
-<xsl:message>MABV is <xsl:value-of select="$G_Max_Stack_AbvSbs_H"/></xsl:message>
-<xsl:message>MBLW is <xsl:value-of select="$G_Max_Stack_BlwSbs_H"/></xsl:message>
-<xsl:message>IPBK is <xsl:value-of select="$G_Total_IpBucket_H"/></xsl:message>
-<xsl:message>Blkd Total is <xsl:value-of select="$blkd_H_"/></xsl:message>
-<xsl:message>max abv is <xsl:value-of select="$max_Stack_AbvSbs_H_"/></xsl:message>
-<xsl:message>max blw is <xsl:value-of select="$max_Stack_BlwSbs_H_"/></xsl:message>
-<xsl:message>Ip Bkt is <xsl:value-of select="$totalIpBkt_H_"/></xsl:message>
-<xsl:message>Sbs is <xsl:value-of select="$totalSbs_H_"/></xsl:message>
-<xsl:message>Unk Bkt is <xsl:value-of select="$totalUnkBkt_H_"/></xsl:message>
-<xsl:message>Blkd DrawArea height as <xsl:value-of select="$total_DrawArea_H_"/></xsl:message>
--->
-
-<!--specify a css for the file -->
-<!--
-<xsl:processing-instruction name="xml-stylesheet">href="<xsl:value-of select="$CSS_SVG_DIAGRAMS"/>" type="text/css"</xsl:processing-instruction>
-<xsl:variable name="BLKD_ZOOM_Y">
- <xsl:choose>
- <xsl:when test="($ADD_VIEWBOX = 'TRUE')">
- <xsl:value-of select="($G_Total_Diag_H * 2)"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
-</xsl:variable>
-<xsl:message>EDWVERSION is <xsl:value-of select="$G_ROOT/EDKSYSTEM/@EDWVERSION"/></xsl:message>
- -->
-
-<xsl:text> </xsl:text>
-<!--
-<svg width="{$G_Total_Diag_W}" height="{$G_Total_Diag_H}" viewBox="0 0 0 {$BLKD_ZOOM_Y}">
--->
-<svg width="{$G_Total_Diag_W}" height="{$G_Total_Diag_H}">
-<!--
- ===============================================
- Layout All the various definitions
- ===============================================
--->
- <defs>
-
- <!-- IO Port Defs -->
- <xsl:call-template name="Define_IOPorts"/>
-
- <!-- BIF Defs -->
- <xsl:call-template name="Define_ConnectedBifTypes"/>
-
- <!-- Bus Defs -->
- <xsl:call-template name="Define_Busses"/>
-
- <!-- Shared Bus Buckets Defs -->
- <xsl:call-template name="Define_SBSBuckets"/>
-
- <!-- IP Bucket Defs -->
- <xsl:call-template name="Define_IPBucket"/>
-
- <!-- Stack Defs -->
- <xsl:call-template name="Define_AllStacks"/>
-
- <!-- Space Defs -->
- <xsl:call-template name="Define_BusLaneSpaces"/>
-
- <!-- Main MPMC Defs -->
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/MPMCSHAPE">
- <xsl:call-template name="Define_StandAlone_MPMC"/>
- </xsl:if>
-
- <!-- Diagram Key Definition -->
- <xsl:call-template name="Define_BlkDiagram_Key"/>
-
- <!-- Diagram Specs Definition -->
- <xsl:call-template name="Define_BlkDiagram_Specs">
- <xsl:with-param name="iArch" select="SYSTEMINFO/@ARCH"/>
- <xsl:with-param name="iPart" select="SYSTEMINFO/@PART"/>
- <xsl:with-param name="iTimeStamp" select="@TIMESTAMP"/>
- <xsl:with-param name="iEdkVersion" select="@EDKVERSION"/>
- </xsl:call-template>
-
- </defs>
-
-<!-- =============================================== -->
-<!-- Draw Outlines -->
-<!-- =============================================== -->
-
- <!-- The surrounding black liner -->
- <rect x="0"
- y="0"
- width ="{$G_Total_Diag_W}"
- height="{$G_Total_Diag_H}"
- fill="{$COL_WHITE}"
- stroke="{$COL_BLACK}"
- stroke-width="4"/>
-
- <!-- The outer IO channel -->
- <rect x="{$BLKD_PRTCHAN_W}"
- y="{$BLKD_PRTCHAN_H}"
- width= "{$G_Total_Blkd_W - ($BLKD_PRTCHAN_W * 2)}"
- height="{$G_Total_Blkd_H - ($BLKD_PRTCHAN_H * 2)}" style="fill:{$COL_IORING}"/>
-
- <!-- The Diagram's drawing area -->
- <rect x="{$BLKD_PRTCHAN_W + $BLKD_IORCHAN_W}"
- y="{$BLKD_PRTCHAN_H + $BLKD_IORCHAN_H}"
- rx="8"
- ry="8"
- width= "{$G_Total_DrawArea_W}"
- height="{$G_Total_DrawArea_H}"
- fill="{$COL_BG}"/>
-
-<!-- =============================================== -->
-<!-- Draw All the various components -->
-<!-- =============================================== -->
-
- <!-- Layout the IO Ports -->
-<!--
- <xsl:if test="(not($IN_TESTMODE) or ($IN_TESTMODE = 'FALSE'))">
- <xsl:call-template name="Draw_IOPorts"/>
- </xsl:if>
- -->
-
- <!-- Layout the Shapes -->
- <xsl:call-template name="Draw_BlkDiagram_Shapes"/>
-
-</svg>
-
-<!-- ======================= END MAIN SVG BLOCK =============================== -->
-</xsl:template>
-
-<xsl:template name="Draw_BlkDiagram_Shapes">
-
- <!--
- ************************************************************
- *************** BEGIN DRAWING BLOCK DIAGRAM *************
- ************************************************************
- -->
-
- <!--
- ===========================================================
- Draw the Stand Alone MPMC, (if any)
- ===========================================================
- -->
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/MPMCSHAPE">
-
- <xsl:variable name="mpmc_inst_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/MPMCSHAPE/@INSTANCE"/>
-
- <use x="{$BLKD_INNER_X}" y="{$BLKD_INNER_Y}" xlink:href="#mpmcmodule_{$mpmc_inst_}"/>
- <!--
- ===========================================================
- Draw the connections to the Stand Alone MPMC
- ===========================================================
- -->
- <xsl:call-template name="Draw_BlkDiagram_StandAloneMpmcConnections"/>
- </xsl:if>
-
- <!--
- ===========================================================
- Draw the Stacks
- ===========================================================
- -->
- <xsl:call-template name="Draw_BlkDiagram_Stacks"/>
-
- <!--
- ===========================================================
- Draw the Bus Lane Spaces
- ===========================================================
- -->
- <xsl:call-template name="Draw_BlkDiagram_BusLaneSpaces"/>
-
- <!--
- ===========================================================
- Draw the shared busses
- ===========================================================
- -->
- <use x="{$BLKD_INNER_X}" y="{$G_SharedBus_Y}" xlink:href="#group_sharedBusses"/>
-
- <!--
- ===========================================================
- Draw the Bridges
- ===========================================================
- -->
- <xsl:call-template name="Draw_BlkDiagram_Bridges"/>
-
-
- <!--
- ===========================================================
- Draw the Ip Bucket
- ===========================================================
- -->
- <xsl:call-template name="Draw_BlkDiagram_IPBucket"/>
-
- <!--
- ===========================================================
- Draw the Key
- ===========================================================
- -->
- <xsl:if test="(not($IN_TESTMODE) or ($IN_TESTMODE = 'FALSE'))">
- <use x="{$G_Total_Blkd_W - $BLKD_KEY_W - $BLKD_PRTCHAN_W}" y="{$G_Total_Blkd_H + $BLKD_DRAWAREA2KEY_GAP - 8}" xlink:href="#BlkDiagram_Key"/>
- </xsl:if>
-
- <!--
- ===========================================================
- Draw the Specs
- ===========================================================
- -->
- <xsl:if test="(not($IN_TESTMODE) or ($IN_TESTMODE = 'FALSE'))">
- <use x="{$BLKD_PRTCHAN_W}" y="{$G_Total_Blkd_H + $BLKD_DRAWAREA2KEY_GAP - 8}" xlink:href="#BlkDiagram_Specs"/>
- </xsl:if>
-
- <!--
- ************************************************************
- *************** DONE DRAWING BLOCK DIAGRAM **************
- ************************************************************
- -->
-
-</xsl:template>
-
-
-<!-- ======================================================================= -->
-<!-- FUNCTION TEMPLATE -->
-<!-- -->
-<!-- Draw stacks on the Block Diagram -->
-<!-- ======================================================================= -->
-<xsl:template name="Draw_BlkDiagram_Stacks">
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(@EAST < $G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH)]">
-
- <xsl:variable name="stack_line_x_">
- <xsl:call-template name="F_Calc_Stack_X">
- <xsl:with-param name="iStackIdx" select="@EAST"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stack_abv_sbs_">
- <xsl:call-template name="F_Calc_Stack_AbvSbs_Height">
- <xsl:with-param name="iStackIdx" select="@EAST"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="bridges_w_" select="(($G_NumOfBridges * ($BLKD_MOD_W + ($BLKD_BUS_LANE_W * 2))) + $BLKD_BRIDGE_GAP)"/>
-
- <xsl:variable name="stack_y_" select="($G_SharedBus_Y - $stack_abv_sbs_ - $BLKD_PROC2SBS_GAP)"/>
- <xsl:variable name="stack_x_" select="($BLKD_INNER_X + $stack_line_x_ + $bridges_w_)"/>
-
- <xsl:variable name="stack_name_">
- <xsl:call-template name="F_generate_Stack_Name">
- <xsl:with-param name="iHorizIdx" select="@EAST"/>
- </xsl:call-template>
- </xsl:variable>
-
- <use x="{$stack_x_}" y="{$stack_y_}" xlink:href="#{$stack_name_}"/>
-
- </xsl:for-each>
-
-</xsl:template>
-
-<xsl:template name="Draw_BlkDiagram_StandAloneMpmcConnections">
-
- <xsl:variable name="mpmcInst_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/MPMCSHAPE/@INSTANCE"/>
- <xsl:variable name="lastStack_" select="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH) - 1"/>
-
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE">
- <xsl:variable name="currentLane_" select="position()"/>
-<!--
- <xsl:message>Current lane <xsl:value-of select="$currentLane_"/></xsl:message>
--->
- <xsl:variable name="stackToEast_">
- <xsl:choose>
- <xsl:when test="not(@WEST = $lastStack_)"><xsl:value-of select="@EAST"/></xsl:when>
- <xsl:when test=" (@WEST = $lastStack_)"><xsl:value-of select="'NONE'"/></xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="stackToWest_">
- <xsl:choose>
- <xsl:when test="not(@WEST = $lastStack_)"><xsl:value-of select="'NONE'"/></xsl:when>
- <xsl:when test=" (@WEST = $lastStack_)"><xsl:value-of select="@WEST"/></xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="spaceAbvSbs_H_">
- <xsl:call-template name="F_Calc_Space_AbvSbs_Height">
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_y_" select="($G_SharedBus_Y - $spaceAbvSbs_H_ - $BLKD_PROC2SBS_GAP)"/>
-
-<!--
- <xsl:message>Stack To East <xsl:value-of select="$stackToEast_"/></xsl:message>
- <xsl:message>Stack To West <xsl:value-of select="$stackToWest_"/></xsl:message>
- <xsl:variable name="space_X_">
- <xsl:call-template name="F_Calc_Space_X">
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- </xsl:call-template>
- </xsl:variable>
- <xsl:variable name="space_y_" select="($G_SharedBus_Y - $spaceAbvSbs_H_ - $BLKD_PROC2SBS_GAP)"/>
- <xsl:variable name="space_x_" select="($BLKD_INNER_X + $G_Total_Bridges_W + $space_line_x_)"/>
--->
-
-
- <xsl:for-each select="BUSCONNLANE[@IS_MPMCCONN]">
-
-<!--
- <xsl:variable name="bifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = BUSCONN/@INSTANCE)]/BUSINTERFACE[(@BUSNAME = @BUSNAME)]/@BIF_X"/>
--->
- <xsl:variable name="bifInst_" select="BUSCONN/@INSTANCE"/>
- <xsl:variable name="busName_" select="@BUSNAME"/>
- <xsl:variable name="bifSide_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $bifInst_)]/BUSINTERFACE[(@BUSNAME = $busName_)]/@BIF_X"/>
-
- <xsl:variable name="mpmcBifName_">
- <xsl:choose>
- <xsl:when test=" (@IS_SBSCONN)"><xsl:value-of select="BUSCONN/@BUSINTERFACE"/></xsl:when>
- <xsl:when test="not(@IS_SBSCONN)"><xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $mpmcInst_)]/BUSINTERFACE[(@BUSNAME = $busName_)]/@NAME"/></xsl:when>
- <xsl:otherwise><xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $mpmcInst_)]/BUSINTERFACE[(@BUSNAME = $busName_)]/@NAME"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message>MPMC Bif Name <xsl:value-of select="$mpmcBifName_"/></xsl:message>
- <xsl:message>Bif Side <xsl:value-of select="$bifSide_"/></xsl:message>
- <xsl:message>Bus Name <xsl:value-of select="@BUSNAME"/></xsl:message>
- <xsl:message>Instance <xsl:value-of select="$bifInst_"/></xsl:message>
- <xsl:message>Space line x <xsl:value-of select="$space_line_X_"/></xsl:message>
--->
- <xsl:variable name="space_line_X_">
- <xsl:call-template name="F_Calc_Space_X">
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_X_" select="($BLKD_INNER_X + $G_Total_Bridges_W + $space_line_X_)"/>
-
- <xsl:variable name = "stackToWest_W_">
- <xsl:choose>
- <xsl:when test="(($stackToEast_ = '0') and ($stackToWest_ = 'NONE'))">0</xsl:when>
- <xsl:when test="(($stackToEast_ = 'NONE') and not($stackToWest_ = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="$stackToWest_"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:when test="(not($stackToEast_ = '0') and not($stackToEast_ = 'NONE') and ($stackToWest_ = 'NONE'))">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="($stackToEast_ - 1)"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name = "stackToEast_W_">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="$stackToEast_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name ="extSpaceWest_W_" select="ceiling($stackToWest_W_ div 2)"/>
- <xsl:variable name ="extSpaceEast_W_" select="ceiling($stackToEast_W_ div 2)"/>
- <xsl:variable name="laneInSpace_X_">
- <xsl:choose>
- <xsl:when test="(@ORIENTED = 'EAST')">
- <xsl:value-of select="($extSpaceWest_W_ + (@BUSLANE_X * $BLKD_BUS_LANE_W) - $BLKD_BUS_ARROW_W - $BLKD_P2P_BUS_W)"/>
-<!--
- <xsl:value-of select="($extSpaceWest_W_ + (@BUSLANE_X * $BLKD_BUS_LANE_W) - $BLKD_BUS_LANE_W - $BLKD_BUS_ARROW_W - $BLKD_P2P_BUS_W)"/>
--->
- </xsl:when>
- <xsl:otherwise><xsl:value-of select="($extSpaceWest_W_ + (@BUSLANE_X * $BLKD_BUS_LANE_W))"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="lane_X_" select="($space_X_ + $laneInSpace_X_)"/>
-
- <xsl:variable name="mpmcBifType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $mpmcInst_)]/BUSINTERFACE[(@NAME = $mpmcBifName_)]/@TYPE"/>
-
- <!--
- <xsl:variable name="bc_X_" select="($lane_X_ + ceiling($BLKD_BIFC_W div 2) - ceiling($BLKD_BUS_ARROW_W div 2))"/>
- <xsl:variable name="bc_X_" select="($lane_X_ + ceiling($BLKD_BIFC_W div 2) - ceiling($BLKD_BUS_ARROW_W div 2))"/>
- <xsl:variable name="bc_X_" select="($lane_X_ + ceiling($BLKD_BIFC_W div 2))"/>
- -->
-
- <xsl:variable name="bc_Y_" select="($BLKD_INNER_Y + $BLKD_MPMC_MOD_H)"/>
- <xsl:variable name="bc_X_" >
- <xsl:choose>
- <xsl:when test="($bifSide_ = '0')"><xsl:value-of select="($lane_X_ + ceiling($BLKD_BIFC_W div 2))"/></xsl:when>
- <xsl:when test="($bifSide_ = '1')"><xsl:value-of select="($lane_X_ + $BLKD_BIFC_dx)"/></xsl:when>
- <xsl:otherwise> <xsl:value-of select="($lane_X_ + ceiling($BLKD_BIFC_W div 2))"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
- </xsl:variable>
-
- <!-- Place the MPMC bif label -->
- <xsl:variable name="bcl_X_" select="($bc_X_ + ceiling($BLKD_BIFC_W div 2) - ceiling($BLKD_BIF_W div 2))"/>
- <xsl:variable name="bcl_Y_" select="($bc_Y_ - $BLKD_BIF_H - $BLKD_MOD_BIF_GAP_H)"/>
- <use x="{$bcl_X_}" y="{$bcl_Y_}" xlink:href="#{@BUSSTD}_BifLabel"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($bcl_X_ + ceiling($BLKD_BIF_W div 2))"/>
- <xsl:with-param name="iY" select="($bcl_Y_ + ceiling($BLKD_BIF_H div 2) + 3)"/>
- <xsl:with-param name="iText" select="$mpmcBifName_"/>
- <xsl:with-param name="iClass" select="'mpmc_biflabel'"/>
- </xsl:call-template>
-
- <!-- Place the MPMC bif -->
- <use x="{$bc_X_}" y="{$bc_Y_}" xlink:href="#{@BUSSTD}_busconn_{$mpmcBifType_}"/>
-<!--
--->
-
- <xsl:variable name="bcArrow_X_" select="($bc_X_ + ceiling($BLKD_BIFC_W div 2) - ceiling($BLKD_BUS_ARROW_H div 2))"/>
- <xsl:variable name="bcArrow_Y_" select="($bc_Y_ + $BLKD_BIFC_H - 3)"/>
-
- <!-- Place the MPMC Arrow -->
- <use x="{$bcArrow_X_}" y="{$bcArrow_Y_}" xlink:href="#{@BUSSTD}_BusArrowNorth"/>
-
- <!--
- Place a block to cover the gap btw MPMC and top of Bus Lane Space, or to the correct SBS
- For non SBS connections a vertical block will already have been drawn to the top of the
- space.
- -->
-
- <xsl:variable name="sbsDy_">
- <xsl:choose>
- <xsl:when test="@IS_SBSCONN"><xsl:value-of select="2 + ($G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $busName_)]/@BUS_INDEX * $BLKD_SBS_LANE_H)"/></xsl:when>
- <xsl:when test="not(@IS_SBSCONN)">0</xsl:when>
- <xsl:otherwise>0></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="mpmcBusHeight_">
- <xsl:choose>
- <xsl:when test="(@IS_SBSCONN)"><xsl:value-of select="($G_SharedBus_Y - ($bcArrow_Y_ + $BLKD_BUS_ARROW_W + 4) + $sbsDy_)"/></xsl:when>
- <xsl:when test="not(@IS_SBSCONN)">
- <xsl:choose>
- <xsl:when test="($space_y_ >= ($bcArrow_Y_ + $BLKD_BUS_ARROW_W + 4 + $sbsDy_))">
- <xsl:value-of select="($space_y_ - ($bcArrow_Y_ + $BLKD_BUS_ARROW_W + 4 + $sbsDy_))"/>
- </xsl:when>
- <xsl:when test="($space_y_ < ($bcArrow_Y_ + $BLKD_BUS_ARROW_W + 4 + $sbsDy_))">
- <xsl:value-of select="(($bcArrow_Y_ + $BLKD_BUS_ARROW_W + 4 + $sbsDy_) - $space_y_)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:when>
- <xsl:otherwise><xsl:value-of select="$BLKD_BIFC_H"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <rect x="{$bcArrow_X_ + $BLKD_BUS_ARROW_G}"
- y="{$bcArrow_Y_ + $BLKD_BUS_ARROW_W + 4}"
- width= "{$BLKD_P2P_BUS_W}"
- height="{$mpmcBusHeight_}"
- style="stroke:none; fill:{$busColor_}"/>
-
- <!-- place the bus label here -->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($bcArrow_X_ + $BLKD_BUS_ARROW_W + 6)"/>
- <xsl:with-param name="iY" select="($bcArrow_Y_ + ceiling($mpmcBusHeight_ div 2) + 6)"/>
- <xsl:with-param name="iText" select="$busName_"/>
- <xsl:with-param name="iClass" select="'p2pbus_label'"/>
- </xsl:call-template>
-
- </xsl:for-each>
- </xsl:for-each>
-
-</xsl:template>
-
-
-<!-- ======================================================================= -->
-<!-- FUNCTION TEMPLATE -->
-<!-- -->
-<!-- Draw bus lane spaces on the Block Diagram -->
-<!-- ======================================================================= -->
-<xsl:template name="Draw_BlkDiagram_BusLaneSpaces">
-
- <xsl:variable name="lastStack_" select="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH) - 1"/>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[@EAST]">
- <xsl:sort select="@EAST" data-type="number"/>
-
- <xsl:call-template name="Draw_BlkDiagram_BusLaneSpace">
- <xsl:with-param name="iStackToEast" select="@EAST"/>
- </xsl:call-template>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(@WEST = $lastStack_)]">
- <xsl:call-template name="Draw_BlkDiagram_BusLaneSpace">
- <xsl:with-param name="iStackToWest" select="$lastStack_"/>
- </xsl:call-template>
- </xsl:for-each>
-
-</xsl:template>
-
-<xsl:template name="Draw_BlkDiagram_BusLaneSpace">
-
- <xsl:param name="iStackToEast" select="'NONE'"/>
- <xsl:param name="iStackToWest" select="'NONE'"/>
-
- <xsl:variable name="spaceAbvSbs_H_">
- <xsl:call-template name="F_Calc_Space_AbvSbs_Height">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="spaceBlwSbs_H_">
- <xsl:call-template name="F_Calc_Space_BlwSbs_Height">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_line_x_">
- <xsl:call-template name="F_Calc_Space_X">
- <xsl:with-param name="iStackToEast" select="$iStackToEast"/>
- <xsl:with-param name="iStackToWest" select="$iStackToWest"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="space_y_" select="($G_SharedBus_Y - $spaceAbvSbs_H_ - $BLKD_PROC2SBS_GAP)"/>
- <xsl:variable name="space_x_" select="($BLKD_INNER_X + $G_Total_Bridges_W + $space_line_x_)"/>
-
- <xsl:variable name="stackToEast_">
- <xsl:choose>
- <xsl:when test="not($iStackToEast = 'NONE')"><xsl:value-of select="$iStackToEast"/></xsl:when>
- <xsl:otherwise>NONE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="stackToWest_">
- <xsl:choose>
- <xsl:when test=" not($iStackToWest = 'NONE')"><xsl:value-of select="$iStackToWest"/></xsl:when>
- <xsl:when test="(not($iStackToEast = 'NONE') and not($iStackToEast = '0'))"><xsl:value-of select="($iStackToEast - 1)"/></xsl:when>
- <xsl:otherwise>NONE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="space_Name_">
- <xsl:call-template name="F_generate_Space_Name">
- <xsl:with-param name="iStackToEast" select="$stackToEast_"/>
- <xsl:with-param name="iStackToWest" select="$stackToWest_"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>StackToEast is <xsl:value-of select="$iStackToEast"/></xsl:message>
- <xsl:message>StackToWest is <xsl:value-of select="$iStackToWest"/></xsl:message>
- <xsl:message>SpaceName is <xsl:value-of select="$space_Name_"/></xsl:message>
--->
-
- <use x="{$space_x_}" y="{$space_y_}" xlink:href="#{$space_Name_}"/>
-
-</xsl:template>
-
-
-<!-- =========================================================================== -->
-<!-- FUNCTION TEMPLATE -->
-<!-- -->
-<!-- Draw Bridges on the Block Diagram -->
-<!-- =========================================================================== -->
-<xsl:template name="Draw_BlkDiagram_Bridges">
-
- <!-- First save all the bridge indexs in a variable -->
- <xsl:variable name="bridgeShapes_">
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE/BUSCONNS[(@ORIENTED = 'WEST')]/BUSCONN">
- <BRIDGE BUS_INDEX="{@BUS_INDEX}" INSTANCE="{../../@INSTANCE}" POSITION="{(position() -1)}"/>
- <BRIDGECONN BUS_INDEX="{@BUS_INDEX}" INSTANCE="{../../@INSTANCE}" ORIENTED="{../@ORIENTED}" POSITION="{(position() - 1)}" BUSSTD="{@BUSSTD}" TYPE="{@TYPE}"/>
- <!-- So both bus conns have same position.... -->
- <xsl:if test="../../BUSCONNS[(@ORIENTED = 'EAST')]">
- <BRIDGECONN BUS_INDEX="{../../BUSCONNS[(@ORIENTED ='EAST')]/BUSCONN/@BUS_INDEX}" INSTANCE="{../../@INSTANCE}" ORIENTED="EAST" POSITION="{(position() - 1)}" BUSSTD="{../../BUSCONNS[(@ORIENTED = 'EAST')]/BUSCONN/@BUSSTD}" TYPE="{../../BUSCONNS[(@ORIENTED = 'EAST')]/BUSCONN/@TYPE}"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:variable>
-<!--
- <xsl:message>Found an east connection on <xsl:value-of select="../../@INSTANCE"/></xsl:message>
--->
- <!-- Now layout the bridge shapes between the shared busses -->
- <xsl:for-each select="exsl:node-set($bridgeShapes_)/BRIDGE">
- <xsl:sort select="@POSITION" data-type="number"/>
-
- <xsl:variable name="brdgPosition_" select="@POSITION"/>
- <xsl:variable name="brdgInstance_" select="@INSTANCE"/>
-
- <xsl:variable name="min_bus_idx_" select="math:min(exsl:node-set($bridgeShapes_)/BRIDGECONN[(@POSITION = $brdgPosition_)]/@BUS_INDEX)"/>
-<!--
- <xsl:variable name="max_bus_idx_" select="math:max(exsl:node-set($bridgeShapes_)/BRIDGECONN[(@POSITION = $brdgPosition_)]/@BUS_INDEX)"/>
-
- <xsl:message>Maximum index <xsl:value-of select="$max_bus_idx_"/></xsl:message>
- <xsl:message>Minimum index <xsl:value-of select="$min_bus_idx_"/></xsl:message>
--->
-
-
- <xsl:variable name="brdg_X_" select="($BLKD_INNER_X + $BLKD_BRIDGE_GAP + $BLKD_BUS_LANE_W + (@POSITION * ($BLKD_MOD_W + ($BLKD_BUS_LANE_W * 2))))"/>
- <xsl:variable name="brdg_Y_" select="($G_SharedBus_Y + ($min_bus_idx_ * $BLKD_SBS_LANE_H) + ceiling($BLKD_SBS_LANE_H div 2) - ceiling($BLKD_MOD_H div 2))"/>
-
- <use x="{$brdg_X_}" y="{$brdg_Y_}" xlink:href="#symbol_{$brdgInstance_}"/>
- </xsl:for-each>
-
-
-
-<!--
- <xsl:message>Found <xsl:value-of select="count(exsl:node-set($bridgeShapes_)/BRIDGECONN)"/> busconns </xsl:message>
- <xsl:message>Drawing connection for bridge <xsl:value-of select="$brdgInstance_"/> at <xsl:value-of select="@POSITION"/> </xsl:message>
--->
-
- <xsl:for-each select="exsl:node-set($bridgeShapes_)/BRIDGECONN">
- <xsl:sort select="@POSITION" data-type="number"/>
-
- <xsl:variable name="brdgInstance_" select="@INSTANCE"/>
- <xsl:variable name="brdgPosition_" select="@POSITION"/>
-
- <xsl:variable name="busColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="min_bus_idx_" select="math:min(exsl:node-set($bridgeShapes_)/BRIDGECONN[(@POSITION = $brdgPosition_)]/@BUS_INDEX)"/>
- <xsl:variable name="brdg_Y1_" select="($G_SharedBus_Y + ($min_bus_idx_ * $BLKD_SBS_LANE_H) + ceiling($BLKD_SBS_LANE_H div 2) - ceiling($BLKD_MOD_H div 2))"/>
- <xsl:variable name="brdg_X_" select="($BLKD_INNER_X + $BLKD_BRIDGE_GAP + $BLKD_BUS_LANE_W + (@POSITION * ($BLKD_MOD_W + ($BLKD_BUS_LANE_W * 2))))"/>
-
- <xsl:variable name="bc_Y_" select="$brdg_Y1_ + $BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V + ceiling($BLKD_BIF_H div 2) - ceiling($BLKD_BIFC_H div 2)"/>
- <xsl:variable name="bc_X_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="($brdg_X_ - $BLKD_BIFC_W)"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="($brdg_X_ + $BLKD_MOD_W)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <!-- Layout the bus conn -->
- <use x="{$bc_X_}" y="{$bc_Y_}" xlink:href="#{@BUSSTD}_busconn_{@TYPE}"/>
-
- <!-- Figure out the positions of the lines -->
-
-<!--
- <xsl:variable name="vert_line_x_" select="$bc_X_ + ceiling($BLKD_BIFC_W div 2)"/>
- <xsl:message>vert line x <xsl:value-of select="$vert_line_x_"/></xsl:message>
- <xsl:message>bus index <xsl:value-of select="@BUS_INDEX"/></xsl:message>
--->
-
- <xsl:variable name="vert_line_x_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="($bc_X_ - ($BLKD_BUS_LANE_W - $BLKD_BIFC_W))"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="($bc_X_ + ($BLKD_BUS_LANE_W - $BLKD_P2P_BUS_W))"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <!-- At least one of the points is going to be the bus -->
-<!--
- <xsl:variable name="vert_line_y1_" select="($G_SharedBus_Y + $BLKD_PROC2SBS_GAP + (@BUS_INDEX * $BLKD_SBS_LANE_H))"/>
--->
- <xsl:variable name="vert_line_y1_" select="($G_SharedBus_Y + (@BUS_INDEX * $BLKD_SBS_LANE_H))"/>
- <xsl:variable name="vert_line_y2_" select="$bc_Y_ + ceiling($BLKD_BIFC_H div 2)"/>
-
- <xsl:variable name="v_bus_ul_y_">
- <xsl:choose>
- <xsl:when test="$vert_line_y1_ > $vert_line_y2_">
- <xsl:value-of select="$vert_line_y2_"/>
- </xsl:when>
- <xsl:when test="$vert_line_y2_ > $vert_line_y1_">
- <xsl:value-of select="$vert_line_y1_"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-<!--
- <xsl:variable name="v_bus_ul_x_" select="$vert_line_x_"/>
--->
- <xsl:variable name="v_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="($vert_line_x_ + $BLKD_MOD_BIF_GAP_H)"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="($vert_line_x_ - $BLKD_MOD_BIF_GAP_H)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:variable name="v_bus_width_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="v_bus_height_">
- <xsl:choose>
- <xsl:when test="$vert_line_y1_ > $vert_line_y2_">
- <xsl:value-of select="($vert_line_y1_ - $vert_line_y2_)"/>
- </xsl:when>
- <xsl:when test="$vert_line_y2_ > $vert_line_y1_">
- <xsl:value-of select="($vert_line_y2_ - $vert_line_y1_)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_x_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="($bc_X_ - ($BLKD_BUS_LANE_W - $BLKD_BIFC_W) + $BLKD_MOD_BIF_GAP_H)"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="($bc_X_ + $BLKD_BIFC_W - ceiling(($BLKD_BIFC_W - $BLKD_BIFC_Wi) div 2))"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="h_bus_ul_y_" select="$bc_Y_ + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
- <xsl:variable name="h_bus_height_" select="$BLKD_P2P_BUS_W"/>
-
- <xsl:variable name="h_bus_width_">
- <xsl:choose>
- <xsl:when test="@ORIENTED='WEST'">
- <xsl:value-of select="(($bc_X_ + ceiling(($BLKD_BIFC_W - $BLKD_BIFC_Wi) div 2)) - $h_bus_ul_x_ + 1)"/>
- </xsl:when>
- <xsl:when test="@ORIENTED='EAST'">
- <xsl:value-of select="(($v_bus_ul_x_ + $BLKD_P2P_BUS_W) - $h_bus_ul_x_)"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-
-<!--
- <xsl:message>vert line y1 <xsl:value-of select="$vert_line_y1_"/></xsl:message>
--->
-
- <rect x="{$v_bus_ul_x_}"
- y="{$v_bus_ul_y_ + 2}"
- width= "{$v_bus_width_}"
- height="{$v_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
-
- <rect x="{$h_bus_ul_x_}"
- y="{$h_bus_ul_y_}"
- width= "{$h_bus_width_}"
- height="{$h_bus_height_}"
- style="stroke:none; fill:{$busColor_}"/>
-
- </xsl:for-each>
-
-</xsl:template>
-
-
-
-
-<!-- =========================================================================== -->
-<!-- FUNCTION TEMPLATE -->
-<!-- -->
-<!-- Draw the IP Bucket -->
-<!-- =========================================================================== -->
-<xsl:template name="Draw_BlkDiagram_IPBucket">
-
- <!-- Draw IP Bucket -->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/IPBUCKET">
-
- <xsl:variable name="bucket_w_" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * @MODS_W) + ($BLKD_MOD_BUCKET_G * (@MODS_W - 1))))"/>
- <xsl:variable name="bucket_h_" select="(($BLKD_MOD_BKTLANE_H * 2) + (($BLKD_MOD_H * @MODS_H) + ($BLKD_MOD_BUCKET_G * (@MODS_H - 1))))"/>
-
- <xsl:variable name="bucket_x_" select="(ceiling($G_Total_Blkd_W div 2) - ceiling($bucket_w_ div 2))"/>
- <xsl:variable name="bucket_y_" select="($G_SharedBus_Y + $G_Total_SharedBus_H + $G_Max_Stack_BlwSbs_H + $BLKD_SBS2IP_GAP)"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="$bucket_x_"/>
- <xsl:with-param name="iY" select="($bucket_y_ - 4)"/>
- <xsl:with-param name="iText" select="'IP'"/>
- <xsl:with-param name="iClass" select="'bkt_label'"/>
- </xsl:call-template>
-
- <use x="{$bucket_x_}" y="{$bucket_y_}" xlink:href="#ipbucket"/>
-
- </xsl:for-each>
-
-</xsl:template>
-
-
-<xsl:template name="Draw_BlkDiagram_Key">
- <use x="{ceiling($G_Total_Blkd_W div 2) - ceiling($BLKD_KEY_W div 2)}" y="0" xlink:href="#BlkDiagram_Key"/>
-</xsl:template>
-
-<xsl:template name="Define_BlkDiagram_Key">
-
- <xsl:variable name="key_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'KEY'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="key_lt_col_">
- <xsl:call-template name="F_BusStd2RGB_LT">
- <xsl:with-param name="iBusStd" select="'KEY'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <g id="KEY_IntrCntrl">
- <rect
- x="0"
- y="0"
- rx="3"
- ry="3"
- width= "{ceiling($BLKD_INTR_W div 2)}"
- height="{$BLKD_INTR_H}" style="fill:{$key_lt_col_}; stroke:none; stroke-width:1"/>
-
- <line x1="0"
- y1="{ceiling($BLKD_INTR_H div 4)}"
- x2="{ceiling($BLKD_INTR_W div 2)}"
- y2="{ceiling($BLKD_INTR_H div 4)}"
- style="stroke:{$COL_BLACK};stroke-width:2"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="1.5"/>
- <xsl:with-param name="iY" select="(7 + ceiling($BLKD_INTR_H div 2))"/>
- <xsl:with-param name="iText" select="'x'"/>
- <xsl:with-param name="iClass" select="'intr_symbol'"/>
- </xsl:call-template>
-
- </g>
-
- <g id="KEY_IntrdProc">
- <rect
- x="0"
- y="0"
- rx="3"
- ry="3"
- width= "{ceiling($BLKD_INTR_W div 2)}"
- height="{$BLKD_INTR_H}" style="fill:{$key_lt_col_}; stroke:none; stroke-width:1"/>
-
- <line x1="0"
- y1="{ceiling($BLKD_INTR_H div 4) - 2}"
- x2="{ceiling($BLKD_INTR_W div 2)}"
- y2="{ceiling($BLKD_INTR_H div 4) - 2}"
- style="stroke:{$COL_BLACK};stroke-width:1"/>
-
- <line x1="0"
- y1="{ceiling($BLKD_INTR_H div 4) + 2}"
- x2="{ceiling($BLKD_INTR_W div 2)}"
- y2="{ceiling($BLKD_INTR_H div 4) + 2}"
- style="stroke:{$COL_BLACK};stroke-width:1"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="1.5"/>
- <xsl:with-param name="iY" select="(7 + ceiling($BLKD_INTR_H div 2))"/>
- <xsl:with-param name="iText" select="'x'"/>
- <xsl:with-param name="iClass" select="'intr_symbol'"/>
- </xsl:call-template>
- </g>
-
- <g id="KEY_IntrSrc">
- <rect
- x="0"
- y="0"
- rx="3"
- ry="3"
- width= "{$BLKD_INTR_W}"
- height="{ceiling($BLKD_INTR_H div 2)}" style="fill:{$key_lt_col_}; stroke:none; stroke-width:1"/>
-
- <line x1="{ceiling($BLKD_INTR_W div 2)}"
- y1="0"
- x2="{ceiling($BLKD_INTR_W div 2)}"
- y2="{ceiling($BLKD_INTR_H div 2)}"
- style="stroke:{$COL_BLACK};stroke-width:1"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'2'"/>
- <xsl:with-param name="iY" select="'7'"/>
- <xsl:with-param name="iText" select="'y'"/>
- <xsl:with-param name="iClass" select="'intr_symbol'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(2 + ceiling($BLKD_INTR_W div 2))"/>
- <xsl:with-param name="iY" select="'7'"/>
- <xsl:with-param name="iText" select="'x'"/>
- <xsl:with-param name="iClass" select="'intr_symbol'"/>
- </xsl:call-template>
- </g>
-
-
- <g id="BlkDiagram_Key">
- <rect
- x="0"
- y="0"
- width= "{$BLKD_KEY_W}"
- height="{$BLKD_KEY_H}"
- style="fill:{$COL_BG}; stroke:none;"/>
-
- <rect x="0"
- y="0"
- width= "{$BLKD_KEY_W}"
- height="16"
- style="fill:{$COL_BG}; stroke:none;"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_KEY_W div 2)"/>
- <xsl:with-param name="iY" select="'14'"/>
- <xsl:with-param name="iText" select="'KEY'"/>
- <xsl:with-param name="iClass" select="'key_title'"/>
- </xsl:call-template>
-
- <rect x="0"
- y="16"
- width= "{$BLKD_KEY_W}"
- height="16"
- style="fill:{$COL_BG_LT}; stroke:none;"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_KEY_W div 2)"/>
- <xsl:with-param name="iY" select="'30'"/>
- <xsl:with-param name="iText" select="'SYMBOLS'"/>
- <xsl:with-param name="iClass" select="'key_header'"/>
- </xsl:call-template>
-
- <use x="32" y="47" xlink:href="#KEY_BifLabel" transform="scale(0.75)"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'12'"/>
- <xsl:with-param name="iY" select="'60'"/>
- <xsl:with-param name="iText" select="'bus interface'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <use x="20" y="68" xlink:href="#KEY_SharedBus"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'12'"/>
- <xsl:with-param name="iY" select="'89'"/>
- <xsl:with-param name="iText" select="'shared bus'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
-
-<!--
- ==================================
- BUS CONNECTIONS
- ==================================
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'110'"/>
- <xsl:with-param name="iY" select="'47'"/>
- <xsl:with-param name="iText" select="'Bus connections'"/>
- <xsl:with-param name="iClass" select="'key_label_ul'"/>
- </xsl:call-template>
-
- <use x="110" y="58" xlink:href="#KEY_busconn_MASTER"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'140'"/>
- <xsl:with-param name="iY" select="'72'"/>
- <xsl:with-param name="iText" select="'master or initiator'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <use x="110" y="{58 + (($BLKD_BIFC_H + 4) * 1)}" xlink:href="#KEY_busconn_SLAVE"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'140'"/>
- <xsl:with-param name="iY" select="(72 + (($BLKD_BIFC_H + 4) * 1))"/>
- <xsl:with-param name="iText" select="'slave or target'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <use x="110" y="{58 + (($BLKD_BIFC_H + 4) * 2)}" xlink:href="#KEY_busconn_MASTER_SLAVE"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'140'"/>
- <xsl:with-param name="iY" select="(72 + (($BLKD_BIFC_H + 4) * 2))"/>
- <xsl:with-param name="iText" select="'master slave'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
-
- <use x="110" y="{58 + (($BLKD_BIFC_H + 4) * 3)}" xlink:href="#KEY_busconn_MONITOR"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'140'"/>
- <xsl:with-param name="iY" select="(72 + (($BLKD_BIFC_H + 4) * 3))"/>
- <xsl:with-param name="iText" select="'monitor'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
-<!--
- ==================================
- EXTERNAL PORTS
- ==================================
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'258'"/>
- <xsl:with-param name="iY" select="'47'"/>
- <xsl:with-param name="iText" select="'External Ports'"/>
- <xsl:with-param name="iClass" select="'key_label_ul'"/>
- </xsl:call-template>
-
- <use x="258" y="58" xlink:href="#KEY_INPort"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'288'"/>
- <xsl:with-param name="iY" select="'72'"/>
- <xsl:with-param name="iText" select="'input'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <use x="258" y="{58 + ($BLKD_IOP_H * 1) + 4}" xlink:href="#KEY_OUTPort"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'288'"/>
- <xsl:with-param name="iY" select="(72 + ($BLKD_IOP_H * 1) + 4)"/>
- <xsl:with-param name="iText" select="'output'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <use x="258" y="{58 + ($BLKD_IOP_H * 2) + 8}" xlink:href="#KEY_INOUTPort"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'288'"/>
- <xsl:with-param name="iY" select="(72 + ($BLKD_IOP_H * 2) + 8)"/>
- <xsl:with-param name="iText" select="'inout'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
-
-<!--
- ==================================
- INTERRUPTS
- ==================================
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'380'"/>
- <xsl:with-param name="iY" select="'47'"/>
- <xsl:with-param name="iText" select="'Interrupts'"/>
- <xsl:with-param name="iClass" select="'key_label_ul'"/>
- </xsl:call-template>
-
- <use x="380" y="58" xlink:href="#KEY_IntrCntrl"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'396'"/>
- <xsl:with-param name="iY" select="'64'"/>
- <xsl:with-param name="iText" select="'Interrupt'"/>
- <xsl:with-param name="iClass" select="'key_label_small'"/>
- </xsl:call-template>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'396'"/>
- <xsl:with-param name="iY" select="'74'"/>
- <xsl:with-param name="iText" select="'Controller'"/>
- <xsl:with-param name="iClass" select="'key_label_small'"/>
- </xsl:call-template>
-
-
- <use x="380" y="88" xlink:href="#KEY_IntrdProc"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'396'"/>
- <xsl:with-param name="iY" select="'94'"/>
- <xsl:with-param name="iText" select="'Interrupt'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'396'"/>
- <xsl:with-param name="iY" select="'104'"/>
- <xsl:with-param name="iText" select="'Target'"/>
- <xsl:with-param name="iClass" select="'key_label_small'"/>
- </xsl:call-template>
-
-
- <use x="380" y="118" xlink:href="#KEY_IntrSrc"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'400'"/>
- <xsl:with-param name="iY" select="'124'"/>
- <xsl:with-param name="iText" select="'Interrupt'"/>
- <xsl:with-param name="iClass" select="'key_label_small'"/>
- </xsl:call-template>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'400'"/>
- <xsl:with-param name="iY" select="'134'"/>
- <xsl:with-param name="iText" select="'Source'"/>
- <xsl:with-param name="iClass" select="'key_label_small'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'360'"/>
- <xsl:with-param name="iY" select="'146'"/>
- <xsl:with-param name="iText" select="'X = Controller ID'"/>
- <xsl:with-param name="iClass" select="'key_label_small'"/>
- </xsl:call-template>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'360'"/>
- <xsl:with-param name="iY" select="'156'"/>
- <xsl:with-param name="iText" select="'Y = Interrupt Priority'"/>
- <xsl:with-param name="iClass" select="'key_label_small'"/>
- </xsl:call-template>
-
-<!--
- ==================================
- COLORS
- ==================================
--->
- <rect x="0"
- y="160"
- width= "{$BLKD_KEY_W}"
- height="16"
- style="fill:{$COL_BG_LT}; stroke:none;"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_KEY_W div 2)"/>
- <xsl:with-param name="iY" select="'172'"/>
- <xsl:with-param name="iText" select="'COLORS'"/>
- <xsl:with-param name="iClass" select="'key_header'"/>
- </xsl:call-template>
-
-<!--
- <text class="keylblul"
- x="110"
- y="190">Bus Standards</text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="'110'"/>
- <xsl:with-param name="iY" select="'190'"/>
- <xsl:with-param name="iText" select="'Bus Standard'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <xsl:variable name="dcr_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'DCR'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <rect x="{12 + ((12 + $BLKD_BIFC_W + 36) * 0)}"
- y="200"
- width= "{$BLKD_BIFC_H}"
- height="{$BLKD_BIFC_W}"
- style="fill:{$dcr_col_}; stroke:none;"/>
-
-<!--
- <text class="keylabel"
- x="{12 + $BLKD_BIFC_W + 4}"
- y="{200 + (($BLKD_BIF_H + 4) * 1)}">DCR</text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(12 + $BLKD_BIFC_W + 4)"/>
- <xsl:with-param name="iY" select="(200 + (($BLKD_BIF_H + 4) * 1))"/>
- <xsl:with-param name="iText" select="'DCR'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <xsl:variable name="fcb_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'FCB'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <rect x="{12 + ((12 + $BLKD_BIFC_W + 36) * 0)}"
- y="{200 + (($BLKD_BIFC_H + 4) * 1)}"
- width= "{$BLKD_BIFC_H}"
- height="{$BLKD_BIFC_W}"
- style="fill:{$fcb_col_}; stroke:none;"/>
-
-<!--
- <text class="keylabel"
- x="{12 + $BLKD_BIFC_W + 4}"
- y="{200 + (($BLKD_BIF_H + 4) * 2)}">FCB</text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(12 + $BLKD_BIFC_W + 4)"/>
- <xsl:with-param name="iY" select="(200 + (($BLKD_BIF_H + 4) * 2))"/>
- <xsl:with-param name="iText" select="'FCB'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <xsl:variable name="fsl_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'FSL'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <rect x="{12 + ((12 + $BLKD_BIFC_W + 36) * 1)}"
- y="200"
- width= "{$BLKD_BIFC_H}"
- height="{$BLKD_BIFC_W}"
- style="fill:{$fsl_col_}; stroke:none;"/>
-<!--
- <text class="keylabel"
- x="{12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 1)}"
- y="{200 + (($BLKD_BIF_H + 4) * 1)}">FSL</text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 1))"/>
- <xsl:with-param name="iY" select="(200 + (($BLKD_BIF_H + 4) * 1))"/>
- <xsl:with-param name="iText" select="'FSL'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <xsl:variable name="col_lmb_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'LMB'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <rect x="{12 + ((12 + $BLKD_BIFC_W + 36) * 1)}"
- y="{200 + (($BLKD_BIFC_H + 4) * 1)}"
- width= "{$BLKD_BIFC_H}"
- height="{$BLKD_BIFC_W}"
- style="fill:{$col_lmb_}; stroke:none;"/>
-<!--
- <text class="keylabel"
- x="{12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 1)}"
- y="{200 + (($BLKD_BIF_H + 4) * 2)}">LMB</text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 1))"/>
- <xsl:with-param name="iY" select="(200 + (($BLKD_BIF_H + 4) * 2))"/>
- <xsl:with-param name="iText" select="'LMB'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <xsl:variable name="opb_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'OPB'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <rect
- x="{12 + ((12 + $BLKD_BIFC_W + 36) * 2)}"
- y="200"
- width= "{$BLKD_BIFC_H}"
- height="{$BLKD_BIFC_W}"
- style="fill:{$opb_col_}; stroke:none;"/>
-<!--
- <text class="keylabel"
- x="{12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 2)}"
- y="{200 + (($BLKD_BIF_H + 4) * 1)}">OPB</text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 2))"/>
- <xsl:with-param name="iY" select="(200 + (($BLKD_BIF_H + 4) * 1))"/>
- <xsl:with-param name="iText" select="'OPB'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
- <xsl:variable name="plb_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'PLB'"/>
- </xsl:call-template>
- </xsl:variable>
- <rect
- x="{12 + ((12 + $BLKD_BIFC_W + 36) * 2)}"
- y="{200 + (($BLKD_BIFC_H + 4) * 1)}"
- width= "{$BLKD_BIFC_H}"
- height="{$BLKD_BIFC_W}"
- style="fill:{$plb_col_}; stroke:none;"/>
-<!--
- <text class="keylabel"
- x="{12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 2)}"
- y="{200 + (($BLKD_BIF_H + 4) * 2)}">PLB</text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 2))"/>
- <xsl:with-param name="iY" select="(200 + (($BLKD_BIF_H + 4) * 2))"/>
- <xsl:with-param name="iText" select="'PLB'"/>
- <xsl:with-param name="iClass" select="'key_header'"/>
- </xsl:call-template>
-
-
- <xsl:variable name="ocm_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'OCM'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <rect
- x="{12 + ((12 + $BLKD_BIFC_W + 36) * 3)}"
- y="200"
- width= "{$BLKD_BIFC_H}"
- height="{$BLKD_BIFC_W}"
- style="fill:{$ocm_col_}; stroke:none;"/>
-<!--
- <text class="keylabel"
- x="{12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 3)}"
- y="{200 + (($BLKD_BIF_H + 4) * 1)}">SOCM</text>
- -->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 3))"/>
- <xsl:with-param name="iY" select="(200 + (($BLKD_BIF_H + 4) * 1))"/>
- <xsl:with-param name="iText" select="'SOCM'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
-
- <xsl:variable name="xil_p2p_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'XIL'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <rect
- x="{12 + ((12 + $BLKD_BIFC_W + 36) * 3)}"
- y="{200 + (($BLKD_BIFC_H + 4) * 1)}"
- width= "{$BLKD_BIFC_H}"
- height="{$BLKD_BIFC_W}"
- style="fill:{$xil_p2p_col_}; stroke:none;"/>
-<!--
- <text class="keylabel"
- x="{12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 3)}"
- y="{200 + (($BLKD_BIF_H + 4) * 2)}">Xilinx P2P</text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 3))"/>
- <xsl:with-param name="iY" select="(200 + (($BLKD_BIF_H + 4) * 2))"/>
- <xsl:with-param name="iText" select="'Xilinx P2P'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
-
- <xsl:variable name="user_p2p_col_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'USER'"/>
- </xsl:call-template>
- </xsl:variable>
-
- <rect x="{12 + ((12 + $BLKD_BIFC_W + 36) * 4)}"
- y="200"
- width= "{$BLKD_BIFC_H}"
- height="{$BLKD_BIFC_W}"
- style="fill:{$user_p2p_col_}; stroke:none;"/>
-<!--
- <text class="keylabel"
- x="{12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 4)}"
- y="{200 + (($BLKD_BIF_H + 4) * 1)}">USER P2P</text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(12 + ($BLKD_BIFC_W + 4) + ((12 + $BLKD_BIFC_W + 36) * 4))"/>
- <xsl:with-param name="iY" select="(200 + (($BLKD_BIF_H + 4) * 1))"/>
- <xsl:with-param name="iText" select="'USER P2P'"/>
- <xsl:with-param name="iClass" select="'key_label'"/>
- </xsl:call-template>
-
-
-</g>
-</xsl:template>
-
-<xsl:template name="Define_BlkDiagram_Specs">
-
- <xsl:param name="iArch" select="'NA'"/>
- <xsl:param name="iPart" select="'NA'"/>
- <xsl:param name="iTimeStamp" select="'NA'"/>
- <xsl:param name="iEdkVersion" select="'NA'"/>
-
- <g id="BlkDiagram_Specs">
- <rect
- x="0"
- y="0"
- width= "{$BLKD_SPECS_W}"
- height="{$BLKD_SPECS_H}"
- style="fill:{$COL_BG}; stroke:none;"/>
-
- <rect
- x="0"
- y="0"
- width= "{$BLKD_SPECS_W}"
- height="16"
- style="fill:{$COL_BG}; stroke:none;"/>
-<!--
- ==================================
- SPEC HEADER
- ==================================
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iClass" select="'key_title'"/>
- <xsl:with-param name="iX" select="ceiling($BLKD_SPECS_W div 2)"/>
- <xsl:with-param name="iY" select="'14'"/>
- <xsl:with-param name="iText" select="'SPECS'"/>
- </xsl:call-template>
-<!--
- <text class="keytitle"
- x="{ceiling($BLKD_SPECS_W div 2)} "
- y="14">SPECS</text>
--->
-
-<!--
- ==================================
- EDK VERSION
- ==================================
--->
- <rect x="0"
- y="20"
- width= "{$BLKD_SPECS_W}"
- height="16"
- style="fill:{$COL_BG_LT}; stroke:none;"/>
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iClass" select="'blkd_spec_name'"/>
- <xsl:with-param name="iX" select="'4'"/>
- <xsl:with-param name="iY" select="'32'"/>
- <xsl:with-param name="iText" select="'EDK VERSION'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iClass" select="'blkd_spec_value_mid'"/>
- <xsl:with-param name="iX" select="($BLKD_SPECS_W + 1) - ceiling($BLKD_SPECS_W div 5)"/>
- <xsl:with-param name="iY" select="'32'"/>
- <xsl:with-param name="iText" select="$iEdkVersion"/>
- </xsl:call-template>
-
-<!--
- ==================================
- ARCH
- ==================================
--->
- <rect x="0"
- y="40"
- width= "{$BLKD_SPECS_W}"
- height="16"
- style="fill:{$COL_BG_LT}; stroke:none;"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iClass" select="'blkd_spec_name'"/>
- <xsl:with-param name="iX" select="'4'"/>
- <xsl:with-param name="iY" select="'52'"/>
- <xsl:with-param name="iText" select="'ARCH'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iClass" select="'blkd_spec_value_mid'"/>
- <xsl:with-param name="iX" select="($BLKD_SPECS_W + 1) - ceiling($BLKD_SPECS_W div 5)"/>
- <xsl:with-param name="iY" select="'52'"/>
- <xsl:with-param name="iText" select="$iArch"/>
- </xsl:call-template>
-
-<!--
- <text class="specsvalue"
- x="{($BLKD_SPECS_W + 1) - (string-length($blkd_arch) * 6.5)}"
- y="52"><xsl:value-of select="$blkd_arch"/></text>
- <text class="specsvaluemid"
- x="{($BLKD_SPECS_W + 1) - ceiling($BLKD_SPECS_W div 5)}"
- y="52"><xsl:value-of select="$iArch"/></text>
--->
-
-<!--
- ==================================
- PART
- ==================================
--->
- <rect x="0"
- y="60"
- width= "{$BLKD_SPECS_W}"
- height="16"
- style="fill:{$COL_BG_LT}; stroke:none;"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iClass" select="'blkd_spec_name'"/>
- <xsl:with-param name="iX" select="'4'"/>
- <xsl:with-param name="iY" select="'72'"/>
- <xsl:with-param name="iText" select="'PART'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iClass" select="'blkd_spec_value_mid'"/>
- <xsl:with-param name="iX" select="($BLKD_SPECS_W + 1) - ceiling($BLKD_SPECS_W div 5)"/>
- <xsl:with-param name="iY" select="'72'"/>
- <xsl:with-param name="iText" select="$iPart"/>
- </xsl:call-template>
-
-<!--
- ==================================
- TIMESTAMP
- ==================================
--->
-
- <rect x="0"
- y="80"
- width= "{$BLKD_SPECS_W}"
- height="16"
- style="fill:{$COL_BG_LT}; stroke:none;"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iClass" select="'blkd_spec_name'"/>
- <xsl:with-param name="iX" select="'4'"/>
- <xsl:with-param name="iY" select="'92'"/>
- <xsl:with-param name="iText" select="'GENERATED'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iClass" select="'blkd_spec_value_mid'"/>
- <xsl:with-param name="iX" select="($BLKD_SPECS_W + 1) - (string-length($iTimeStamp) * 3.5)"/>
- <xsl:with-param name="iY" select="'92'"/>
- <xsl:with-param name="iText" select="$iTimeStamp"/>
- </xsl:call-template>
- </g>
-</xsl:template>
-
-
-</xsl:stylesheet>
-
-<!-- =========================================================================== -->
-<!-- FUNCTION TEMPLATE -->
-<!-- -->
-<!-- =========================================================================== -->
\ No newline at end of file
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Peripherals.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Peripherals.xsl
deleted file mode 100644
index b676156c83..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Peripherals.xsl
+++ /dev/null
@@ -1,1582 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<!--
-<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
- doctype-public="-//W3C//DTD SVG 1.0//EN"
- doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
-
-<xsl:variable name="INF_H" select="$BIF_H + ceiling($BIF_H div 2)"/>
-<xsl:variable name="INF_W" select="($BIF_W * 2) + $BIF_GAP"/>
--->
-
-
-<!-- ======================= DEF FUNCTIONS =================================== -->
-<xsl:template name="Define_IPBucket">
-
- <xsl:for-each select="BLKDIAGRAM/IPBUCKET">
-
- <xsl:for-each select="MODULE">
- <xsl:sort data-type="text" select="@MODTYPE" order="ascending"/>
-
- <xsl:call-template name="Define_IPBucketModule">
- <xsl:with-param name="iIPType" select="@MODTYPE"/>
- <xsl:with-param name="iIPName" select="@INSTANCE"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
- <g id="ipbucket">
- <xsl:variable name="bucket_w_" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * @MODS_W) + ($BLKD_MOD_BUCKET_G * (@MODS_W - 1))))"/>
- <xsl:variable name="bucket_h_" select="(($BLKD_MOD_BKTLANE_H * 2) + (($BLKD_MOD_H * @MODS_H) + ($BLKD_MOD_BUCKET_G * (@MODS_H - 1))))"/>
-
- <rect x="0"
- y="0"
- rx="4"
- ry="4"
- width= "{$bucket_w_}"
- height="{$bucket_h_}"
- style="stroke-width:2; stroke:{$COL_BLACK}; fill:{$COL_IORING_LT}"/>
-
- <xsl:variable name="bkt_mods_w_" select="@MODS_W"/>
-
- <xsl:for-each select="MODULE">
-
- <xsl:variable name="clm_" select="(( position() - 1) mod $bkt_mods_w_)"/>
- <xsl:variable name="row_" select="floor((position() - 1) div $bkt_mods_w_)"/>
-
- <xsl:variable name="bk_x_" select="$BLKD_MOD_BKTLANE_W + ($clm_ * ($BLKD_MOD_W + $BLKD_MOD_BUCKET_G))"/>
- <xsl:variable name="bk_y_" select="$BLKD_MOD_BKTLANE_H + ($row_ * ($BLKD_MOD_H + $BLKD_MOD_BUCKET_G))"/>
-
-
- <use x="{$bk_x_}"
- y="{$bk_y_}"
- xlink:href="#ipbktmodule_{@INSTANCE}"/>
-
-
- </xsl:for-each>
-
- </g>
-
-</xsl:for-each>
-</xsl:template>
-
-
-<xsl:template name="Define_UNKBucket">
-
- <xsl:for-each select="BLKDIAGRAM/UNKBUCKET">
-
- <g id="unkbucket">
- <xsl:variable name="bucket_w_" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * @MODS_W) + ($BLKD_MOD_BUCKET_G * (@MODS_W - 1))))"/>
- <xsl:variable name="bucket_h_" select="(($BLKD_MOD_BKTLANE_H * 2) + (($BLKD_MOD_H * @MODS_H) + ($BLKD_MOD_BUCKET_G * (@MODS_H - 1))))"/>
-
- <rect x="0"
- y="0"
- rx="4"
- ry="4"
- width= "{$bucket_w_}"
- height="{$bucket_h_}"
- style="stroke-width:2; stroke:{$COL_BLACK}; fill:{$COL_BG_UNK}"/>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@IS_PROMOTED and @IS_PENALIZED)]">
-
- <xsl:variable name="bkt_mods_w_" select="@MODS_W"/>
-
- <xsl:variable name="mod_row_" select="@BKTROW"/>
- <xsl:variable name="row_mods_h_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/UNKBUCKET/BKTROW[(@INDEX = $mod_row_)]/@MODS_H"/>
-
-<!--
- <xsl:message>The row module is <xsl:value-of select="@BKTROW"/></xsl:message>
- <xsl:message>The height of the module is <xsl:value-of select="$row_mods_h_"/></xsl:message>
--->
-
- <xsl:variable name="bk_x_" select="$BLKD_MOD_BKTLANE_W + (@MODS_X * ($BLKD_MOD_W + $BLKD_MOD_BUCKET_G))"/>
- <xsl:variable name="bk_y_" select="$BLKD_MOD_BKTLANE_H + ($row_mods_h_ * ($BLKD_MOD_H + $BLKD_MOD_BUCKET_G))"/>
-
- <use x="{$bk_x_}"
- y="{$bk_y_}"
- xlink:href="#symbol_unkmodule_{@BKTROW}_{@MODS_X}"/>
-<!--
--->
-
- </xsl:for-each>
-
-
- </g>
-
- </xsl:for-each>
-</xsl:template>
-
-
-<xsl:template name="Define_SBSBuckets">
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET">
-
- <xsl:variable name="busStd_" select="@BUSSTD"/>
- <xsl:variable name="busName_" select="@BUSNAME"/>
-<!--
- <xsl:variable name="busStd_" select="BUSCONNS/BUSCONN/@BUSSTD"/>
--->
- <xsl:variable name="bus_conn_w_" select="BUSCONNS/@BUSLANE_W"/>
-
-
- <xsl:variable name="bktColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="bktBgColor_">
- <xsl:call-template name="F_BusStd2RGB_LT">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <xsl:for-each select="MODULE">
-
- <xsl:sort data-type="text" select="@MODTYPE" order="ascending"/>
-
- <xsl:call-template name="Define_SBSBucketModule">
- <xsl:with-param name="iBifType" select="$busStd_"/>
- <xsl:with-param name="iIPType" select="@MODTYPE"/>
- <xsl:with-param name="iIPName" select="@INSTANCE"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
- <g id="sbsbucket_{$busName_}">
- <xsl:variable name="bucket_w_" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * @MODS_W) + ($BLKD_MOD_BUCKET_G * (@MODS_W - 1))))"/>
- <xsl:variable name="bucket_h_" select="(($BLKD_MOD_BKTLANE_H * 2) + ((($BLKD_MOD_H + $BLKD_BIFC_H) * @MODS_H) + ($BLKD_MOD_BUCKET_G * (@MODS_H - 1))))"/>
-
- <rect x="0"
- y="0"
- rx="4"
- ry="4"
- width= "{$bucket_w_}"
- height="{$bucket_h_}"
- style="stroke-width:2; stroke:{$bktColor_}; fill:{$bktBgColor_}"/>
-
- <xsl:variable name="bkt_mods_w_" select="@MODS_W"/>
-
- <xsl:for-each select="MODULE">
-
- <xsl:sort data-type="text" select="@MODTYPE" order="ascending"/>
-
- <xsl:variable name="clm_" select="(( position() - 1) mod $bkt_mods_w_)"/>
- <xsl:variable name="row_" select="floor((position() - 1) div $bkt_mods_w_)"/>
-
- <xsl:variable name="bk_x_" select="$BLKD_MOD_BKTLANE_W + ($clm_ * ($BLKD_MOD_W + $BLKD_MOD_BUCKET_G))"/>
- <xsl:variable name="bk_y_" select="$BLKD_MOD_BKTLANE_H + ($row_ * ($BLKD_MOD_H + $BLKD_BIFC_H + $BLKD_MOD_BUCKET_G))"/>
-
- <!-- Lay out the module in the bucket -->
- <use x="{$bk_x_}" y="{$bk_y_}" xlink:href="#sbsbktmodule_{@INSTANCE}"/>
-
- <!-- Add its connection to the piece shared bus -->
- <xsl:variable name="h_bus_y_" select="$bk_y_ + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
-
-<!--
- <xsl:variable name="h_bus_x_" select="$bk_x_ - ($BLKD_MOD_BUCKET_G + ceiling($BLKD_MOD_W div 2))"/>
--->
- <xsl:variable name="h_bus_x_">
- <xsl:choose>
- <xsl:when test="($clm_ = '0')">0</xsl:when>
-
- <xsl:when test="not($clm_ = '0')">
- <xsl:value-of select="$bk_x_ - ($BLKD_MOD_BUCKET_G + ceiling($BLKD_MOD_W div 2))"/>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:variable name="h_bus_y_" select="$bk_y_ + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W)"/>
- <xsl:message>h bus x <xsl:value-of select="$h_bus_x_"/></xsl:message>
- <xsl:message>h bus y <xsl:value-of select="$h_bus_y_"/></xsl:message>
--->
- <xsl:variable name="h_bus_height_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="h_bus_width_" select="($bk_x_ - $h_bus_x_ + ceiling($BLKD_MOD_W div 2))"/>
-
- <rect x="{$h_bus_x_}"
- y="{$h_bus_y_}"
- width= "{$h_bus_width_}"
- height="{$BLKD_P2P_BUS_W}"
- style="fill:{$bktColor_}"/>
-
- </xsl:for-each>
-
- <xsl:variable name="num_sbsbktmods_" select="count(MODULE)"/>
- <xsl:variable name="num_sbsbktrows_" select="ceiling($num_sbsbktmods_ div $BLKD_BKT_MODS_PER_ROW)"/>
-
- <!-- If there is more than one row, connect the rows with a vertical bar -->
- <xsl:if test="($num_sbsbktrows_ > 1)">
-
- <xsl:variable name="v_bus_x_" select="$BLKD_MOD_BKTLANE_W + ($BLKD_MOD_W + $BLKD_MOD_BUCKET_G)"/>
-
- <xsl:variable name="bkt_top_" select="$BLKD_MOD_BKTLANE_H + (0 * ($BLKD_MOD_H + $BLKD_BIFC_H + $BLKD_MOD_BUCKET_G))"/>
- <xsl:variable name="bkt_bot_" select="$BLKD_MOD_BKTLANE_H + (($num_sbsbktrows_ - 1) * ($BLKD_MOD_H + $BLKD_BIFC_H + $BLKD_MOD_BUCKET_G))"/>
-
- <xsl:variable name="v_bus_y_top_" select="$bkt_top_ + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
- <xsl:variable name="v_bus_y_bot_" select="$bkt_bot_ + ceiling($BLKD_BIFC_H div 2) - ceiling($BLKD_P2P_BUS_W div 2)"/>
-
- <xsl:variable name="v_bus_width_" select="$BLKD_P2P_BUS_W"/>
- <xsl:variable name="v_bus_height_" select="($v_bus_y_bot_ - $v_bus_y_top_)"/>
- <rect x="0"
- y="{$v_bus_y_top_}"
- width= "{$v_bus_width_}"
- height="{$v_bus_height_}"
- style="fill:{$bktColor_}"/>
- </xsl:if>
-
- </g>
-
- </xsl:for-each>
-
-</xsl:template>
-
-
-<xsl:template name="Define_SBSBucketModule">
-
- <xsl:param name="iBusStd" select="'PLB46'"/>
- <xsl:param name="iIPName" select="'_ipType_'"/>
- <xsl:param name="iIPType" select="'_ipName_'"/>
-
-<!--
- <xsl:message>The IPType is <xsl:value-of select="$iIPType"/> </xsl:message>
--->
- <xsl:variable name="bif_y_">
- <xsl:value-of select="$BLKD_MOD_LANE_H + $BLKD_BIFC_H"/>
- </xsl:variable>
-
- <xsl:variable name="label_y_">
- <xsl:value-of select="$BLKD_MOD_LANE_H + $BLKD_BIF_H + $BLKD_BIFC_H + $BLKD_MOD_BIF_GAP_V"/>
- </xsl:variable>
-
- <xsl:variable name="modBgColor_">
- <xsl:choose>
- <xsl:when test="$iIPType = 'mpmc'"><xsl:value-of select="$COL_MPMC_BG"/></xsl:when>
- <xsl:otherwise><xsl:value-of select="$COL_BG"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <g id="sbsbktmodule_{$iIPName}">
-
- <rect x="0"
- y="{$BLKD_BIFC_H}"
- rx="6"
- ry="6"
- width = "{$BLKD_MOD_W}"
- height= "{$BLKD_MOD_H}"
- style="fill:{$modBgColor_}; stroke:{$COL_WHITE}; stroke-width:2"/>
-
- <rect x="{ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
- y="{$label_y_}"
- rx="3"
- ry="3"
- width= "{$BLKD_MOD_LABEL_W}"
- height="{$BLKD_MOD_LABEL_H}"
- style="fill:{$COL_WHITE}; stroke:none;"/>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE=$iIPName)]/@GROUP">
-
- <rect x="{ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
- y="{$label_y_ + $BLKD_BIF_H + ceiling($BLKD_BIF_H div 3) - 2}"
- rx="3"
- ry="3"
- width= "{$BLKD_MOD_LABEL_W}"
- height="{$BLKD_BIF_H}"
- style="fill:{$COL_IORING_LT}; stroke:none;"/>
-
-<!--
- <text class="ioplblgrp"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$label_y_ + $BLKD_BIF_H + ceiling($BLKD_BIF_H div 3) + 12}">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iIPName)]/@GROUP"/>
- </text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + $BLKD_BIF_H + ceiling($BLKD_BIF_H div 3) + 12)"/>
- <xsl:with-param name="iText" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iIPName)]/@GROUP"/>
- <xsl:with-param name="iClass" select="'iogrp_label'"/>
- </xsl:call-template>
-
- </xsl:if>
-
-<!--
- <text class="bciptype"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$label_y_ + 8}">
- <xsl:value-of select="$iIPType"/>
- </text>
-
- <text class="bciplabel"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$label_y_ + 16}">
- <xsl:value-of select="$iIPName"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + 8)"/>
- <xsl:with-param name="iText" select="$iIPType"/>
- <xsl:with-param name="iClass" select="'bc_iptype'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + 18)"/>
- <xsl:with-param name="iText" select="$iIPName"/>
- <xsl:with-param name="iClass" select="'bc_ipinst'"/>
- </xsl:call-template>
-
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iIPName)]/BUSINTERFACE[(@IS_INMHS = 'TRUE')]">
-
- <xsl:variable name="bifBusStd_">
- <xsl:choose>
- <xsl:when test="@BUSSTD">
- <xsl:value-of select="@BUSSTD"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="'USER'"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bifName_">
- <xsl:choose>
- <xsl:when test="string-length(@NAME) <= 5">
- <xsl:value-of select="@NAME"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="substring(@NAME,0,5)"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bif_x_" select="ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_BIF_W div 2)"/>
-
- <!-- Draw the BIF -->
- <use x="{$bif_x_}" y="{$bif_y_}" xlink:href="#{$bifBusStd_}_BifLabel"/>
-
-
- <!-- Draw the BIF connection -->
- <use x="{$bif_x_ + ceiling($BLKD_BIF_W div 2) - ceiling($BLKD_BIFC_W div 2)}" y="{$bif_y_ - $BLKD_BIFC_H - $BLKD_MOD_LANE_H}" xlink:href="#{$bifBusStd_}_busconn_{@TYPE}"/>
-
-<!--
- <text class="bif_label"
- x="{$bif_x_ + ceiling($BLKD_BIF_W div 2)}"
- y="{$bif_y_ + ceiling($BLKD_BIF_H div 2) + 3}">
- <xsl:value-of select="$bifName_"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($bif_x_ + ceiling($BLKD_BIF_W div 2))"/>
- <xsl:with-param name="iY" select="($bif_y_ + ceiling($BLKD_BIF_H div 2) + 3)"/>
- <xsl:with-param name="iText" select="$bifName_"/>
- <xsl:with-param name="iClass" select="'bif_label'"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iIPName)]/INTERRUPTINFO[(@TYPE = 'CONTROLLER')]">
-
- <xsl:variable name="intcIdx_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE=$iIPName)]/INTERRUPTINFO[(@TYPE = 'CONTROLLER')]/@INTC_INDEX"/>
-
- <xsl:variable name="intrColor_">
- <xsl:call-template name="F_IntcIdx2RGB">
- <xsl:with-param name="iIntcIdx" select="$intcIdx_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:call-template name="F_draw_InterruptCntrl">
- <xsl:with-param name="iIntr_X" select="($BLKD_MOD_W - ceiling($BLKD_INTR_W div 2))"/>
- <xsl:with-param name="iIntr_Y" select="3 + $BLKD_BIFC_H"/>
- <xsl:with-param name="iIntr_COL" select="$intrColor_"/>
- <xsl:with-param name="iIntr_IDX" select="$intcIdx_"/>
- </xsl:call-template>
- </xsl:if>
-
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iIPName)]/INTERRUPTINFO[(@TYPE = 'SOURCE')]/TARGET">
-<!--
- <xsl:variable name="intcIdx_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE=$iIPName)]/INTERRUPTINFO[(@TYPE = 'SOURCE')]/@INTC_INDEX"/>
--->
- <xsl:variable name="intrColor_">
- <xsl:call-template name="F_IntcIdx2RGB">
- <xsl:with-param name="iIntcIdx" select="@INTC_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:call-template name="F_draw_InterruptSource">
- <xsl:with-param name="iIntr_X" select="($BLKD_MOD_W - $BLKD_INTR_W)"/>
- <xsl:with-param name="iIntr_Y" select="((position() - 1) * (ceiling($BLKD_INTR_H div 2) + 3)) + $BLKD_BIFC_H"/>
- <xsl:with-param name="iIntr_COL" select="$intrColor_"/>
- <xsl:with-param name="iIntr_PRI" select="@PRIORITY"/>
- <xsl:with-param name="iIntr_IDX" select="@INTC_INDEX"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
- </g>
-
-</xsl:template>
-
-<xsl:template name="Define_IPBucketModule">
-
- <xsl:param name="iIPType" select="'_ip_type_'"/>
- <xsl:param name="iIPName" select="'_ip_name_'"/>
-
- <xsl:variable name="bif_y_">
- <xsl:value-of select="$BLKD_MOD_LANE_H"/>
- </xsl:variable>
-
- <xsl:variable name="label_y_">
- <xsl:value-of select="(ceiling($BLKD_MOD_H div 2) - ceiling($BLKD_MOD_LABEL_H div 2))"/>
- </xsl:variable>
-
- <g id="ipbktmodule_{$iIPName}">
-
- <rect x="0"
- y="0"
- rx="6"
- ry="6"
- width = "{$BLKD_MOD_W}"
- height= "{$BLKD_MOD_H}"
- style="fill:{$COL_BG}; stroke:{$COL_BLACK}; stroke-width:2"/>
-
- <rect x="{ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
- y="{$label_y_}"
- rx="3"
- ry="3"
- width= "{$BLKD_MOD_LABEL_W}"
- height="{$BLKD_MOD_LABEL_H}"
- style="fill:{$COL_WHITE}; stroke:none;"/>
-<!--
- y="{$label_y_ + ceiling($BLKD_MOD_LABEL_H div 2) - 4}"
- y="{$label_y_ + ceiling($BLKD_MOD_LABEL_H div 2) + 4}"
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + 8)"/>
- <xsl:with-param name="iText" select="$iIPType"/>
- <xsl:with-param name="iClass" select="'bc_iptype'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + 20)"/>
- <xsl:with-param name="iText" select="$iIPName"/>
- <xsl:with-param name="iClass" select="'bc_ipinst'"/>
- </xsl:call-template>
-
-<!--
- <text class="bc_iptype"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$label_y_ + 8}">
- <xsl:value-of select="$iIPType"/>
- </text>
-
- <text class="bc_ipinst"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$label_y_ + 16}">
- <xsl:value-of select="$iIPName"/>
- </text>
--->
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iIPName)]/@GROUP">
-
- <rect x="{ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
- y="{$label_y_ + $BLKD_BIF_H + ceiling($BLKD_BIF_H div 3) - 2}"
- rx="3"
- ry="3"
- width= "{$BLKD_MOD_LABEL_W}"
- height="{$BLKD_BIF_H}"
- style="fill:{$COL_IORING_LT}; stroke:none;"/>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + $BLKD_BIF_H + ceiling($BLKD_BIF_H div 3) + 12)"/>
- <xsl:with-param name="iText" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iIPName)]/@GROUP"/>
- <xsl:with-param name="iClass" select="'iogrp_label'"/>
- </xsl:call-template>
-
- <!--
- <text class="iogrp_label"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$label_y_ + $BLKD_BIF_H + ceiling($BLKD_BIF_H div 3) + 12}">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iIPName)]/@GROUP"/>
- </text>
- -->
-
- </xsl:if>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iIPName)]/INTERRUPTINFO[(@TYPE = 'SOURCE')]">
-
- <xsl:variable name="intrColor_">
- <xsl:call-template name="F_IntcIdx2RGB">
- <xsl:with-param name="iIntcIdx" select="@INTC_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:call-template name="F_draw_InterruptSource">
- <xsl:with-param name="iIntr_X" select="($BLKD_MOD_W - $BLKD_INTR_W)"/>
- <xsl:with-param name="iIntr_Y" select="((position() - 1) * (ceiling($BLKD_INTR_H div 2) + 3))"/>
- <xsl:with-param name="iIntr_COL" select="$intrColor_"/>
- <xsl:with-param name="iIntr_PRI" select="@PRIORITY"/>
- <xsl:with-param name="iIntr_IDX" select="@INTC_INDEX"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
- </g>
-
-</xsl:template>
-
-
-<xsl:template name="Define_Peripheral">
-<!--
- when the module is oriented normal its label goes above the bifs
- when the module is oriented rot180, (part of a processor memory
- controller for example) its label goes below the bifs
--->
-
- <xsl:param name="iModVori" select="'normal'"/>
- <xsl:param name="iModInst" select="'_instance_'"/>
- <xsl:param name="iModType" select="'_modtype_'"/>
- <xsl:param name="iUnkInst" select="'_unknown_'"/>
- <xsl:param name="iHorizIdx" select="'_unknown_'"/>
- <xsl:param name="iVertiIdx" select="'_unknown_'"/>
-
-<!--
- <xsl:message>Stack Y <xsl:value-of select="$cstkMods_Y"/></xsl:message>
- <xsl:message>Stack Index Y <xsl:value-of select="$cstkIndex"/></xsl:message>
--->
-
- <xsl:variable name="modName_">
- <xsl:choose>
- <xsl:when test="$iUnkInst = '_unknown_'">
- <xsl:value-of select="$iModInst"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$iUnkInst"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="modSymbolName_">
- <xsl:choose>
- <xsl:when test="(not($iHorizIdx = '_unknown_') and not($iVertiIdx = '_unknown_'))">
- <xsl:call-template name="F_generate_Stack_SymbolName">
- <xsl:with-param name="iHorizIdx" select="$iHorizIdx"/>
- <xsl:with-param name="iVertiIdx" select="$iVertiIdx"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:otherwise>symbol_<xsl:value-of select="$modName_"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="modTypeName_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iModInst)]/@MODTYPE"/>
-
-<!--
- <xsl:message>The symbol type of the module is <xsl:value-of select="$modTypeName_"/></xsl:message>
- <xsl:message>The symbol name of the module is <xsl:value-of select="$modSymbolName_"/></xsl:message>
--->
-
- <xsl:variable name="bifs_h_">
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/MODULE[(@INSTANCE = $iModInst)]/@BIFS_H) and not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE[(@INSTANCE = $iModInst)]/@BIFS_H)">0</xsl:if>
-
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/MODULE[(@INSTANCE = $iModInst)]/@BIFS_H)">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/MODULE[(@INSTANCE = $iModInst)]/@BIFS_H"/>
- </xsl:if>
-
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE[(@INSTANCE = $iModInst)]/@BIFS_H)">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE[(@INSTANCE = $iModInst)]/@BIFS_H"/>
- </xsl:if>
- </xsl:variable>
-
- <xsl:variable name="label_y_">
- <xsl:choose>
- <xsl:when test="$iModVori = 'rot180'">
- <xsl:value-of select="($BLKD_MOD_LANE_H + (($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * $bifs_h_))"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$BLKD_MOD_LANE_H"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bif_dy_">
- <xsl:choose>
- <xsl:when test="$iModVori = 'rot180'">
- <xsl:value-of select="$BLKD_MOD_LANE_H"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V)"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="peri_stroke_col_">
- <xsl:choose>
- <xsl:when test="((@MODCLASS = 'MASTER_SLAVE') or (@MODCLASS = 'MONITOR')) and BUSCONNS/BUSCONN">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="BUSCONNS/BUSCONN/@BUSSTD"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:value-of select="$COL_WHITE"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="modHeight_">
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="$modName_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <g id="{$modSymbolName_}">
-
- <xsl:if test="$modTypeName_ = 'mpmc'">
- <rect x="0"
- y="0"
- rx="6"
- ry="6"
- width = "{$BLKD_MOD_W}"
- height= "{$modHeight_}"
- style="fill:{$COL_MPMC_BG}; stroke:{$peri_stroke_col_}; stroke-width:2"/>
- </xsl:if>
-
- <xsl:if test="not($modTypeName_ = 'mpmc')">
- <rect x="0"
- y="0"
- rx="6"
- ry="6"
- width = "{$BLKD_MOD_W}"
- height= "{$modHeight_}"
- style="fill:{$COL_BG}; stroke:{$peri_stroke_col_}; stroke-width:2"/>
- </xsl:if>
-
-
- <rect x="{ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
- y="{$label_y_}"
- rx="3"
- ry="3"
- width= "{$BLKD_MOD_LABEL_W}"
- height="{$BLKD_MOD_LABEL_H}"
- style="fill:{$COL_WHITE}; stroke:none;"/>
-
-<!--
- y="{$label_y_ + ceiling($BLKD_MOD_LABEL_H div 2) - 4}">
- y="{$label_y_ + ceiling($BLKD_MOD_LABEL_H div 2) + 4}">
--->
-<!--
- <text class="bc_iptype"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$label_y_ + 8}">
- <xsl:value-of select="$iModType"/>
- </text>
-
- <text class="bc_ipinst"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$label_y_ + 16}">
- <xsl:value-of select="$iModInst"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + 8)"/>
- <xsl:with-param name="iText" select="$iModType"/>
- <xsl:with-param name="iClass" select="'bc_iptype'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + 16)"/>
- <xsl:with-param name="iText" select="$iModInst"/>
- <xsl:with-param name="iClass" select="'bc_ipinst'"/>
- </xsl:call-template>
-
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[@INSTANCE=$iModInst]/@GROUP">
-
- <rect x="{ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
- y="{$label_y_ + $BLKD_BIF_H + ceiling($BLKD_BIF_H div 3) - 2}"
- rx="3"
- ry="3"
- width= "{$BLKD_MOD_LABEL_W}"
- height="{$BLKD_BIF_H}"
- style="fill:{$COL_IORING_LT}; stroke:none;"/>
-
-<!--
- <text class="iogrp_label"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$label_y_ + $BLKD_BIF_H + ceiling($BLKD_BIF_H div 3) + 12}">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[@INSTANCE=$iModInst]/@GROUP"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + $BLKD_BIF_H + ceiling($BLKD_BIF_H div 3) + 12)"/>
- <xsl:with-param name="iText" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iModInst)]/@GROUP"/>
- <xsl:with-param name="iClass" select="'iogrp_label'"/>
- </xsl:call-template>
-
-
- </xsl:if>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iModInst)]/BUSINTERFACE[(@BIF_X and @BIF_Y and not(@BUSNAME = '__NOC__'))]">
-
- <xsl:variable name="bifBusStd_">
- <xsl:choose>
- <xsl:when test="@BUSSTD">
- <xsl:value-of select="@BUSSTD"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="'TRS'"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bif_y_">
- <xsl:value-of select="(($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y)"/>
- </xsl:variable>
-
- <xsl:variable name="bif_buscol_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$bifBusStd_"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <xsl:variable name="bifName_">
- <xsl:choose>
- <xsl:when test="not(@NAME)">'UNK'</xsl:when>
- <xsl:when test="string-length(@NAME) <= 5">
- <xsl:value-of select="@NAME"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="substring(@NAME,0,5)"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bif_x_" >
- <xsl:if test="not(@ORIENTED='CENTER')">
- <xsl:value-of select="(($BLKD_BIF_W * @BIF_X) + ($BLKD_MOD_BIF_GAP_H * @BIF_X) + ($BLKD_MOD_LANE_W * 1))"/>
- </xsl:if>
- <xsl:if test="(@ORIENTED='CENTER')">
- <xsl:value-of select="ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_BIF_W div 2)"/>
- </xsl:if>
- </xsl:variable>
-
- <xsl:if test="not(@IS_INTCONN)">
- <xsl:variable name="horz_line_y_" select="($bif_y_ + $bif_dy_ + ceiling($BLKD_BIFC_H div 2))"/>
-
- <xsl:variable name="horz_line_x1_">
- <xsl:choose>
- <xsl:when test="@BIF_X = '0'">0</xsl:when>
- <xsl:otherwise><xsl:value-of select="($BLKD_MOD_W - $BLKD_MOD_LANE_W)"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="horz_line_x2_">
- <xsl:choose>
- <xsl:when test="@BIF_X = '0'"><xsl:value-of select="$BLKD_MOD_LANE_W"/></xsl:when>
- <xsl:otherwise><xsl:value-of select="$BLKD_MOD_W + 1"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <line x1="{$horz_line_x1_}"
- y1="{$horz_line_y_ - 2}"
- x2="{$horz_line_x2_}"
- y2="{$horz_line_y_ - 2}"
- style="stroke:{$bif_buscol_};stroke-width:1"/>
-
- </xsl:if>
-
- <use x="{$bif_x_}" y="{$bif_y_ + $bif_dy_}" xlink:href="#{$bifBusStd_}_BifLabel"/>
-<!--
- <text class="bif_label"
- x="{$bif_x_ + ceiling($BLKD_BIF_W div 2)}"
- y="{$bif_y_ + $bif_dy_ + ceiling($BLKD_BIF_H div 2) + 3}">
- <xsl:value-of select="$bifName_"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($bif_x_ + ceiling($BLKD_BIF_W div 2))"/>
- <xsl:with-param name="iY" select="($bif_y_ + $bif_dy_ + ceiling($BLKD_BIF_H div 2) + 3)"/>
-
- <xsl:with-param name="iText" select="$bifName_"/>
- <xsl:with-param name="iClass" select="'bif_label'"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
-<!--
- <xsl:if test="@INTC_INDEX">
- <xsl:variable name="intrColor_">
- <xsl:call-template name="F_IntcIdx2RGB">
- <xsl:with-param name="intcIdx" select="@INTC_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:call-template name="F_draw_InterruptCntrl">
- <xsl:with-param name="intr_col" select="$intrColor_"/>
- <xsl:with-param name="intr_x" select="($BLKD_MOD_W - ceiling($BLKD_INTR_W div 2))"/>
- <xsl:with-param name="intr_y" select="3"/>
- <xsl:with-param name="intr_idx" select="@INTC_INDEX"/>
- </xsl:call-template>
- </xsl:if>
--->
- <xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iModInst)]/@INTC_INDEX">
- <xsl:variable name="intrColor_">
- <xsl:call-template name="F_IntcIdx2RGB">
- <xsl:with-param name="iIntcIdx" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iModInst)]/@INTC_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:call-template name="F_draw_InterruptCntrl">
- <xsl:with-param name="iIntr_X" select="($BLKD_MOD_W - ceiling($BLKD_INTR_W div 2))"/>
- <xsl:with-param name="iIntr_Y" select="3"/>
- <xsl:with-param name="iIntr_COL" select="$intrColor_"/>
- <xsl:with-param name="iIntr_IDX" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iModInst)]/@INTC_INDEX"/>
- </xsl:call-template>
- </xsl:if>
-
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iModInst)]/INTERRUPTINFO[@TYPE ='TARGET']">
-
- <xsl:variable name="intrColor_">
- <xsl:call-template name="F_IntcIdx2RGB">
- <xsl:with-param name="iIntcIdx" select="@INTC_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:call-template name="F_draw_InterruptSource">
- <xsl:with-param name="iIntr_X" select="($BLKD_MOD_W - $BLKD_INTR_W)"/>
- <xsl:with-param name="iIntr_Y" select="((position() - 1) * (ceiling($BLKD_INTR_H div 2) + 3))"/>
- <xsl:with-param name="iIntr_COL" select="$intrColor_"/>
- <xsl:with-param name="iIntr_PRI" select="@PRIORITY"/>
- <xsl:with-param name="iIntr_IDX" select="@INTC_INDEX"/>
- </xsl:call-template>
-
- </xsl:for-each>
- </g>
-</xsl:template>
-
-<xsl:template name="Define_MemoryUnit">
- <xsl:param name="iShapeId" select="1000"/>
-
- <xsl:variable name="horiz_idx_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/@STACK_HORIZ_INDEX"/>
- <xsl:variable name="is_multistk_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/@IS_MULTISTK"/>
-
- <xsl:choose>
- <xsl:when test="(($is_multistk_ = 'TRUE') or ($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@STACK_HORIZ_INDEX = $horiz_idx_)]))">
- <xsl:call-template name="Define_Processor_MemoryUnit">
- <xsl:with-param name="iShapeId" select="$iShapeId"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:call-template name="Define_StandAlone_MemoryUnit">
- <xsl:with-param name="iShapeId" select="$iShapeId"/>
- </xsl:call-template>
- </xsl:otherwise>
-
- </xsl:choose>
-
-</xsl:template>
-
-
-<xsl:template name="Define_Processor_MemoryUnit">
- <xsl:param name="iShapeId" select="1000"/>
-
-<!--
- <xsl:param name="cstkIndex" select="'_processor_'"/>
--->
-
- <xsl:variable name="mods_h_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/@MODS_H"/>
- <xsl:variable name="mods_w_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/@MODS_W"/>
- <xsl:variable name="memW_" select="($BLKD_MOD_W * $mods_w_)"/>
- <xsl:variable name="memH_" select="($BLKD_MOD_H * $mods_h_)"/>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]">
-
- <!-- first define its symbols as individual modules -->
- <xsl:for-each select="MODULE[(@MODCLASS = 'MEMORY')]">
-
- <xsl:variable name="modInst_" select="@INSTANCE"/>
- <xsl:variable name="modType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInst_)]/@MODTYPE"/>
-
- <xsl:call-template name="Define_Peripheral">
- <xsl:with-param name="iModVori" select="'normal'"/>
- <xsl:with-param name="iModInst" select="$modInst_"/>
- <xsl:with-param name="iModType" select="$modType_"/>
- </xsl:call-template>
- </xsl:for-each>
-
- <xsl:for-each select="MODULE[@MODCLASS='MEMORY_CNTLR']">
-
- <xsl:variable name="modInst_" select="@INSTANCE"/>
- <xsl:variable name="modType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInst_)]/@MODTYPE"/>
-
- <xsl:call-template name="Define_Peripheral">
- <xsl:with-param name="iModVori" select="'rot180'"/>
- <xsl:with-param name="iModInst" select="$modInst_"/>
- <xsl:with-param name="iModType" select="$modType_"/>
- </xsl:call-template>
- </xsl:for-each>
- </xsl:for-each>
-
-<!--
--->
-
- <xsl:variable name="symbol_name_">
- <xsl:call-template name="F_generate_Stack_SymbolName">
- <xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
- <xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>The mp stack name is <xsl:value-of select="$mp_stack_name_"/></xsl:message>
--->
-
- <g id="{$symbol_name_}">
-
- <rect x="0"
- y="0"
- rx="6"
- ry="6"
- width = "{$memW_}"
- height= "{$memH_}"
- style="fill:{$COL_BG}; stroke:{$COL_WHITE}; stroke-width:2"/>
-
- <!-- Draw the memory block-->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[(@MODCLASS = 'MEMORY')]">
-
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="{ceiling($memW_ div 2) - ($BLKD_MOD_W div 2)}"
- y="0"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[((@MODCLASS='MEMORY_CNTLR') and (@ORIENTED = 'WEST'))]">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="0"
- y="{$BLKD_MOD_H}"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[((@MODCLASS='MEMORY_CNTLR') and (@ORIENTED = 'EAST'))]">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="{$BLKD_MOD_W}"
- y="{$BLKD_MOD_H}"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[((@MODCLASS='MEMORY_CNTLR') and (@ORIENTED = 'CENTER'))]">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="{ceiling($memW_ div 2) - ($BLKD_MOD_W div 2)}"
- y="{$BLKD_MOD_H}"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
-
- </g>
-
-</xsl:template>
-
-
-<xsl:template name="Define_StandAlone_MemoryUnit">
-
- <xsl:param name="iShapeId" select="0"/>
-
- <xsl:variable name="mods_h_" select="@MODS_H"/>
- <xsl:variable name="mods_w_" select="@MODS_W"/>
-
- <xsl:variable name="memcName_" select="MODULE[not(@MODCLASS = 'MEMORY')]/@INSTANCE"/>
- <xsl:variable name="memcBusStd_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE/BUSCONNLANE[(BUSCONN[(@INSTANCE = $memcName_)])]/@BUSSTD"/>
-
-<!--
- <xsl:variable name="memcBusStd_" select="/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE/BUSCONNLANE/@BUSSTD"/>
- <xsl:variable name="memcBusStd_" select="/EDKSYSTEM/BCLANESPACES/BCLANESPACE/BUSCONNLANE[(BUSCONN[(@INSTANCE)])]/@BUSSTD"/>
- <xsl:message>Memory cntlr name <xsl:value-of select="$memcName_"/></xsl:message>
- <xsl:message>Memory cntlr name <xsl:value-of select="$memcName_"/></xsl:message>
- <xsl:message>Memory cntlr busstd <xsl:value-of select="$memcBusStd_"/></xsl:message>
--->
-
- <xsl:variable name="peri_col_">
-
- <xsl:choose>
- <xsl:when test="$mods_w_ > 1">
- <xsl:value-of select="$COL_BG"/>
- </xsl:when>
-
- <xsl:when test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE/BUSCONNLANE[(BUSCONN[(@INSTANCE = $memcName_)])]/@BUSSTD">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$memcBusStd_"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="'TRS'"/>
- </xsl:call-template>
- </xsl:otherwise>
- </xsl:choose>
-
- </xsl:variable>
-
- <!-- first define its symbols as individual modules -->
- <xsl:for-each select="MODULE[(@MODCLASS = 'MEMORY')]">
-
- <xsl:variable name="modInst_" select="@INSTANCE"/>
- <xsl:variable name="modType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInst_)]/@MODTYPE"/>
-
- <xsl:call-template name="Define_Peripheral">
- <xsl:with-param name="iModVori" select="'rot180'"/>
- <xsl:with-param name="iModInst" select="$modInst_"/>
- <xsl:with-param name="iModType" select="$modType_"/>
- </xsl:call-template>
- </xsl:for-each>
-
- <xsl:for-each select="MODULE[not(@MODCLASS='MEMORY')]">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
- <xsl:variable name="modType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInst_)]/@MODTYPE"/>
-
-<!--
- <xsl:message>Memory cntlr inst <xsl:value-of select="$modInst_"/></xsl:message>
--->
- <xsl:call-template name="Define_Peripheral">
- <xsl:with-param name="iModVori" select="'normal'"/>
- <xsl:with-param name="iModInst" select="$modInst_"/>
- <xsl:with-param name="iModType" select="$modType_"/>
- </xsl:call-template>
- </xsl:for-each>
-
- <xsl:variable name="memW_" select="($BLKD_MOD_W * $mods_w_)"/>
- <xsl:variable name="memH_" select="($BLKD_MOD_H * $mods_h_)"/>
-
- <xsl:variable name="symbol_name_">
- <xsl:call-template name="F_generate_Stack_SymbolName">
- <xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
- <xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <g id="{$symbol_name_}">
-
- <rect x="0"
- y="0"
- rx="6"
- ry="6"
- width = "{$memW_ + 4}"
- height= "{$memH_ + 4}"
- style="fill:{$peri_col_}; stroke:{$peri_col_}; stroke-width:2"/>
-
-
- <!-- Draw the memory block-->
- <xsl:choose>
-
- <xsl:when test="$mods_w_ = 1">
-
- <xsl:for-each select="MODULE[(@MODCLASS='MEMORY')]">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="2"
- y="{$BLKD_MOD_H + 2}"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
-
-
- <!-- Draw the memory controllers-->
- <xsl:for-each select="MODULE[not(@MODCLASS='MEMORY')]">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="2"
- y="0"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
- </xsl:when>
-
- <xsl:when test="$mods_w_ > 1">
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[(@MODCLASS = 'MEMORY')]">
-
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="{ceiling($memW_ div 2) - ($BLKD_MOD_W div 2)}"
- y="{$BLKD_MOD_H + 2}"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[(not(@MODCLASS='MEMORY') and (@ORIENTED = 'WEST'))]">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="0"
- y="0"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[(not(@MODCLASS='MEMORY') and (@ORIENTED = 'EAST'))]">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="{$BLKD_MOD_W}"
- y="0"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[(not(@MODCLASS='MEMORY') and (@ORIENTED = 'CENTER'))]">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
-
- <use x="{ceiling($memW_ div 2) - ($BLKD_MOD_W div 2)}"
- y="0"
- xlink:href="#symbol_{$modInst_}"/>
- </xsl:for-each>
-
- </xsl:when>
- </xsl:choose>
-
- </g>
-
-</xsl:template>
-
-
-<xsl:template name="Define_StandAlone_MPMC">
-
-<!--
- <xsl:param name="drawarea_w" select="500"/>
- <xsl:param name="drawarea_h" select="500"/>
--->
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/MPMCSHAPE">
-
- <xsl:variable name="mpmcInst_" select="@INSTANCE"/>
- <xsl:variable name="mpmcType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[@INSTANCE=$mpmcInst_]/@MODTYPE"/>
-<!--
- <xsl:message>Drawing instance <xsl:value-of select="$mpmcInst_"/></xsl:message>
--->
-
- <xsl:variable name="mpmc_w_" select="($G_Total_DrawArea_W - ($BLKD_INNER_GAP * 2))"/>
- <xsl:variable name="label_y_" select="ceiling($BLKD_MPMC_MOD_H div 2) - ceiling($BLKD_MOD_LABEL_H div 2)"/>
-
- <g id="mpmcmodule_{$mpmcInst_}">
- <rect x="0"
- y="0"
- width = "{$mpmc_w_}"
- height= "{$BLKD_MPMC_MOD_H}"
- style="fill:{$COL_MPMC_BG}; stroke:{$COL_BLACK}; stroke-width:2"/>
-
- <rect x="{$BLKD_MOD_LANE_H}"
- y="{$label_y_}"
- rx="3"
- ry="3"
- width= "{$BLKD_MOD_LABEL_W}"
- height="{$BLKD_MOD_LABEL_H}"
- style="fill:{$COL_WHITE}; stroke:none;"/>
-<!--
- <text class="bc_iptype"
- x="{ceiling(($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_W) div 2)}"
- y="{$label_y_ + 8}">
- <xsl:value-of select="$mpmcType_"/>
- </text>
-
- <text class="bc_ipinst"
- x="{ceiling(($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_W) div 2)}"
- y="{$label_y_ + 16}">
- <xsl:value-of select="$mpmcInst_"/>
- </text>
-
- <text class="mpmc_title"
- x="{ceiling($mpmc_w_ div 2)}"
- y="{$label_y_ + 16}">MPMC Module Interface</text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(ceiling(($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_W) div 2))"/>
- <xsl:with-param name="iY" select="($label_y_ + 8)"/>
- <xsl:with-param name="iText" select="$mpmcType_"/>
- <xsl:with-param name="iClass" select="'bc_iptype'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="(ceiling(($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_W) div 2))"/>
- <xsl:with-param name="iY" select="($label_y_ + 16)"/>
- <xsl:with-param name="iText" select="$mpmcInst_"/>
- <xsl:with-param name="iClass" select="'bc_ipinst'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($mpmc_w_ div 2)"/>
- <xsl:with-param name="iY" select="($label_y_ + 16)"/>
- <xsl:with-param name="iText" select="'MPMC Module Interface'"/>
- <xsl:with-param name="iClass" select="'mpmc_title'"/>
- </xsl:call-template>
-
-
- </g>
-
- </xsl:for-each>
-
-</xsl:template>
-
-
-<!-- ======================= END DEF FUNCTIONS ============================ -->
-
-<!-- ======================= UTILITY FUNCTIONS ============================ -->
-
-<xsl:template name="F_draw_InterruptSource">
-
- <xsl:param name="iIntr_X" select="0"/>
- <xsl:param name="iIntr_Y" select="0"/>
- <xsl:param name="iIntr_PRI" select="0"/>
- <xsl:param name="iIntr_IDX" select="0"/>
- <xsl:param name="iIntr_COL" select="$COL_INTR_0"/>
-
- <rect
- x="{$iIntr_X}"
- y="{$iIntr_Y}"
- rx="3"
- ry="3"
- width= "{$BLKD_INTR_W}"
- height="{ceiling($BLKD_INTR_H div 2)}" style="fill:{$iIntr_COL}; stroke:none; stroke-width:1"/>
-
- <line x1="{$iIntr_X + ceiling($BLKD_INTR_W div 2)}"
- y1="{$iIntr_Y}"
- x2="{$iIntr_X + ceiling($BLKD_INTR_W div 2)}"
- y2="{$iIntr_Y + ceiling($BLKD_INTR_H div 2)}"
- style="stroke:{$COL_BLACK};stroke-width:1"/>
-
- <xsl:variable name="txt_ofs_">
- <xsl:if test="($iIntr_PRI > 9)">4.5</xsl:if>
- <xsl:if test="not($iIntr_PRI > 9)">0</xsl:if>
- </xsl:variable>
-
-<!--
- <text class="intrsymbol"
- x="{$iIntr_X + 2 - $txt_ofs_}"
- y="{$iIntr_Y + 8}">
- <xsl:value-of select="$iIntr_PRI"/>
- </text>
-
- <text class="intrsymbol"
- x="{$iIntr_X + 2 + ceiling($BLKD_INTR_W div 2)}"
- y="{$iIntr_Y + 8}">
- <xsl:value-of select="$iIntr_IDX"/>
- </text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($iIntr_X + 2 - $txt_ofs_)"/>
- <xsl:with-param name="iY" select="($iIntr_Y + 8)"/>
- <xsl:with-param name="iText" select="$iIntr_PRI"/>
- <xsl:with-param name="iClass" select="'intr_symbol'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($iIntr_X + 2 + ceiling($BLKD_INTR_W div 2))"/>
- <xsl:with-param name="iY" select="($iIntr_Y + 8)"/>
- <xsl:with-param name="iText" select="$iIntr_IDX"/>
- <xsl:with-param name="iClass" select="'intr_symbol'"/>
- </xsl:call-template>
-
-</xsl:template>
-
-<xsl:template name="F_draw_InterruptCntrl">
-
- <xsl:param name="iIntr_X" select="0"/>
- <xsl:param name="iIntr_Y" select="0"/>
- <xsl:param name="iIntr_IDX" select="0"/>
- <xsl:param name="iIntr_COL" select="$COL_INTR_0"/>
-
- <rect
- x="{$iIntr_X}"
- y="{$iIntr_Y}"
- rx="3"
- ry="3"
- width= "{ceiling($BLKD_INTR_W div 2)}"
- height="{$BLKD_INTR_H}" style="fill:{$iIntr_COL}; stroke:none; stroke-width:1"/>
-
- <line x1="{$iIntr_X}"
- y1="{$iIntr_Y + ceiling($BLKD_INTR_H div 4)}"
- x2="{$iIntr_X + ceiling($BLKD_INTR_W div 2)}"
- y2="{$iIntr_Y + ceiling($BLKD_INTR_H div 4)}"
- style="stroke:{$COL_BLACK};stroke-width:2"/>
-<!--
- <text class="intrsymbol"
- x="{$iIntr_X + 2}"
- y="{$iIntr_Y + 8 + ceiling($BLKD_INTR_H div 2)}">
- <xsl:value-of select="$iIntr_IDX"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($iIntr_X + 2)"/>
- <xsl:with-param name="iY" select="($iIntr_Y + 8 + ceiling($BLKD_INTR_H div 2))"/>
- <xsl:with-param name="iText" select="$iIntr_IDX"/>
- <xsl:with-param name="iClass" select="'intr_symbol'"/>
- </xsl:call-template>
-
-</xsl:template>
-
-
-<xsl:template name="F_draw_InterruptedProc">
-
- <xsl:param name="iIntr_X" select="0"/>
- <xsl:param name="iIntr_Y" select="0"/>
- <xsl:param name="iIntr_IDX" select="0"/>
- <xsl:param name="iIntr_COL" select="$COL_INTR_0"/>
-
- <rect
- x="{$iIntr_X}"
- y="{$iIntr_Y}"
- rx="3"
- ry="3"
- width= "{ceiling($BLKD_INTR_W div 2)}"
- height="{$BLKD_INTR_H}" style="fill:{$iIntr_COL}; stroke:none; stroke-width:1"/>
-
- <line x1="{$iIntr_X}"
- y1="{$iIntr_Y + ceiling($BLKD_INTR_H div 4) - 2}"
- x2="{$iIntr_X + ceiling($BLKD_INTR_W div 2)}"
- y2="{$iIntr_Y + ceiling($BLKD_INTR_H div 4) - 2}"
- style="stroke:{$COL_BLACK};stroke-width:1"/>
-
- <line x1="{$iIntr_X}"
- y1="{$iIntr_Y + ceiling($BLKD_INTR_H div 4) + 2}"
- x2="{$iIntr_X + ceiling($BLKD_INTR_W div 2)}"
- y2="{$iIntr_Y + ceiling($BLKD_INTR_H div 4) + 2}"
- style="stroke:{$COL_BLACK};stroke-width:1"/>
-
-<!--
- <text class="intrsymbol"
- x="{$iIntr_X + 2}"
- y="{$iIntr_Y + 8 + ceiling($BLKD_INTR_H div 2)}">
- <xsl:value-of select="$iIntr_IDX"/>
- </text>
- -->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($iIntr_X + 2)"/>
- <xsl:with-param name="iY" select="($iIntr_Y + 8 + ceiling($BLKD_INTR_H div 2))"/>
- <xsl:with-param name="iText" select="$iIntr_IDX"/>
- <xsl:with-param name="iClass" select="'intr_symbol'"/>
- </xsl:call-template>
-
-</xsl:template>
-
-<xsl:template name="F_Calc_CStackShapesAbv_Height">
- <xsl:param name="iCStackIndex" select="100"/>
- <xsl:param name="iCStackMods_Y" select="1000"/>
-
-<!--
- <xsl:message>Stack Index <xsl:value-of select="$cstackIndex"/></xsl:message>
-
- <xsl:message>Stack Y <xsl:value-of select="$cstackModY"/></xsl:message>
--->
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@CSTACK_INDEX = $iCStackIndex)])">0</xsl:if>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@CSTACK_INDEX = $iCStackIndex)]">
-
- <xsl:variable name="shapesAbv_Heights_">
- <CSTACK_MOD HEIGHT="0"/>
-
- <!-- Store the heights of all the peripherals above this one heights in a variable -->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@CSTACK_INDEX = $iCStackIndex) and (@CSTACK_MODS_Y < $iCStackMods_Y))]">
-
- <xsl:variable name="shapeHeight_">
-
- <xsl:choose>
-
- <xsl:when test="@MODCLASS = 'PERIPHERAL'">
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="MODULE/@INSTANCE"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="@MODCLASS = 'MEMORY_UNIT'">
- <xsl:call-template name="F_Calc_MemoryUnit_Height">
- <xsl:with-param name="iShapeId" select="@SHAPE_ID"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message>Calculated height of cstack shape of type <xsl:value-of select="@MODCLASS"/> as <xsl:value-of select="$shapeHeight_"/></xsl:message>
--->
-
- <CSTACK_MOD HEIGHT="{$shapeHeight_ + $BLKD_BIF_H}"/>
- </xsl:for-each>
- </xsl:variable>
-
-<!--
- <xsl:message>Calculated height of cstack as <xsl:value-of select="sum(exsl:node-set($shapesAbv_Heights_)/CSTACK_MOD/@HEIGHT)"/></xsl:message>
--->
-
- <xsl:value-of select="sum(exsl:node-set($shapesAbv_Heights_)/CSTACK_MOD/@HEIGHT)"/>
- </xsl:if>
-
-</xsl:template>
-
-
-<xsl:template name="F_Calc_PeriShape_Height">
- <xsl:param name="iShapeInst" select="'_shape_'"/>
-
-<!--
- <xsl:message>Calculating height of <xsl:value-of select="$iShapeInst"/></xsl:message>
--->
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/MODULE[(@INSTANCE = $iShapeInst)]/@BIFS_H) and
- not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $iShapeInst)]/@BIFS_H) and
- not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE[(@INSTANCE = $iShapeInst)]/@BIFS_H)">0</xsl:if>
-
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/MODULE[(@INSTANCE = $iShapeInst)]/@BIFS_H)">
- <xsl:variable name="bifs_h_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE/MODULE[(@INSTANCE = $iShapeInst)]/@BIFS_H"/>
-
- <xsl:value-of select="($BLKD_MOD_LABEL_H + ($BLKD_BIF_H * $bifs_h_) + ($BLKD_MOD_BIF_GAP_V * $bifs_h_) + ($BLKD_MOD_LANE_H * 2))"/>
- </xsl:if>
-
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE[(@INSTANCE = $iShapeInst)]/@BIFS_H)">
- <xsl:variable name="bifs_h_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BRIDGESHAPES/MODULE[(@INSTANCE = $iShapeInst)]/@BIFS_H"/>
-
- <xsl:value-of select="($BLKD_MOD_LABEL_H + ($BLKD_BIF_H * $bifs_h_) + ($BLKD_MOD_BIF_GAP_V * $bifs_h_) + ($BLKD_MOD_LANE_H * 2))"/>
- </xsl:if>
-
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $iShapeInst)]/@BIFS_H)">
- <xsl:variable name="bifs_h_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@INSTANCE = $iShapeInst)]/@BIFS_H"/>
-
- <xsl:value-of select="($BLKD_MOD_LABEL_H + ($BLKD_BIF_H * $bifs_h_) + ($BLKD_MOD_BIF_GAP_V * $bifs_h_) + ($BLKD_MOD_LANE_H * 2))"/>
- </xsl:if>
-
-</xsl:template>
-
-<xsl:template name="F_Calc_Shape_Height">
- <xsl:param name="iShapeId" select="_shape_"/>
-
-<!--
- <xsl:message>Calculating height of <xsl:value-of select="$shapeId"/></xsl:message>
--->
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)])">0</xsl:if>
-
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE/@BIFS_H)">
- <xsl:variable name="bifs_h_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE/@BIFS_H"/>
-
- <xsl:value-of select="($BLKD_MOD_LABEL_H + ($BIF_H * $bifs_h_) + ($BLKD_MOD_BIF_GAP_V * $bifs_h_) + ($BLKD_MOD_LANE_H * 2))"/>
- </xsl:if>
-
-</xsl:template>
-
-
-<xsl:template name="F_Calc_MemoryUnit_Height">
- <xsl:param name="iShapeId" select="1000"/>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)])">0</xsl:if>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]">
-
- <!-- Store the memory controller heights in a variable -->
- <xsl:variable name="memC_heights_">
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[(@MODCLASS = 'MEMORY_CNTLR')])">
- <MEM_CNTLR INSTANCE="{@INSTANCE}" HEIGHT="0"/>
- </xsl:if>
-
- <xsl:if test="($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[(@MODCLASS = 'MEMORY_CNTLR')])">
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[(@MODCLASS = 'MEMORY_CNTLR')]">
- <xsl:variable name="memC_height_">
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="@INSTANCE"/>
- </xsl:call-template>
- </xsl:variable>
- <MEM_CNTLR INSTANCE="{@INSTANCE}" HEIGHT="{$memC_height_}"/>
- </xsl:for-each>
- </xsl:if>
- </xsl:variable>
-
- <!-- Store the bram heights in a variable -->
- <xsl:variable name="bram_heights_">
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[not(@MODCLASS = 'MEMORY_CNTLR')])">
- <BRAM INSTANCE="{@INSTANCE}" HEIGHT="0"/>
- </xsl:if>
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[not(@MODCLASS = 'MEMORY_CNTLR')]">
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@SHAPE_ID = $iShapeId)]/MODULE[not(@MODCLASS = 'MEMORY_CNTLR')]">
- <xsl:variable name="bram_height_">
- <xsl:call-template name="F_Calc_PeriShape_Height">
- <xsl:with-param name="iShapeInst" select="@INSTANCE"/>
- </xsl:call-template>
- </xsl:variable>
- <BRAM INSTANCE="{@INSTANCE}" HEIGHT="{$bram_height_}"/>
- </xsl:for-each>
- </xsl:if>
- </xsl:variable>
-
- <!-- Select the maximum of them -->
- <xsl:variable name="max_bram_height_" select="math:max(exsl:node-set($bram_heights_)/BRAM/@HEIGHT)"/>
- <xsl:variable name="max_memC_height_" select="math:max(exsl:node-set($memC_heights_)/MEM_CNTLR/@HEIGHT)"/>
-
- <xsl:value-of select="$max_bram_height_ + $max_memC_height_"/>
- </xsl:if>
-
-</xsl:template>
-
-
-<xsl:template name="F_Calc_SbsBucket_Height">
- <xsl:param name="iBucketId" select="100"/>
-
-<!--
- <xsl:message>Looking of height of bucket <xsl:value-of select="$iBucketId"/></xsl:message>
--->
- <xsl:variable name="bkt_gap_" select="$BLKD_BIF_H"/>
-
- <xsl:if test="not($G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@BUS_INDEX = $iBucketId)])">0</xsl:if>
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@BUS_INDEX = $iBucketId)]">
- <xsl:variable name="mods_h_" select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@BUS_INDEX = $iBucketId)]/@MODS_H"/>
- <xsl:value-of select="((($BLKD_MOD_BKTLANE_H * 2) + ((($BLKD_MOD_H + $BLKD_BIFC_H) * $mods_h_) + ($BLKD_MOD_BUCKET_G * ($mods_h_ - 1)))) + $bkt_gap_)"/>
- </xsl:if>
-</xsl:template>
-
-<!--
- ===============================================
-
- Symbol Naming Functions
-
- ===============================================
--->
-
-
-<xsl:template name="F_generate_Proc_StackName">
-<xsl:param name="iProcInst" select="'_unknown_'"/>
-symbol_STACK_<xsl:value-of select="$iProcInst"/>
-</xsl:template>
-
-<xsl:template name="F_generate_Proc_GroupName">
-<xsl:param name="iProcInst" select="'_unknown_'"/>
-symbol_GROUP_<xsl:value-of select="$iProcInst"/>
-</xsl:template>
-
-
-<xsl:template name="F_generate_Space_Name"><xsl:param name="iStackToEast" select="'NONE'"/><xsl:param name="iStackToWest" select="'NONE'"/>symbol_SPACE_WEST_<xsl:value-of select="$iStackToWest"/>_EAST_<xsl:value-of select="$iStackToEast"/></xsl:template>
-<xsl:template name="F_generate_Stack_Name"><xsl:param name="iHorizIdx" select="'_unknown_'"/>symbol_STACK_<xsl:value-of select="$iHorizIdx"/></xsl:template>
-<xsl:template name="F_generate_Stack_SymbolName"><xsl:param name="iHorizIdx" select="'_unknown_'"/><xsl:param name="iVertiIdx" select="'_unknown_'"/>symbol_STACK_<xsl:value-of select="$iHorizIdx"/>_SHAPE_<xsl:value-of select="$iVertiIdx"/></xsl:template>
-
-
-<!-- ======================= END UTILITY FUNCTIONS ======================= -->
-</xsl:stylesheet>
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Processors.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Processors.xsl
deleted file mode 100644
index 11ab1be081..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgBLKD_Processors.xsl
+++ /dev/null
@@ -1,465 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<!--
-<xsl:output method="xml"
- version="1.0"
- encoding="UTF-8"
- indent="yes"
- doctype-public="-//W3C//DTD SVG Tiny 1.1//EN"
- doctype-system="http://www.w3.org/Graphics/SVG/1.1/DTD/svg11-tiny.dtd"/>
--->
-
-
-<!-- ======================= DEF BLOCK =================================== -->
-<xsl:template name="Define_AllStacks">
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/BCLANESPACES/BCLANESPACE[(@EAST < $G_ROOT/EDKSYSTEM/BLKDIAGRAM/@STACK_HORIZ_WIDTH)]">
-
- <xsl:call-template name="Define_Stack">
- <xsl:with-param name="iStackIdx" select="@EAST"/>
- </xsl:call-template>
-
- </xsl:for-each>
-</xsl:template>
-
-
-<xsl:template name="Define_Stack">
- <xsl:param name="iStackIdx" select="100"/>
-
- <!-- Define the stack's peripheral shapes-->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and not(@MODCLASS = 'MEMORY_UNIT'))]">
-
- <xsl:for-each select="MODULE">
- <xsl:variable name="modInst_" select="@INSTANCE"/>
- <xsl:variable name="modType_" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $modInst_)]/@MODTYPE"/>
- <xsl:call-template name="Define_Peripheral">
- <xsl:with-param name="iModInst" select="$modInst_"/>
- <xsl:with-param name="iModType" select="$modType_"/>
- <xsl:with-param name="iShapeId" select="../@SHAPE_ID"/>
- <xsl:with-param name="iHorizIdx" select="../@STACK_HORIZ_INDEX"/>
- <xsl:with-param name="iVertiIdx" select="../@SHAPE_VERTI_INDEX"/>
- </xsl:call-template>
- </xsl:for-each>
-
- </xsl:for-each>
-
- <!-- Define the stack's memory shapes-->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[((@STACK_HORIZ_INDEX = $iStackIdx) and (@MODCLASS='MEMORY_UNIT'))]">
- <xsl:call-template name="Define_MemoryUnit">
- <xsl:with-param name="iShapeId" select="@SHAPE_ID"/>
- </xsl:call-template>
- </xsl:for-each>
-
-
- <!-- Define the stack's processors-->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[@INSTANCE and @BIFS_W and @BIFS_H and (@STACK_HORIZ_INDEX = $iStackIdx)]">
- <xsl:call-template name="Define_Processor"/>
- </xsl:for-each>
-
- <!-- Make an inventory of all the things in this processor's stack -->
- <xsl:variable name="pstackW_">
- <xsl:call-template name="F_Calc_Stack_Width">
- <xsl:with-param name="iStackIdx" select="$iStackIdx"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="pstackH_">
- <xsl:call-template name="F_Calc_Stack_Height">
- <xsl:with-param name="iStackIdx" select="$iStackIdx"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Proc Stack Height <xsl:value-of select="$pstackH_"/></xsl:message>
- <xsl:message>Proc Stack Height <xsl:value-of select="$pstackH_"/></xsl:message>
--->
-
- <xsl:variable name="procW_" select="$BLKD_MOD_W"/>
- <xsl:variable name="procX_" select="(ceiling($pstackW_ div 2) - ceiling($procW_ div 2))"/>
-
- <xsl:variable name="sbsGap_" select="($BLKD_PROC2SBS_GAP + $G_Total_SharedBus_H)"/>
-
- <xsl:variable name="stack_name_">
- <xsl:call-template name="F_generate_Stack_Name">
- <xsl:with-param name="iHorizIdx" select="$iStackIdx"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Horiz index<xsl:value-of select="$stackIdx"/></xsl:message>
- <xsl:message>Drawing stack <xsl:value-of select="$stack_name_"/></xsl:message>
--->
-
- <!-- Now use all this stuff to draw the stack-->
- <g id="{$stack_name_}">
- <rect x="0"
- y="0"
- rx="6"
- ry="6"
- width = "{$pstackW_}"
- height= "{$pstackH_}"
- style="fill:{$COL_BG}; stroke:none;"/>
-
-
- <!-- First draw the the processor's peripherals-->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/CMPLXSHAPES/CMPLXSHAPE[(@STACK_HORIZ_INDEX = $iStackIdx)]">
- <xsl:sort select="@STACK_VERTI_INDEX" data-type="number"/>
-
-
- <xsl:variable name="shapeW_" select="(@MODS_W * $BLKD_MOD_W)"/>
- <xsl:variable name="shapeX_" select="(ceiling($pstackW_ div 2) - ceiling($shapeW_ div 2))"/>
-
- <xsl:variable name="stack_SymName_">
- <xsl:call-template name="F_generate_Stack_SymbolName">
- <xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
- <xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>Drawing stack peripheral <xsl:value-of select="$stack_SymName_"/></xsl:message>
--->
- <xsl:variable name="shapeY_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
- <xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
- <use x="{$shapeX_}" y="{$shapeY_}" xlink:href="#{$stack_SymName_}"/>
-
- </xsl:for-each>
-
-
- <!-- Then draw the slave buckets for the shared busses that this processor is master to -->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/SBSBUCKETS/SBSBUCKET[(@STACK_HORIZ_INDEX = $iStackIdx)]">
- <xsl:sort select="@SHAPE_VERTI_INDEX" data-type="number"/>
-
- <xsl:variable name="bucketW_" select="(($BLKD_MOD_BKTLANE_W * 2) + (($BLKD_MOD_W * @MODS_W) + ($BLKD_MOD_BUCKET_G * (@MODS_W - 1))))"/>
- <xsl:variable name="bucketX_" select="(ceiling($pstackW_ div 2) - ceiling($bucketW_ div 2))"/>
-
- <xsl:variable name="bucketY_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
- <xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>SBS Bucket Y <xsl:value-of select="$bucketY_"/></xsl:message>
--->
-
- <use x="{$bucketX_}" y="{$bucketY_}" xlink:href="#sbsbucket_{@BUSNAME}"/>
-
- <xsl:variable name="slavesOfTxt_">SLAVES OF <xsl:value-of select="@BUSNAME"/></xsl:variable>
-<!--
- <text class="bkt_label"
- x="{$bucketX_}"
- y="{$bucketY_ - 4}"><xsl:value-of select="$slavesOfTxt_"/></text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="$bucketX_"/>
- <xsl:with-param name="iY" select="($bucketY_ - 4)"/>
- <xsl:with-param name="iText" select="$slavesOfTxt_"/>
- <xsl:with-param name="iClass" select="'bkt_label'"/>
- </xsl:call-template>
-
-
- </xsl:for-each>
-
- <!-- Then draw the the processor itself -->
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/BLKDIAGRAM/PROCSHAPES/MODULE[(@STACK_HORIZ_INDEX = $iStackIdx)]">
- <xsl:sort select="@SHAPE_VERTI_INDEX" data-type="number"/>
-
- <xsl:variable name="procY_">
- <xsl:call-template name="F_Calc_Stack_Shape_Y">
- <xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
- <xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="stack_SymName_">
- <xsl:call-template name="F_generate_Stack_SymbolName">
- <xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
- <xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
- <use x="{$procX_}" y="{$procY_}" xlink:href="#{$stack_SymName_}"/>
-
-
-<!--
- <xsl:if test = "not(@IS_LIKEPROC)">
- <text class="ipclass_label"
- x="{$procX_}"
- y="{$procY_ - 4}">PROCESSOR</text>
- </xsl:if>
-
- <xsl:if test = "@IS_LIKEPROC = 'TRUE'">
-
- <text class="ipclass_label"
- x="{$procX_}"
- y="{$procY_ - 4}">USER MODULE</text>
- </xsl:if>
-
--->
-
- <xsl:if test = "not(@IS_LIKEPROC)">
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="$procX_"/>
- <xsl:with-param name="iY" select="($procY_ - 4)"/>
- <xsl:with-param name="iText" select="'PROCESSOR'"/>
- <xsl:with-param name="iClass" select="'ipclass_label'"/>
- </xsl:call-template>
- </xsl:if>
-
- <xsl:if test = "@IS_LIKEPROC = 'TRUE'">
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="$procX_"/>
- <xsl:with-param name="iY" select="($procY_ - 4)"/>
- <xsl:with-param name="iText" select="'USER MODULE'"/>
- <xsl:with-param name="iClass" select="'ipclass_label'"/>
- </xsl:call-template>
- </xsl:if>
-
- </xsl:for-each>
- </g>
-
-</xsl:template>
-
-
-<xsl:template name="Define_Processor">
- <xsl:param name="iProcInst" select="@INSTANCE"/>
- <xsl:param name="iModType" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/@MODTYPE"/>
-
- <xsl:variable name="label_y_">
- <xsl:value-of select="$BLKD_MOD_LANE_H"/>
- </xsl:variable>
-
-<!--
- <xsl:message>The proctype is <xsl:value-of select="$procType"/></xsl:message>
--->
-
- <xsl:variable name="procH_" select="(($BLKD_MOD_LANE_H * 2) + (($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIFS_H) + ($BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
- <xsl:variable name="procW_" select="(($BLKD_MOD_LANE_W * 2) + (($BLKD_BIF_W * @BIFS_W) + $BLKD_MOD_BIF_GAP_H))"/>
-
- <xsl:variable name="procColor_">
- <xsl:choose>
- <xsl:when test="contains($iModType,'microblaze')"><xsl:value-of select="$COL_PROC_BG_MB"/></xsl:when>
- <xsl:when test="contains($iModType,'ppc')"><xsl:value-of select="$COL_PROC_BG_PP"/></xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$COL_PROC_BG_USR"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message>The proc color is <xsl:value-of select="$procColor"/></xsl:message>
--->
-
- <xsl:variable name="procName_">
- <xsl:call-template name="F_generate_Stack_SymbolName">
- <xsl:with-param name="iHorizIdx" select="@STACK_HORIZ_INDEX"/>
- <xsl:with-param name="iVertiIdx" select="@SHAPE_VERTI_INDEX"/>
- </xsl:call-template>
- </xsl:variable>
-
-<!--
- <xsl:message>The proc name is <xsl:value-of select="$procName_"/></xsl:message>
--->
-
- <g id="{$procName_}">
-
- <rect x="0"
- y="0"
- rx="6"
- ry="6"
- width = "{$procW_}"
- height= "{$procH_}"
- style="fill:{$procColor_}; stroke:{$COL_WHITE}; stroke-width:2"/>
-
-
- <rect x="{ceiling($procW_ div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
- y="{$BLKD_MOD_LANE_H}"
- rx="3"
- ry="3"
- width= "{$BLKD_MOD_LABEL_W}"
- height="{$BLKD_MOD_LABEL_H}"
- style="fill:{$COL_WHITE}; stroke:none;"/>
-<!--
- <text class="bciptype"
- x="{ceiling($procW_ div 2)}"
- y="{$BLKD_MOD_LANE_H + 8}">
- <xsl:value-of select="$iModType"/>
- </text>
-
- <text class="bciplabel"
- x="{ceiling($procW_ div 2)}"
- y="{$BLKD_MOD_LANE_H + 16}">
- <xsl:value-of select="$iProcInst"/>
- </text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($procW_ div 2)"/>
- <xsl:with-param name="iY" select="($BLKD_MOD_LANE_H + 8)"/>
- <xsl:with-param name="iText" select="$iModType"/>
- <xsl:with-param name="iClass" select="'bc_iptype'"/>
- </xsl:call-template>
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($procW_ div 2)"/>
- <xsl:with-param name="iY" select="($BLKD_MOD_LANE_H + 16)"/>
- <xsl:with-param name="iText" select="$iProcInst"/>
- <xsl:with-param name="iClass" select="'bc_ipinst'"/>
- </xsl:call-template>
-
-
-
- <xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/@GROUP">
-
- <rect x="{ceiling($BLKD_MOD_W div 2) - ceiling($BLKD_MOD_LABEL_W div 2)}"
- y="{$BLKD_MOD_LANE_H + $BIF_H + ceiling($BLKD_BIF_H div 3) - 2}"
- rx="3"
- ry="3"
- width= "{$BLKD_MOD_LABEL_W}"
- height="{$BLKD_BIF_H}"
- style="fill:{$COL_IORING_LT}; stroke:none;"/>
-<!--
- <text class="ioplblgrp"
- x="{ceiling($BLKD_MOD_W div 2)}"
- y="{$BLKD_MOD_LANE_H + $BIF_H + ceiling($BIF_H div 3) + 12}">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/@GROUP"/>
- </text>
--->
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="ceiling($BLKD_MOD_W div 2)"/>
- <xsl:with-param name="iY" select="($BLKD_MOD_LANE_H + $BIF_H + ceiling($BIF_H div 3) + 12)"/>
- <xsl:with-param name="iText" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/@GROUP"/>
- <xsl:with-param name="iClass" select="'iogrp_label'"/>
- </xsl:call-template>
-
- </xsl:if>
-
-
- <xsl:for-each select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/BUSINTERFACE[(@BIF_X and @BIF_Y)]">
-
- <xsl:variable name="bifBusStd_">
- <xsl:choose>
- <xsl:when test="@BUSSTD">
- <xsl:value-of select="@BUSSTD"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="'TRS'"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bifBusColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$bifBusStd_"/>
- </xsl:call-template>
- </xsl:variable>
-
-
- <xsl:variable name="bifName_">
- <xsl:choose>
- <xsl:when test="string-length(@NAME) <= 5">
- <xsl:value-of select="@NAME"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="substring(@NAME,0,5)"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bif_x_" select="(( $BLKD_BIF_W * @BIF_X) + ($BLKD_MOD_BIF_GAP_H * @BIF_X) + ($BLKD_MOD_LANE_W * 1))"/>
- <xsl:variable name="bif_y_" select="((($BLKD_BIF_H + $BLKD_MOD_BIF_GAP_V) * @BIF_Y) + ($BLKD_MOD_LANE_H + $BLKD_MOD_LABEL_H + $BLKD_MOD_BIF_GAP_V))"/>
-
- <xsl:variable name="horz_line_y_" select="($bif_y_ + ceiling($BLKD_BIFC_H div 2))"/>
-
- <xsl:variable name="horz_line_x1_">
- <xsl:choose>
- <xsl:when test="@BIF_X = '0'">0</xsl:when>
- <xsl:otherwise><xsl:value-of select="($BLKD_MOD_W - $BLKD_MOD_LANE_W)"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="horz_line_x2_">
- <xsl:choose>
- <xsl:when test="@BIF_X = '0'"><xsl:value-of select="$BLKD_MOD_LANE_W"/></xsl:when>
- <xsl:otherwise><xsl:value-of select="$BLKD_MOD_W + 1"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <line x1="{$horz_line_x1_}"
- y1="{$horz_line_y_ - 2}"
- x2="{$horz_line_x2_}"
- y2="{$horz_line_y_ - 2}"
- style="stroke:{$bifBusColor_};stroke-width:1"/>
-
- <use x="{$bif_x_}" y="{$bif_y_}" xlink:href="#{$bifBusStd_}_BifLabel"/>
-
-<!--
- <text class="bif_label"
- x="{$bif_x_ + ceiling($BIF_W div 2)}"
- y="{$bif_y_ + ceiling($BIF_H div 2) + 3}">
- <xsl:value-of select="$bifName_"/>
- </text>
--->
-
- <xsl:call-template name="F_WriteText">
- <xsl:with-param name="iX" select="($bif_x_ + ceiling($BIF_W div 2))"/>
- <xsl:with-param name="iY" select="($bif_y_ + ceiling($BIF_H div 2) + 3)"/>
- <xsl:with-param name="iText" select="$bifName_"/>
- <xsl:with-param name="iClass" select="'bif_label'"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
- <xsl:variable name="intcIdx_">
- <xsl:choose>
- <xsl:when test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/INTERRUPTINFO/@INTC_INDEX">
- <xsl:value-of select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $iProcInst)]/INTERRUPTINFO/@INTC_INDEX"/>
- </xsl:when>
- <xsl:otherwise>"_no_interrupt_cntlr_"</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-<!--
- <xsl:message> The intc index should <xsl:value-of select="$interrupt_cntlr_"/></xsl:message>
- <xsl:message> The intc index is <xsl:value-of select="/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $interrupt_cntlr_)]/@INTC_INDEX"/></xsl:message>
--->
- <xsl:if test="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(INTERRUPTINFO[(@INTC_INDEX = $intcIdx_)])]">
-
- <xsl:variable name="intrColor_">
- <xsl:call-template name="F_IntcIdx2RGB">
- <xsl:with-param name="iIntcIdx" select="$intcIdx_"/>
-<!--
- <xsl:with-param name="iIntcIdx" select="$G_ROOT/EDKSYSTEM/MODULES/MODULE[(@INSTANCE = $interrupt_cntlr_)]/INTERRUPTINFO/@INTC_INDEX"/>
- -->
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:call-template name="F_draw_InterruptedProc">
- <xsl:with-param name="iIntr_X" select="($BLKD_MOD_W - ceiling($BLKD_INTR_W div 2))"/>
- <xsl:with-param name="iIntr_Y" select="3"/>
- <xsl:with-param name="iIntr_COL" select="$intrColor_"/>
- <xsl:with-param name="iIntr_IDX" select="$intcIdx_"/>
- </xsl:call-template>
- </xsl:if>
- </g>
-
-</xsl:template>
-
-</xsl:stylesheet>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgDiag_BifShapes.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgDiag_BifShapes.xsl
deleted file mode 100644
index 160f2d8bee..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/.dswkshop/MdtTinySvgDiag_BifShapes.xsl
+++ /dev/null
@@ -1,271 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<!--
-<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"
- doctype-public="-//W3C//DTD SVG 1.0//EN"
- doctype-system="http://www.w3.org/TR/SVG/DTD/svg10.dtd"/>
--->
-
-<!-- ======================= DEF BLOCK =================================== -->
-
-<xsl:template name="Define_ConnectedBifTypes">
-
- <xsl:for-each select="exsl:node-set($COL_BUSSTDS)/BUSCOLOR">
- <xsl:variable name="busStd_" select="@BUSSTD"/>
- <xsl:variable name="psfStd_" select="@BUSSTD_PSF"/>
- <xsl:for-each select="$G_SYS_MODS">
- <xsl:variable name="bif_by_busStd_" select="key('G_MAP_ALL_BIFS',$busStd_)[((@IS_INSTANTIATED = 'TRUE') or (@IS_INMHS = 'TRUE'))]"/>
- <xsl:variable name="num_of_busStd_" select="count($bif_by_busStd_)"/>
-
- <xsl:variable name="bif_by_psfStd_" select="key('G_MAP_ALL_BIFS',$psfStd_)[((@IS_INSTANTIATED = 'TRUE') or (@IS_INMHS = 'TRUE'))]"/>
- <xsl:variable name="num_of_psfStd_" select="count($bif_by_psfStd_)"/>
- <!--
- <xsl:message>DEBUG : <xsl:value-of select="$busStd_"/> : <xsl:value-of select="$num_of_busStd_"/> : <xsl:value-of select="$num_of_psfStd_"/></xsl:message>
- <xsl:variable name="bif_by_busStd_" select="key('G_MAP_ALL_BIFS',$busStd_)[(@IS_INSTANTIATED = 'TRUE')]"/>
- <xsl:variable name="num_of_busStd_" select="count($bif_by_busStd_)"/>
- -->
- <xsl:if test="(($num_of_busStd_ > 0) or ($num_of_psfStd_ > 0))">
- <xsl:if test="($num_of_busStd_ > 0)">
- <xsl:call-template name="Define_BifLabel">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- </xsl:call-template>
- </xsl:if>
- <xsl:if test="($num_of_psfStd_ > 0)">
- <xsl:call-template name="Define_BifLabel">
- <xsl:with-param name="iBusStd" select="$psfStd_"/>
- </xsl:call-template>
- </xsl:if>
- <xsl:for-each select="exsl:node-set($G_BIFTYPES)/BIFTYPE">
- <xsl:variable name="bifType_" select="@TYPE"/>
-
- <xsl:variable name="num_of_bifType_" select="count($bif_by_busStd_[(@TYPE = $bifType_)])"/>
- <!--
- <xsl:message>DEBUG : <xsl:value-of select="$bifType_"/> : <xsl:value-of select="$num_of_bifType_"/></xsl:message>
- -->
-
- <xsl:if test="($num_of_bifType_ > 0)">
- <xsl:if test="($num_of_busStd_ > 0)">
- <xsl:call-template name="Define_BifTypeConnector">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBifType" select="$bifType_"/>
- </xsl:call-template>
- </xsl:if>
- <xsl:if test="($num_of_psfStd_ > 0)">
- <xsl:call-template name="Define_BifTypeConnector">
- <xsl:with-param name="iBusStd" select="$busStd_"/>
- <xsl:with-param name="iBifType" select="$bifType_"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:if>
- </xsl:for-each>
- </xsl:if>
- </xsl:for-each>
- </xsl:for-each>
-
- <xsl:call-template name="Define_BifLabel">
- <xsl:with-param name="iBusStd" select="'KEY'"/>
- </xsl:call-template>
-
- <xsl:for-each select="exsl:node-set($G_BIFTYPES)/BIFTYPE">
- <xsl:variable name="bifType_" select="@TYPE"/>
-
- <xsl:call-template name="Define_BifTypeConnector">
- <xsl:with-param name="iBusStd" select="'KEY'"/>
- <xsl:with-param name="iBifType" select="$bifType_"/>
- </xsl:call-template>
-
- </xsl:for-each>
-
-</xsl:template>
-
-<xsl:template name="Define_BifLabel">
-
- <xsl:param name="iBusStd" select="'USER'"/>
-
- <xsl:variable name="busStdColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <g id="{$iBusStd}_BifLabel">
- <rect x="0"
- y="0"
- rx="3"
- ry="3"
- width= "{$BIF_W}"
- height="{$BIF_H}"
- style="fill:{$busStdColor_}; stroke:black; stroke-width:1"/>
- </g>
-
-</xsl:template>
-
-
-<xsl:template name="Define_BifTypeConnector">
-
- <xsl:param name="iBusStd" select="'USER'"/>
- <xsl:param name="iBifType" select="'USER'"/>
-
- <xsl:variable name="busStdColor_">
- <xsl:call-template name="F_BusStd2RGB">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="busStdColor_lt_">
- <xsl:call-template name="F_BusStd2RGB_LT">
- <xsl:with-param name="iBusStd" select="$iBusStd"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="bifc_wi_" select="ceiling($BIFC_W div 3)"/>
- <xsl:variable name="bifc_hi_" select="ceiling($BIFC_H div 3)"/>
-
- <xsl:choose>
-
- <xsl:when test="$iBifType = 'SLAVE'">
- <g id="{$iBusStd}_busconn_{$iBifType}">
- <circle
- cx="{ceiling($BIFC_W div 2)}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_W div 2)}"
- style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
- <circle
- cx="{ceiling($BIFC_W div 2) + 0.5}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_Wi div 2)}"
- style="fill:{$busStdColor_}; stroke:none;"/>
- </g>
- </xsl:when>
-
- <xsl:when test="$iBifType = 'MASTER'">
- <g id="{$iBusStd}_busconn_{$iBifType}">
- <rect x="0"
- y="0"
- width= "{$BIFC_W}"
- height="{$BIFC_H}"
- style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
- <rect x="{$BIFC_dx + 0.5}"
- y="{$BIFC_dy}"
- width= "{$BIFC_Wi}"
- height="{$BIFC_Hi}"
- style="fill:{$busStdColor_}; stroke:none;"/>
- </g>
- </xsl:when>
-
- <xsl:when test="$iBifType = 'INITIATOR'">
- <g id="{$iBusStd}_busconn_{$iBifType}">
- <rect x="0"
- y="0"
- width= "{$BIFC_W}"
- height="{$BIFC_H}"
- style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
- <rect x="{$BIFC_dx + 0.5}"
- y="{$BIFC_dy}"
- width= "{$BIFC_Wi}"
- height="{$BIFC_Hi}"
- style="fill:{$busStdColor_}; stroke:none;"/>
- </g>
- </xsl:when>
-
- <xsl:when test="$iBifType = 'TARGET'">
- <g id="{$iBusStd}_busconn_{$iBifType}">
- <circle
- cx="{ceiling($BIFC_W div 2)}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_W div 2)}"
- style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
- <circle
- cx="{ceiling($BIFC_W div 2) + 0.5}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_Wi div 2)}"
- style="fill:{$busStdColor_}; stroke:none;"/>
- </g>
- </xsl:when>
-
- <xsl:when test="$iBifType = 'MASTER_SLAVE'">
- <g id="{$iBusStd}_busconn_{$iBifType}">
- <circle
- cx="{ceiling($BIFC_W div 2)}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_W div 2)}"
- style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
- <circle
- cx="{ceiling($BIFC_W div 2) + 0.5}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_Wi div 2)}"
- style="fill:{$busStdColor_}; stroke:none;"/>
- <rect
- x="0"
- y="{ceiling($BIFC_H div 2)}"
- width= "{$BIFC_W}"
- height="{ceiling($BIFC_H div 2)}"
- style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
- <rect
- x="{$BIFC_dx + 0.5}"
- y="{ceiling($BIFC_H div 2)}"
- width= "{$BIFC_Wi}"
- height="{ceiling($BIFC_Hi div 2)}"
- style="fill:{$busStdColor_}; stroke:none;"/>
- </g>
- </xsl:when>
-
- <xsl:when test="$iBifType = 'MONITOR'">
- <g id="{$iBusStd}_busconn_{$iBifType}">
- <rect
- x="0"
- y="0.5"
- width= "{$BIFC_W}"
- height="{ceiling($BIFC_Hi div 2)}"
- style="fill:{$busStdColor_}; stroke:none;"/>
- <rect
- x="0"
- y="{ceiling($BIFC_H div 2) + 4}"
- width= "{$BIFC_W}"
- height="{ceiling($BIFC_Hi div 2)}"
- style="fill:{$busStdColor_}; stroke:none;"/>
- </g>
- </xsl:when>
-
- <xsl:when test="$iBifType = 'USER'">
- <g id="{$iBusStd}_busconn_USER">
- <circle
- cx="{ceiling($BIFC_W div 2)}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_W div 2)}"
- style="fill:{$busStdColor_lt_}; stroke:{$busStdColor_}; stroke-width:1"/>
- <circle
- cx="{ceiling($BIFC_W div 2) + 0.5}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_Wi div 2)}"
- style="fill:{$busStdColor_}; stroke:none;"/>
- </g>
- </xsl:when>
-
- <xsl:otherwise>
- <g id="{$iBusStd}_busconn_{$iBifType}">
- <circle
- cx="{ceiling($BIFC_W div 2)}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_W div 2)}"
- style="fill:{$COL_WHITE}; stroke:{$busStdColor_}; stroke-width:1"/>
- <circle
- cx="{ceiling($BIFC_W div 2) + 0.5}"
- cy="{ceiling($BIFC_H div 2)}"
- r="{ceiling($BIFC_Wi div 2)}"
- style="fill:{$COL_WHITE}; stroke:none;"/>
- </g>
- </xsl:otherwise>
- </xsl:choose>
-
-</xsl:template>
-
-
-</xsl:stylesheet>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/mig_input.txt b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/mig_input.txt
deleted file mode 100644
index afb0f0de54..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/mig_input.txt
+++ /dev/null
@@ -1,16 +0,0 @@
-SET_FLAG FLOW SOCKETABLE
-SET_FLAG MODE BATCH
-SET_FLAG DRCMODE ERROR
-SET_FLAG COMPONENT_NAME MCB_DDR3
-SET_PREFERENCE projectname MCB_DDR3
-SET_PREFERENCE devicefamily spartan6
-SET_PREFERENCE devicesubfamily t
-SET_PREFERENCE partname xc6slx45tfgg484-3
-SET_PREFERENCE device xc6slx45t
-SET_PREFERENCE package fgg484
-SET_PREFERENCE speedgrade -3
-SET_PREFERENCE outputdirectory ./
-SET_PREFERENCE workingdirectory ./
-SET_PREFERENCE subworkingdirectory ./
-SET_PREFERENCE InputParamsFile param_input.xml
-SET_PREFERENCE OutputParamsFile param_output.xml
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/mig_output.txt b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/mig_output.txt
deleted file mode 100644
index ed2bda49c6..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/mig_output.txt
+++ /dev/null
@@ -1,4 +0,0 @@
-SET_ERROR_CODE 0
-SET_XMDF_PATH ./MCB_DDR3_xmdf.tcl
-SET_PARAMETER component_name MCB_DDR3
-SET_PARAMETER xml_input_file ./MCB_DDR3/user_design/mig.prj
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/param_input.xml b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/param_input.xml
deleted file mode 100644
index 5371f8626b..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/MCB_DDR3/param_input.xml
+++ /dev/null
@@ -1,953 +0,0 @@
-<?xml version="1.0" encoding="UTF-8"?>
- <spirit:component xmlns:spirit="http://www.spiritconsortium.org/XMLSchema/SPIRIT/1.4" xmlns:xilinx="http://www.xilinx.com">
- <spirit:vendor/>
- <spirit:library/>
- <spirit:name/>
- <spirit:version/>
-
- <spirit:model>
- <spirit:views/>
- <spirit:ports/>
- <spirit:modelParameters>
-
-
- <spirit:modelParameter>
- <spirit:name>C_ARB_ALGORITHM</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_ALGORITHM"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_NUM_TIME_SLOTS</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_NUM_TIME_SLOTS"> "12" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_0</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_0"> "0b000000000001010011" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_1</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_1"> "0b000000001010011000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_2</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_2"> "0b000000010011000001" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_3</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_3"> "0b000000011000001010" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_4</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_4"> "0b000000000001010011" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_5</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_5"> "0b000000001010011000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_6</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_6"> "0b000000010011000001" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_7</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_7"> "0b000000011000001010" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_8</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_8"> "0b000000000001010011" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_9</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_9"> "0b000000001010011000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_10</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_10"> "0b000000010011000001" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_ARB_TIME_SLOT_11</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_ARB_TIME_SLOT_11"> "0b000000011000001010" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_BYPASS_CORE_UCF</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_BYPASS_CORE_UCF"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_ACLK_RATIO</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_ACLK_RATIO"> "100000000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_AR_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_AR_REGISTER"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_AW_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_AW_REGISTER"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_B_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_B_REGISTER"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_IS_ACLK_ASYNC</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_IS_ACLK_ASYNC"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_MASTERS</spirit:name>
- <spirit:value spirit:format="string" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_MASTERS"> "microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_R_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_R_REGISTER"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_READ_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_READ_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_READ_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_READ_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_SECURE</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_SECURE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_W_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_W_REGISTER"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_WRITE_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_WRITE_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S0_AXI_WRITE_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S0_AXI_WRITE_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_ACLK_RATIO</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_ACLK_RATIO"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_AR_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_AR_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_AW_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_AW_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_B_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_B_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_IS_ACLK_ASYNC</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_IS_ACLK_ASYNC"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_MASTERS</spirit:name>
- <spirit:value spirit:format="string" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_MASTERS"> "none" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_R_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_R_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_READ_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_READ_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_READ_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_READ_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_SECURE</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_SECURE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_W_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_W_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_WRITE_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_WRITE_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S1_AXI_WRITE_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S1_AXI_WRITE_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_ACLK_RATIO</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_ACLK_RATIO"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_AR_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_AR_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_AW_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_AW_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_B_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_B_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_IS_ACLK_ASYNC</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_IS_ACLK_ASYNC"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_MASTERS</spirit:name>
- <spirit:value spirit:format="string" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_MASTERS"> "none" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_R_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_R_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_READ_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_READ_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_READ_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_READ_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_SECURE</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_SECURE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_W_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_W_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_WRITE_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_WRITE_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S2_AXI_WRITE_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S2_AXI_WRITE_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_ACLK_RATIO</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_ACLK_RATIO"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_AR_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_AR_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_AW_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_AW_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_B_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_B_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_IS_ACLK_ASYNC</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_IS_ACLK_ASYNC"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_MASTERS</spirit:name>
- <spirit:value spirit:format="string" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_MASTERS"> "none" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_R_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_R_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_READ_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_READ_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_READ_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_READ_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_SECURE</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_SECURE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_W_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_W_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_WRITE_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_WRITE_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S3_AXI_WRITE_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S3_AXI_WRITE_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_ACLK_RATIO</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_ACLK_RATIO"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_AR_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_AR_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_AW_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_AW_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_B_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_B_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_IS_ACLK_ASYNC</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_IS_ACLK_ASYNC"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_MASTERS</spirit:name>
- <spirit:value spirit:format="string" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_MASTERS"> "none" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_R_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_R_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_READ_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_READ_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_READ_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_READ_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_SECURE</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_SECURE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_W_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_W_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_WRITE_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_WRITE_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S4_AXI_WRITE_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S4_AXI_WRITE_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_ACLK_RATIO</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_ACLK_RATIO"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_AR_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_AR_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_AW_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_AW_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_B_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_B_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_IS_ACLK_ASYNC</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_IS_ACLK_ASYNC"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_MASTERS</spirit:name>
- <spirit:value spirit:format="string" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_MASTERS"> "none" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_R_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_R_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_READ_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_READ_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_READ_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_READ_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_SECURE</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_SECURE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_W_REGISTER</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_W_REGISTER"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_WRITE_ACCEPTANCE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_WRITE_ACCEPTANCE"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_INTERCONNECT_S5_AXI_WRITE_FIFO_DEPTH</spirit:name>
- <spirit:value spirit:format="integer" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_INTERCONNECT_S5_AXI_WRITE_FIFO_DEPTH"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MCB_LOC</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MCB_LOC"> "MEMC3" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MCB_PERFORMANCE</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MCB_PERFORMANCE"> "STANDARD" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MCB_RZQ_LOC</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MCB_RZQ_LOC"> "K7" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MCB_USE_EXTERNAL_BUFPLL</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MCB_USE_EXTERNAL_BUFPLL"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MCB_ZIO_LOC</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MCB_ZIO_LOC"> "R7" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_ADDR_ORDER</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_ADDR_ORDER"> "ROW_BANK_COLUMN" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_ADDR_WIDTH"> "13" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_BANKADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_BANKADDR_WIDTH"> "3" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_BASEPARTNO</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_BASEPARTNO"> "" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_CAS_LATENCY</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_MEM_CAS_LATENCY"> "6" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR1_2_ADDR_CONTROL_SSTL_ODS</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR1_2_ADDR_CONTROL_SSTL_ODS"> "CLASS_II" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR1_2_DATA_CONTROL_SSTL_ODS</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR1_2_DATA_CONTROL_SSTL_ODS"> "CLASS_II" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR1_2_ODS</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR1_2_ODS"> "FULL" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR2_3_HIGH_TEMP_SR</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR2_3_HIGH_TEMP_SR"> "NORMAL" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR2_3_PA_SR</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR2_3_PA_SR"> "FULL" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR2_DIFF_DQS_EN</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR2_DIFF_DQS_EN"> "YES" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR2_RTT</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR2_RTT"> "150OHMS" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR3_AUTO_SR</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR3_AUTO_SR"> "ENABLED" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR3_CAS_LATENCY</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_MEM_DDR3_CAS_LATENCY"> "6" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR3_CAS_WR_LATENCY</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_MEM_DDR3_CAS_WR_LATENCY"> "5" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR3_ODS</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR3_ODS"> "DIV6" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_DDR3_RTT</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_DDR3_RTT"> "DIV4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_MDDR_ODS</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_MDDR_ODS"> "FULL" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_MOBILE_PA_SR</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_MOBILE_PA_SR"> "FULL" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_NUM_COL_BITS</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_NUM_COL_BITS"> "10" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_PARTNO</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="REQUIRE" spirit:id="MCB_DDR3.C_MEM_PARTNO"> "MT41J64M16XX-187E" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TRAS</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_TRAS"> "-1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TRCD</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_TRCD"> "-1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TREFI</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_TREFI"> "-1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TRFC</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_TRFC"> "-1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TRP</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_TRP"> "-1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TRTP</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_TRTP"> "-1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TWR</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_TWR"> "-1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TWTR</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEM_TWTR"> "-1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TYPE</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_MEM_TYPE"> "DDR3" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEM_TZQINIT_MAXCNT</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_MEM_TZQINIT_MAXCNT"> "512" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_MEMCLK_PERIOD</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_MEMCLK_PERIOD"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_NUM_DQ_PINS</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_NUM_DQ_PINS"> "16" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_PORT_CONFIG</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_PORT_CONFIG"> "B32_B32_B32_B32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_ADDED_AXI_PARAMS</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S0_AXI_ADDED_AXI_PARAMS"> "TRUE" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S0_AXI_ADDR_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_AXI_VER</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S0_AXI_AXI_VER"> "1.02.a" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_BASEADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S0_AXI_BASEADDR"> "0x80000000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S0_AXI_DATA_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_ENABLE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S0_AXI_ENABLE"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_ENABLE_AP</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S0_AXI_ENABLE_AP"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_HIGHADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S0_AXI_HIGHADDR"> "0x807FFFFF" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_ID_WIDTH"> "3" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_PROTOCOL</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S0_AXI_PROTOCOL"> "AXI4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_REG_EN0</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_REG_EN0"> "0x00000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_REG_EN1</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S0_AXI_REG_EN1"> "0x01000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_STRICT_COHERENCY</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_STRICT_COHERENCY"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_SUPPORTS_NARROW_BURST"> "Auto" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_SUPPORTS_READ</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_SUPPORTS_READ"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S0_AXI_SUPPORTS_WRITE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S0_AXI_SUPPORTS_WRITE"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_ADDED_AXI_PARAMS</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S1_AXI_ADDED_AXI_PARAMS"> "TRUE" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S1_AXI_ADDR_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_AXI_VER</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S1_AXI_AXI_VER"> "1.01.a" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_BASEADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S1_AXI_BASEADDR"> "0xFFFFFFFF" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S1_AXI_DATA_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_ENABLE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S1_AXI_ENABLE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_ENABLE_AP</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S1_AXI_ENABLE_AP"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_HIGHADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S1_AXI_HIGHADDR"> "0x00000000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_S1_AXI_ID_WIDTH"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_PROTOCOL</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S1_AXI_PROTOCOL"> "AXI4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_REG_EN0</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S1_AXI_REG_EN0"> "0x00000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_REG_EN1</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S1_AXI_REG_EN1"> "0x01000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_STRICT_COHERENCY</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S1_AXI_STRICT_COHERENCY"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S1_AXI_SUPPORTS_NARROW_BURST"> "Auto" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_SUPPORTS_READ</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S1_AXI_SUPPORTS_READ"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S1_AXI_SUPPORTS_WRITE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S1_AXI_SUPPORTS_WRITE"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_ADDED_AXI_PARAMS</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S2_AXI_ADDED_AXI_PARAMS"> "TRUE" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S2_AXI_ADDR_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_AXI_VER</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S2_AXI_AXI_VER"> "1.01.a" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_BASEADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S2_AXI_BASEADDR"> "0xFFFFFFFF" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S2_AXI_DATA_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_ENABLE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S2_AXI_ENABLE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_ENABLE_AP</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S2_AXI_ENABLE_AP"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_HIGHADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S2_AXI_HIGHADDR"> "0x00000000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_S2_AXI_ID_WIDTH"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_PROTOCOL</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S2_AXI_PROTOCOL"> "AXI4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_REG_EN0</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S2_AXI_REG_EN0"> "0x00000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_REG_EN1</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S2_AXI_REG_EN1"> "0x01000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_STRICT_COHERENCY</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S2_AXI_STRICT_COHERENCY"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S2_AXI_SUPPORTS_NARROW_BURST"> "Auto" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_SUPPORTS_READ</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S2_AXI_SUPPORTS_READ"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S2_AXI_SUPPORTS_WRITE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S2_AXI_SUPPORTS_WRITE"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_ADDED_AXI_PARAMS</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S3_AXI_ADDED_AXI_PARAMS"> "TRUE" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S3_AXI_ADDR_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_AXI_VER</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S3_AXI_AXI_VER"> "1.01.a" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_BASEADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S3_AXI_BASEADDR"> "0xFFFFFFFF" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S3_AXI_DATA_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_ENABLE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S3_AXI_ENABLE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_ENABLE_AP</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S3_AXI_ENABLE_AP"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_HIGHADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S3_AXI_HIGHADDR"> "0x00000000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_S3_AXI_ID_WIDTH"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_PROTOCOL</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S3_AXI_PROTOCOL"> "AXI4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_REG_EN0</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S3_AXI_REG_EN0"> "0x00000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_REG_EN1</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S3_AXI_REG_EN1"> "0x01000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_STRICT_COHERENCY</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S3_AXI_STRICT_COHERENCY"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S3_AXI_SUPPORTS_NARROW_BURST"> "Auto" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_SUPPORTS_READ</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S3_AXI_SUPPORTS_READ"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S3_AXI_SUPPORTS_WRITE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S3_AXI_SUPPORTS_WRITE"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_ADDED_AXI_PARAMS</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S4_AXI_ADDED_AXI_PARAMS"> "TRUE" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S4_AXI_ADDR_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_AXI_VER</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S4_AXI_AXI_VER"> "1.01.a" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_BASEADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S4_AXI_BASEADDR"> "0xFFFFFFFF" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S4_AXI_DATA_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_ENABLE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S4_AXI_ENABLE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_ENABLE_AP</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S4_AXI_ENABLE_AP"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_HIGHADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S4_AXI_HIGHADDR"> "0x00000000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_S4_AXI_ID_WIDTH"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_PROTOCOL</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S4_AXI_PROTOCOL"> "AXI4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_REG_EN0</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S4_AXI_REG_EN0"> "0x00000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_REG_EN1</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S4_AXI_REG_EN1"> "0x01000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_STRICT_COHERENCY</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S4_AXI_STRICT_COHERENCY"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S4_AXI_SUPPORTS_NARROW_BURST"> "Auto" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_SUPPORTS_READ</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S4_AXI_SUPPORTS_READ"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S4_AXI_SUPPORTS_WRITE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S4_AXI_SUPPORTS_WRITE"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_ADDED_AXI_PARAMS</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S5_AXI_ADDED_AXI_PARAMS"> "TRUE" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_ADDR_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S5_AXI_ADDR_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_AXI_VER</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S5_AXI_AXI_VER"> "1.01.a" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_BASEADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S5_AXI_BASEADDR"> "0xFFFFFFFF" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_DATA_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S5_AXI_DATA_WIDTH"> "32" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_ENABLE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S5_AXI_ENABLE"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_ENABLE_AP</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S5_AXI_ENABLE_AP"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_HIGHADDR</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S5_AXI_HIGHADDR"> "0x00000000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_ID_WIDTH</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_S5_AXI_ID_WIDTH"> "4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_PROTOCOL</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="CONSTANT" spirit:id="MCB_DDR3.C_S5_AXI_PROTOCOL"> "AXI4" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_REG_EN0</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S5_AXI_REG_EN0"> "0x00000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_REG_EN1</spirit:name>
- <spirit:value spirit:format="STD_LOGIC_VECTOR" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_S5_AXI_REG_EN1"> "0x01000" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_STRICT_COHERENCY</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S5_AXI_STRICT_COHERENCY"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_SUPPORTS_NARROW_BURST</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S5_AXI_SUPPORTS_NARROW_BURST"> "Auto" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_SUPPORTS_READ</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S5_AXI_SUPPORTS_READ"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_S5_AXI_SUPPORTS_WRITE</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL_UPDATE" spirit:id="MCB_DDR3.C_S5_AXI_SUPPORTS_WRITE"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_SIMULATION</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_SIMULATION"> "FALSE" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_SKIP_IN_TERM_CAL</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_SKIP_IN_TERM_CAL"> "0" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_SKIP_IN_TERM_CAL_VALUE</spirit:name>
- <spirit:value spirit:format="STRING" spirit:resolve="OPTIONAL" spirit:id="MCB_DDR3.C_SKIP_IN_TERM_CAL_VALUE"> "NONE" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>C_SYS_RST_PRESENT</spirit:name>
- <spirit:value spirit:format="INTEGER" spirit:resolve="UPDATE" spirit:id="MCB_DDR3.C_SYS_RST_PRESENT"> "1" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>HW_VER</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="" spirit:id="MCB_DDR3.HW_VER"> "1.02.a" </spirit:value>
- </spirit:modelParameter>
- <spirit:modelParameter>
- <spirit:name>INSTANCE</spirit:name>
- <spirit:value spirit:format="" spirit:resolve="" spirit:id="MCB_DDR3.INSTANCE"> "MCB_DDR3" </spirit:value>
- </spirit:modelParameter>
-</spirit:modelParameters>
- </spirit:model>
- </spirit:component>
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/bitinit.opt b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/bitinit.opt
deleted file mode 100644
index 7d88d37d76..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/bitinit.opt
+++ /dev/null
@@ -1 +0,0 @@
- -p xc6slx45tfgg484-3
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_globals.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_globals.xsl
deleted file mode 100644
index 9249c08a9e..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_globals.xsl
+++ /dev/null
@@ -1,263 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<!DOCTYPE stylesheet [
- <!ENTITY UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ">
- <!ENTITY LOWERCASE "abcdefghijklmnopqrstuvwxyz">
-
- <!ENTITY UPPER2LOWER " '&UPPERCASE;' , '&LOWERCASE;' ">
- <!ENTITY LOWER2UPPER " '&LOWERCASE;' , '&UPPERCASE;' ">
-
- <!ENTITY ALPHALOWER "ABCDEFxX0123456789">
- <!ENTITY HEXUPPER "ABCDEFxX0123456789">
- <!ENTITY HEXLOWER "abcdefxX0123456789">
- <!ENTITY HEXU2L " '&HEXLOWER;' , '&HEXUPPER;' ">
-
- <!ENTITY ALLMODS "MODULE[(@INSTANCE)]">
- <!ENTITY BUSMODS "MODULE[(@MODCLASS ='BUS')]">
- <!ENTITY CPUMODS "MODULE[(@MODCLASS ='PROCESSOR')]">
-
- <!ENTITY MODIOFS "MODULE/IOINTERFACES/IOINTERFACE">
- <!ENTITY ALLIOFS "&MODIOFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
-
- <!ENTITY MODBIFS "MODULE/BUSINTERFACES/BUSINTERFACE">
- <!ENTITY ALLBIFS "&MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <!ENTITY MSTBIFS "&MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (@TYPE = 'MASTER')]">
- <!ENTITY SLVBIFS "&MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (@TYPE = 'SLAVE')]">
- <!ENTITY MOSBIFS "&MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ((@TYPE = 'MASTER') or (@TYPE = 'SLAVE'))]">
- <!ENTITY P2PBIFS "&MODBIFS;[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ((@TYPE = 'TARGET') or (@TYPE = 'INITIATOR'))]">
-
- <!ENTITY MODPORTS "MODULE/PORTS/PORT">
- <!ENTITY ALLPORTS "&MODPORTS;[ (not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <!ENTITY NDFPORTS "&MODPORTS;[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (not(@BUS) and not(@IOS)))]">
- <!ENTITY DEFPORTS "&MODPORTS;[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ((@BUS) or (@IOS)))]">
-]>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<xsl:variable name="G_ROOT" select="/"/>
-
-
-
-<!--
- ======================================================
- EDK SYSTEM (EDWARD) Globals.
- ======================================================
--->
-<xsl:variable name="G_SYS_EVAL">
- <xsl:choose>
- <xsl:when test="not($P_SYSTEM_XML = '__UNDEF__')"><xsl:text>document($P_SYSTEM_XML)</xsl:text></xsl:when>
- <xsl:otherwise><xsl:text>/</xsl:text></xsl:otherwise>
- </xsl:choose>
-</xsl:variable>
-
-<xsl:variable name="G_SYS_DOC" select="dyn:evaluate($G_SYS_EVAL)"/>
-<xsl:variable name="G_SYS" select="$G_SYS_DOC/EDKSYSTEM"/>
-<xsl:variable name="G_SYS_TIMESTAMP" select="$G_SYS/@TIMESTAMP"/>
-<xsl:variable name="G_SYS_EDKVERSION" select="$G_SYS/@EDKVERSION"/>
-
-<xsl:variable name="G_SYS_INFO" select="$G_SYS/SYSTEMINFO"/>
-<xsl:variable name="G_SYS_INFO_PKG" select="$G_SYS_INFO/@PACKAGE"/>
-<xsl:variable name="G_SYS_INFO_DEV" select="$G_SYS_INFO/@DEVICE"/>
-<xsl:variable name="G_SYS_INFO_ARCH" select="$G_SYS_INFO/@ARCH"/>
-<xsl:variable name="G_SYS_INFO_SPEED" select="$G_SYS_INFO/@SPEEDGRADE"/>
-
-<xsl:variable name="G_SYS_MODS" select="$G_SYS/MODULES"/>
-<xsl:variable name="G_SYS_EXPS" select="$G_SYS/EXTERNALPORTS"/>
-
-<xsl:variable name="COL_FOCUSED_MASTER" select="'AAAAFF'"/>
-<xsl:variable name="COL_BG_OUTOF_FOCUS_CONNECTIONS" select="'AA7711'"/>
-
-<!-- INDEX KEYS FOR FAST ACCESS -->
-<xsl:key name="G_MAP_MODULES" match="&ALLMODS;" use="@INSTANCE"/>
-<xsl:key name="G_MAP_PROCESSORS" match="&CPUMODS;" use="@INSTANCE"/>
-
-<xsl:key name="G_MAP_BUSSES" match="&BUSMODS;" use="@INSTANCE"/>
-<xsl:key name="G_MAP_BUSSES" match="&BUSMODS;" use="@BUSSTD"/>
-<xsl:key name="G_MAP_BUSSES" match="&BUSMODS;" use="@BUSSTD_PSF"/>
-
-<xsl:key name="G_MAP_ALL_IOFS" match="&ALLIOFS;" use="../../@INSTANCE"/>
-<xsl:key name="G_MAP_ALL_BIFS" match="&ALLBIFS;" use="../../@INSTANCE"/>
-
-<xsl:key name="G_MAP_ALL_BIFS_BY_BUS" match="&ALLBIFS;" use="@BUSNAME"/>
-<!--
- -->
-
-<xsl:key name="G_MAP_MST_BIFS" match="&MSTBIFS;" use="@BUSNAME"/>
-<xsl:key name="G_MAP_SLV_BIFS" match="&SLVBIFS;" use="@BUSNAME"/>
-<xsl:key name="G_MAP_MOS_BIFS" match="&MOSBIFS;" use="@BUSNAME"/>
-
-<xsl:key name="G_MAP_P2P_BIFS" match="&P2PBIFS;" use="@BUSNAME"/>
-<xsl:key name="G_MAP_P2P_BIFS" match="&P2PBIFS;" use="@BUSSTD"/>
-<xsl:key name="G_MAP_P2P_BIFS" match="&P2PBIFS;" use="@BUSSTD_PSF"/>
-
-<xsl:key name="G_MAP_ALL_PORTS" match="&ALLPORTS;" use="../../@INSTANCE"/>
-<xsl:key name="G_MAP_DEF_PORTS" match="&DEFPORTS;" use="../../@INSTANCE"/> <!-- Default ports -->
-<xsl:key name="G_MAP_NDF_PORTS" match="&NDFPORTS;" use="../../@INSTANCE"/> <!-- Non Default ports -->
-
-<!--
-<xsl:key name="G_MAP_MASTER_BIFS" match="&MSTBIFS;" use="@BUSNAME"/>
-<xsl:key name="G_MAP_MASTER_BIFS" match="MODULE[not(@MODCLASS ='BUS')]/BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (@TYPE = 'MASTER')]" use="../../@INSTANCE.@NAME"/>
-<xsl:key name="G_MAP_BUSSES_BY_INSTANCE" match="MODULE[(@MODCLASS ='BUS')]" use="@INSTANCE"/>
-<xsl:key name="G_MAP_XB_BUSSES" match="MODULE[(@MODCASS ='BUS')and (@IS_CROSSBAR)]" use="@INSTANCE"/>
- -->
-<!--
- ======================================================
- Groups.xml (BLOCKS) Globals
- ======================================================
--->
-<xsl:variable name="G_GRP_EVAL">
- <xsl:choose>
- <xsl:when test="not($P_GROUPS_XML = '__UNDEF__')"><xsl:text>document($P_GROUPS_XML)</xsl:text></xsl:when>
- <xsl:otherwise><xsl:text>/</xsl:text></xsl:otherwise>
- </xsl:choose>
-</xsl:variable>
-
-<xsl:variable name="G_GRPS_DOC" select="dyn:evaluate($G_GRP_EVAL)"/>
-<xsl:variable name="G_GROUPS" select="$G_GRPS_DOC/BLOCKS"/>
-
-<xsl:variable name="G_NUM_OF_PROCS" select="count($G_SYS/MODULES/MODULE[(@MODCLASS = 'PROCESSOR')])"/>
-<xsl:variable name="G_NUM_OF_PROCS_W_ADDRS" select="count($G_SYS/MODULES/MODULE[(@MODCLASS = 'PROCESSOR') and MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]])"/>
-
-<xsl:variable name="G_FOCUSED_SCOPE">
- <xsl:choose>
-
- <!-- FOCUSING ON SPECIFIC SELECTIONS-->
- <xsl:when test="$G_ROOT/SAV/SELECTION">
- </xsl:when>
-
- <!-- FOCUSING ON PROCESSOR -->
- <xsl:when test="$G_ROOT/SAV/MASTER">
- <xsl:if test="$G_DEBUG = 'TRUE'"><xsl:message>FOCUSED MASTERS SPECIFIED</xsl:message></xsl:if>
- <xsl:for-each select="$G_ROOT/SAV/MASTER">
- <xsl:variable name="m_inst_" select="@INSTANCE"/>
- <xsl:variable name="m_mod_" select="$G_SYS_MODS/MODULE[(@INSTANCE = $m_inst_)]"/>
- <xsl:for-each select="$m_mod_/BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and not(@BUSNAME = '__NOC__') and ((@TYPE = 'MASTER') or (@TYPE = 'SLAVE') or (@TYPE = 'INITIATOR') or (@TYPE = 'TARGET'))]">
- <xsl:if test="$G_DEBUG = 'TRUE'"><xsl:message> FOCUSED MASTER BIF <xsl:value-of select="$m_inst_"/>.<xsl:value-of select="@NAME"/> = <xsl:value-of select="@BUSNAME"/></xsl:message></xsl:if>
- <xsl:variable name="b_bus_" select="@BUSNAME"/>
- <BUS NAME="{@BUSNAME}" BUSSTD="{@BUSSTD}"/>
- <xsl:for-each select="$G_SYS_MODS/MODULE[(not(@INSTANCE = $m_inst_) and (@MODCLASS = 'BUS_BRIDGE'))]/BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (@TYPE = 'SLAVE') and (@BUSNAME = $b_bus_)]">
- <xsl:variable name="b_inst_" select="../../@INSTANCE"/>
- <xsl:choose>
- <xsl:when test="MASTERS/MASTER">
- <xsl:for-each select="MASTERS/MASTER">
- <xsl:variable name="sm_inst_" select="@INSTANCE"/>
- <xsl:if test="count($G_ROOT/SAV/MASTER[(@INSTANCE = $sm_inst_)]) > 0">
- <xsl:if test="$G_DEBUG = 'TRUE'"><xsl:message> FOCUSED PERIPHERAL BRIDGE <xsl:value-of select="$b_inst_"/></xsl:message></xsl:if>
- <PERIPHERAL NAME="{$b_inst_}"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <xsl:if test="$G_DEBUG = 'TRUE'"><xsl:message> FOCUSED PERIPHERAL BRIDGE <xsl:value-of select="$b_inst_"/></xsl:message></xsl:if>
- <PERIPHERAL NAME="{$b_inst_}"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:for-each>
- <xsl:for-each select="$m_mod_/PERIPHERALS/PERIPHERAL">
- <xsl:variable name="p_id_" select="@INSTANCE"/>
- <xsl:variable name="p_mod_" select="$G_SYS_MODS/MODULE[@INSTANCE = $p_id_]"/>
- <PERIPHERAL NAME="{@INSTANCE}"/>
- <xsl:variable name="p_mr_cnt_" select="count($m_mod_/MEMORYMAP/MEMRANGE[(@INSTANCE = $p_id_)])"/>
- <xsl:if test="$G_DEBUG = 'TRUE'"><xsl:message> FOCUSED PERIPHERAL <xsl:value-of select="$p_id_"/> has <xsl:value-of select="$p_mr_cnt_"/> memory ranges</xsl:message></xsl:if>
- <xsl:for-each select="$m_mod_/MEMORYMAP/MEMRANGE[(@INSTANCE = $p_id_)]/ACCESSROUTE/ROUTEPNT">
- <xsl:variable name="b_id_" select="@INSTANCE"/>
- <xsl:for-each select="$G_SYS_MODS/MODULE[((@INSTANCE = $b_id_) and (@MODCLASS = 'BUS'))]">
- <xsl:if test="$G_DEBUG = 'TRUE'"><xsl:message> FOCUSED PERIPHERAL BUS <xsl:value-of select="@INSTANCE"/></xsl:message></xsl:if>
- <BUS NAME="{@INSTANCE}" BUSSTD="{@BUSSTD}"/>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:when>
-
- <!-- FOCUSING ON BUS -->
- <xsl:when test="$G_ROOT/SAV/BUS">
- <xsl:if test="$G_DEBUG = 'TRUE'"><xsl:message>FOCUSED BUSSES SPECIFIED</xsl:message></xsl:if>
- <xsl:for-each select="$G_ROOT/SAV/BUS">
- <xsl:variable name="m_inst_" select="@INSTANCE"/>
- <xsl:variable name="m_mod_" select="$G_SYS_MODS/MODULE[(@INSTANCE = $m_inst_)]"/>
- <xsl:variable name="m_bstd_" select="$m_mod_/@BUSSTD"/>
- <BUS NAME="{$m_inst_}" BUSSTD="{$m_bstd_}"/>
- <xsl:if test="$G_DEBUG = 'TRUE'"><xsl:message> FOCUSED BUS <xsl:value-of select="$m_inst_"/> <xsl:value-of select="$m_bstd_"/></xsl:message></xsl:if>
- </xsl:for-each>
- </xsl:when>
- </xsl:choose>
-</xsl:variable>
-
-<xsl:variable name="G_HAVE_XB_BUSSES">
- <xsl:choose>
- <xsl:when test="(count($G_SYS_MODS/MODULE[((@MODCLASS = 'BUS') and (@IS_CROSSBAR = 'TRUE'))]) > 0)">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
-</xsl:variable>
-
-<xsl:template name="F_ModClass_To_IpClassification">
- <xsl:param name="iModClass" select="'NONE'"/>
- <xsl:param name="iBusStd" select="'NONE'"/>
- <xsl:choose>
- <xsl:when test="$iModClass = 'BUS'"><xsl:value-of select="$iBusStd"/> Bus</xsl:when>
- <xsl:when test="$iModClass = 'DEBUG'">Debug</xsl:when>
- <xsl:when test="$iModClass = 'MEMORY'">Memory</xsl:when>
- <xsl:when test="$iModClass = 'MEMORY_CNTLR'">Memory Controller</xsl:when>
- <xsl:when test="$iModClass = 'INTERRUPT_CNTLR'">Interrupt Controller</xsl:when>
- <xsl:when test="$iModClass = 'PERIPHERAL'">Peripheral</xsl:when>
- <xsl:when test="$iModClass = 'PROCESSOR'">Processor</xsl:when>
- <xsl:when test="$iModClass = 'BUS_BRIDGE'">Bus Bridge</xsl:when>
- <xsl:otherwise><xsl:value-of select="$iModClass"/></xsl:otherwise>
- </xsl:choose>
-</xsl:template>
-
-<xsl:template name="F_Connection_To_AXI_SLAVE">
- <xsl:param name="iNameParam" select="''"/>
- <xsl:param name="iModuleRefParam" select="''"/>
-
- <xsl:variable name="FilName" select="$iModuleRefParam/PARAMETERS/PARAMETER[@NAME=concat('C_', $iNameParam, '_MASTERS')]/@VALUE"/>
- <!-- <xsl:message>FIL NAME WAS <xsl:value-of select="$FilName"/></xsl:message> -->
- <xsl:value-of select="$FilName"/>
-</xsl:template>
-
-<xsl:template name="F_IS_Interface_External">
- <xsl:param name="iInstRef"/> <!-- Instance reference -->
- <xsl:param name="iIntfRef"/> <!-- Interface reference -->
- <xsl:variable name="intfName_" select="$iIntfRef/@NAME"/>
- <xsl:variable name="instName_" select="$iInstRef/@INSTANCE"/>
-
- <!-- <xsl:message>NAME 1 <xsl:value-of select="$expName1_"/></xsl:message>-->
- <!-- <xsl:message>NAME 2 <xsl:value-of select="$expName2_"/></xsl:message>-->
-<!--
- <xsl:variable name="expName1_" select="concat($instName_,'_',$intfName_,'_',@PHYSICAL,'_pin')"/>
- <xsl:variable name="expName2_" select="concat($instName_,'_',@PHYSICAL,'_pin')"/>
- -->
-
- <!-- Store the number of physical ports connected externals in a variable -->
-
- <xsl:variable name="connected_externals_">
- <xsl:for-each select="$iIntfRef/PORTMAPS/PORTMAP">
- <xsl:variable name="portName_" select="@PHYSICAL"/>
- <xsl:if test="$iInstRef/PORTS/PORT[(@NAME = $portName_)]">
- <xsl:variable name="portNet_" select="$iInstRef/PORTS/PORT[(@NAME = $portName_)]/@SIGNAME"/>
- <xsl:if test="$G_SYS_EXPS/PORT[(@SIGNAME = $portNet_)]">
- <EXTP NAME="{@PHYSICAL}"/>
- </xsl:if>
- </xsl:if>
- </xsl:for-each>
- </xsl:variable>
-
- <!--
- <xsl:message><xsl:value-of select="$instName_"/>.<xsl:value-of select="$intfName_"/> has <xsl:value-of select="count(exsl:node-set($connected_externals_)/EXTP)"/> connected externals.</xsl:message>
- -->
- <xsl:choose>
- <xsl:when test="(count(exsl:node-set($connected_externals_)/EXTP) > 0)">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
-</xsl:template>
-
-</xsl:stylesheet>
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view.xsl
deleted file mode 100644
index b0fee7aa91..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view.xsl
+++ /dev/null
@@ -1,245 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<!DOCTYPE stylesheet [
- <!ENTITY UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ">
- <!ENTITY LOWERCASE "abcdefghijklmnopqrstuvwxyz">
-
- <!ENTITY UPPER2LOWER " '&UPPERCASE;' , '&LOWERCASE;' ">
- <!ENTITY LOWER2UPPER " '&LOWERCASE;' , '&UPPERCASE;' ">
-
- <!ENTITY ALPHALOWER "ABCDEFxX0123456789">
- <!ENTITY HEXUPPER "ABCDEFxX0123456789">
- <!ENTITY HEXLOWER "abcdefxX0123456789">
- <!ENTITY HEXU2L " '&HEXLOWER;' , '&HEXUPPER;' ">
-]>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math exsl dyn xlink">
-
-<xsl:include href="edw2xtl_sav_globals.xsl"/>
-
-<xsl:include href="edw2xtl_sav_view_addr.xsl"/>
-<xsl:include href="edw2xtl_sav_view_busif.xsl"/>
-<xsl:include href="edw2xtl_sav_view_port.xsl"/>
-<xsl:include href="edw2xtl_sav_view_groups.xsl"/>
-
-<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"/>
-
-<xsl:param name="P_SYSTEM_XML" select= "'__UNDEF__'"/>
-<xsl:param name="P_GROUPS_XML" select= "'__UNDEF__'"/>
-
-<xsl:param name="G_DEBUG" select="'FALSE'"/>
-<xsl:param name="G_ADD_CHOICES" select="'TRUE'"/>
-
-<!--
-<xsl:param name="P_VIEW" select="'__UNDEF__'"/>
-<xsl:param name="P_MODE" select="'__UNDEF__'"/>
-<xsl:param name="P_SCOPE" select="'__UNDEF__'"/>
--->
-
-
-
-<!-- MAIN TEMPLATE -->
-
-<xsl:template match="SAV[@VIEW]">
- <xsl:if test="$G_DEBUG='TRUE'">
- <xsl:message>SAV VIEW <xsl:value-of select="@VIEW"/></xsl:message>
- <xsl:message>SAV MODE <xsl:value-of select="@MODE"/></xsl:message>
- <xsl:message>SAV SCOPE <xsl:value-of select="@SCOPE"/></xsl:message>
- </xsl:if>
-
- <xsl:choose>
- <xsl:when test="not(@VIEW = 'PORT') and not(@VIEW = 'BUSINTERFACE') and not(@VIEW = 'ADDRESS')">
- <xsl:message>EDW2SAV XTELLER ERROR: UNDEFINED VIEW <xsl:value-of select="@VIEW"/></xsl:message>
- </xsl:when>
-
- <xsl:when test="(@MODE and not(@MODE = 'FLAT') and not(@MODE = 'TREE') and not(@MODE = 'GROUPS'))">
- <xsl:message>EDW2SAV XTELLER ERROR: UNDEFINED MODE <xsl:value-of select="@MODE"/></xsl:message>
- </xsl:when>
-
- <xsl:when test="(@SCOPE and not(@SCOPE = 'FULL') and not(@SCOPE= 'FOCUS'))">
- <xsl:message>EDW2SAV XTELLER ERROR: UNDEFINED SCOPE <xsl:value-of select="@SCOPE"/></xsl:message>
- </xsl:when>
-
- <xsl:when test="$P_SYSTEM_XML ='__UNDEF__'">
- <xsl:message>EDW2SAV XTELLER ERROR: SYSTEM XML UNDEFINED</xsl:message>
- </xsl:when>
-
- <xsl:when test="not($G_SYS)" >
- <xsl:message>EDW2SAV XTELLER ERROR: EDKSYSTEM MISSING in SYSTEM XML <xsl:value-of select="$P_SYSTEM_XML"/></xsl:message>
- </xsl:when>
-
- <xsl:when test="($P_GROUPS_XML ='__UNDEF__') and (@MODE = 'GROUPS')" >
- <xsl:message>EDW2SAV XTELLER ERROR: GROUP XML UNDEFINED for FOCUS</xsl:message>
- </xsl:when>
-
- <xsl:when test="($P_GROUPS_XML ='__UNDEF__') and (@SCOPE = 'FOCUS') and (@VIEW = 'BUSINTERFACE')" >
- <xsl:message>EDW2SAV XTELLER ERROR: GROUP XML UNDEFINED for SCOPE</xsl:message>
- </xsl:when>
-
- <xsl:otherwise>
-
- <xsl:if test="$G_DEBUG='TRUE'">
- <xsl:message>SYSTEM XML <xsl:value-of select="$P_SYSTEM_XML"/></xsl:message>
- <xsl:message>GROUPS XML <xsl:value-of select="$P_GROUPS_XML"/></xsl:message>
- </xsl:if>
-
- <xsl:variable name="use_mode_">
- <xsl:choose>
- <xsl:when test="@MODE = 'GROUPS'">TREE</xsl:when>
- <xsl:otherwise><xsl:value-of select="@MODE"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="num_procs_focused_on_" select="count(MASTER)"/>
- <xsl:variable name="num_buses_focused_on_" select="count(BUS)"/>
-
- <xsl:element name="SET">
- <xsl:attribute name="CLASS">PROJECT</xsl:attribute>
- <xsl:attribute name="VIEW_ID"><xsl:value-of select="@VIEW"/></xsl:attribute>
- <xsl:attribute name="DISPLAYMODE"><xsl:value-of select="$use_mode_"/></xsl:attribute>
-
- <xsl:choose>
-
- <!-- ADDRESS TAB VIEW -->
- <xsl:when test="(@VIEW = 'ADDRESS')">
- <xsl:call-template name="WRITE_VIEW_ADDRESS"/>
- </xsl:when>
-
- <!-- BIF TAB VIEWS -->
- <xsl:when test="((@VIEW ='BUSINTERFACE') and (@SCOPE = 'FOCUS') and ($num_procs_focused_on_ > 0))">
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUS_ON_PROCS"/>
- </xsl:when>
-
- <!-- BIF TAB VIEWS -->
- <xsl:when test="((@VIEW ='BUSINTERFACE') and (@SCOPE = 'FOCUS') and ($num_buses_focused_on_ > 0))">
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUS_ON_BUSES"/>
- </xsl:when>
-
- <xsl:when test="((@VIEW ='BUSINTERFACE') and (@MODE = 'TREE') and not(@SCOPE))">
- <xsl:call-template name="WRITE_VIEW_BIF_TREE"/>
- </xsl:when>
-
- <xsl:when test="((@VIEW = 'BUSINTERFACE') and (@MODE = 'FLAT') and not(@SCOPE))">
- <xsl:call-template name="WRITE_VIEW_BIF_FLAT"/>
- </xsl:when>
-
- <xsl:when test="((@VIEW = 'BUSINTERFACE') and (@MODE = 'GROUPS'))">
- <xsl:call-template name="WRITE_VIEW_BIF_GROUPS">
- <xsl:with-param name="iModules" select="$G_BLOCKS"/>
- </xsl:call-template>
- </xsl:when>
-
-
- <!-- PORT TAB VIEWS -->
- <xsl:when test="((@VIEW ='PORT') and (@SCOPE = 'FOCUS'))">
- <xsl:call-template name="WRITE_VIEW_PORT_FOCUSED"/>
- </xsl:when>
-
- <!-- Generate XTeller panel data for Ports using hierarchy -->
- <xsl:when test="((@VIEW = 'PORT') and (@MODE = 'TREE'))">
- <xsl:call-template name="WRITE_VIEW_PORT_TREE"/>
- </xsl:when>
-
- <!-- Generate XTeller panel data for Ports without hierarchy, (flat view) -->
- <xsl:when test="((@VIEW='PORT') and (@MODE = 'FLAT'))">
- <xsl:call-template name="WRITE_VIEW_PORT_FLAT"/>
- </xsl:when>
-
-
- <xsl:otherwise>
- <xsl:message>ERROR during SAV XTeller generation with panel <xsl:value-of select="@VIEW"/> and display mode <xsl:value-of select="@MODE"/></xsl:message>
- </xsl:otherwise>
-
- </xsl:choose>
- </xsl:element>
- </xsl:otherwise>
- </xsl:choose>
-</xsl:template>
-
-<xsl:template match="EDKSYSTEM">
-
-<!--
- <xsl:message>EDW VERSION <xsl:value-of select="$G_EDWVER"/></xsl:message>
- <xsl:message>VIEW <xsl:value-of select="$VIEW"/></xsl:message>
- <xsl:message>MODE <xsl:value-of select="$MODE"/></xsl:message>
--->
-
- <xsl:variable name="by_interface_">
- <xsl:choose>
- <!--
- Show interfaces or not
- -->
- <xsl:when test="(($SHOW_BUSIF ='TRUE') or ($SHOW_IOIF ='TRUE'))">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <!--
- <xsl:message>VIEW <xsl:value-of select="$VIEW"/></xsl:message>
- <xsl:message>MODE <xsl:value-of select="$MODE"/></xsl:message>
- <xsl:message>BY INTERFACE <xsl:value-of select="$by_interface_"/></xsl:message>
- -->
- <xsl:variable name="displayMode_">
- <xsl:choose>
- <!--
- Hard code view to view for address panel,
- always show view in what was formerly
- multiprocessor view. See below.
-
- <xsl:when test="(($G_NUM_OF_PROCS > 1) and ($VIEW='ADDRESS'))">TREE</xsl:when>
- <xsl:when test="(($G_NUM_OF_PROCS <= 1) and ($VIEW='ADDRESS'))">FLAT</xsl:when>
- -->
- <xsl:when test="($VIEW='ADDRESS')">TREE</xsl:when>
- <xsl:otherwise><xsl:value-of select="$MODE"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <SET CLASS="PROJECT" VIEW= "{$VIEW}" MODE="{$displayMode_}">
- <xsl:choose>
-
- <!-- Generate XTeller panel data for Bus Interfaces using hierarchy -->
- <xsl:when test="(($VIEW='BUSINTERFACE') and (not($MODE) or ($MODE = 'TREE')))">
- <xsl:call-template name="WRITE_VIEW_BIF_TREE"/>
- </xsl:when>
-
- <!-- Generate XTeller panel data for Bus Interfaces without hierarchy, (flat view) -->
- <xsl:when test="(($VIEW='BUSINTERFACE') and ($MODE = 'FLAT'))">
- <xsl:call-template name="WRITE_VIEW_BIF_FLAT"/>
- </xsl:when>
-
- <!-- Generate XTeller panel data for Ports using hierarchy -->
- <xsl:when test="(($VIEW='PORT') and (not($MODE) or ($MODE = 'TREE')))">
- <xsl:call-template name="WRITE_VIEW_PORT_TREE"/>
- </xsl:when>
-
- <!-- Generate XTeller panel data for Ports without hierarchy, (flat view) -->
- <xsl:when test="(($VIEW='PORT') and ($MODE = 'FLAT'))">
- <xsl:call-template name="WRITE_VIEW_PORT_FLAT"/>
- </xsl:when>
-
- <!--
- Hard code display of the address panel to always the the same.
- No more tree or flat mode, always show address panel
- in what was formerly the multiprocessor view.
- -->
- <xsl:when test="($VIEW='ADDRESS')">
- <xsl:call-template name="WRITE_VIEW_ADDRESS"/>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:message>ERROR during SAV XTeller generation with panel <xsl:value-of select="$VIEW"/> and display mode <xsl:value-of select="$MODE"/></xsl:message>
- </xsl:otherwise>
-
- </xsl:choose>
- </SET>
-
-</xsl:template>
-
-</xsl:stylesheet>
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_addr.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_addr.xsl
deleted file mode 100644
index 5e8d06cb4a..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_addr.xsl
+++ /dev/null
@@ -1,894 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<!DOCTYPE stylesheet [
- <!ENTITY UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ">
- <!ENTITY LOWERCASE "abcdefghijklmnopqrstuvwxyz">
-
- <!ENTITY UPPER2LOWER " '&UPPERCASE;' , '&LOWERCASE;' ">
- <!ENTITY LOWER2UPPER " '&LOWERCASE;' , '&UPPERCASE;' ">
-
- <!ENTITY ALPHALOWER "ABCDEFxX0123456789">
- <!ENTITY HEXUPPER "ABCDEFxX0123456789">
- <!ENTITY HEXLOWER "abcdefxX0123456789">
- <!ENTITY HEXU2L " '&HEXLOWER;' , '&HEXUPPER;' ">
-]>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="exsl dyn math xlink">
-
-<xsl:output method="xml" version="1.0" encoding="UTF-8" indent="yes"/>
-
-<!--
- ================================================================================
- Generate XTeller for ADDRESSES
- ================================================================================
--->
-
-<xsl:template name="WRITE_VIEW_ADDRESS">
-
- <xsl:for-each select="$G_SYS_MODS/MODULE[((@MODCLASS = 'PROCESSOR') and (MEMORYMAP/MEMRANGE[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ACCESSROUTE)]))]">
- <xsl:sort data-type="number" select="@ROW_INDEX" order="ascending"/>
-
- <xsl:variable name="procInst_" select="@INSTANCE"/>
- <xsl:variable name="procMod_" select="self::node()"/>
- <xsl:variable name="procModType" select="@MODTYPE"/>
- <xsl:variable name="procModClass_" select="@MODCLASS"/>
- <xsl:variable name="procInstHdrVal_"><xsl:value-of select="$procInst_"/>'s Address Map</xsl:variable>
- <xsl:variable name="procInstRowIdx_" select="position() - 1"/>
-
- <!-- <SET ID="{$procInst_}" CLASS="MODULE" ROW_INDEX="{$procInstRowIdx_}"> -->
-
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="$procInst_"/></xsl:attribute>
- <xsl:attribute name="CLASS">MODULE</xsl:attribute>
- <xsl:attribute name="ROW_INDEX"><xsl:value-of select="$procInstRowIdx_"/></xsl:attribute>
-
- <!-- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$procInstHdrVal_}"/> -->
-
- <xsl:element name="VARIABLE">
- <xsl:attribute name="NAME">INSTANCE</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$procInstHdrVal_"/></xsl:attribute>
- <xsl:attribute name="VIEWDISP">Instance</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- </xsl:element>
-
- <xsl:for-each select="$procMod_/MEMORYMAP/MEMRANGE[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (ACCESSROUTE or (@MEMTYPE = 'BRIDGE')))]">
- <xsl:sort data-type="number" select="@BASEDECIMAL" order="ascending"/>
-
- <xsl:variable name="addr_id_"><xsl:value-of select="@BASENAME"/>:<xsl:value-of select="@HIGHNAME"/></xsl:variable>
- <xsl:variable name="baseName_" select="@BASENAME"/>
- <xsl:variable name="highName_" select="@HIGHNAME"/>
-
- <!--
- <xsl:if test="$G_DEBUG='TRUE'">
- <xsl:message>ADDRESS ID <xsl:value-of select="$addr_id_"/></xsl:message>
- </xsl:if>
- -->
-
- <xsl:variable name="set_id_">
- <xsl:if test="(@INSTANCE)">
- <xsl:value-of select="$procInst_"/>.<xsl:value-of select="@INSTANCE"/>:<xsl:value-of select="$addr_id_"/>
- </xsl:if>
- <xsl:if test="not(@INSTANCE)">
- <xsl:value-of select="$procInst_"/>:<xsl:value-of select="$addr_id_"/>
- </xsl:if>
- </xsl:variable>
-
- <xsl:variable name="procAddrRowIdx_" select="position() - 1"/>
- <SET ID="{$set_id_}" CLASS="ADDRESS" ROW_INDEX="{$procAddrRowIdx_}">
-
- <xsl:if test="(@INSTANCE)">
- <xsl:variable name="periInst_" select="@INSTANCE"/>
- <xsl:variable name="periMod_" select="key('G_MAP_MODULES', $periInst_)"/>
- <!--
- <xsl:variable name="subInstance_" select="$G_SYS_MODS/MODULE[(@INSTANCE = $instance_)]"/>
- <xsl:message>Count memrange slaves <xsl:value-of select="count($modMemMapSlvs_)"/> </xsl:message>
- <xsl:message>Count mod valid bifs <xsl:value-of select="count($modValidBifs_)"/> </xsl:message>
- -->
-
-
- <xsl:variable name="periModType_" select="$periMod_/@MODTYPE"/>
- <xsl:variable name="periViewIcon_" select="$periMod_/LICENSEINFO/@ICON_NAME"/>
- <xsl:variable name="periHwVersion_" select="$periMod_/@HWVERSION"/>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$periInst_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{$periModType_}" VIEWICON="{$periViewIcon_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{$periHwVersion_}"/>
- </xsl:if>
-
- <xsl:if test="not(@INSTANCE)">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$procInst_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{$procModType}" VIEWICON="{$procMod_/LICENSEINFO/@ICON_NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{$procHwVersion_}"/>
- </xsl:if>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Address Type" NAME="MEMTYPE" VALUE="{@MEMTYPE}"/>
-
- <xsl:variable name="instName_">
- <xsl:choose>
- <xsl:when test="@INSTANCE"><xsl:value-of select="@INSTANCE"/></xsl:when>
- <xsl:otherwise>Connected<xsl:value-of select="$procInst_"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <!--
- <xsl:message>INST : <xsl:value-of select="$set_id_"/></xsl:message>
- -->
-
- <xsl:variable name="is_locked_">
- <xsl:if test="@IS_LOCKED = 'TRUE'">TRUE</xsl:if>
- <xsl:if test="not(@IS_LOCKED) or not(@IS_LOCKED = 'TRUE')">FALSE</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="baseAddrViewType_">
- <xsl:choose>
- <xsl:when test="$is_locked_='TRUE'">STATIC</xsl:when>
- <xsl:otherwise>TEXTBOX</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="(@SIZEABRV and not(@SIZEABRV = 'U'))">
- <xsl:variable name="baseAddr_"><xsl:value-of select="translate(@BASEVALUE,&HEXU2L;)"/></xsl:variable>
- <xsl:variable name="highAddr_"><xsl:value-of select="translate(@HIGHVALUE,&HEXU2L;)"/></xsl:variable>
- <VARIABLE VIEWTYPE="{$baseAddrViewType_}" VIEWDISP="Base Address" NAME="BASEVALUE" VALUE="{$baseAddr_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="High Address" NAME="HIGHVALUE" VALUE="{$highAddr_}"/>
-
- <xsl:if test="not(@MEMTYPE) or not(@MEMTYPE = 'BRIDGE')">
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="Lock" NAME="IS_LOCKED" VALUE="{$is_locked_}"/>
- </xsl:if>
-
- <xsl:if test="@MEMTYPE and (@MEMTYPE = 'BRIDGE') and not(@BRIDGE_TO)">
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="Lock" NAME="IS_LOCKED" VALUE="{$is_locked_}"/>
- </xsl:if>
- </xsl:if>
-
- <xsl:if test="(@SIZEABRV and (@SIZEABRV = 'U'))">
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Base Address" NAME="BASEVALUE" VALUE=""/>
- </xsl:if>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Base Name" NAME="BASENAME" VALUE="{@BASENAME}"/>
-
- <xsl:variable name="sizeViewType_">
- <xsl:choose>
- <xsl:when test="(@SIZEABRV and (@SIZEABRV = 'U'))">DROPDOWN</xsl:when>
- <xsl:when test="$is_locked_='TRUE'">STATIC</xsl:when>
- <xsl:otherwise>DROPDOWN</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="{$sizeViewType_}" VIEWDISP="Size" NAME="SIZEABRV" VALUE="{@SIZEABRV}"/>
-
- <xsl:variable name="periInst_" select="@INSTANCE"/>
- <xsl:variable name="periMod_" select="key('G_MAP_MODULES', $periInst_)"/>
- <xsl:variable name="periModClass_" select="$periMod_/@MODCLASS"/>
- <xsl:variable name="periValidBifs_" select="key('G_MAP_ALL_BIFS', $periInst_)[not(@BUSNAME = '__NOC__')]"/>
- <xsl:variable name="periMemMapSlvs_" select="$periMod_/MEMORYMAP/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES/SLAVE"/>
- <xsl:variable name="periMemMapBifs_">
- <xsl:for-each select="$periMemMapSlvs_">
- <xsl:variable name="periSlvBifName_" select="@BUSINTERFACE"/>
- <xsl:if test="$periValidBifs_[(@NAME = $periSlvBifName_)]">
- <xsl:variable name="periBif_" select="$periValidBifs_[(@NAME = $periSlvBifName_)]"/>
- <xsl:variable name="periBifName_" select="$periBif_/@NAME"/>
- <xsl:variable name="periBifBus_" select="$periBif_/@BUSNAME"/>
- <!--
- <xsl:message> Slv Bif <xsl:value-of select="$periBifName_"/> = <xsl:value-of select="$periBifBus_"/></xsl:message>
- -->
- <MMBIF NAME="{$periBifName_}" BUS="{$periBifBus_}"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:variable name="num_of_periMemMapBifs_" select="count(exsl:node-set($periMemMapBifs_)/MMBIF)"/>
-
- <!--
- <xsl:message> Total num of slv bifs <xsl:value-of select="$num_of_periMemMapBifs_"/> </xsl:message>
- <xsl:message> </xsl:message>
- -->
-
- <xsl:variable name="valid_bifNames_">
- <xsl:for-each select="exsl:node-set($periMemMapBifs_)/MMBIF">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:if test="position() > 1">:</xsl:if><xsl:value-of select="$bifName_"/>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:variable name="valid_busNames_">
- <xsl:for-each select="exsl:node-set($periMemMapBifs_)/MMBIF">
- <xsl:variable name="busName_" select="@BUS"/>
- <xsl:if test="position() > 1">:</xsl:if><xsl:value-of select="$busName_"/>
- </xsl:for-each>
- </xsl:variable>
-
- <!--
- <xsl:message> Mod Bif <xsl:value-of select="$bifName_"/> : <xsl:value-of select="position()"/></xsl:message>
- <xsl:message> Mod Bif <xsl:value-of select="$bifName_"/> : <xsl:value-of select="position()"/></xsl:message>
- <xsl:message>Slv Bif <xsl:value-of select="$bifName_"/> : <xsl:value-of select="position()"/></xsl:message>
- <xsl:variable name="modBifs_" select="$modInst_/BUSINTERFACES"/>
- <xsl:if test="$periValidBifs_[(@NAME = $bifName_)]">
- <xsl:variable name="busName_" select="$periValidBifs_[(@NAME = $bifName_)]/@BUSNAME"/>
- <xsl:message>Mod Bif <xsl:value-of select="$bifName_"/> : <xsl:value-of select="position()"/></xsl:message>
- <xsl:if test="position() > 1">:</xsl:if><xsl:value-of select="$bifName_"/>
- </xsl:if>
- -->
- <!--
- <xsl:message>Module Instances <xsl:value-of select="$instName_"/> </xsl:message>
- <xsl:message>Base Name <xsl:value-of select="$baseName_"/> </xsl:message>
- <xsl:message>High Name <xsl:value-of select="$highName_"/> </xsl:message>
- <xsl:message>Valid bif names <xsl:value-of select="$valid_bifNames_"/> </xsl:message>
- <xsl:message>Valid bif names <xsl:value-of select="$valid_bifNames_"/> </xsl:message>
- <xsl:message>Valid bus names <xsl:value-of select="$valid_busNames_"/> </xsl:message>
- -->
-
-
- <xsl:variable name="var_bifNames_">
- <xsl:choose>
- <xsl:when test="string-length($valid_bifNames_) < 1">
- <xsl:choose>
- <xsl:when test="$periModClass_ = 'BUS'">Not Applicable</xsl:when>
- <xsl:otherwise>Not Connected</xsl:otherwise>
- </xsl:choose>
- </xsl:when>
- <xsl:otherwise><xsl:value-of select="$valid_bifNames_"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Interface(s)" NAME="BIFNAMES" VALUE="{$var_bifNames_}"/>
- <xsl:if test="(($num_of_periMemMapBifs_ > 0) and (string-length($valid_busNames_) > 0))">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Name" NAME="BUSNAME" VALUE="{$valid_busNames_}"/>
- </xsl:if>
- </SET> <!-- End of one processor memory range row -->
- </xsl:for-each> <!-- end of processor memory ranges loop -->
- </xsl:element><!-- End of Processor memory map set -->
- </xsl:for-each> <!-- end of processor module address space loop -->
-
- <!--
- Add branch for valid address that are not part of a processor's
- memory map. Usually modules that have just been added, but have
- not been connected to a bus yet.
- -->
-
- <xsl:variable name="nonProcAddresses_">
-
- <!-- Add a dummy non proc as a place holder. Otherwise the exsl:node-set test
- Below complains if the variable is completely empty
- -->
- <NONPROCADDRESS INSTANCE="__DUMMY__" BASENAME="__DUMMY__" HIGHNAME="__DUMMY__" BASEDECIMAL="__DUMMY__"/>
-
- <xsl:for-each select="$G_SYS_MODS/MODULE[(not(@MODCLASS = 'PROCESSOR') and (MEMORYMAP/MEMRANGE[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ACCESSROUTE)]))]">
- <xsl:variable name="nonProcInst_" select="@INSTANCE"/>
-
- <xsl:for-each select="MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
-
- <xsl:variable name="highName_" select="@HIGHNAME"/>
- <xsl:variable name="baseName_" select="@BASENAME"/>
- <xsl:variable name="baseDecimal_" select="@BASEDECIMAL"/>
-
- <xsl:if test="not($G_SYS_MODS/MODULE[(@MODCLASS = 'PROCESSOR')]/MEMORYMAP/MEMRANGE[((@INSTANCE = $nonProcInst_) and (@BASENAME = $baseName_) and (@HIGHNAME = $highName_))])">
- <NONPROCADDRESS INSTANCE="{$nonProcInst_}" BASENAME="{$baseName_}" HIGHNAME="{$highName_}" BASEDECIMAL="{$baseDecimal_}"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:for-each>
-
- </xsl:variable>
-
- <!-- Add unmapped addresses -->
- <xsl:variable name="hasUnMappedAddress">
- <xsl:for-each select="$G_SYS_MODS/MODULE[(not(@MODCLASS = 'PROCESSOR') and (MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]))]">
- <xsl:variable name="nonProcInst_" select="@INSTANCE"/>
- <xsl:for-each select="MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:variable name="highName_" select="@HIGHNAME"/>
- <xsl:variable name="baseName_" select="@BASENAME"/>
- <xsl:variable name="baseDecimal_" select="@BASEDECIMAL"/>
- <xsl:if test="not($G_SYS_MODS/MODULE[(@MODCLASS = 'PROCESSOR')]/MEMORYMAP/MEMRANGE[((@INSTANCE = $nonProcInst_) and (@BASENAME = $baseName_) and (@HIGHNAME = $highName_))])"><xsl:value-of select="$nonProcInst_"/></xsl:if>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:if test="string-length($hasUnMappedAddress) > 1">
-
- <SET ID="Unmapped Addresses" CLASS="MODULE" ROW_INDEX="{$G_NUM_OF_PROCS_W_ADDRS}">
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="Unmapped Addresses"/>
-
- <xsl:for-each select="$G_SYS_MODS/MODULE[(not(@MODCLASS = 'PROCESSOR') and (MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]))]/MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
-
- <xsl:variable name="nonProcMod_" select="../.."/>
- <xsl:variable name="nonProcMMap_" select="$nonProcMod_/MEMORYMAP"/>
- <xsl:variable name="instance_" select="$nonProcMod_/@INSTANCE"/>
-
- <xsl:variable name="row_index_" select="position()"/>
- <xsl:variable name="instName_" select="$nonProcMod_/@INSTANCE"/>
- <xsl:variable name="highName_" select="@HIGHNAME"/>
- <xsl:variable name="baseName_" select="@BASENAME"/>
- <xsl:variable name="baseDecimal_" select="@BASEDECIMAL"/>
-
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[((@BASENAME = $baseName_) and (@HIGHNAME = $highName_))]">
-
- <xsl:if test="not($G_SYS_MODS/MODULE[(@MODCLASS = 'PROCESSOR')]/MEMORYMAP/MEMRANGE[((@INSTANCE = $instName_) and (@BASENAME = $baseName_) and (@HIGHNAME = $highName_))])">
-
- <xsl:variable name="addr_id_"><xsl:value-of select="$baseName_"/>:<xsl:value-of select="$highName_"/></xsl:variable>
- <xsl:variable name="set_id_"><xsl:value-of select="$instName_"/>:<xsl:value-of select="$addr_id_"/></xsl:variable>
-
- <xsl:variable name="inst_modtype_" select="$nonProcMod_/@MODTYPE"/>
- <xsl:variable name="inst_viewicon_" select="$nonProcMod_/LICENSEINFO/@ICON_NAME"/>
- <xsl:variable name="inst_modclass_" select="$nonProcMod_/@MODCLASS"/>
- <xsl:variable name="inst_hwversion_" select="$nonProcMod_/@HWVERSION"/>
-
- <SET ID="{$set_id_}" CLASS="ADDRESS">
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$instance_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{$inst_modtype_}" VIEWICON="{$inst_viewicon_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{$inst_hwversion_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Address Type" NAME="MEMTYPE" VALUE="{@MEMTYPE}"/>
-
- <xsl:variable name="is_locked_">
- <xsl:if test="@IS_LOCKED = 'TRUE'">TRUE</xsl:if>
- <xsl:if test="not(@IS_LOCKED) or not(@IS_LOCKED = 'TRUE')">FALSE</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="baseAddrViewType_">
- <xsl:choose>
- <xsl:when test="$is_locked_='TRUE'">STATIC</xsl:when>
- <xsl:otherwise>TEXTBOX</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="(@SIZEABRV and not(@SIZEABRV = 'U'))">
-
- <xsl:variable name="baseAddr_"><xsl:value-of select="translate(@BASEVALUE,&HEXU2L;)"/></xsl:variable>
- <xsl:variable name="highAddr_"><xsl:value-of select="translate(@HIGHVALUE,&HEXU2L;)"/></xsl:variable>
-
- <VARIABLE VIEWTYPE="{$baseAddrViewType_}" VIEWDISP="Base Address" NAME="BASEVALUE" VALUE="{$baseAddr_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="High Address" NAME="HIGHVALUE" VALUE="{$highAddr_}"/>
-
- <xsl:if test="not(@MEMTYPE) or not(@MEMTYPE = 'BRIDGE')">
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="Lock" NAME="IS_LOCKED" VALUE="{$is_locked_}"/>
- </xsl:if>
-
- <xsl:if test="@MEMTYPE and (@MEMTYPE = 'BRIDGE') and not(@BRIDGE_TO)">
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="Lock" NAME="IS_LOCKED" VALUE="{$is_locked_}"/>
- </xsl:if>
-
- </xsl:if>
-
- <xsl:if test="(@SIZEABRV and (@SIZEABRV = 'U'))">
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Base Address" NAME="BASEVALUE" VALUE=""/>
- </xsl:if>
-
-
- <!--
- Lock, DCache and ICache removed in 11.1
-
- <xsl:if test="(@IS_CACHEABLE = 'TRUE')">
-
- <xsl:variable name="is_dcached_">
- <xsl:if test="(@IS_DCACHED = 'TRUE')">TRUE</xsl:if>
- <xsl:if test="(not(@IS_DCACHED) or not(@IS_DCACHED = 'TRUE'))">FALSE</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="is_icached_">
- <xsl:if test="(@IS_ICACHED = 'TRUE')">TRUE</xsl:if>
- <xsl:if test="(not(@IS_ICACHED) or not(@IS_ICACHED = 'TRUE'))">FALSE</xsl:if>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="DCache" NAME="IS_DCACHED" VALUE="{$is_dcached_}"/>
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="ICache" NAME="IS_ICACHED" VALUE="{$is_icached_}"/>
- </xsl:if>
- -->
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Base Name" NAME="BASENAME" VALUE="{@BASENAME}"/>
-
- <xsl:variable name="sizeViewType_">
- <xsl:choose>
- <xsl:when test="(@SIZEABRV and (@SIZEABRV = 'U'))">DROPDOWN</xsl:when>
- <xsl:when test="$is_locked_='TRUE'">STATIC</xsl:when>
- <xsl:otherwise>DROPDOWN</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="{$sizeViewType_}" VIEWDISP="Size" NAME="SIZEABRV" VALUE="{@SIZEABRV}"/>
-
- <xsl:variable name="valid_bifNames_">
- <xsl:choose>
- <xsl:when test="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES">
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES/SLAVE">
- <xsl:variable name="bifName_" select="@BUSINTERFACE"/>
- <!-- <xsl:message>Bif Name <xsl:value-of select="$bifName_"/> </xsl:message> -->
- <xsl:variable name="modBifs_" select="$nonProcMod_/BUSINTERFACES"/>
- <xsl:if test="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]">
- <xsl:variable name="busName_" select="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <xsl:if test="position() > 1">:</xsl:if><xsl:value-of select="@BUSINTERFACE"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLVINTERFACES/BUSINTERFACE">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="modBifs_" select="$nonProcMod_"/>
- <xsl:if test="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]">
- <xsl:variable name="busName_" select="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <xsl:if test="position() > 1">:</xsl:if><xsl:value-of select="@NAME"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="def_bifNames_">
- <xsl:choose>
- <xsl:when test="(string-length($valid_bifNames_) < 1) or ((string-length($valid_bifNames_) = 1) and ($valid_bifNames_ = ':'))">Not Connected</xsl:when>
- <xsl:when test="starts-with($valid_bifNames_,':')"><xsl:value-of select="substring-after($valid_bifNames_,':')"/></xsl:when>
- <xsl:otherwise><xsl:value-of select="$valid_bifNames_"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Interface(s)" NAME="BIFNAMES" VALUE="{$def_bifNames_}"/>
-
- <xsl:choose>
- <xsl:when test="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES">
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES/SLAVE">
- <xsl:variable name="slvBifName_" select="@BUSINTERFACE"/>
- <xsl:variable name="modBifs_" select="$nonProcMod_/BUSINTERFACES"/>
- <xsl:if test="count($modBifs_/BUSINTERFACE[((@NAME = $slvBifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]) = 1">
- <xsl:variable name="slvBusName_" select="$modBifs_/BUSINTERFACE[((@NAME = $slvBifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Name" NAME="BUSNAME" VALUE="{$slvBusName_}"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLVINTERFACES/BUSINTERFACE">
- <xsl:variable name="slvBifName_" select="@NAME"/>
- <xsl:variable name="modBifs_" select="$nonProcMod_"/>
- <xsl:if test="count($modBifs_/BUSINTERFACE[((@NAME = $slvBifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]) = 1">
- <xsl:variable name="slvBusName_" select="$modBifs_/BUSINTERFACE[((@NAME = $slvBifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Name" NAME="BUSNAME" VALUE="{$slvBusName_}"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:otherwise>
- </xsl:choose>
-
-
- </SET> <!-- End of one non processor memory range row -->
- </xsl:if>
-
- </xsl:for-each> <!-- end of non processor memory ranges loop -->
-
- </xsl:for-each> <!-- end of NONPROCADDRESS loop -->
-
- </SET> <!-- End of non processor tree branch -->
-
- </xsl:if> <!-- End of test to see if we have and non processor mapped address -->
-
-</xsl:template>
-
-
-<xsl:template name="__WRITE_VIEW_ADDRESS__">
-
-<!--
--->
- <xsl:for-each select="$G_SYS_MODS/MODULE[((@MODCLASS = 'PROCESSOR') and (MEMORYMAP/MEMRANGE[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ACCESSROUTE)]))]">
- <xsl:sort data-type="number" select="@ROW_INDEX" order="ascending"/>
-
- <xsl:variable name="procInst_" select="@INSTANCE"/>
- <xsl:variable name="modClass_" select="@MODCLASS"/>
-
- <xsl:variable name="procInstHdrVal_"><xsl:value-of select="$procInst_"/>'s Address Map</xsl:variable>
- <xsl:variable name="procInstRowIdx_" select="position() - 1"/>
- <xsl:variable name="modInstance_" select="self::node()"/>
-
- <SET ID="{$procInst_}" CLASS="MODULE" ROW_INDEX="{$procInstRowIdx_}">
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$procInstHdrVal_}"/>
-
- <xsl:for-each select="$modInstance_/MEMORYMAP/MEMRANGE[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and (ACCESSROUTE or (@MEMTYPE = 'BRIDGE')))]">
- <xsl:sort data-type="number" select="@BASEDECIMAL" order="ascending"/>
-
- <xsl:variable name="addr_id_"><xsl:value-of select="@BASENAME"/>:<xsl:value-of select="@HIGHNAME"/></xsl:variable>
- <xsl:variable name="baseName_" select="@BASENAME"/>
- <xsl:variable name="highName_" select="@HIGHNAME"/>
-
- <xsl:if test="$G_DEBUG='TRUE'">
- <xsl:message>ADDRESS ID <xsl:value-of select="$addr_id_"/></xsl:message>
- </xsl:if>
-
- <xsl:variable name="set_id_">
- <xsl:if test="(@INSTANCE)">
- <xsl:value-of select="$procInst_"/>.<xsl:value-of select="@INSTANCE"/>:<xsl:value-of select="$addr_id_"/>
- </xsl:if>
- <xsl:if test="not(@INSTANCE)">
- <xsl:value-of select="$procInst_"/>:<xsl:value-of select="$addr_id_"/>
- </xsl:if>
- </xsl:variable>
-
- <xsl:variable name="procAddrRowIdx_" select="position() - 1"/>
- <SET ID="{$set_id_}" CLASS="ADDRESS" ROW_INDEX="{$procAddrRowIdx_}">
-
- <xsl:if test="(@INSTANCE)">
- <xsl:variable name="instance_" select="@INSTANCE"/>
- <xsl:variable name="subInstance_" select="$G_SYS_MODS/MODULE[(@INSTANCE = $instance_)]"/>
-
- <xsl:variable name="inst_modtype_" select="$subInstance_/@MODTYPE"/>
- <xsl:variable name="inst_viewicon_" select="$subInstance_/LICENSEINFO/@ICON_NAME"/>
- <xsl:variable name="inst_hwversion_" select="$subInstance_/@HWVERSION"/>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$instance_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{$inst_modtype_}" VIEWICON="{$inst_viewicon_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{$inst_hwversion_}"/>
- </xsl:if>
-
- <xsl:if test="not(@INSTANCE)">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$modInstance_/@INSTANCE}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{$modInstance_/@MODTYPE}" VIEWICON="{$modInstance_/LICENSEINFO/@ICON_NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{$modInstance_/@HWVERSION}"/>
- </xsl:if>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Address Type" NAME="MEMTYPE" VALUE="{@MEMTYPE}"/>
-
- <xsl:variable name="instName_">
- <xsl:choose>
- <xsl:when test="@INSTANCE"><xsl:value-of select="@INSTANCE"/></xsl:when>
- <xsl:otherwise>Connected<xsl:value-of select="$modInstance_/@INSTANCE"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <!--
- <xsl:message>INST : <xsl:value-of select="$set_id_"/></xsl:message>
- -->
-
- <xsl:variable name="is_locked_">
- <xsl:if test="@IS_LOCKED = 'TRUE'">TRUE</xsl:if>
- <xsl:if test="not(@IS_LOCKED) or not(@IS_LOCKED = 'TRUE')">FALSE</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="baseAddrViewType_">
- <xsl:choose>
- <xsl:when test="$is_locked_='TRUE'">STATIC</xsl:when>
- <xsl:otherwise>TEXTBOX</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="(@SIZEABRV and not(@SIZEABRV = 'U'))">
- <xsl:variable name="baseAddr_"><xsl:value-of select="translate(@BASEVALUE,&HEXU2L;)"/></xsl:variable>
- <xsl:variable name="highAddr_"><xsl:value-of select="translate(@HIGHVALUE,&HEXU2L;)"/></xsl:variable>
- <VARIABLE VIEWTYPE="{$baseAddrViewType_}" VIEWDISP="Base Address" NAME="BASEVALUE" VALUE="{$baseAddr_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="High Address" NAME="HIGHVALUE" VALUE="{$highAddr_}"/>
-
- <xsl:if test="not(@MEMTYPE) or not(@MEMTYPE = 'BRIDGE')">
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="Lock" NAME="IS_LOCKED" VALUE="{$is_locked_}"/>
- </xsl:if>
-
- <xsl:if test="@MEMTYPE and (@MEMTYPE = 'BRIDGE') and not(@BRIDGE_TO)">
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="Lock" NAME="IS_LOCKED" VALUE="{$is_locked_}"/>
- </xsl:if>
-
- </xsl:if>
-
- <xsl:if test="(@SIZEABRV and (@SIZEABRV = 'U'))">
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Base Address" NAME="BASEVALUE" VALUE=""/>
- </xsl:if>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Base Name" NAME="BASENAME" VALUE="{@BASENAME}"/>
-
- <xsl:variable name="sizeViewType_">
- <xsl:choose>
- <xsl:when test="(@SIZEABRV and (@SIZEABRV = 'U'))">DROPDOWN</xsl:when>
- <xsl:when test="$is_locked_='TRUE'">STATIC</xsl:when>
- <xsl:otherwise>DROPDOWN</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="{$sizeViewType_}" VIEWDISP="Size" NAME="SIZEABRV" VALUE="{@SIZEABRV}"/>
-
- <xsl:variable name="modInst_" select="$G_SYS_MODS/MODULE[(@INSTANCE = $instName_)]"/>
- <xsl:variable name="modMemMap_" select="$modInst_/MEMORYMAP"/>
-
- <xsl:variable name="valid_bifNames_">
- <xsl:choose>
- <xsl:when test="$modMemMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES">
- <xsl:for-each select="$modMemMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES/SLAVE">
- <xsl:variable name="bifName_" select="@BUSINTERFACE"/>
- <!-- <xsl:message>Bif Name <xsl:value-of select="$bifName_"/> </xsl:message> -->
- <xsl:variable name="modBifs_" select="$modInst_/BUSINTERFACES"/>
- <xsl:if test="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]">
- <xsl:variable name="busName_" select="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <xsl:if test="position() > 1">:</xsl:if><xsl:value-of select="@BUSINTERFACE"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <xsl:for-each select="$modMemMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLVINTERFACES/BUSINTERFACE">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="modBifs_" select="$modInst_"/>
- <xsl:if test="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]">
- <xsl:variable name="busName_" select="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <xsl:if test="position() > 1">:</xsl:if><xsl:value-of select="@NAME"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <!--
- <xsl:message>Module Instances <xsl:value-of select="$instName_"/> </xsl:message>
- <xsl:message>Base Name <xsl:value-of select="$baseName_"/> </xsl:message>
- <xsl:message>High Name <xsl:value-of select="$highName_"/> </xsl:message>
- <xsl:message>Valid bif names <xsl:value-of select="$valid_bifNames_"/> </xsl:message>
- -->
-
-
- <xsl:variable name="def_bifNames_">
- <xsl:choose>
- <xsl:when test="string-length($valid_bifNames_) < 1">
- <xsl:choose>
- <xsl:when test="$modClass_ = 'BUS'">Not Applicable</xsl:when>
- <xsl:otherwise>Not Connected</xsl:otherwise>
- </xsl:choose>
- </xsl:when>
- <xsl:when test="starts-with($valid_bifNames_,':')"><xsl:value-of select="substring-after($valid_bifNames_,':')"/></xsl:when>
- <xsl:otherwise><xsl:value-of select="$valid_bifNames_"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Interface(s)" NAME="BIFNAMES" VALUE="{$def_bifNames_}"/>
-
- <xsl:choose>
- <xsl:when test="$modMemMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES">
- <xsl:for-each select="$modMemMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES/SLAVE">
- <xsl:variable name="bifName_" select="@BUSINTERFACE"/>
- <xsl:variable name="modBifs_" select="$modInst_/BUSINTERFACES"/>
- <xsl:if test="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]">
- <xsl:variable name="busName_" select="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <xsl:variable name="numBifs_" select="count($modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))])"/>
- <xsl:if test="((position() = 1) or ($numBifs_ = 1))">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Name" NAME="BUSNAME" VALUE="{$busName_}"/>
- </xsl:if>
- </xsl:if>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <xsl:for-each select="$modMemMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLVINTERFACES/BUSINTERFACE">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="modBifs_" select="$modInst_"/>
- <xsl:if test="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]">
- <xsl:variable name="busName_" select="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <xsl:variable name="numBifs_" select="count($modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))])"/>
- <xsl:if test="((position() = 1) or ($numBifs_ = 1))">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Name" NAME="BUSNAME" VALUE="{$busName_}"/>
- </xsl:if>
- </xsl:if>
- </xsl:for-each>
- </xsl:otherwise>
- </xsl:choose>
-<!--
- -->
- </SET> <!-- End of one processor memory range row -->
- </xsl:for-each> <!-- end of processor memory ranges loop -->
- </SET>
- </xsl:for-each> <!-- end of processor module address space loop -->
-
- <!--
- Add branch for valid address that are not part of a processor's
- memory map. Usually modules that have just been added, but have
- not been connected to a bus yet.
- -->
-
- <xsl:variable name="nonProcAddresses_">
-
- <!-- Add a dummy non proc as a place holder. Otherwise the exsl:node-set test
- Below complains if the variable is completely empty
- -->
- <NONPROCADDRESS INSTANCE="__DUMMY__" BASENAME="__DUMMY__" HIGHNAME="__DUMMY__" BASEDECIMAL="__DUMMY__"/>
-
- <xsl:for-each select="$G_SYS_MODS/MODULE[(not(@MODCLASS = 'PROCESSOR') and (MEMORYMAP/MEMRANGE[((not(@IS_VALID) or (@IS_VALID = 'TRUE')) and ACCESSROUTE)]))]">
- <xsl:variable name="nonProcInst_" select="@INSTANCE"/>
-
- <xsl:for-each select="MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
-
- <xsl:variable name="highName_" select="@HIGHNAME"/>
- <xsl:variable name="baseName_" select="@BASENAME"/>
- <xsl:variable name="baseDecimal_" select="@BASEDECIMAL"/>
-
- <xsl:if test="not($G_SYS_MODS/MODULE[(@MODCLASS = 'PROCESSOR')]/MEMORYMAP/MEMRANGE[((@INSTANCE = $nonProcInst_) and (@BASENAME = $baseName_) and (@HIGHNAME = $highName_))])">
- <NONPROCADDRESS INSTANCE="{$nonProcInst_}" BASENAME="{$baseName_}" HIGHNAME="{$highName_}" BASEDECIMAL="{$baseDecimal_}"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:for-each>
-
- </xsl:variable>
-
- <!-- Add unmapped addresses -->
- <xsl:variable name="hasUnMappedAddress">
- <xsl:for-each select="$G_SYS_MODS/MODULE[(not(@MODCLASS = 'PROCESSOR') and (MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]))]">
- <xsl:variable name="nonProcInst_" select="@INSTANCE"/>
- <xsl:for-each select="MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:variable name="highName_" select="@HIGHNAME"/>
- <xsl:variable name="baseName_" select="@BASENAME"/>
- <xsl:variable name="baseDecimal_" select="@BASEDECIMAL"/>
- <xsl:if test="not($G_SYS_MODS/MODULE[(@MODCLASS = 'PROCESSOR')]/MEMORYMAP/MEMRANGE[((@INSTANCE = $nonProcInst_) and (@BASENAME = $baseName_) and (@HIGHNAME = $highName_))])"><xsl:value-of select="$nonProcInst_"/></xsl:if>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:if test="string-length($hasUnMappedAddress) > 1">
-
- <SET ID="Unmapped Addresses" CLASS="MODULE" ROW_INDEX="{$G_NUM_OF_PROCS_W_ADDRS}">
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="Unmapped Addresses"/>
-
- <xsl:for-each select="$G_SYS_MODS/MODULE[(not(@MODCLASS = 'PROCESSOR') and (MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]))]/MEMORYMAP/MEMRANGE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
-
- <xsl:variable name="nonProcMod_" select="../.."/>
- <xsl:variable name="nonProcMMap_" select="$nonProcMod_/MEMORYMAP"/>
- <xsl:variable name="instance_" select="$nonProcMod_/@INSTANCE"/>
-
- <xsl:variable name="row_index_" select="position()"/>
- <xsl:variable name="instName_" select="$nonProcMod_/@INSTANCE"/>
- <xsl:variable name="highName_" select="@HIGHNAME"/>
- <xsl:variable name="baseName_" select="@BASENAME"/>
- <xsl:variable name="baseDecimal_" select="@BASEDECIMAL"/>
-
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[((@BASENAME = $baseName_) and (@HIGHNAME = $highName_))]">
-
- <xsl:if test="not($G_SYS_MODS/MODULE[(@MODCLASS = 'PROCESSOR')]/MEMORYMAP/MEMRANGE[((@INSTANCE = $instName_) and (@BASENAME = $baseName_) and (@HIGHNAME = $highName_))])">
-
- <xsl:variable name="addr_id_"><xsl:value-of select="$baseName_"/>:<xsl:value-of select="$highName_"/></xsl:variable>
- <xsl:variable name="set_id_"><xsl:value-of select="$instName_"/>:<xsl:value-of select="$addr_id_"/></xsl:variable>
-
- <xsl:variable name="inst_modtype_" select="$nonProcMod_/@MODTYPE"/>
- <xsl:variable name="inst_viewicon_" select="$nonProcMod_/LICENSEINFO/@ICON_NAME"/>
- <xsl:variable name="inst_modclass_" select="$nonProcMod_/@MODCLASS"/>
- <xsl:variable name="inst_hwversion_" select="$nonProcMod_/@HWVERSION"/>
-
- <SET ID="{$set_id_}" CLASS="ADDRESS">
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$instance_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{$inst_modtype_}" VIEWICON="{$inst_viewicon_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{$inst_hwversion_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Address Type" NAME="MEMTYPE" VALUE="{@MEMTYPE}"/>
-
- <xsl:variable name="is_locked_">
- <xsl:if test="@IS_LOCKED = 'TRUE'">TRUE</xsl:if>
- <xsl:if test="not(@IS_LOCKED) or not(@IS_LOCKED = 'TRUE')">FALSE</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="baseAddrViewType_">
- <xsl:choose>
- <xsl:when test="$is_locked_='TRUE'">STATIC</xsl:when>
- <xsl:otherwise>TEXTBOX</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="(@SIZEABRV and not(@SIZEABRV = 'U'))">
-
- <xsl:variable name="baseAddr_"><xsl:value-of select="translate(@BASEVALUE,&HEXU2L;)"/></xsl:variable>
- <xsl:variable name="highAddr_"><xsl:value-of select="translate(@HIGHVALUE,&HEXU2L;)"/></xsl:variable>
-
- <VARIABLE VIEWTYPE="{$baseAddrViewType_}" VIEWDISP="Base Address" NAME="BASEVALUE" VALUE="{$baseAddr_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="High Address" NAME="HIGHVALUE" VALUE="{$highAddr_}"/>
-
- <xsl:if test="not(@MEMTYPE) or not(@MEMTYPE = 'BRIDGE')">
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="Lock" NAME="IS_LOCKED" VALUE="{$is_locked_}"/>
- </xsl:if>
-
- <xsl:if test="@MEMTYPE and (@MEMTYPE = 'BRIDGE') and not(@BRIDGE_TO)">
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="Lock" NAME="IS_LOCKED" VALUE="{$is_locked_}"/>
- </xsl:if>
-
- </xsl:if>
-
- <xsl:if test="(@SIZEABRV and (@SIZEABRV = 'U'))">
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Base Address" NAME="BASEVALUE" VALUE=""/>
- </xsl:if>
-
-
- <!--
- Lock, DCache and ICache removed in 11.1
-
- <xsl:if test="(@IS_CACHEABLE = 'TRUE')">
-
- <xsl:variable name="is_dcached_">
- <xsl:if test="(@IS_DCACHED = 'TRUE')">TRUE</xsl:if>
- <xsl:if test="(not(@IS_DCACHED) or not(@IS_DCACHED = 'TRUE'))">FALSE</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="is_icached_">
- <xsl:if test="(@IS_ICACHED = 'TRUE')">TRUE</xsl:if>
- <xsl:if test="(not(@IS_ICACHED) or not(@IS_ICACHED = 'TRUE'))">FALSE</xsl:if>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="DCache" NAME="IS_DCACHED" VALUE="{$is_dcached_}"/>
- <VARIABLE VIEWTYPE="CHECKBOX" VIEWDISP="ICache" NAME="IS_ICACHED" VALUE="{$is_icached_}"/>
- </xsl:if>
- -->
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Base Name" NAME="BASENAME" VALUE="{@BASENAME}"/>
-
- <xsl:variable name="sizeViewType_">
- <xsl:choose>
- <xsl:when test="(@SIZEABRV and (@SIZEABRV = 'U'))">DROPDOWN</xsl:when>
- <xsl:when test="$is_locked_='TRUE'">STATIC</xsl:when>
- <xsl:otherwise>DROPDOWN</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="{$sizeViewType_}" VIEWDISP="Size" NAME="SIZEABRV" VALUE="{@SIZEABRV}"/>
-
- <xsl:variable name="valid_bifNames_">
- <xsl:choose>
- <xsl:when test="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES">
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES/SLAVE">
- <xsl:variable name="bifName_" select="@BUSINTERFACE"/>
- <!-- <xsl:message>Bif Name <xsl:value-of select="$bifName_"/> </xsl:message> -->
- <xsl:variable name="modBifs_" select="$nonProcMod_/BUSINTERFACES"/>
- <xsl:if test="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]">
- <xsl:variable name="busName_" select="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <xsl:if test="position() > 1">:</xsl:if><xsl:value-of select="@BUSINTERFACE"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLVINTERFACES/BUSINTERFACE">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="modBifs_" select="$nonProcMod_"/>
- <xsl:if test="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]">
- <xsl:variable name="busName_" select="$modBifs_/BUSINTERFACE[((@NAME = $bifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <xsl:if test="position() > 1">:</xsl:if><xsl:value-of select="@NAME"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="def_bifNames_">
- <xsl:choose>
- <xsl:when test="(string-length($valid_bifNames_) < 1) or ((string-length($valid_bifNames_) = 1) and ($valid_bifNames_ = ':'))">Not Connected</xsl:when>
- <xsl:when test="starts-with($valid_bifNames_,':')"><xsl:value-of select="substring-after($valid_bifNames_,':')"/></xsl:when>
- <xsl:otherwise><xsl:value-of select="$valid_bifNames_"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Interface(s)" NAME="BIFNAMES" VALUE="{$def_bifNames_}"/>
-
- <xsl:choose>
- <xsl:when test="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES">
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLAVES/SLAVE">
- <xsl:variable name="slvBifName_" select="@BUSINTERFACE"/>
- <xsl:variable name="modBifs_" select="$nonProcMod_/BUSINTERFACES"/>
- <xsl:if test="count($modBifs_/BUSINTERFACE[((@NAME = $slvBifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]) = 1">
- <xsl:variable name="slvBusName_" select="$modBifs_/BUSINTERFACE[((@NAME = $slvBifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Name" NAME="BUSNAME" VALUE="{$slvBusName_}"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <xsl:for-each select="$nonProcMMap_/MEMRANGE[(@BASENAME = $baseName_) and (@HIGHNAME = $highName_)]/SLVINTERFACES/BUSINTERFACE">
- <xsl:variable name="slvBifName_" select="@NAME"/>
- <xsl:variable name="modBifs_" select="$nonProcMod_"/>
- <xsl:if test="count($modBifs_/BUSINTERFACE[((@NAME = $slvBifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]) = 1">
- <xsl:variable name="slvBusName_" select="$modBifs_/BUSINTERFACE[((@NAME = $slvBifName_) and not(@IS_VALID = 'FALSE') and not(@BUSNAME = '__NOC__'))]/@BUSNAME"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Name" NAME="BUSNAME" VALUE="{$slvBusName_}"/>
- </xsl:if>
- </xsl:for-each>
- </xsl:otherwise>
- </xsl:choose>
-
-
- </SET> <!-- End of one non processor memory range row -->
- </xsl:if>
-
- </xsl:for-each> <!-- end of non processor memory ranges loop -->
-
- </xsl:for-each> <!-- end of NONPROCADDRESS loop -->
-
- </SET> <!-- End of non processor tree branch -->
-
- </xsl:if> <!-- End of test to see if we have and non processor mapped address -->
-
-</xsl:template>
-
-</xsl:stylesheet>
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_busif.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_busif.xsl
deleted file mode 100644
index 97adb0df88..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_busif.xsl
+++ /dev/null
@@ -1,631 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<!DOCTYPE stylesheet [
- <!ENTITY UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ">
- <!ENTITY LOWERCASE "abcdefghijklmnopqrstuvwxyz">
-
- <!ENTITY UPPER2LOWER " '&UPPERCASE;' , '&LOWERCASE;' ">
- <!ENTITY LOWER2UPPER " '&LOWERCASE;' , '&UPPERCASE;' ">
-
- <!ENTITY ALPHALOWER "ABCDEFxX0123456789">
- <!ENTITY HEXUPPER "ABCDEFxX0123456789">
- <!ENTITY HEXLOWER "abcdefxX0123456789">
- <!ENTITY HEXU2L " '&HEXLOWER;' , '&HEXUPPER;' ">
-]>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="exsl dyn math xlink">
-
-
-<!--
- ================================================================================
- Generate XTeller for BIFS
- ================================================================================
--->
-
-<xsl:template name="WRITE_VIEW_BIF_TREE">
-
- <xsl:for-each select="$G_SYS_MODS/MODULE">
-
- <xsl:variable name="modRef_" select="self::node()"/>
- <xsl:variable name="m_inst_" select="$modRef_/@INSTANCE"/>
-
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="@INSTANCE"/></xsl:attribute>
- <xsl:attribute name="CLASS">MODULE</xsl:attribute>
-
- <xsl:choose>
- <xsl:when test="$modRef_/@POTENTIAL_INDEX">
- <xsl:attribute name="POTENTIAL_INDEX"><xsl:value-of select="$modRef_/@POTENTIAL_INDEX"/></xsl:attribute>
- </xsl:when>
- <xsl:when test="$modRef_/@CONNECTED_INDEX">
- <xsl:attribute name="CONNECTED_INDEX"><xsl:value-of select="$modRef_/@CONNECTED_INDEX"/></xsl:attribute>
- </xsl:when>
- </xsl:choose>
-
- <!--
- CR452579
- Can only modify INSTANCE name in Hierarchal view.
- -->
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Name" NAME="INSTANCE" VALUE="{@INSTANCE}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{@MODTYPE}" VIEWICON="{LICENSEINFO/@ICON_NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{@HWVERSION}"/>
-
- <xsl:variable name="ipClassification_">
- <xsl:call-template name="F_ModClass_To_IpClassification">
- <xsl:with-param name="iModClass" select="@MODCLASS"/>
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Classification" NAME="IPCLASS" VALUE="{$ipClassification_}"/>
-
- <!-- Write Bus Interfaces here -->
- <xsl:for-each select="$G_SYS_MODS"> <!-- To put things in the right scope for the keys below -->
- <xsl:variable name="m_bifs_all_" select="key('G_MAP_ALL_BIFS', $m_inst_)"/>
- <xsl:for-each select="$m_bifs_all_">
- <xsl:sort data-type="number" select="@MPD_INDEX" order="ascending"/>
- <xsl:call-template name="WRITE_VIEW_BIF_TREE_SET">
- <xsl:with-param name="iModRef" select="$modRef_"/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- </xsl:call-template>
- </xsl:for-each> <!-- End of bus interface loop -->
- </xsl:for-each>
- </xsl:element>
- </xsl:for-each> <!-- End module loop -->
-</xsl:template>
-
-
-<xsl:template name="WRITE_VIEW_BIF_TREE_SET">
- <xsl:param name="iModRef" select="'__NONE__'"/>
- <xsl:param name="iBifRef" select="'__NONE__'"/>
- <xsl:param name="iBifCol" select="'__NONE__'"/>
-
- <xsl:element name="SET">
- <xsl:if test="not($iBifCol = '__NONE__')">
- <xsl:attribute name="RGB_FG"><xsl:value-of select="$iBifCol"/></xsl:attribute>
- </xsl:if>
- <xsl:attribute name="ID"><xsl:value-of select="$iBifRef/@NAME"/></xsl:attribute>
- <xsl:attribute name="CLASS">BUSINTERFACE</xsl:attribute>
-
- <xsl:if test="($iBifRef/@TYPE = 'MONITOR')">
- <xsl:choose>
- <xsl:when test="($iBifRef/@IS_P2P)">
- <xsl:attribute name="IS_P2P_MONITOR">TRUE</xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="IS_SHARED_MONITOR">TRUE</xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:if>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="NAME" NAME="NAME" VALUE="{$iBifRef/@NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Type" NAME="TYPE" VALUE="{$iBifRef/@TYPE}"/>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Standard</xsl:attribute>
- <xsl:attribute name="NAME">BUSSTD</xsl:attribute>
- <xsl:choose>
- <xsl:when test="($iBifRef/@BUSSTD_PSF)">
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUSSTD_PSF"/></xsl:attribute>
- </xsl:when>
- <xsl:when test="($iBifRef/@BUSSTD)">
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUSSTD"/></xsl:attribute>
- </xsl:when>
- <xsl:when test="($iBifRef/@BUS_STD)">
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUS_STD"/></xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VALUE">USER</xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:element>
-
- <xsl:choose>
- <xsl:when test="($iBifRef/@TYPE = 'INITIATOR')">
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWTYPE">TEXTBOX</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:choose>
- <xsl:when test="(($iBifRef/@BUSNAME = '__NOC__') or ($iBifRef/@BUSNAME = '') or not($iBifRef/@BUSNAME))">
- <xsl:variable name="def_noc_name_"><xsl:value-of select="$iModRef/@INSTANCE"/>_<xsl:value-of select="$iBifRef/@NAME"/></xsl:variable>
- <xsl:attribute name="VALUE"><xsl:value-of select="$def_noc_name_"/></xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUSNAME"/></xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:choose>
- <xsl:when test="(($iBifRef/@BUSNAME = '__NOC__') or ($iBifRef/@BUSNAME = '') or not($iBifRef/@BUSNAME))">
- <xsl:element name="VARIABLE">
- <xsl:choose>
- <xsl:when test="(($iBifRef/@BUSSTD = 'AXI') and ($iBifRef/@TYPE = 'SLAVE') and ($G_HAVE_XB_BUSSES = 'TRUE'))">
- <xsl:attribute name="VIEWTYPE">BUTTON</xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VIEWTYPE">DROPDOWN</xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VALUE">No Connection</xsl:attribute>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:choose>
- <xsl:when test="(($iBifRef/@TYPE = 'MONITOR') and ($iBifRef/MONITORS/MONITOR))">
- <xsl:variable name="monitorBif_" select="$iBifRef/MONITORS/MONITOR"/>
- <xsl:variable name="p2pMonConn_" select="concat($monitorBif_/@INSTANCE,'.',$monitorBif_/@BUSINTERFACE)"/>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWTYPE">DROPDOWN</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$p2pMonConn_"/></xsl:attribute>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:when>
-
- <xsl:when test="($iBifRef/@TYPE = 'SLAVE')">
- <xsl:element name="VARIABLE">
- <xsl:choose>
- <xsl:when test="(($iBifRef/@BUSSTD = 'AXI') and ($G_HAVE_XB_BUSSES ='TRUE'))">
- <xsl:attribute name="VIEWTYPE">BUTTON</xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VIEWTYPE">DROPDOWN</xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:choose>
- <xsl:when test="$iBifRef/MASTERS/MASTER">
- <xsl:variable name="mastersList_"><xsl:for-each select="$iBifRef/MASTERS/MASTER"><xsl:if test="position() > 1"> & </xsl:if><xsl:value-of select="concat(@INSTANCE,'.',@BUSINTERFACE)"/></xsl:for-each></xsl:variable>
- <xsl:variable name="mastersConn_" select="concat($iBifRef/@BUSNAME,':',$mastersList_)"/>
- <xsl:attribute name="VALUE"><xsl:value-of select="$mastersConn_"/></xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUSNAME"/></xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWTYPE">DROPDOWN</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUSNAME"/></xsl:attribute>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:element>
-</xsl:template>
-
-
-<xsl:template name="WRITE_VIEW_BIF_FLAT">
-
- <xsl:for-each select="$G_SYS_MODS/MODULE">
-
- <xsl:sort data-type="number" select="@ROW_INDEX" order="ascending"/>
- <xsl:variable name="moduleRef_" select="self::node()"/>
- <xsl:variable name="busifsRef_">
- <xsl:choose>
- <xsl:when test="self::node()/BUSINTERFACES"><xsl:text>$moduleRef_/BUSINTERFACES</xsl:text></xsl:when>
- <xsl:otherwise><xsl:text>$moduleRef_</xsl:text></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <xsl:for-each select="dyn:evaluate($busifsRef_)/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:sort data-type="number" select="@MPD_INDEX" order="ascending"/>
- <xsl:call-template name="WRITE_VIEW_BIF_FLAT_SET">
- <xsl:with-param name="iModRef" select="$moduleRef_"/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- </xsl:call-template>
- </xsl:for-each> <!-- End of Bus Interface Loop -->
- </xsl:for-each> <!-- End of Module loop -->
-</xsl:template>
-
-<xsl:template name="WRITE_VIEW_BIF_FLAT_SET">
-
- <xsl:param name="iModRef" select="'__NONE__'"/>
- <xsl:param name="iBifRef" select="'__NONE__'"/>
- <xsl:param name="iBifCol" select="'__NONE__'"/>
-
- <xsl:element name="SET">
- <xsl:if test="not($iBifCol = '__NONE__')">
- <xsl:attribute name="RGB_FG"><xsl:value-of select="$iBifCol"/></xsl:attribute>
- </xsl:if>
- <!--
- <xsl:attribute name="ID"><xsl:value-of select="$iModRef/@INSTANCE"/>.<xsl:value-of select="$iBifRef/@NAME"/></xsl:attribute>
- -->
- <xsl:attribute name="ID"><xsl:value-of select="$iBifRef/@NAME"/></xsl:attribute>
- <xsl:attribute name="CLASS">BUSINTERFACE</xsl:attribute>
-
- <xsl:if test="($iBifRef/@TYPE = 'MONITOR')">
- <xsl:choose>
- <xsl:when test="($iBifRef/@IS_P2P)">
- <xsl:attribute name="IS_P2P_MONITOR">TRUE</xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="IS_SHARED_MONITOR">TRUE</xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:if>
-
- <!-- CR452579 Can only modify INSTANCE name in Hierarchal view. -->
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$iModRef/@INSTANCE}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Bus Interface" NAME="NAME" VALUE="{$iBifRef/@NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{$iModRef/@MODTYPE}" VIEWICON="{$iModRef/LICENSEINFO/@ICON_NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{$iModRef/@HWVERSION}"/>
-
- <xsl:variable name="ipClassification_">
- <xsl:call-template name="F_ModClass_To_IpClassification">
- <xsl:with-param name="iModClass" select="$iModRef/@MODCLASS"/>
- <xsl:with-param name="iBusStd" select="$iBifRef/@BUSSTD"/>
- </xsl:call-template>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Classification" NAME="IPCLASS" VALUE="{$ipClassification_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Type" NAME="TYPE" VALUE="{$iBifRef/@TYPE}"/>
-
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Standard</xsl:attribute>
- <xsl:attribute name="NAME">BUSSTD</xsl:attribute>
- <xsl:choose>
- <xsl:when test="($iBifRef/@BUS_STD)">
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUS_STD"/></xsl:attribute>
- </xsl:when>
- <xsl:when test="($iBifRef/@BUSSTD)">
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUSSTD"/></xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VALUE">USER</xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:element>
-
- <xsl:choose>
- <xsl:when test="$iBifRef/@TYPE = 'INITIATOR'">
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWTYPE">TEXTBOX</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:choose>
- <xsl:when test="(($iBifRef/@BUSNAME = '__NOC__') or ($iBifRef/@BUSNAME = '') or not($iBifRef/@BUSNAME))">
- <xsl:variable name="def_noc_name_"><xsl:value-of select="$iModRef/@INSTANCE"/>_<xsl:value-of select="$iBifRef/@NAME"/></xsl:variable>
- <xsl:attribute name="VALUE"><xsl:value-of select="$def_noc_name_"/></xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUSNAME"/></xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:when>
- <xsl:otherwise>
- <xsl:choose>
-
- <xsl:when test="(($iBifRef/@BUSNAME = '__NOC__') or ($iBifRef/@BUSNAME = '') or not($iBifRef/@BUSNAME))">
- <xsl:element name="VARIABLE">
- <xsl:choose>
- <xsl:when test="(($iBifRef/@BUSSTD = 'AXI') and ($iBifRef/@TYPE = 'SLAVE') and ($G_HAVE_XB_BUSSES = 'TRUE'))">
- <xsl:attribute name="VIEWTYPE">BUTTON</xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VIEWTYPE">DROPDOWN</xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VALUE">No Connection</xsl:attribute>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:choose>
- <xsl:when test="(($iBifRef/@TYPE = 'MONITOR') and ($iBifRef/MONITORS/MONITOR))">
- <xsl:variable name="monitorBif_" select="$iBifRef/MONITORS/MONITOR"/>
- <xsl:variable name="p2pMonConn_" select="concat($monitorBif_/@INSTANCE,'.',$monitorBif_/@BUSINTERFACE)"/>
- <!--
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Bus Name" NAME="BUSNAME" VALUE="{$p2pMonConn_}"/>
- -->
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWTYPE">DROPDOWN</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$p2pMonConn_"/></xsl:attribute>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:when>
-
- <xsl:when test="($iBifRef/@TYPE = 'SLAVE')">
- <xsl:element name="VARIABLE">
- <xsl:choose>
- <xsl:when test="$iBifRef/@BUSSTD = 'AXI' and $G_HAVE_XB_BUSSES ='TRUE'">
- <xsl:attribute name="VIEWTYPE">BUTTON</xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VIEWTYPE">DROPDOWN</xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:choose>
- <xsl:when test="$iBifRef/MASTERS/MASTER">
- <xsl:variable name="mastersList_"><xsl:for-each select="$iBifRef/MASTERS/MASTER"><xsl:if test="position() > 1"> & </xsl:if><xsl:value-of select="concat(@INSTANCE,'.',@BUSINTERFACE)"/></xsl:for-each></xsl:variable>
- <xsl:variable name="mastersConn_" select="concat($iBifRef/@BUSNAME,':',$mastersList_)"/>
- <xsl:attribute name="VALUE"><xsl:value-of select="$mastersConn_"/></xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUSNAME"/></xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:when>
- <xsl:otherwise>
- <!--
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Bus Name" NAME="BUSNAME" VALUE="{$iBifRef/@BUSNAME}"/>
- -->
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWTYPE">DROPDOWN</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$iBifRef/@BUSNAME"/></xsl:attribute>
- <xsl:if test="$G_ADD_CHOICES = 'TRUE'">
- <xsl:call-template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
- <xsl:with-param name="iModRef" select="$iModRef"/>
- <xsl:with-param name="iBifRef" select="$iBifRef"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:element>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:element>
-</xsl:template>
-
-<xsl:template name="WRITE_VIEW_BIF_BUSNAME_CHOICES">
-
- <xsl:param name="iModRef" select="None"/>
- <xsl:param name="iBifRef" select="None"/>
-
- <xsl:variable name="b_bus_" select="$iBifRef/@BUSNAME"/>
- <xsl:variable name="b_name_" select="$iBifRef/@NAME"/>
- <xsl:variable name="b_type_" select="$iBifRef/@TYPE"/>
- <xsl:variable name="b_bstd_" select="$iBifRef/@BUSSTD"/>
- <xsl:variable name="b_bstd_psf_" select="$iBifRef/@BUSSTD_PSF"/>
- <xsl:variable name="b_protocol_" select="$iBifRef/@PROTOCOL"/>
-
- <xsl:element name="CHOICES">
- <xsl:choose>
- <xsl:when test="($b_type_ = 'INITIATOR')">
- <xsl:variable name="initiator_busName_">
- <xsl:choose>
- <xsl:when test="($b_bus_ = '__NOC__')"><xsl:value-of select="concat($iModRef/@INSTANCE,'_',$b_name_)"/></xsl:when>
- <xsl:otherwise><xsl:value-of select="$b_bus_"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <CHOICE NAME="{$initiator_busName_}"/>
- </xsl:when>
-
- <xsl:when test="(($b_type_ = 'MASTER') or ($b_type_ = 'SLAVE') or ($b_type_ = 'MASTER_SLAVE'))">
- <CHOICE NAME="No Connection"/>
- <xsl:for-each select="$G_SYS_MODS"> <!-- To set correct scope for KEY functions below -->
- <xsl:if test="not(($b_bstd_ = 'AXI') and ($b_type_ = 'SLAVE'))">
- <CHOICE NAME="New Connection"/>
- </xsl:if>
- <xsl:for-each select="key('G_MAP_BUSSES',$b_bstd_)">
- <xsl:variable name="busName_" select="@INSTANCE"/>
- <xsl:choose>
- <!-- CR#590473 This was setting wrong choices filled up-->
- <!--xsl:when test="(($b_type_ = 'SLAVE') and (@IS_CROSSBAR) and $iBifRef/@PROTOCOL)">
- <xsl:for-each select="key('G_MAP_MST_BIFS',$busName_)[(@PROTOCOL = $b_protocol_)]">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="insName_" select="../../@INSTANCE"/>
- <xsl:variable name="xb_slave_busName_" select="concat($busName_,':',$insName_,'.',$bifName_)"/>
- <CHOICE NAME="{$xb_slave_busName_}"/>
- </xsl:for-each>
- </xsl:when-->
- <xsl:when test="($b_type_ = 'SLAVE') and (@IS_CROSSBAR)">
- <xsl:for-each select="key('G_MAP_MST_BIFS',$busName_)">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="insName_" select="../../@INSTANCE"/>
- <xsl:variable name="xb_slave_busName_" select="concat($busName_,':',$insName_,'.',$bifName_)"/>
- <CHOICE NAME="{$xb_slave_busName_}"/>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <CHOICE NAME="{$busName_}"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:when>
-
- <xsl:when test="($b_type_ = 'TARGET')">
- <CHOICE NAME="No Connection"/>
- <xsl:for-each select="$G_SYS_MODS"> <!-- To set correct scope for KEY functions below -->
- <xsl:variable name="use_bstd_">
- <xsl:choose>
- <xsl:when test="(($b_bstd_ = 'AXIS') or ($b_bstd_ = 'XIL'))">
- <xsl:value-of select="$b_bstd_psf_"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$b_bstd_"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <xsl:choose>
- <xsl:when test="$iBifRef/@PROTOCOL">
- <xsl:for-each select="key('G_MAP_P2P_BIFS',$use_bstd_)[(@TYPE = 'INITIATOR') and (@PROTOCOL = $b_protocol_)]">
- <xsl:variable name="busName_" select="@BUSNAME"/>
- <xsl:choose>
- <xsl:when test="($busName_ = '__NOC__')">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="insName_" select="../../@INSTANCE"/>
- <xsl:variable name="initiator_busName_" select="concat($insName_,'_',$bifName_)"/>
- <CHOICE NAME="{$initiator_busName_}"/>
- </xsl:when>
- <xsl:otherwise>
- <CHOICE NAME="{$busName_}"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <xsl:for-each select="key('G_MAP_P2P_BIFS',$use_bstd_)[(@TYPE = 'INITIATOR')]">
- <xsl:variable name="busName_" select="@BUSNAME"/>
- <xsl:choose>
- <xsl:when test="($busName_ = '__NOC__')">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="insName_" select="../../@INSTANCE"/>
- <xsl:variable name="initiator_busName_" select="concat($insName_,'_',$bifName_)"/>
- <CHOICE NAME="{$initiator_busName_}"/>
- </xsl:when>
- <xsl:otherwise>
- <CHOICE NAME="{$busName_}"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:when>
-
- <xsl:when test="($b_type_ = 'MONITOR')">
- <CHOICE NAME="No Connection"/>
- <xsl:for-each select="$G_SYS_MODS"> <!-- To set correct scope for KEY functions below -->
- <xsl:choose>
- <xsl:when test="($iBifRef/@IS_P2P = 'TRUE')">
- <xsl:for-each select="$G_SYS_MODS"> <!-- To set correct scope for KEY functions below -->
- <xsl:variable name="use_bstd_">
- <xsl:choose>
- <xsl:when test="(($b_bstd_ = 'AXIS') or ($b_bstd_ = 'XIL'))">
- <xsl:value-of select="$b_bstd_psf_"/>
- </xsl:when>
- <xsl:otherwise>
- <xsl:value-of select="$b_bstd_"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <!-- <xsl:message>monitor p2p <xsl:value-of select="count(key('G_MAP_P2P_BIFS',$use_bstd_)[(@TYPE = 'INITIATOR')])"/> </xsl:message> -->
- <xsl:for-each select="key('G_MAP_P2P_BIFS',$use_bstd_)[(@TYPE = 'INITIATOR')]">
- <xsl:variable name="busName_" select="@BUSNAME"/>
- <xsl:choose>
- <xsl:when test="($busName_ = '__NOC__')">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="insName_" select="../../@INSTANCE"/>
- <xsl:variable name="initiator_busName_" select="concat($insName_,'_',$bifName_)"/>
- <CHOICE NAME="{$initiator_busName_}"/>
- </xsl:when>
- <xsl:otherwise>
- <CHOICE NAME="{$busName_}"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <xsl:for-each select="key('G_MAP_BUSSES',$b_bstd_)">
- <xsl:variable name="busName_" select="@INSTANCE"/>
- <xsl:choose>
- <xsl:when test="(@IS_CROSSBAR or ($b_bstd_ = 'AXI'))">
- <xsl:for-each select="key('G_MAP_MOS_BIFS',$busName_)">
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="insName_" select="../../@INSTANCE"/>
- <!--
- <xsl:variable name="xb_moni_busName_" select="concat($busName_,':',$insName_,'.',$bifName_)"/>
- -->
- <xsl:variable name="xb_moni_busName_" select="concat($insName_,'.',$bifName_)"/>
- <CHOICE NAME="{$xb_moni_busName_}"/>
- </xsl:for-each>
- </xsl:when>
- <xsl:otherwise>
- <CHOICE NAME="{$busName_}"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:otherwise>
-
- </xsl:choose>
- </xsl:for-each>
- </xsl:when>
- </xsl:choose>
- </xsl:element>
-
-</xsl:template>
-
-
-
-</xsl:stylesheet>
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_groups.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_groups.xsl
deleted file mode 100644
index e302f3a234..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_groups.xsl
+++ /dev/null
@@ -1,1447 +0,0 @@
-<!DOCTYPE stylesheet [
- <!ENTITY ALPUPRS "ABCDEFGHIJKLMNOPQRSTUVWXYZ">
- <!ENTITY ALPLWRS "abcdefghijklmnopqrstuvwxyz">
- <!ENTITY UPR2LWS " '&ALPUPRS;' , '&ALPLWRS;' ">
-
- <!ENTITY HEXUPPER "ABCDEFxx0123456789">
- <!ENTITY HEXLOWER "abcdefxX0123456789">
- <!ENTITY HEXU2L " '&HEXLOWER;' , '&HEXUPPER;' ">
-
- <!ENTITY DIV2SLSH " 'div' , '/' ">
-
- <!ENTITY NOT_ELM_CONN "not(name() = 'PARAMETER') and not(name() = 'PORT') and not(name() = 'BUSINTERFACE')">
- <!ENTITY NOT_BEF_CONN "not(name() = 'DOCUMENT') and not(name() = 'DOCUMENTATION') and not(name() = 'DESCRIPTION') and not(name() = 'LICENSEINFO')">
- <!ENTITY NOT_AFT_CONN "not(name() = 'MEMORYMP') and not(name() = 'PERIPHERALS') and not(name() = 'INTERRUPTINFO')">
-]>
-
-<!-- ==============================================================
- This XSL file converts BLOCK xml to SAV XTeller
- ============================================================== -->
-<xsl:stylesheet
- version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math exsl dyn xlink">
-
-<xsl:output method="xml"
- version="1.0"
- indent="yes"
- encoding="UTF-8"/>
-<!--
- ===================================================
- THE MAIN TEMPLATE FOR PORT VIEW SELECTED FOCUS
- ===================================================
--->
-<xsl:template name="WRITE_VIEW_PORT_FOCUSED">
- <xsl:choose>
- <xsl:when test="$G_ROOT/SAV/@MODE = 'TREE'">
- <xsl:call-template name="WRITE_VIEW_EXTP_TREE_SET"/>
- </xsl:when>
- <xsl:when test="$G_ROOT/SAV/@MODE = 'FLAT'">
- <xsl:call-template name="WRITE_VIEW_EXTP_FLAT_SET"/>
- </xsl:when>
- </xsl:choose>
- <xsl:apply-templates select="$G_SYS_MODS/MODULE" mode="_port_view_focusing_on_selected"/>
-</xsl:template>
-
-
-<!--
- ====================================================
- THE MAIN TEMPLATE FOR BIF VIEW BUS FOCUS
- ====================================================
--->
-<xsl:template name="WRITE_VIEW_BIF_FOCUS_ON_BUSES">
-
-<xsl:if test="$G_DEBUG = 'TRUE'"><xsl:message>Focusing on busses</xsl:message></xsl:if>
-<!--
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_CONNECTED_MODULES">
- <xsl:with-param name="iModules" select="$G_GROUPS"/>
- </xsl:call-template>
- -->
- <xsl:apply-templates select="$G_SYS_MODS/MODULE" mode="_bif_view_focusing_on_buses"/>
- <xsl:if test="$G_ROOT/SAV/@MODE = 'TREE'"> <!-- The separator -->
- <xsl:element name="SET">
-
- <xsl:attribute name="ID">MODULES WITH POTENTIAL CONNECTIONS TO FOCUSED BUS</xsl:attribute>
- <xsl:attribute name="CLASS">SEPARATOR</xsl:attribute>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Name</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">Name</xsl:attribute>
- <xsl:attribute name="VALUE">POTENTIAL MODULES BELOW HERE</xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Type</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">MODTYPE</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Version</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">HWVERSION</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Classification</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">IPCLASS</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="VIEWTYPE"></xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Type</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">TYPE</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Bus Standard</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">BUSSTD</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- </xsl:element>
- </xsl:if>
-</xsl:template>
-
-<!--
- ====================================================
- THE MAIN TEMPLATE FOR BIF VIEW PROCESSOR FOCUS
- ====================================================
--->
-<xsl:template name="WRITE_VIEW_BIF_FOCUS_ON_PROCS">
-
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_CONNECTED_MODULES">
- <xsl:with-param name="iModules" select="$G_GROUPS"/>
- </xsl:call-template>
-
- <xsl:if test="$G_ROOT/SAV/@MODE = 'TREE'"> <!-- The separator -->
- <xsl:element name="SET">
-
- <xsl:attribute name="ID">MODULES WITH POTENTIAL CONNECTIONS TO THIS SUBSYSTEM</xsl:attribute>
- <xsl:attribute name="CLASS">SEPARATOR</xsl:attribute>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Name</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">Name</xsl:attribute>
- <xsl:attribute name="VALUE">POTENTIAL MODULES BELOW HERE</xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Type</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">MODTYPE</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Version</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">HWVERSION</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Classification</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">IPCLASS</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="VIEWTYPE"></xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Type</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">TYPE</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Bus Standard</xsl:attribute>
-
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">BUSSTD</xsl:attribute>
- <xsl:attribute name="VALUE"></xsl:attribute>
- </xsl:element>
- </xsl:element>
- </xsl:if>
-</xsl:template>
-
-<!--
- ===============================================
- COPY TRANSFORMS FOR FOCUSING IN BIF VIEW
- ===============================================
--->
-
-<!-- Root copy template for connected -->
-<xsl:template match="node() | @*" mode="_bif_view_focusing_on_connected">
- <xsl:copy>
- <xsl:apply-templates select="@* | node()" mode="_bif_view_focusing_on_connected"/>
- </xsl:copy>
-</xsl:template>
-
-<!-- Root copy template for potentials -->
-<xsl:template match="node() | @*" mode="_bif_view_focusing_on_potentials">
- <xsl:copy>
- <xsl:apply-templates select="@* | node()" mode="_bif_view_focusing_on_potentials"/>
- </xsl:copy>
-</xsl:template>
-
-
-<xsl:template name="WRITE_VIEW_BIF_FOCUSED_CONNECTED_MODULES"> <!-- Recursive !! -->
- <xsl:param name="iModules"/>
-
- <xsl:for-each select="$iModules/BLOCK[@ID and not(BLOCK) and not(@C)]">
- <xsl:variable name="m_id_" select="@ID"/>
- <xsl:if test="(count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $m_id_]) > 0)">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING BUS <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:variable name="m_module_" select="$G_SYS_MODS/MODULE[@INSTANCE = $m_id_]"/>
- <xsl:apply-templates select="$m_module_" mode="_bif_view_focusing_on_connected"/>
- </xsl:if>
- </xsl:for-each>
-
- <xsl:for-each select="$iModules/BLOCK[@ID and BLOCK]">
- <xsl:choose>
-
- <!-- An actual module that needs to be written -->
- <xsl:when test="not(starts-with(@ID,'__')) and BLOCK[@C] and (not(BLOCK/BLOCK) or BLOCK/BLOCK[@CP])">
-
- <xsl:variable name="m_id_" select="@ID"/>
- <xsl:variable name="m_module_" select="$G_SYS_MODS/MODULE[@INSTANCE = $m_id_]"/>
- <xsl:apply-templates select="$m_module_" mode="_bif_view_focusing_on_connected"/>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_PROCESSOR__.') or starts-with(@ID,'__GROUP_MASTER__.')">
-
- <!--
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>MASTER GROUP <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- -->
-
- <xsl:variable name="master_id_">
- <xsl:choose>
- <xsl:when test="starts-with(@ID,'__GROUP_MASTER__.')"><xsl:value-of select="substring-after(@ID,'__GROUP_MASTER__.')"/> </xsl:when>
- <xsl:when test="starts-with(@ID,'__GROUP_PROCESSOR__.')"><xsl:value-of select="substring-after(@ID,'__GROUP_PROCESSOR__.')"/> </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="num_focused_on_" select="count($G_ROOT/SAV/MASTER[(@INSTANCE = $master_id_)])"/>
-
- <xsl:choose>
- <xsl:when test="$num_focused_on_ > 0">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>CONNECTED MASTER GROUP <xsl:value-of select="$master_id_"/></xsl:message></xsl:if>
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_CONNECTED_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>POTENTIAL MASTER GROUP <xsl:value-of select="$master_id_"/></xsl:message></xsl:if>
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_POTENTIAL_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_SHARED__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>SHARED GROUP <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:variable name="p_id_" select="substring-after(@ID,'__GROUP_SHARED__')"/>
-
- <xsl:variable name="num_focused_on_" select="count($G_ROOT/SAV/MASTER[contains($p_id_,@INSTANCE)])"/>
-
- <xsl:choose>
- <xsl:when test="$num_focused_on_ > 0">
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_CONNECTED_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_POTENTIAL_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_MEMORY__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> MEMORY GROUP <xsl:value-of select="@ID"/></xsl:message></xsl:if>
-
- <xsl:variable name="m_id_" select="substring-after(@ID,'__GROUP_MEMORY__')"/>
-
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_CONNECTED_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_PERIPHERAL__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PERIPHERAL GROUP <xsl:value-of select="@ID"/></xsl:message></xsl:if>
-
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_CONNECTED_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_SLAVES__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>SLAVE GROUP <xsl:value-of select="@ID"/></xsl:message></xsl:if>
-
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_CONNECTED_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="(starts-with(@ID,'__GROUP_IP__') and not($G_ROOT/SAV/@VIEW = 'BUSINTERFACE'))">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>IP GROUP<xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_CONNECTED_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_FLOATING__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>FLOATING GROUP <xsl:value-of select="@ID"/></xsl:message></xsl:if>
-
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_POTENTIAL_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:otherwise>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> IGNORING <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
-</xsl:template>
-
-
-
-<!--
- ===============================================
- TRANSFORMS FOR FOCUSED POTENTIAL MODULES
- ===============================================
--->
-<xsl:template name="WRITE_VIEW_BIF_FOCUSED_POTENTIAL_MODULES"> <!-- Recursive !! -->
- <xsl:param name="iModules"/>
-
- <!-- BUS -->
- <xsl:for-each select="$iModules/BLOCK[@ID and not(BLOCK) and not(@C)]">
- <xsl:variable name="m_id_" select="@ID"/>
- <xsl:if test="(count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $m_id_]) > 0)">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING BUS <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:variable name="m_module_" select="$G_SYS_MODS/MODULE[@INSTANCE = $m_id_]"/>
- <xsl:apply-templates select="$m_module_" mode="_bif_view_focusing_on_connected"/>
- </xsl:if>
- </xsl:for-each>
-
- <!-- GROUP -->
- <xsl:for-each select="$iModules/BLOCK[@ID and BLOCK]">
- <xsl:choose>
- <xsl:when test="not(starts-with(@ID,'__')) and BLOCK[@C] and (not(BLOCK/BLOCK) or BLOCK/BLOCK[@CP])">
-
- <xsl:variable name="m_id_" select="@ID"/>
- <xsl:variable name="m_module_" select="$G_SYS_MODS/MODULE[@INSTANCE = $m_id_]"/>
- <xsl:variable name="m_class_" select="$m_module_/@MODCLASS"/>
- <xsl:choose>
- <xsl:when test ="not($m_class_ = 'PROCESSOR')">
- <xsl:variable name="potential_bifs_">
- <xsl:for-each select="$m_module_/BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:variable name="b_std_" select="@BUSSTD"/>
- <xsl:variable name="b_bus_" select="@BUSNAME"/>
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><CONNECTED/></xsl:if>
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@BUSSTD = $b_std_]) > 0"><POTENTIAL/></xsl:if>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:variable name="num_potential_" select="count(exsl:node-set($potential_bifs_)/POTENTIAL)"/>
- <xsl:variable name="num_connected_" select="count(exsl:node-set($potential_bifs_)/CONNECTED)"/>
-
- <xsl:if test=" ($num_potential_ > 0)">
- <xsl:apply-templates select="$m_module_" mode="_bif_view_focusing_on_potentials"/>
- </xsl:if>
- </xsl:when>
- <xsl:when test="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[(@NAME = $m_id_)]) > 0">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> PERI PROCESSOR <xsl:value-of select="$m_id_"/></xsl:message></xsl:if>
- <xsl:apply-templates select="$m_module_" mode="_bif_view_focusing_on_potentials"/>
- </xsl:when>
- </xsl:choose>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_MEMORY__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING MEMORY <xsl:value-of select="@ID"/></xsl:message></xsl:if>
-
- <xsl:variable name="m_id_" select="substring-after(@ID,'__GROUP_MEMORY__')"/>
-
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_POTENTIAL_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_PERIPHERAL__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING POTENTIAL GROUP OF PERIPHERALS <xsl:value-of select="@ID"/></xsl:message></xsl:if>
-
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_POTENTIAL_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_SLAVES__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING POTENTIAL GROUP OF SLAVES <xsl:value-of select="@ID"/></xsl:message></xsl:if>
-
- <xsl:call-template name="WRITE_VIEW_BIF_FOCUSED_POTENTIAL_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
- <xsl:otherwise>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> IGNORING <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
-</xsl:template>
-
-<!--
- +++++++++++++++++++++++++++++++++++++++++++++++++++++
- MODULE TEMPLATES
- +++++++++++++++++++++++++++++++++++++++++++++++++++++
--->
-
-<!--
- ===================================================
- THE MODULE TEMPLATE FOR PORT VIEW SELECTED FOCUS
- ===================================================
--->
-
-<xsl:template match="MODULE" mode="_port_view_focusing_on_selected">
- <xsl:variable name="m_inst_" select="@INSTANCE"/>
-
- <xsl:if test="count($G_ROOT/SAV/SELECTED[(@INSTANCE = $m_inst_)]) > 0">
- <xsl:choose>
- <xsl:when test="$G_ROOT/SAV/@MODE = 'TREE'">
- <xsl:call-template name="WRITE_VIEW_PORT_TREE_SET">
- <xsl:with-param name="iModRef" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="$G_ROOT/SAV/@MODE = 'FLAT'">
- <xsl:call-template name="WRITE_VIEW_PORT_FLAT_SET">
- <xsl:with-param name="iModRef" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
- </xsl:choose>
- </xsl:if>
-</xsl:template>
-
-<!--
- ===================================================
- THE MODULE TEMPLATE FOR BIF VIEW BUS FOCUS
- ===================================================
--->
-<xsl:template match="MODULE" mode="_bif_view_focusing_on_buses">
-
- <xsl:variable name="m_instance_" select="@INSTANCE"/>
- <xsl:variable name="m_modclass_" select="@MODCLASS"/>
-
- <xsl:variable name="is_focused_bus_" select="count($G_ROOT/SAV/BUS[(@INSTANCE = $m_instance_)])"/>
-
- <xsl:variable name="bif_scope_">
- <xsl:if test="$is_focused_bus_ = 0"> <!-- No need to waste time if we know its one of the focused bus -->
- <xsl:for-each select="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:variable name="b_bus_" select="@BUSNAME"/>
- <xsl:variable name="b_bstd_" select="@BUSSTD"/>
- <xsl:variable name="b_on_focused_bus_" select="count($G_ROOT/SAV/BUS[(@INSTANCE = $b_bus_)])"/>
- <xsl:variable name="b_of_focused_bstd_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@BUSSTD = $b_bstd_])"/>
- <xsl:if test="$b_on_focused_bus_ > 0"><CONNECTED/></xsl:if>
- <xsl:if test="$b_of_focused_bstd_ > 0"><POTENTIAL/></xsl:if>
- </xsl:for-each>
- </xsl:if>
- </xsl:variable>
-
- <xsl:variable name="on_focused_bus_" select="count(exsl:node-set($bif_scope_)/CONNECTED)"/>
- <xsl:variable name="of_focused_bstd_" select="count(exsl:node-set($bif_scope_)/POTENTIAL)"/>
-
- <xsl:if test="(($is_focused_bus_ + $on_focused_bus_ + $of_focused_bstd_) > 0)">
-
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING MODULE ON BUS <xsl:value-of select="@INSTANCE"/></xsl:message></xsl:if>
-
- <xsl:choose>
- <!-- TREE VIEW -->
- <xsl:when test="$G_ROOT/SAV/@MODE = 'TREE'">
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="@INSTANCE"/></xsl:attribute>
- <xsl:attribute name="CLASS">MODULE</xsl:attribute>
-
- <xsl:if test="($is_focused_bus_ > 0)">
- <xsl:attribute name="RGB_BG"><xsl:value-of select="$COL_FOCUSED_MASTER"/></xsl:attribute>
- </xsl:if>
-
- <xsl:choose>
-
- <xsl:when test="(($is_focused_bus_ + $on_focused_bus_) > 0)">
- <xsl:attribute name="CONNECTED_INDEX"><xsl:value-of select="@MHS_INDEX"/></xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="POTENTIAL_INDEX"><xsl:value-of select="@MHS_INDEX"/></xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
-
-
-
- <!-- CR452579 Can only modify INSTANCE name in Hierarchal view. -->
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Name" NAME="INSTANCE" VALUE="{@INSTANCE}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{@MODTYPE}" VIEWICON="{LICENSEINFO/@ICON_NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{@HWVERSION}"/>
-
- <xsl:variable name="ipClassification_">
- <xsl:call-template name="F_ModClass_To_IpClassification">
- <xsl:with-param name="iModClass" select="@MODCLASS"/>
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Classification" NAME="IPCLASS" VALUE="{$ipClassification_}"/>
-
- <xsl:for-each select="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:variable name="b_bus_" select="@BUSNAME"/>
- <xsl:variable name="b_bstd_" select="@BUSSTD"/>
- <xsl:variable name="b_on_focused_bus_" select="count($G_ROOT/SAV/BUS[(@INSTANCE = $b_bus_)])"/>
- <xsl:variable name="b_of_focused_bstd_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@BUSSTD = $b_bstd_])"/>
- <xsl:variable name="bif_col_">
- <xsl:choose>
- <xsl:when test="(not($b_bus_ ='__NOC__') and ($b_on_focused_bus_ = 0) and ($b_of_focused_bstd_ > 0))"><xsl:value-of select="$COL_BG_OUTOF_FOCUS_CONNECTIONS"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <xsl:if test="(($b_on_focused_bus_ + $b_of_focused_bstd_) > 0)">
- <xsl:if test="$G_ROOT/SAV/@MODE = 'TREE'">
- <xsl:call-template name="WRITE_VIEW_BIF_TREE_SET">
- <xsl:with-param name="iModRef" select="../.."/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- <xsl:with-param name="iBifCol" select="$bif_col_"/>
- </xsl:call-template>
- </xsl:if>
- <xsl:if test="$G_ROOT/SAV/@MODE = 'FLAT'">
- <xsl:call-template name="WRITE_VIEW_BIF_FLAT_SET">
- <xsl:with-param name="iModRef" select="../.."/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- <xsl:with-param name="iBifCol" select="$bif_col_"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:if>
- </xsl:for-each>
- </xsl:element>
- </xsl:when>
-
- <!-- FLAT VIEW -->
- <xsl:otherwise>
- <xsl:for-each select="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:variable name="b_bus_" select="@BUSNAME"/>
- <xsl:variable name="b_on_focused_bus_" select="count($G_ROOT/SAV/BUS[(@INSTANCE = $b_bus_)])"/>
- <xsl:if test="($b_on_focused_bus_ > 0)">
- <xsl:if test="$G_ROOT/SAV/@MODE = 'TREE'">
- <xsl:call-template name="WRITE_VIEW_BIF_TREE_SET">
- <xsl:with-param name="iModRef" select="../.."/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- </xsl:call-template>
- </xsl:if>
- <xsl:if test="$G_ROOT/SAV/@MODE = 'FLAT'">
- <xsl:call-template name="WRITE_VIEW_BIF_FLAT_SET">
- <xsl:with-param name="iModRef" select="../.."/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:if>
- </xsl:for-each>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:if>
-
-</xsl:template>
-
-<!--
- ===================================================
- THE MODULE TEMPLATE FOR CONNECTED MODULES
- IN BIF VIEW PROC FOCUS
- ===================================================
--->
-
-<xsl:template match="MODULE" mode="_bif_view_focusing_on_connected">
-
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>EXAMINING CONNECTED MODULE <xsl:value-of select="@INSTANCE"/></xsl:message></xsl:if>
-
- <xsl:variable name="m_instance_" select="@INSTANCE"/>
- <xsl:variable name="m_class_" select="@MODCLASS"/>
-
- <xsl:variable name="bif_scope_">
- <xsl:for-each select="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:variable name="b_std_" select="@BUSSTD"/>
- <xsl:variable name="b_bus_" select="@BUSNAME"/>
- <xsl:variable name="b_name_" select="@NAME"/>
-
- <xsl:choose>
- <xsl:when test="($b_bus_ = '__NOC__')"><POTENTIAL/></xsl:when>
-
- <xsl:when test="((@TYPE = 'TARGET') or (@TYPE = 'INITIATOR')) and (count(key('G_MAP_P2P_BIFS',$b_bus_)[not(@BUSNAME = '__NOC__')]) > 0)">
-
- <xsl:variable name="p2p_scope_">
- <xsl:for-each select="$G_SYS_MODS">
- <xsl:for-each select="key('G_MAP_P2P_BIFS',$b_bus_)[not(@BUSNAME = '__NOC__')]">
- <xsl:variable name="b_instance_" select="../../@INSTANCE"/>
- <xsl:variable name="b_modclass_" select="../../@MODCLASS"/>
- <xsl:variable name="b_bifname_" select="@NAME"/>
- <xsl:if test="not(($b_bifname_ = $b_name_) and ($b_instance_ = $m_instance_))">
- <xsl:variable name="num_mast_connections_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_])"/>
- <xsl:variable name="num_peri_connections_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[(@NAME = $b_instance_)])"/>
- <xsl:if test="(($num_mast_connections_ + $num_peri_connections_) > 0)"><INSCOPE/></xsl:if>
- <xsl:if test="(($num_mast_connections_ + $num_peri_connections_) = 0) and not($m_class_ = 'MEMORY') and not($m_class_ = 'MEMORY_CNTLR')"><UNFOCUSED/></xsl:if>
- </xsl:if>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:variable>
- <xsl:variable name="num_p2p_inscope_" select="count(exsl:node-set($p2p_scope_)/INSCOPE)"/>
- <xsl:variable name="num_p2p_unfocused_" select="count(exsl:node-set($p2p_scope_)/UNFOCUSED)"/>
- <xsl:if test="$num_p2p_inscope_ > 0"><CONNECTED/></xsl:if>
- <xsl:if test="$num_p2p_unfocused_ > 0"><UNFOCUSED/></xsl:if>
- </xsl:when>
-
- <!--
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> P2P <xsl:value-of select="$b_instance_"/> == <xsl:value-of select="$num_peri_connections_"/> UNFOCUSED</xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> P2P <xsl:value-of select="$m_instance_"/>.<xsl:value-of select="$b_name_"/> = <xsl:value-of select="$num_p2p_unfocused_"/> UNFOCUSED</xsl:message></xsl:if>
- -->
-
- <xsl:when test="((@TYPE = 'SLAVE') and not(MASTERS/MASTER)) or (@TYPE = 'MASTER')">
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><CONNECTED/></xsl:if>
- <xsl:if test="($b_bus_ = '__NOC__') and count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@BUSSTD = $b_std_]) > 0"><POTENTIAL/></xsl:if>
- </xsl:when>
-
- <xsl:when test="(MASTERS/MASTER)">
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><POTENTIAL/></xsl:if>
- <xsl:for-each select="MASTERS/MASTER">
- <xsl:variable name="m_inst_" select="@INSTANCE"/>
- <xsl:choose>
- <xsl:when test="count($G_ROOT/SAV/MASTER[(@INSTANCE = $m_inst_)]) > 0"><CONNECTED/></xsl:when>
- <xsl:when test="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[(@NAME = $m_inst_)]) > 0"><CONNECTED/></xsl:when>
- <xsl:otherwise><UNFOCUSED/></xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:when>
- </xsl:choose>
- </xsl:for-each>
-
- <xsl:if test="$m_class_ = 'BUS'">
- <xsl:variable name="num_bifs_on_bus_" select="count(key('G_MAP_ALL_BIFS_BY_BUS',$m_instance_))"/>
- <!-- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>BBBBBB <xsl:value-of select="$m_instance_"/> has <xsl:value-of select="$num_bifs_on_bus_"/> bifs </xsl:message></xsl:if> -->
- <xsl:for-each select="key('G_MAP_ALL_BIFS_BY_BUS',$m_instance_)">
- <xsl:variable name="b_name_" select="@NAME"/>
- <xsl:variable name="b_type_" select="@TYPE"/>
- <xsl:variable name="b_inst_" select="../../@INSTANCE"/>
- <xsl:variable name="b_icls_" select="../../@MODCLASS"/>
- <xsl:variable name="is_mast_in_focus_" select="count($G_ROOT/SAV/MASTER[(@INSTANCE = $b_inst_)])"/>
- <xsl:variable name="is_peri_in_focus_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[@NAME = $b_inst_])"/>
- <xsl:if test="(($is_peri_in_focus_ + $is_mast_in_focus_) = 0)"><UNFOCUSED/></xsl:if>
- </xsl:for-each>
- </xsl:if>
- </xsl:variable>
-
- <xsl:variable name="mod_id_" select="@INSTANCE"/>
- <xsl:variable name="potential_masts_id_" select="concat('__GROUP_MASTER__.',@INSTANCE)"/>
- <xsl:variable name="is_master_" select="count($G_GROUPS/BLOCK[(@ID = $potential_masts_id_)])"/>
- <xsl:variable name="is_focused_on_" select="count($G_ROOT/SAV/MASTER[(@INSTANCE = $mod_id_)])"/>
- <xsl:variable name="is_peripheral_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[@NAME = $mod_id_])"/>
- <xsl:variable name="num_potential_bifs_" select="count(exsl:node-set($bif_scope_)/POTENTIAL)"/>
- <xsl:variable name="num_connected_bifs_" select="count(exsl:node-set($bif_scope_)/CONNECTED)"/>
- <xsl:variable name="num_unfocused_bifs_" select="count(exsl:node-set($bif_scope_)/UNFOCUSED)"/>
-
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> CONNECTED BIFS <xsl:value-of select="$num_connected_bifs_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> POTENTIAL BIFS <xsl:value-of select="$num_potential_bifs_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> IS PERIPHERAL <xsl:value-of select="$is_peripheral_"/></xsl:message></xsl:if>
- <xsl:if test="((@MODCLASS = 'BUS') or ($num_connected_bifs_ + $is_focused_on_ + $num_potential_bifs_ + $is_peripheral_) > 0)">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> PLACING MODULE <xsl:value-of select="@INSTANCE"/></xsl:message></xsl:if>
-
- <xsl:choose>
- <xsl:when test="$G_ROOT/SAV/@MODE = 'TREE'">
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="@INSTANCE"/></xsl:attribute>
- <xsl:attribute name="CLASS">MODULE</xsl:attribute>
-
- <xsl:choose>
- <xsl:when test="((@MODCLASS = 'BUS') or (($num_connected_bifs_ + $is_peripheral_ + $is_focused_on_) > 0))">
- <xsl:attribute name="CONNECTED_INDEX"><xsl:value-of select="@MHS_INDEX"/></xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="POTENTIAL_INDEX"><xsl:value-of select="@MHS_INDEX"/></xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
-
-
- <xsl:choose>
- <xsl:when test="count($G_ROOT/SAV/MASTER[(@INSTANCE = $mod_id_)]) > 0">
- <xsl:attribute name="RGB_BG"><xsl:value-of select="$COL_FOCUSED_MASTER"/></xsl:attribute>
- </xsl:when>
- <xsl:when test="$num_unfocused_bifs_ > 0">
- <xsl:attribute name="RGB_FG"><xsl:value-of select="$COL_BG_OUTOF_FOCUS_CONNECTIONS"/></xsl:attribute>
- </xsl:when>
- </xsl:choose>
- <!--
- CR452579
- Can only modify INSTANCE name in Hierarchal view.
- -->
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Name" NAME="INSTANCE" VALUE="{@INSTANCE}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{@MODTYPE}" VIEWICON="{LICENSEINFO/@ICON_NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{@HWVERSION}"/>
-
- <xsl:variable name="ipClassification_">
- <xsl:call-template name="F_ModClass_To_IpClassification">
- <xsl:with-param name="iModClass" select="@MODCLASS"/>
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
- </xsl:variable>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Classification" NAME="IPCLASS" VALUE="{$ipClassification_}"/>
-
- <xsl:apply-templates select="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]" mode="_bif_view_focusing_on_connected"/>
- </xsl:element>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:apply-templates select="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]" mode="_bif_view_focusing_on_connected"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:if>
-</xsl:template>
-
-
-<!--
- ===================================================
- THE MODULE TEMPLATE FOR POTENTIAL MODULES
- IN BIF VIEW PROC FOCUS
- ===================================================
--->
-
-<xsl:template match="MODULE" mode="_bif_view_focusing_on_potentials">
-
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>EXAMINING POTENTIAL MODULE <xsl:value-of select="@INSTANCE"/></xsl:message></xsl:if>
-
- <xsl:variable name="m_instance_" select="@INSTANCE"/>
- <xsl:variable name="m_modclass_" select="@MODCLASS"/>
-
- <xsl:variable name="bif_scope_">
- <xsl:for-each select="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:variable name="b_std_" select="@BUSSTD"/>
- <xsl:variable name="b_bus_" select="@BUSNAME"/>
- <xsl:choose>
-
- <xsl:when test="($b_bus_ = '__NOC__')"><POTENTIAL/></xsl:when>
-
- <xsl:when test="((@TYPE = 'TARGET') or (@TYPE = 'INITIATOR')) and (count(key('G_MAP_P2P_BIFS',$b_bus_)[not(@BUSNAME = '__NOC__')]) > 0)">
- <xsl:variable name="p2p_scope_">
- <xsl:for-each select="$G_SYS_MODS"> <!-- To set the right scope for the keys -->
- <xsl:for-each select="key('G_MAP_P2P_BIFS',$b_bus_)[not(@BUSNAME = '__NOC__')]">
- <xsl:variable name="b_instance_" select="../../@INSTANCE"/>
- <xsl:variable name="b_modclass_" select="../../@MODCLASS"/>
- <xsl:variable name="num_mast_connections_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_])"/>
- <xsl:variable name="num_peri_connections_">
- <xsl:choose>
- <xsl:when test="((($m_modclass_ = 'PROCESSOR') and ($b_modclass_ = 'PROCESSOR')) or not($b_modclass_ = 'PROCESSOR'))">
- <xsl:value-of select="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[(@NAME = $b_instance_)])"/>
- </xsl:when>
- <xsl:otherwise>0</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="(($num_mast_connections_ + $num_peri_connections_) > 0)"><INSCOPE/></xsl:if>
- <xsl:if test="(($num_mast_connections_ + $num_peri_connections_) = 0) and not($m_modclass_ = 'MEMORY') and not($m_modclass_ = 'MEMORY_CNTLR')"><UNFOCUSED/></xsl:if>
- </xsl:for-each>
- </xsl:for-each>
- </xsl:variable>
- <xsl:variable name="num_p2p_inscope_" select="count(exsl:node-set($p2p_scope_)/INSCOPE)"/>
- <xsl:variable name="num_p2p_unfocused_" select="count(exsl:node-set($p2p_scope_)/UNFOCUSED)"/>
- <xsl:if test="$num_p2p_inscope_ > 0"><CONNECTED/></xsl:if>
- <xsl:if test="$num_p2p_unfocused_ > 0"><UNFOCUSED/></xsl:if>
- </xsl:when>
-
- <xsl:when test="(@TYPE = 'SLAVE') and not(MASTERS/MASTER)">
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><CONNECTED/></xsl:if>
- <xsl:if test="($b_bus_ = '__NOC__') and count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@BUSSTD = $b_std_]) > 0"><POTENTIAL/></xsl:if>
- </xsl:when>
-
- <xsl:when test="(MASTERS/MASTER)">
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><POTENTIAL/></xsl:if>
- <xsl:for-each select="MASTERS/MASTER">
- <xsl:variable name="m_inst_" select="@INSTANCE"/>
- <xsl:choose>
- <xsl:when test="count($G_ROOT/SAV/MASTER[(@INSTANCE = $m_inst_)]) > 0"><CONNECTED/></xsl:when>
- <xsl:when test="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[(@NAME = $m_inst_)]) > 0"><CONNECTED/></xsl:when>
- <xsl:otherwise><UNFOCUSED/></xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:when>
- </xsl:choose>
- </xsl:for-each>
-
- <xsl:if test="$m_modclass_ = 'BUS'">
- <xsl:variable name="num_bifs_on_bus_" select="count(key('G_MAP_ALL_BIFS_BY_BUS',$m_instance_))"/>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>BUS <xsl:value-of select="$m_instance_"/> has <xsl:value-of select="$num_bifs_on_bus_"/> bifs </xsl:message></xsl:if>
- <xsl:for-each select="key('G_MAP_ALL_BIFS_BY_BUS',$m_instance_)">
- <xsl:variable name="b_name_" select="@NAME"/>
- <xsl:variable name="b_type_" select="@TYPE"/>
- <xsl:variable name="b_inst_" select="../../@INSTANCE"/>
- <xsl:variable name="b_icls_" select="../../@MODCLASS"/>
- <xsl:variable name="is_mast_in_focus_" select="count($G_ROOT/SAV/MASTER[(@INSTANCE = $b_inst_)])"/>
- <xsl:variable name="is_peri_in_focus_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[@NAME = $b_inst_])"/>
- <xsl:if test="(($is_peri_in_focus_ + $is_mast_in_focus_) = 0)"><UNFOCUSED/></xsl:if>
- </xsl:for-each>
- </xsl:if>
- </xsl:variable>
-
- <xsl:variable name="mod_id_" select="@INSTANCE"/>
- <xsl:variable name="potential_masts_id_" select="concat('__GROUP_MASTER__.',@INSTANCE)"/>
- <xsl:variable name="is_master_" select="count($G_GROUPS/BLOCK[(@ID = $potential_masts_id_)])"/>
- <xsl:variable name="is_peripheral_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[@NAME = $mod_id_])"/>
- <xsl:variable name="num_potential_bifs_" select="count(exsl:node-set($bif_scope_)/POTENTIAL)"/>
- <xsl:variable name="num_connected_bifs_" select="count(exsl:node-set($bif_scope_)/CONNECTED)"/>
- <xsl:variable name="num_unfocused_bifs_" select="count(exsl:node-set($bif_scope_)/UNFOCUSED)"/>
-<!--
--->
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> <xsl:value-of select="$num_connected_bifs_"/> connected BIFS</xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> <xsl:value-of select="$num_potential_bifs_"/> potential bifs </xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> <xsl:value-of select="$num_unfocused_bifs_"/> unfocused bifs </xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> <xsl:value-of select="$is_peripheral_"/> is a peripheral</xsl:message></xsl:if>
-
- <xsl:if test="(($num_connected_bifs_ + $num_potential_bifs_ + $is_peripheral_) > 0)">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING POTENTIAL MODULE <xsl:value-of select="@INSTANCE"/></xsl:message></xsl:if>
- <xsl:choose>
-
- <xsl:when test="$G_ROOT/SAV/@MODE = 'TREE'">
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="@INSTANCE"/></xsl:attribute>
- <xsl:attribute name="CLASS">MODULE</xsl:attribute>
- <xsl:choose>
- <xsl:when test="(($is_peripheral_ > 0) or ($num_connected_bifs_ > 0))">
- <xsl:attribute name="CONNECTED_INDEX"><xsl:value-of select="@MHS_INDEX"/></xsl:attribute>
- </xsl:when>
- <xsl:otherwise>
- <xsl:attribute name="POTENTIAL_INDEX"><xsl:value-of select="@MHS_INDEX"/></xsl:attribute>
- </xsl:otherwise>
- </xsl:choose>
-
- <xsl:choose>
- <xsl:when test="count($G_ROOT/SAV/MASTER[(@INSTANCE = $mod_id_)]) > 0">
- <xsl:attribute name="RGB_BG"><xsl:value-of select="$COL_FOCUSED_MASTER"/></xsl:attribute>
- </xsl:when>
- <xsl:when test="$num_unfocused_bifs_ > 0">
- <xsl:attribute name="RGB_FG"><xsl:value-of select="$COL_BG_OUTOF_FOCUS_CONNECTIONS"/></xsl:attribute>
- </xsl:when>
- </xsl:choose>
-
- <!-- CR452579 Can only modify INSTANCE name in Hierarchal view. -->
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Name" NAME="INSTANCE" VALUE="{@INSTANCE}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{@MODTYPE}" VIEWICON="{LICENSEINFO/@ICON_NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{@HWVERSION}"/>
-
- <xsl:variable name="ipClassification_">
- <xsl:call-template name="F_ModClass_To_IpClassification">
- <xsl:with-param name="iModClass" select="@MODCLASS"/>
- <xsl:with-param name="iBusStd" select="@BUSSTD"/>
- </xsl:call-template>
- </xsl:variable>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Classification" NAME="IPCLASS" VALUE="{$ipClassification_}"/>
-
- <xsl:apply-templates select="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]" mode="_bif_view_focusing_on_potentials"/>
- </xsl:element>
- </xsl:when>
-
- <xsl:otherwise>
- <xsl:apply-templates select="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]" mode="_bif_view_focusing_on_potentials"/>
- </xsl:otherwise>
- </xsl:choose>
- </xsl:if>
-</xsl:template>
-
-<!--
- +++++++++++++++++++++++++++++++++++++++++++++++++++++
- BUS INTERFACE TEMPLATES
- +++++++++++++++++++++++++++++++++++++++++++++++++++++
--->
-
-<!--
- ===================================================
- THE BIF TEMPLATE FOR CONNECTED MODULES
- IN BIF VIEW PROC FOCUS
- ===================================================
--->
-<xsl:template match="BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]" mode="_bif_view_focusing_on_connected">
- <xsl:variable name="m_instance_" select="../../@INSTANCE"/>
- <xsl:variable name="b_std_" select="@BUSSTD"/>
- <xsl:variable name="b_bus_" select="@BUSNAME"/>
- <xsl:variable name="b_name_" select="@NAME"/>
-
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> EXAMINING CONNECTED INTERFACE <xsl:value-of select="$m_instance_"/>.<xsl:value-of select="$b_name_"/></xsl:message></xsl:if>
-
- <xsl:variable name="bif_scope_">
- <xsl:choose>
- <xsl:when test="($b_bus_ = '__NOC__')"><POTENTIAL/></xsl:when>
- <xsl:when test="((@TYPE = 'TARGET') or (@TYPE = 'INITIATOR')) and (count(key('G_MAP_P2P_BIFS',$b_bus_)[not(@BUSNAME = '__NOC__')]) > 0)">
- <xsl:variable name="p2p_scope_">
- <xsl:for-each select="$G_SYS_MODS"> <!-- to put in right scope for key below -->
- <xsl:for-each select="key('G_MAP_P2P_BIFS',$b_bus_)[not(@BUSNAME = '__NOC__')]">
- <xsl:variable name="p2p_bifname_" select="@NAME"/>
- <xsl:variable name="p2p_instance_" select="../../@INSTANCE"/>
-
- <xsl:variable name="num_proc_connections_" select="count(key('G_MAP_PROCESSORS',$p2p_instance_))"/>
- <xsl:variable name="num_mast_connections_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_])"/>
- <xsl:variable name="num_peri_connections_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[(@NAME = $p2p_instance_)])"/>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> <xsl:value-of select="$p2p_instance_"/>.<xsl:value-of select="$p2p_bifname_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> PROC CONNECTIONS <xsl:value-of select="$num_proc_connections_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> MAST CONNECTIONS <xsl:value-of select="$num_mast_connections_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> PERI CONNECTIONS <xsl:value-of select="$num_peri_connections_"/></xsl:message></xsl:if>
-
- <xsl:if test="($num_mast_connections_ = 0) and ($num_proc_connections_ > 0)"><OUTSCOPE/></xsl:if>
- <xsl:if test="($num_mast_connections_ > 0) or ($num_peri_connections_ > 0)"><INSCOPE/></xsl:if>
-
- </xsl:for-each>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:variable name="num_p2p_inscope_" select="count(exsl:node-set($p2p_scope_)/INSCOPE)"/>
- <xsl:variable name="num_p2p_outscope_" select="count(exsl:node-set($p2p_scope_)/OUTSCOPE)"/>
-
- <xsl:if test="(($num_p2p_inscope_ > 0) and ($num_p2p_outscope_ = 0))"><CONNECTED/></xsl:if>
- </xsl:when>
- <xsl:when test="(@TYPE = 'MASTER')">
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><CONNECTED/></xsl:if>
- </xsl:when>
- <xsl:when test="(@TYPE = 'SLAVE') and not(MASTERS/MASTER)">
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><CONNECTED/></xsl:if>
- <xsl:if test="($b_bus_ = '__NOC__') and count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@BUSSTD = $b_std_]) > 0"><POTENTIAL/></xsl:if>
- </xsl:when>
- <xsl:when test="(MASTERS/MASTER)">
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><POTENTIAL/></xsl:if>
- <xsl:for-each select="MASTERS/MASTER">
- <xsl:variable name="m_inst_" select="@INSTANCE"/>
- <xsl:choose>
- <xsl:when test="count($G_ROOT/SAV/MASTER[(@INSTANCE = $m_inst_)]) > 0"><CONNECTED/></xsl:when>
- <xsl:when test="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[(@NAME = $m_inst_)]) > 0"><CONNECTED/></xsl:when>
- <xsl:otherwise><UNFOCUSED/></xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="num_scope_unfocuseds_" select="count(exsl:node-set($bif_scope_)/UNFOCUSED)"/>
- <xsl:variable name="num_scope_potentials_" select="count(exsl:node-set($bif_scope_)/POTENTIAL)"/>
- <xsl:variable name="num_scope_connecteds_" select="count(exsl:node-set($bif_scope_)/CONNECTED)"/>
-
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> CONNECTED SCOPE <xsl:value-of select="$num_scope_connecteds_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> POTENTIAL SCOPE <xsl:value-of select="$num_scope_potentials_"/></xsl:message></xsl:if>
-
- <xsl:variable name="include_bif_">
- <xsl:choose>
- <xsl:when test="($b_bus_ = '__NOC__')">TRUE</xsl:when>
- <xsl:when test="(((@TYPE = 'TARGET') or (@TYPE = 'INITIATOR')) and ($num_scope_connecteds_ > 0))">TRUE</xsl:when>
- <xsl:when test="((@TYPE = 'MASTER') or (@TYPE = 'SLAVE') or (@TYPE = 'MASTER_SLAVE')) and (($num_scope_potentials_ > 0) or ($num_scope_connecteds_ > 0))">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="($include_bif_ = 'TRUE')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> PLACING CONNECTED INTERFACE <xsl:value-of select="$m_instance_"/>.<xsl:value-of select="$b_name_"/></xsl:message></xsl:if>
-
- <xsl:variable name="bif_col_">
- <xsl:choose>
- <xsl:when test="($num_scope_unfocuseds_ > 0)"><xsl:value-of select="$COL_BG_OUTOF_FOCUS_CONNECTIONS"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="$G_ROOT/SAV/@MODE = 'TREE'">
- <xsl:call-template name="WRITE_VIEW_BIF_TREE_SET">
- <xsl:with-param name="iModRef" select="../.."/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- <xsl:with-param name="iBifCol" select="$bif_col_"/>
- </xsl:call-template>
- </xsl:if>
-
- <xsl:if test="$G_ROOT/SAV/@MODE = 'FLAT'">
- <xsl:call-template name="WRITE_VIEW_BIF_FLAT_SET">
- <xsl:with-param name="iModRef" select="../.."/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- <xsl:with-param name="iBifCol" select="$bif_col_"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:if>
-</xsl:template>
-
-<!--
- ===================================================
- THE BIF TEMPLATE FOR POTENTIAL MODULES
- IN BIF VIEW PROC FOCUS
- ===================================================
--->
-
-<xsl:template match="BUSINTERFACES/BUSINTERFACE[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]" mode="_bif_view_focusing_on_potentials">
- <xsl:variable name="m_instance_" select="../../@INSTANCE"/>
- <xsl:variable name="b_name_" select="@NAME"/>
- <xsl:variable name="b_std_" select="@BUSSTD"/>
- <xsl:variable name="b_bus_" select="@BUSNAME"/>
-
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> EXAMINING POTENTIAL INTERFACE <xsl:value-of select="$m_instance_"/>.<xsl:value-of select="$b_name_"/></xsl:message></xsl:if>
-
- <xsl:variable name="bif_scope_">
- <xsl:choose>
- <xsl:when test="($b_bus_ = '__NOC__')"><POTENTIAL/></xsl:when>
-
- <xsl:when test="((@TYPE = 'TARGET') or (@TYPE = 'INITIATOR')) and (count(key('G_MAP_P2P_BIFS',$b_bus_)[not(@BUSNAME = '__NOC__')]) > 0)">
- <xsl:variable name="p2p_scope_">
- <xsl:for-each select="$G_SYS_MODS">
- <xsl:for-each select="key('G_MAP_P2P_BIFS',$b_bus_)[not(@BUSNAME = '__NOC__')]">
- <xsl:variable name="b_instance_" select="../../@INSTANCE"/>
-
- <xsl:variable name="num_proc_connections_" select="count(key('G_MAP_PROCESSORS',$b_instance_))"/>
- <xsl:variable name="num_mast_connections_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_])"/>
- <xsl:variable name="num_peri_connections_" select="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[(@NAME = $b_instance_)])"/>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> PROC CONNECTIONS <xsl:value-of select="$num_proc_connections_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> MAST CONNECTIONS <xsl:value-of select="$num_mast_connections_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> PERI CONNECTIONS <xsl:value-of select="$num_peri_connections_"/></xsl:message></xsl:if>
-
- <xsl:if test="($num_mast_connections_ = 0) and ($num_proc_connections_ > 0)"><OUTSCOPE/></xsl:if>
- <xsl:if test="($num_mast_connections_ > 0) or ($num_peri_connections_ > 0)"><INSCOPE/></xsl:if>
-
- </xsl:for-each>
- </xsl:for-each>
- </xsl:variable>
-
- <xsl:variable name="num_p2p_inscope_" select="count(exsl:node-set($p2p_scope_)/INSCOPE)"/>
- <xsl:variable name="num_p2p_outscope_" select="count(exsl:node-set($p2p_scope_)/OUTSCOPE)"/>
-
- <xsl:if test="(($num_p2p_inscope_ > 0) and ($num_p2p_outscope_ = 0))"><CONNECTED/></xsl:if>
- </xsl:when>
- <xsl:when test="(((@TYPE = 'SLAVE') and not(MASTERS/MASTER)) or (@TYPE = 'MASTER'))">
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><CONNECTED/></xsl:if>
- <xsl:if test="($b_bus_ = '__NOC__') and count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@BUSSTD = $b_std_]) > 0"><POTENTIAL/></xsl:if>
- </xsl:when>
- <xsl:when test="(MASTERS/MASTER)">
- <xsl:if test="count(exsl:node-set($G_FOCUSED_SCOPE)/BUS[@NAME = $b_bus_]) > 0"><POTENTIAL/></xsl:if>
- <xsl:for-each select="MASTERS/MASTER">
- <xsl:variable name="m_inst_" select="@INSTANCE"/>
- <xsl:choose>
- <xsl:when test="count($G_ROOT/SAV/MASTER[(@INSTANCE = $m_inst_)]) > 0"><CONNECTED/></xsl:when>
- <xsl:when test="count(exsl:node-set($G_FOCUSED_SCOPE)/PERIPHERAL[(@NAME = $m_inst_)]) > 0"><CONNECTED/></xsl:when>
- <xsl:otherwise><UNFOCUSED/></xsl:otherwise>
- </xsl:choose>
- </xsl:for-each>
- </xsl:when>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="num_scope_potentials_" select="count(exsl:node-set($bif_scope_)/POTENTIAL)"/>
- <xsl:variable name="num_scope_connecteds_" select="count(exsl:node-set($bif_scope_)/CONNECTED)"/>
- <xsl:variable name="num_scope_unfocuseds_" select="count(exsl:node-set($bif_scope_)/UNFOCUSED)"/>
-
- <xsl:variable name="include_bif_">
- <xsl:choose>
- <xsl:when test="($b_bus_ = '__NOC__')">TRUE</xsl:when>
- <xsl:when test="(((@TYPE = 'TARGET') or (@TYPE = 'INITIATOR')) and ($num_scope_connecteds_ > 0))">TRUE</xsl:when>
- <xsl:when test="((@TYPE = 'MASTER') or (@TYPE = 'SLAVE') or (@TYPE = 'MASTER_SLAVE')) and (($num_scope_potentials_ > 0) or ($num_scope_connecteds_ > 0))">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="bif_col_">
- <xsl:choose>
- <xsl:when test="($num_scope_unfocuseds_ > 0)"><xsl:value-of select="$COL_BG_OUTOF_FOCUS_CONNECTIONS"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="($include_bif_ = 'TRUE')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> PLACING POTENTIAL INTERFACE <xsl:value-of select="$m_instance_"/>.<xsl:value-of select="$b_name_"/></xsl:message></xsl:if>
- <xsl:if test="$G_ROOT/SAV/@MODE = 'TREE'">
- <xsl:call-template name="WRITE_VIEW_BIF_TREE_SET">
- <xsl:with-param name="iModRef" select="../.."/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- <xsl:with-param name="iBifCol" select="$bif_col_"/>
- </xsl:call-template>
- </xsl:if>
- <xsl:if test="$G_ROOT/SAV/@MODE = 'FLAT'">
- <xsl:call-template name="WRITE_VIEW_BIF_FLAT_SET">
- <xsl:with-param name="iModRef" select="../.."/>
- <xsl:with-param name="iBifRef" select="self::node()"/>
- <xsl:with-param name="iBifCol" select="$bif_col_"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:if>
-
-</xsl:template>
-
-<!-- THINGS TO IGNORE -->
-<!-- Ignore all non valid bus interfaces -->
-<xsl:template match="MODULE/DESCRIPTION" mode="_bif_view_focusing_on_potentials">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="MODULE/PARAMETERS" mode="_bif_view_focusing_on_potentials">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="MODULE/DOCUMENTATION" mode="_bif_view_focusing_on_potentials">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="MODULE/LICENSEINFO" mode="_bif_view_focusing_on_potentials">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<!-- Ignore all non valid bus interfaces -->
-<xsl:template match="BUSINTERFACES/BUSINTERFACE[(@IS_VALID = 'FALSE')]" mode="_bif_view_focusing_on_potentials">
-</xsl:template>
-
-<xsl:template match="MODULE/DESCRIPTION" mode="_bif_view_focusing_on_connected">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="MODULE/PARAMETERS" mode="_bif_view_focusing_on_connected">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="MODULE/DOCUMENTATION" mode="_bif_view_focusing_on_connected">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="MODULE/LICENSEINFO" mode="_bif_view_focusing_on_connected">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="BUSINTERFACES/BUSINTERFACE[(@IS_VALID = 'FALSE')]" mode="_bif_view_focusing_on_connected">
-</xsl:template>
-
-<!-- Ignore all non valid bus interfaces -->
-<xsl:template match="SAV" mode="_port_view_focusing_on_selected">
-</xsl:template>
-
-<xsl:template match="MODULE/DESCRIPTION" mode="_port_view_focusing_on_selected">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="MODULE/PARAMETERS" mode="_port_view_focusing_on_selected">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="MODULE/DOCUMENTATION" mode="_port_view_focusing_on_selected">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<xsl:template match="MODULE/LICENSEINFO" mode="_port_view_focusing_on_selected">
-<!-- <xsl:message>Ignoring invalid bus interface <xsl:value-of select="@NAME"/></xsl:message> -->
-</xsl:template>
-
-<!-- Ignore all non valid bus interfaces -->
-<xsl:template match="BUSINTERFACES/BUSINTERFACE[(@IS_VALID = 'FALSE')]" mode="_port_view_focusing_on_selected">
-</xsl:template>
-
-<!--
- Only write bus interfaces that are valid for non point to point interfaces
- that have busstds the processor can see
--->
-
-<!--
- ===============================================
- GROUP VIEW TRANSFORMS
- ===============================================
--->
-
-<xsl:template name="WRITE_VIEW_GROUPS">
- <xsl:param name="iModules"/>
-
- <xsl:if test="$G_DEBUG='TRUE'">
- <!--
- <xsl:message>BLKD AREA = <xsl:value-of select="$blkd_full_w_"/> X <xsl:value-of select="$blkd_full_h_"/></xsl:message>
- <xsl:message>NUMOF BUSSTD COLORS = <xsl:value-of select="$COL_BUSSTDS_NUMOF"/></xsl:message>
- <xsl:message>NUMOF INTERFACE TYPES= <xsl:value-of select="$G_IFTYPES_NUMOF"/></xsl:message>
- <xsl:message>NUMOF DIRS = <xsl:value-of select="$G_BLKD_COMPASS_DIRS_NUMOF"/></xsl:message>
- <xsl:apply-templates select="$G_BLOCKS/node()" mode="_place_module_blocks_"/>
- -->
- </xsl:if>
-
- <xsl:element name="SET">
- <xsl:attribute name="CLASS">PROJECT</xsl:attribute>
- <xsl:attribute name="VIEW_ID">BUSINTERFACE</xsl:attribute>
- <xsl:attribute name="DISPLAYMODE">TREE</xsl:attribute>
- <xsl:call-template name="WRITE_VIEW_BIF_GROUPS">
- <xsl:with-param name="iModules" select="$G_BLOCKS"/>
- </xsl:call-template>
- </xsl:element>
-</xsl:template>
-<xsl:template name="WRITE_VIEW_BIF_GROUPS">
- <xsl:param name="iModules"/>
-
- <xsl:for-each select="$iModules/BLOCK[@ID and not(BLOCK) and not(@C)]">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING BUS <xsl:value-of select="@ID"/></xsl:message></xsl:if>
-
- <xsl:variable name="m_id_" select="@ID"/>
- <xsl:variable name="m_module_" select="$G_SYS_MODS/MODULE[@INSTANCE = $m_id_]"/>
- <xsl:variable name="m_instance_" select="$m_module_/@INSTANCE"/>
- <xsl:variable name="m_version_" select="$m_module_/@HWVERSION"/>
- <xsl:variable name="m_type_" select="$m_module_/@MODTYPE"/>
- <xsl:variable name="m_class_" select="$m_module_/@MODCLASS"/>
- <xsl:variable name="m_busstd_" select="$m_module_/@BUSSTD"/>
-
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="@ID"/></xsl:attribute>
- <xsl:attribute name="CLASS">MODULE</xsl:attribute>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Name</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">TEXTBOX</xsl:attribute>
- <xsl:attribute name="NAME">INSTANCE</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$m_instance_"/></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Type</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">MODTYPE</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$m_type_"/></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Version</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">HWVERSION</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$m_version_"/></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Classification</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">IPCLASS</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$m_busstd_"/> BUS</xsl:attribute>
- </xsl:element>
- </xsl:element>
- </xsl:for-each>
-
- <xsl:for-each select="$iModules/BLOCK[@ID and BLOCK]">
- <xsl:choose>
- <xsl:when test="not(starts-with(@ID,'__')) and BLOCK[@C] and (not(BLOCK/BLOCK) or BLOCK/BLOCK[@CP])">
- <!--
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING MODULE <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- -->
- <xsl:variable name="m_id_" select="@ID"/>
- <xsl:variable name="m_module_" select="$G_SYS_MODS/MODULE[@INSTANCE = $m_id_]"/>
- <xsl:variable name="m_instance_" select="$m_module_/@INSTANCE"/>
- <xsl:variable name="m_type_" select="$m_module_/@MODTYPE"/>
- <xsl:variable name="m_class_" select="$m_module_/@MODCLASS"/>
- <xsl:variable name="m_version_" select="$m_module_/@HWVERSION"/>
-
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="@ID"/></xsl:attribute>
- <xsl:attribute name="CLASS">MODULE</xsl:attribute>
-
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Name</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">TEXTBOX</xsl:attribute>
- <xsl:attribute name="NAME">INSTANCE</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$m_instance_"/></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Type</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">MODTYPE</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$m_type_"/></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Version</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">HWVERSION</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$m_version_"/></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">IP Classification</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">IPCLASS</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$m_class_"/></xsl:attribute>
- </xsl:element>
-
- <xsl:for-each select="BLOCK[@C and @ID]">
- <xsl:variable name="b_bus_" select="@C"/>
- <xsl:variable name="b_name_" select="@ID"/>
- <xsl:variable name="b_if_" select="$m_module_/BUSINTERFACES/BUSINTERFACE[(@NAME = $b_name_)]"/>
- <xsl:variable name="b_type_" select="$b_if_/@TYPE"/>
- <xsl:variable name="b_busstd_" select="$b_if_/@BUSSTD"/>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING BIF <xsl:value-of select="$b_name_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> TYPE <xsl:value-of select="$b_type_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> BUS <xsl:value-of select="$b_bus_"/></xsl:message></xsl:if>
-
- <xsl:variable name="b_busNameViewType_">
- <xsl:choose>
- <xsl:when test="$b_type_ = 'INITIATOR'">TEXTBOX</xsl:when>
- <xsl:when test="starts-with(@ID,'S_AXI')">BUTTON</xsl:when>
- <xsl:when test="starts-with(@ID,'S0_AXI')">BUTTON</xsl:when>
- <xsl:when test="starts-with(@ID,'S1_AXI')">BUTTON</xsl:when>
- <xsl:otherwise>DROPDOWN</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <xsl:variable name="b_busName_">
- <xsl:choose>
- <xsl:when test="$b_if_/MASTERS/MASTER">
- <xsl:variable name="mastersList_"><xsl:for-each select="$b_if_/MASTERS/MASTER"><xsl:if test="position() > 1"> & </xsl:if><xsl:value-of select="concat(@INSTANCE,'.',@BUSINTERFACE)"/></xsl:for-each></xsl:variable>
- <xsl:variable name="mastersConn_" select="concat($b_bus_,':',$mastersList_)"/>
- <xsl:value-of select="$mastersConn_"/>
- </xsl:when>
- <xsl:otherwise><xsl:value-of select="$b_bus_"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> VIEWTYPE <xsl:value-of select="$b_busNameViewType_"/></xsl:message></xsl:if>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message> BUSNAME <xsl:value-of select="$b_busName_"/></xsl:message></xsl:if>
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="@ID"/></xsl:attribute>
- <xsl:attribute name="CLASS">BUSINTERFACE</xsl:attribute>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">NAME</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">NAME</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$b_name_"/></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Bus Name</xsl:attribute>
- <xsl:attribute name="VIEWTYPE"><xsl:value-of select="$b_busNameViewType_"/></xsl:attribute>
- <xsl:attribute name="NAME">BUSNAME</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$b_busName_"/></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Type</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">TYPE</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$b_type_"/></xsl:attribute>
- </xsl:element>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">Bus Standard</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">BUSSTD</xsl:attribute>
- <xsl:attribute name="VALUE"><xsl:value-of select="$b_busstd_"/></xsl:attribute>
- </xsl:element>
- </xsl:element>
- </xsl:for-each>
- </xsl:element>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_PROCESSOR__')">
-
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PROCESSOR GROUP<xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:variable name="p_id_" select="substring-after(@ID,'__GROUP_PROCESSOR__')"/>
- <xsl:variable name="m_id_" select="concat('PROCESSOR',$p_id_)"/>
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="$m_id_"/></xsl:attribute>
- <xsl:attribute name="CLASS">GROUP</xsl:attribute>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">NAME</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">INSTANCE</xsl:attribute>
- <xsl:attribute name="VALUE">Subsystem of <xsl:value-of select="$p_id_"/></xsl:attribute>
- </xsl:element>
- <xsl:call-template name="WRITE_VIEW_BIF_GROUPS">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:element>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_MASTER__')">
-
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>MASTER GROUP<xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:variable name="p_id_" select="substring-after(@ID,'__GROUP_MASTER__')"/>
- <xsl:variable name="m_id_" select="concat('MASTER',$p_id_)"/>
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="$m_id_"/></xsl:attribute>
- <xsl:attribute name="CLASS">GROUP</xsl:attribute>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">NAME</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">INSTANCE</xsl:attribute>
- <xsl:attribute name="VALUE">Subsystem of <xsl:value-of select="$p_id_"/></xsl:attribute>
- </xsl:element>
- <xsl:call-template name="WRITE_VIEW_BIF_GROUPS">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:element>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_SHARED__')">
- <xsl:variable name="s_id_" select="substring-after(@ID,'__GROUP_SHARED__')"/>
- <xsl:variable name="m_id_" select="concat('SHARED',$s_id_)"/>
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING SHARED PERIPHERALS <xsl:value-of select="$s_id_"/></xsl:message></xsl:if>
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="$m_id_"/></xsl:attribute>
- <xsl:attribute name="CLASS">GROUP</xsl:attribute>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">NAME</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">INSTANCE</xsl:attribute>
- <xsl:attribute name="VALUE">Peripherals shared by <xsl:value-of select="$s_id_"/></xsl:attribute>
- </xsl:element>
- <xsl:call-template name="WRITE_VIEW_BIF_GROUPS">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:element>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_MEMORY__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING MEMORY <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:variable name="m_id_" select="substring-after(@ID,'__GROUP_MEMORY__')"/>
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="$m_id_"/></xsl:attribute>
- <xsl:attribute name="CLASS">GROUP</xsl:attribute>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">NAME</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">INSTANCE</xsl:attribute>
- <xsl:attribute name="VALUE">(Memory) <xsl:value-of select="$m_id_"/></xsl:attribute>
- </xsl:element>
- <xsl:call-template name="WRITE_VIEW_BIF_GROUPS">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:element>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_PERIPHERAL__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING PERIPHERAL <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:call-template name="WRITE_VIEW_BIF_GROUPS">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-
- <xsl:when test="starts-with(@ID,'__GROUP_SLAVES__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING SLAVES <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:call-template name="WRITE_VIEW_BIF_GROUPS">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:when>
-<!--
- <xsl:when test="starts-with(@ID,'__GROUP_SLAVES__')">
- <xsl:if test="$G_DEBUG='TRUE'"><xsl:message>PLACING SLAVES GOUP <xsl:value-of select="@ID"/></xsl:message></xsl:if>
- <xsl:variable name="m_id_" select="substring-after(@ID,'__GROUP_SLAVES__')"/>
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="$m_id_"/></xsl:attribute>
- <xsl:attribute name="CLASS">GROUP</xsl:attribute>
- <xsl:element name="VARIABLE">
- <xsl:attribute name="VIEWDISP">NAME</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- <xsl:attribute name="NAME">INSTANCE</xsl:attribute>
- <xsl:attribute name="VALUE">(Slaves of) <xsl:value-of select="$m_id_"/></xsl:attribute>
- </xsl:element>
- <xsl:call-template name="F_Write_XTeller_MODULES">
- <xsl:with-param name="iModules" select="self::node()"/>
- </xsl:call-template>
- </xsl:element>
- </xsl:when>
--->
-
- </xsl:choose>
- </xsl:for-each>
-</xsl:template>
-
-
-
-</xsl:stylesheet>
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_port.xsl b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_port.xsl
deleted file mode 100644
index 5cfc3be61e..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/edw2xtl_sav_view_port.xsl
+++ /dev/null
@@ -1,771 +0,0 @@
-<?xml version="1.0" standalone="no"?>
-
-<!DOCTYPE stylesheet [
- <!ENTITY UPPERCASE "ABCDEFGHIJKLMNOPQRSTUVWXYZ">
- <!ENTITY LOWERCASE "abcdefghijklmnopqrstuvwxyz">
-
- <!ENTITY UPPER2LOWER " '&UPPERCASE;' , '&LOWERCASE;' ">
- <!ENTITY LOWER2UPPER " '&LOWERCASE;' , '&UPPERCASE;' ">
-
- <!ENTITY ALPHALOWER "ABCDEFxX0123456789">
- <!ENTITY HEXUPPER "ABCDEFxX0123456789">
- <!ENTITY HEXLOWER "abcdefxX0123456789">
- <!ENTITY HEXU2L " '&HEXLOWER;' , '&HEXUPPER;' ">
-]>
-
-<xsl:stylesheet version="1.0"
- xmlns:xsl="http://www.w3.org/1999/XSL/Transform"
- xmlns:exsl="http://exslt.org/common"
- xmlns:dyn="http://exslt.org/dynamic"
- xmlns:math="http://exslt.org/math"
- xmlns:xlink="http://www.w3.org/1999/xlink"
- extension-element-prefixes="math dyn exsl xlink">
-
-<!--
- ================================================================================
- Generate XTeller for PORTS
- ================================================================================
--->
-<xsl:param name="SHOW_IOIF" select="'TRUE'"/>
-<xsl:param name="SHOW_BUSIF" select="'TRUE'"/>
-
-<xsl:template name="WRITE_VIEW_PORT_TREE">
-
- <xsl:variable name="num_of_ext_ports_" select="count($G_SYS_EXPS/PORT)"/>
-
- <xsl:if test="$G_DEBUG='TRUE'">
- <xsl:message>WRITING PORT in MODE :<xsl:value-of select="@MODE"/></xsl:message>
- <!--
- <xsl:message>EXTERNAL PORT <xsl:value-of select="$num_of_ext_ports_"/></xsl:message>
- -->
- </xsl:if>
-
-
- <xsl:if test="$num_of_ext_ports_ > 0">
- <xsl:call-template name="WRITE_VIEW_EXTP_TREE_SET"/>
- </xsl:if>
-
- <xsl:for-each select="$G_SYS_MODS/MODULE">
- <xsl:sort data-type="number" select="@ROW_INDEX" order="ascending"/>
- <xsl:variable name= "instName_" select="@INSTANCE"/>
- <xsl:variable name="moduleRef_" select="self::node()"/>
-
- <xsl:call-template name="WRITE_VIEW_PORT_TREE_SET">
- <xsl:with-param name="iModRef" select="$moduleRef_"/>
- </xsl:call-template>
-
- </xsl:for-each> <!-- End of MODULES loop -->
-</xsl:template>
-
-<xsl:template name="WRITE_VIEW_EXTP_TREE_SET">
-
- <xsl:element name="SET">
- <xsl:attribute name="ID">ExternalPorts</xsl:attribute>
- <xsl:attribute name="CLASS">MODULE</xsl:attribute>
-
- <xsl:for-each select="$G_SYS_EXPS">
-
- <xsl:element name="VARIABLE">
- <xsl:attribute name="NAME">Name</xsl:attribute>
- <xsl:attribute name="VALUE">External Ports</xsl:attribute>
- <xsl:attribute name="VIEWDISP">Name</xsl:attribute>
- <xsl:attribute name="VIEWTYPE">STATIC</xsl:attribute>
- </xsl:element>
-
- <xsl:for-each select="PORT">
- <xsl:sort select="@NAME" order="ascending"/>
- <!--
- <xsl:sort data-type="number" select="@MHS_INDEX" order="ascending"/>
- -->
-
- <xsl:element name="SET">
- <xsl:attribute name="ID"><xsl:value-of select="@NAME"/></xsl:attribute>
- <xsl:attribute name="CLASS">PORT</xsl:attribute>
- <xsl:attribute name="ROW_INDEX"><xsl:value-of select="(position() - 1)"/></xsl:attribute>
-
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="{@SIGNAME}" IS_EDITABLE="TRUE"/>
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Name" NAME="NAME" VALUE="{@NAME}"/>
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Direction" NAME="DIR" VALUE="{@DIR}"/>
-
- <xsl:if test="(@SIGIS)">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Class" NAME="SIGIS" VALUE="{@SIGIS}"/>
- </xsl:if>
- <xsl:if test="not(@SIGIS)">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Class" NAME="SIGIS" VALUE="NONE"/>
- </xsl:if>
-
- <xsl:choose>
- <xsl:when test="@LEFT and @RIGHT">
- <xsl:variable name="vecformula_txt_">[<xsl:value-of select="@LEFT"/>:<xsl:value-of select="@RIGHT"/>]</xsl:variable>
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Range" NAME="VECFORMULA" VALUE="{$vecformula_txt_}"/>
- </xsl:when>
- <xsl:when test="@MSB and @LSB">
- <xsl:variable name="vecformula_txt_">[<xsl:value-of select="@MSB"/>:<xsl:value-of select="@LSB"/>]</xsl:variable>
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Range" NAME="VECFORMULA" VALUE="{$vecformula_txt_}"/>
- </xsl:when>
- <xsl:when test="(not(@MSB) and not(@LSB) and not(@SIGIS = 'CLK') and not(@SIGIS = 'CLOCK') and not(@SIGIS = 'DCMCLK') and not(@SIGIS = 'RST') and not(@SIGIS = 'RESET'))">
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Range" NAME="VECFORMULA" VALUE=""/>
- </xsl:when>
- </xsl:choose>
-
- <xsl:if test="((@SIGIS = 'CLK') or (@SIGIS = 'CLOCK') or (@SIGIS = 'DCMCLK'))">
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Frequency(Hz)" NAME="CLKFREQUENCY" VALUE="{@CLKFREQUENCY}"/>
- </xsl:if>
-
- <xsl:if test="(@SIGIS = 'RST' or @SIGIS = 'RESET')">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Reset Polarity" NAME="RSTPOLARITY" VALUE="{@RSTPOLARITY}"/>
- </xsl:if>
-
- <xsl:if test="(@SIGIS = 'INTERRUPT')">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Sensitivity" NAME="SENSITIVITY" VALUE="{@SENSITIVITY}"/>
- </xsl:if>
- </xsl:element>
- </xsl:for-each> <!-- End of EXTERNAL PORTS loop -->
- </xsl:for-each> <!-- End of EXTERNAL PORTS loop -->
- </xsl:element> <!-- End of EXTERNAL PORTS SET -->
-</xsl:template>
-
-<xsl:template name="WRITE_VIEW_PORT_TREE_SET">
- <xsl:param name="iModRef" select="'__NONE__'"/>
-
- <xsl:variable name="m_inst_" select="$iModRef/@INSTANCE"/>
- <xsl:variable name="m_class_" select="$iModRef/@MODCLASS"/>
- <xsl:variable name="m_type_" select="$iModRef/@MODTYPE"/>
- <xsl:variable name="m_type_lc_" select="translate($m_type_,&UPPER2LOWER;)"/>
- <xsl:variable name="m_version_" select="$iModRef/@HWVERSION"/>
- <xsl:variable name="m_licinfo_" select="$iModRef/LICENSEINFO"/>
- <xsl:variable name="m_ports_" select="$iModRef/PORTS"/>
-
- <xsl:variable name="is_axi_interconnect_">
- <xsl:choose>
- <xsl:when test="$m_type_ = 'axi_interconnect'">TRUE</xsl:when>
- <xsl:when test="$m_type_lc_ = 'axi_interconnect'">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:for-each select="$G_SYS_MODS"> <!-- To put things in the right scope for the keys below -->
-
- <xsl:variable name="m_iofs_all_" select="key('G_MAP_ALL_IOFS', $m_inst_)"/>
- <xsl:variable name="m_bifs_all_" select="key('G_MAP_ALL_BIFS', $m_inst_)"/>
-
- <xsl:variable name="m_ports_def_" select="key('G_MAP_DEF_PORTS',$m_inst_)"/>
- <xsl:variable name="m_ports_ndf_" select="key('G_MAP_NDF_PORTS',$m_inst_)"/>
-<!--
- <xsl:if test="$G_DEBUG = 'TRUE'">
- <xsl:message><xsl:value-of select="$m_inst_"/> has <xsl:value-of select="count($m_bifs_all_)"/> valid bifs </xsl:message>
- <xsl:message><xsl:value-of select="$m_inst_"/> has <xsl:value-of select="count($m_iofs_all_)"/> valid iofs </xsl:message>
- <xsl:message><xsl:value-of select="$m_inst_"/> has <xsl:value-of select="count($m_ports_def_)"/> default ports </xsl:message>
- <xsl:message><xsl:value-of select="$m_inst_"/> has <xsl:value-of select="count($m_ports_ndf_)"/> non default ports </xsl:message>
- <xsl:message></xsl:message>
- </xsl:if>
--->
-
- <SET ID="{$m_inst_}" CLASS="MODULE">
- <!-- CR452579
- Can only modify INSTANCE name in Hierarchal view.
- -->
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Name" NAME="INSTANCE" VALUE="{$m_inst_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{$m_type_}" VIEWICON="{$m_licinfo_/@ICON_NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{$m_version_}"/>
-
- <!--
- CR582477,
- (among others) special case of axi_interconnect_aclk which is a member of
- a bus interface, but should be treated as a non interface port, (i.e. appear even
- if the bus interfaces its a member of is invalid.
- -->
- <xsl:if test="($is_axi_interconnect_ = 'TRUE')">
- <!-- do it this way so we also catch the lower-upper case mismatches -->
- <xsl:for-each select="key('G_MAP_ALL_PORTS',$m_inst_)[contains(@SIGIS,'CLK')]">
- <xsl:variable name="uc_portName_" select="translate(@NAME,&LOWER2UPPER;)"/>
- <xsl:if test="($uc_portName_= 'INTERCONNECT_ACLK')">
- <!--
- <xsl:message><xsl:value-of select="$m_inst_"/>.<xsl:value-of select="@NAME"/> = <xsl:value-of select="@SIGIS"/></xsl:message>
- -->
- <xsl:variable name="portName_" select="@NAME"/>
- <xsl:variable name="portDir_" select="@DIR"/>
- <xsl:variable name="portSig_" select="@SIGNAME"/>
-
- <xsl:variable name="portSigIs_">
- <xsl:choose>
- <xsl:when test="not(@SIGIS)">__NONE__</xsl:when>
- <xsl:otherwise><xsl:value-of select="@SIGIS"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="portSensi_">
- <xsl:choose>
- <xsl:when test="(@SENSITIVITY)"><xsl:value-of select="@SENSITIVIITY"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="portVecFormula_">
- <xsl:choose>
- <xsl:when test="@VECFORMULA"><xsl:value-of select="@VECFORMULA"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:call-template name="WRITE_PORT_SET">
- <xsl:with-param name="iName" select="$portName_"/>
- <xsl:with-param name="iDir" select="$portDir_"/>
- <xsl:with-param name="iSigName" select="$portSig_"/>
- <xsl:with-param name="iSigIs" select="$portSigIs_"/>
- <xsl:with-param name="iSensitivity" select="$portSensi_"/>
- <xsl:with-param name="iVecFormula" select="$portVecFormula_"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:for-each>
- </xsl:if>
-
- <!-- PORTS not part of an INTERFACE -->
- <xsl:for-each select="$m_ports_ndf_">
-
- <xsl:sort data-type="number" select="@MPD_INDEX" order="ascending"/>
- <xsl:variable name="uc_portName_" select="translate(@NAME,&LOWER2UPPER;)"/>
-
- <!--
- <xsl:if test="((not(@BUS) and not(@IOS)) or (($is_axi_interconnect_ = 'TRUE') and ($uc_portName_= 'INTERCONNECT_ACLK')))">
- </xsl:if>
- -->
-
-
- <xsl:variable name="portName_" select="@NAME"/>
- <xsl:variable name="portDir_" select="@DIR"/>
- <xsl:variable name="portSig_" select="@SIGNAME"/>
-
- <xsl:variable name="portSigIs_">
- <xsl:choose>
- <xsl:when test="not(@SIGIS)">__NONE__</xsl:when>
- <xsl:otherwise><xsl:value-of select="@SIGIS"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="portSensi_">
- <xsl:choose>
- <xsl:when test="(@SENSITIVITY)"><xsl:value-of select="@SENSITIVIITY"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="portVecFormula_">
- <xsl:choose>
- <xsl:when test="@VECFORMULA"><xsl:value-of select="@VECFORMULA"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
-
- <xsl:call-template name="WRITE_PORT_SET">
- <xsl:with-param name="iName" select="$portName_"/>
- <xsl:with-param name="iDir" select="$portDir_"/>
- <xsl:with-param name="iSigName" select="$portSig_"/>
- <xsl:with-param name="iSigIs" select="$portSigIs_"/>
- <xsl:with-param name="iSensitivity" select="$portSensi_"/>
- <xsl:with-param name="iVecFormula" select="$portVecFormula_"/>
- </xsl:call-template>
- </xsl:for-each> <!-- END of PORTS NOT OF INTERFACE -->
-
- <!-- PORTS part of a BUSINTERFACE -->
- <xsl:if test="$SHOW_BUSIF = 'TRUE'">
- <xsl:for-each select="$m_bifs_all_">
- <xsl:sort data-type="number" select="@MPD_INDEX" order="ascending"/>
-
- <xsl:variable name="bifName_" select="@NAME"/>
- <xsl:variable name="bifRef_" select="self::node()"/>
- <xsl:variable name="portmapsRef_" select="$bifRef_/PORTMAPS"/>
-
- <!--
- <xsl:variable name="bpmsCnt_" select="count($bpmsRef_/PORTMAP)"/>
- <xsl:message><xsl:value-of select="$instName_"/>.<xsl:value-of select="$bifName_"/>.<xsl:value-of select="$bpmsCnt_"/></xsl:message>
- -->
-
- <xsl:variable name="is_external_">
- <xsl:call-template name="F_IS_Interface_External">
- <xsl:with-param name="iInstRef" select="$iModRef"/>
- <xsl:with-param name="iIntfRef" select="$bifRef_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="bif_connection_">
- <xsl:choose>
- <xsl:when test="not(@BUSNAME = '__NOC__')">Connected to BUS <xsl:value-of select="@BUSNAME"/></xsl:when>
- <xsl:when test="($is_external_ = 'TRUE')">Connected to External Ports</xsl:when>
- <xsl:otherwise>Not connected to BUS or External Ports</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <!-- <SET ID="{@NAME}" CLASS="BUSINTERFACE.PORTS"/> -->
- <xsl:element name="SET">
-
- <xsl:attribute name="ID"><xsl:value-of select="@NAME"/></xsl:attribute>
- <xsl:attribute name="CLASS">BUSINTERFACE.PORTS</xsl:attribute>
-
- <xsl:if test="$is_external_ = 'TRUE'">
- <xsl:attribute name="IS_EXTERNAL">TRUE</xsl:attribute>
- </xsl:if>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="NAME" NAME="NAME" VALUE="(BUS_IF) {@NAME}"/>
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="BUSINTERFACE.CONNECTION" VALUE="{$bif_connection_}"/>
-
- <xsl:for-each select="$portmapsRef_/PORTMAP">
-
- <xsl:variable name="portDir_" select="@DIR"/>
- <xsl:variable name="portName_" select="@PHYSICAL"/>
-
- <xsl:if test="$m_ports_def_[(@NAME = $portName_)]"><!-- Only in map if port is valid -->
-
- <!--
- <xsl:if test="(not($portRef_/@IS_VALID) or ($portRef_/@IS_VALID = 'TRUE'))"/>
- <xsl:sort select="@MPD_INDEX" order="ascending"/>
- <xsl:sort data-type="number" select="@MPD_INDEX" order="ascending"/>
- -->
- <xsl:variable name="portRef_" select="$m_ports_def_[(@NAME = $portName_)]"/>
- <xsl:variable name="portSig_" select="$portRef_/@SIGNAME"/>
-
- <xsl:variable name="portSigIs_">
- <xsl:choose>
- <xsl:when test="not($portRef_/@SIGIS)">__NONE__</xsl:when>
- <xsl:otherwise><xsl:value-of select="$portRef_/@SIGIS"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="portSensi_">
- <xsl:choose>
- <xsl:when test="($portRef_/@SENSITIVITY)"><xsl:value-of select="$portRef_/@SENSITIVITY"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="portVecFormula_">
- <xsl:choose>
- <xsl:when test="$portRef_/@VECFORMULA"><xsl:value-of select="$portRef_/@VECFORMULA"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:call-template name="WRITE_PORT_SET">
- <xsl:with-param name="iName" select="$portName_"/>
- <xsl:with-param name="iDir" select="$portDir_"/>
- <xsl:with-param name="iSigName" select="$portSig_"/>
- <xsl:with-param name="iSigIs" select="$portSigIs_"/>
- <xsl:with-param name="iSensitivity" select="$portSensi_"/>
- <xsl:with-param name="iVecFormula" select="$portVecFormula_"/>
- </xsl:call-template>
- </xsl:if>
- </xsl:for-each> <!-- END BIF PORTMAPS LOOP -->
- </xsl:element>
- </xsl:for-each> <!-- END BIFS LOOP -->
- </xsl:if> <!-- END IF SHOW_BUSIFS -->
-
-
- <!-- PORTS part of a IOINTERFACE -->
- <xsl:if test="$SHOW_IOIF = 'TRUE'">
-
- <xsl:for-each select="$m_iofs_all_[PORTMAPS/PORTMAP]">
- <xsl:sort data-type="number" select="@MPD_INDEX" order="ascending"/>
-
- <xsl:variable name="iifName_" select="@NAME"/>
- <xsl:variable name="iifRef_" select="self::node()"/>
- <xsl:variable name="portmapsRef_" select="$iifRef_/PORTMAPS"/>
-
- <xsl:variable name="is_external_">
- <xsl:call-template name="F_IS_Interface_External">
- <xsl:with-param name="iInstRef" select="$iModRef"/>
- <xsl:with-param name="iIntfRef" select="$iifRef_"/>
- </xsl:call-template>
- </xsl:variable>
-
- <xsl:variable name="iif_connection_">
- <xsl:choose>
- <xsl:when test="($is_external_ ='TRUE')">Connected to External Ports</xsl:when>
- <xsl:otherwise>Not connected to External Ports</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:element name="SET">
-
- <xsl:attribute name="ID"><xsl:value-of select="@NAME"/></xsl:attribute>
- <xsl:attribute name="CLASS">IOINTERFACE.PORTS</xsl:attribute>
-
- <xsl:if test="$is_external_ = 'TRUE'">
- <xsl:attribute name="IS_EXTERNAL">TRUE</xsl:attribute>
- </xsl:if>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="NAME" NAME="NAME" VALUE="(IO_IF) {@NAME}"/>
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="IOINTERFACE.CONNECTION" VALUE="{$iif_connection_}"/>
-
- <xsl:for-each select="$portmapsRef_/PORTMAP">
-
- <xsl:variable name="portName_" select="@PHYSICAL"/>
- <xsl:variable name="portDir_" select="@DIR"/>
-
- <!--
- <xsl:variable name="port_is_valid_">
- <xsl:choose>
- <xsl:when test="$portRef_/@IS_VALID = 'FALSE'">FALSE</xsl:when>
- <xsl:otherwise>TRUE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
- <xsl:message><xsl:value-of select="$portName_"/> : <xsl:value-of select="$port_is_valid_"/> : <xsl:value-of select="$portRef_/@IS_VALID"/></xsl:message>
- -->
-
- <xsl:if test="$m_ports_def_[(@NAME = $portName_)]"> <!-- Only in map if port is valid -->
- <!--
- <xsl:message><xsl:value-of select="$portName_"/> </xsl:message>
- -->
-
- <xsl:variable name="portRef_" select="$m_ports_def_[(@NAME = $portName_)]"/>
- <xsl:variable name="portSig_" select="$portRef_/@SIGNAME"/>
-
- <xsl:variable name="portSigIs_">
- <xsl:choose>
- <xsl:when test="not($portRef_/@SIGIS)">__NONE__</xsl:when>
- <xsl:otherwise><xsl:value-of select="$portRef_/@SIGIS"/></xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="portSensi_">
- <xsl:choose>
- <xsl:when test="($portRef_/@SENSITIVITY)"><xsl:value-of select="$portRef_/@SENSITIVITY"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:variable name="portVecFormula_">
- <xsl:choose>
- <xsl:when test="$portRef_/@VECFORMULA"><xsl:value-of select="$portRef_/@VECFORMULA"/></xsl:when>
- <xsl:otherwise>__NONE__</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:call-template name="WRITE_PORT_SET">
- <xsl:with-param name="iName" select="$portName_"/>
- <xsl:with-param name="iDir" select="$portDir_"/>
- <xsl:with-param name="iSigName" select="$portSig_"/>
- <xsl:with-param name="iSigIs" select="$portSigIs_"/>
- <xsl:with-param name="iSensitivity" select="$portSensi_"/>
- <xsl:with-param name="iVecFormula" select="$portVecFormula_"/>
- </xsl:call-template>
- </xsl:if> <!-- End of port is valid check -->
- </xsl:for-each> <!-- END IO INTERFACE PORTMAPS LOOP -->
- </xsl:element>
- </xsl:for-each> <!-- END IIFS LOOP -->
- </xsl:if> <!-- END IF SHOW_IOIFS -->
- </SET>
-
- </xsl:for-each> <!-- End of the scoping for key functions-->
-</xsl:template>
-
-<xsl:template name="WRITE_VIEW_PORT_FLAT">
-
- <xsl:if test="$G_DEBUG='TRUE'">
- <xsl:message>WRITING PORT MODE <xsl:value-of select="@MODE"/></xsl:message>
- </xsl:if>
-
- <xsl:variable name="num_of_ext_ports_" select="count($G_SYS_EXPS/PORT)"/>
- <xsl:if test="$num_of_ext_ports_ > 0">
- <xsl:call-template name="WRITE_VIEW_EXTP_FLAT_SET"/>
- </xsl:if>
-
-
- <xsl:for-each select="$G_SYS_MODS/MODULE">
- <xsl:sort data-type="number" select="@ROW_INDEX" order="ascending"/>
- <xsl:variable name="instName_" select="@INSTANCE"/>
- <xsl:variable name="moduleRef_" select="self::node()"/>
-
- <xsl:call-template name="WRITE_VIEW_PORT_FLAT_SET">
- <xsl:with-param name="iModRef" select="$moduleRef_"/>
- </xsl:call-template>
-
- </xsl:for-each> <!-- End of Modules Loop -->
-</xsl:template>
-
-<xsl:template name="WRITE_VIEW_EXTP_FLAT_SET">
-
- <xsl:for-each select="$G_SYS_EXPS">
- <xsl:for-each select="PORT[(not(@IS_VALID) or (@IS_VALID = 'TRUE'))]">
- <xsl:sort data-type="number" select="@MHS_INDEX" order="ascending"/>
- <xsl:variable name="ext_is_interrupt_">
- <xsl:if test="@SIGIS = 'INTERRUPT'">TRUE</xsl:if>
- <xsl:if test="not(@SIGIS = 'INTERRUPT')">FALSE</xsl:if>
- </xsl:variable>
-
- <SET ID="{@NAME}" CLASS="PORT">
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="External Ports"/>
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Port Name" NAME="NAME" VALUE="{@NAME}"/>
-
- <xsl:choose>
- <xsl:when test="@LEFT and @RIGHT">
- <xsl:variable name="vecformula_txt_">[<xsl:value-of select="@LEFT"/>:<xsl:value-of select="@RIGHT"/>]</xsl:variable>
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Range" NAME="VECFORMULA" VALUE="{$vecformula_txt_}"/>
- </xsl:when>
- <xsl:when test="@MSB and @LSB">
- <xsl:variable name="vecformula_txt_">[<xsl:value-of select="@MSB"/>:<xsl:value-of select="@LSB"/>]</xsl:variable>
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Range" NAME="VECFORMULA" VALUE="{$vecformula_txt_}"/>
- </xsl:when>
- <xsl:when test="(not(@MSB) and not(@LSB) and not(@SIGIS = 'CLK') and not(@SIGIS = 'CLOCK') and not(@SIGIS = 'DCMCLK') and not(@SIGIS = 'RST') and not(@SIGIS = 'RESET'))">
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Range" NAME="VECFORMULA" VALUE=""/>
- </xsl:when>
- </xsl:choose>
-
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="{@SIGNAME}" IS_EDITABLE="TRUE"/>
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Direction" NAME="DIR" VALUE="{@DIR}"/>
-
- <xsl:if test="(@SIGIS)">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Class" NAME="SIGIS" VALUE="{@SIGIS}"/>
- </xsl:if>
- <xsl:if test="not(@SIGIS)">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Class" NAME="SIGIS" VALUE="NONE"/>
- </xsl:if>
-
- <xsl:if test="(@SIGIS = 'RST' or @SIGIS = 'RESET')">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Reset Polarity" NAME="RSTPOLARITY" VALUE="{@RSTPOLARITY}"/>
- </xsl:if>
- <xsl:if test="((@SIGIS = 'CLK') or (@SIGIS = 'CLOCK') or (@SIGIS = 'DCMCLK'))">
- <VARIABLE VIEWTYPE="TEXTBOX" VIEWDISP="Frequency(Hz)" NAME="CLKFREQUENCY" VALUE="{@CLKFREQUENCY}"/>
- </xsl:if>
-
- <!-- SENSITIVITY Settings on Interrupt ports -->
- <xsl:choose>
- <xsl:when test="((@SIGNAME = '__NOC__') and ($ext_is_interrupt_ = 'TRUE') and not(@SENSITIVITY))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Sensitivity" NAME="SENSITIVITY" VALUE=""/>
- </xsl:when>
- <xsl:when test="((@SIGNAME = '__NOC__') and ($ext_is_interrupt_ = 'TRUE') and (@SENSITIVITY))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Sensitivity" NAME="SENSITIVITY" VALUE="{@SENSITIVITY}"/>
- </xsl:when>
-
- <xsl:when test="((@SIGNAME = '__DEF__') and ($ext_is_interrupt_ = 'TRUE') and not(@SENSITIVITY))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Sensitivity" NAME="SENSITIVITY" VALUE=""/>
- </xsl:when>
- <xsl:when test="((@SIGNAME = '__DEF__') and ($ext_is_interrupt_ = 'TRUE') and (@SENSITIVITY))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Sensitivity" NAME="SENSITIVITY" VALUE="{@SENSITIVITY}"/>
- </xsl:when>
-
- <xsl:when test="(not(@SIGNAME = '__DEF__') and not(@SIGNAME = '__NOC__') and ($ext_is_interrupt_ = 'TRUE') and not(@SENSITIVITY))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Sensitivity" NAME="SENSITIVITY" VALUE=""/>
- </xsl:when>
-
- <xsl:when test="(not(@SIGNAME = '__DEF__') and not(@SIGNAME = '__NOC__') and ($ext_is_interrupt_ = 'TRUE') and (@SENSITIVITY))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Sensitivity" NAME="SENSITIVITY" VALUE="{@SENSITIVITY}"/>
- </xsl:when>
- </xsl:choose>
- </SET>
- </xsl:for-each>
- </xsl:for-each>
-</xsl:template>
-
-<xsl:template name="WRITE_VIEW_PORT_FLAT_SET">
-
- <xsl:param name="iModRef" select="'__NONE__'"/>
-
- <xsl:variable name="m_inst_" select="$iModRef/@INSTANCE"/>
- <xsl:variable name="m_class_" select="$iModRef/@MODCLASS"/>
- <xsl:variable name="m_type_" select="$iModRef/@MODTYPE"/>
- <xsl:variable name="m_type_lc_" select="translate($m_type_,&UPPER2LOWER;)"/>
- <xsl:variable name="m_version_" select="$iModRef/@HWVERSION"/>
- <xsl:variable name="m_licinfo_" select="$iModRef/LICENSEINFO"/>
-
- <xsl:variable name="is_axi_interconnect_">
- <xsl:choose>
- <xsl:when test="$m_type_ = 'axi_interconnect'">TRUE</xsl:when>
- <xsl:when test="$m_type_lc_ = 'axi_interconnect'">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:for-each select="$G_SYS_MODS"> <!-- To put things in the right scope for the keys below -->
-
- <xsl:variable name="m_bifs_all_" select="key('G_MAP_ALL_BIFS', $m_inst_)"/>
- <xsl:variable name="m_ports_all_" select="key('G_MAP_ALL_PORTS',$m_inst_)"/>
-
- <xsl:if test="$G_DEBUG = 'TRUE'">
- <xsl:message><xsl:value-of select="$m_inst_"/> has <xsl:value-of select="count($m_ports_all_)"/> valid ports </xsl:message>
- </xsl:if>
-
- <xsl:for-each select="$m_ports_all_">
- <xsl:sort data-type="number" select="@MPD_INDEX" order="ascending"/>
- <!-- <xsl:message>PORTNM : <xsl:value-of select="@NAME"/></xsl:message> -->
-
- <xsl:variable name="p_nm_uc_" select="translate(@NAME,&LOWER2UPPER;)"/>
- <xsl:variable name="p_bif_" select="@BUS"/>
-
- <xsl:variable name="port_is_valid_">
- <xsl:choose>
- <xsl:when test="@IS_VALID = 'FALSE'">FALSE</xsl:when>
- <xsl:when test="(($is_axi_interconnect_ = 'TRUE') and ($p_nm_uc_= 'INTERCONNECT_ACLK'))">TRUE</xsl:when>
- <xsl:when test="not(@BUS) or (@BUS and key('G_MAP_ALL_BIFS', $m_inst_)[(@NAME = $p_bif_)])">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:if test="$port_is_valid_ = 'TRUE'">
- <!--
- <xsl:message>PORT <xsl:value-of select="@BUS"/>.<xsl:value-of select="@NAME"/></xsl:message>
- -->
- <SET ID="{@NAME}" CLASS="PORT">
- <!--
- CR452579
- Can only modify INSTANCE name in Hierarchal view.
- -->
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Instance" NAME="INSTANCE" VALUE="{$m_inst_}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Type" NAME="MODTYPE" VALUE="{$m_type_}" VIEWICON="{$m_licinfo_/@ICON_NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="IP Version" NAME="HWVERSION" VALUE="{$m_version_}"/>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Port Name" NAME="NAME" VALUE="{@NAME}"/>
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Direction" NAME="DIR" VALUE="{@DIR}"/>
-
- <xsl:if test="@SIGIS">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Class" NAME="SIGIS" VALUE="{@SIGIS}"/>
- </xsl:if>
-
- <xsl:if test="@VECFORMULA">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Range" NAME="VECFORMULA" VALUE="{@VECFORMULA}"/>
- </xsl:if>
-
- <xsl:if test="@SENSITIVITY">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Sensitivity" NAME="SENSITIVITY" VALUE="{@SENSITIVITY}"/>
- </xsl:if>
-
- <xsl:variable name="is_interrupt">
- <xsl:if test="@SIGIS = 'INTERRUPT'">TRUE</xsl:if>
- <xsl:if test="not(@SIGIS = 'INTERRUPT')">FALSE</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="is_input">
- <xsl:choose>
- <xsl:when test="(@DIR= 'I')">TRUE</xsl:when>
- <xsl:when test="(@DIR= 'IN')">TRUE</xsl:when>
- <xsl:when test="(@DIR= 'INPUT')">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <!-- VECFORMULA Settings if Interrupt settings -->
- <xsl:choose>
-
- <xsl:when test="((@SIGNAME = '__NOC__') and ($is_interrupt = 'TRUE') and ($is_input = 'TRUE') and not(@VECFORMULA))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="No Connection" IS_INTERRUPT="{$is_interrupt}"/>
- </xsl:when>
-
- <xsl:when test="((@SIGNAME = '__NOC__') and ($is_interrupt = 'TRUE') and ($is_input = 'TRUE') and (@VECFORMULA))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="No Connection" IS_INTERRUPT="{$is_interrupt}" IS_RANGE="TRUE"/>
- </xsl:when>
-
- <xsl:when test="@SIGNAME = '__NOC__'">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="No Connection" IS_EDITABLE="TRUE"/>
- </xsl:when>
-
- <xsl:when test="((@SIGNAME = '__DEF__') and ($is_interrupt = 'TRUE') and ($is_input = 'TRUE') and not(@VECFORMULA))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="Default Connection" IS_INTERRUPT="{$is_interrupt}"/>
- </xsl:when>
- <xsl:when test="((@SIGNAME = '__DEF__') and ($is_interrupt = 'TRUE') and ($is_input = 'TRUE') and (@VECFORMULA))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="Default Connection" IS_INTERRUPT="{$is_interrupt}" IS_RANGE="TRUE"/>
- </xsl:when>
- <xsl:when test="@SIGNAME = '__DEF__'">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="Default Connection"/>
- </xsl:when>
-
- <xsl:when test="(not(@SIGNAME = '__DEF__') and not(@SIGNAME = '__NOC__') and ($is_input = 'TRUE') and ($is_interrupt = 'TRUE') and (@VECFORMULA))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="{@SIGNAME}" IS_INTERRUPT="{$is_interrupt}" IS_RANGE="TRUE"/>
- </xsl:when>
- <xsl:when test="(not(@SIGNAME = '__DEF__') and not(@SIGNAME = '__NOC__') and ($is_input = 'TRUE') and ($is_interrupt = 'TRUE'))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="{@SIGNAME}" IS_INTERRUPT="{$is_interrupt}"/>
- </xsl:when>
-
- <xsl:otherwise>
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="{@SIGNAME}" IS_EDITABLE="TRUE"/>
- </xsl:otherwise>
- </xsl:choose>
- </SET>
- </xsl:if> <!-- End of port validity check -->
- </xsl:for-each> <!-- End of Ports Loop -->
- </xsl:for-each>
-</xsl:template>
-
-<xsl:template name="WRITE_PORT_SET">
-
-<xsl:param name="iName" select="'__NONE__'"/>
-<xsl:param name="iDir" select="'__NONE__'"/>
-<xsl:param name="iSigName" select="'__NONE__'"/>
-<xsl:param name="iSigIs" select="'__NONE__'"/>
-<xsl:param name="iVecFormula" select="'__NONE__'"/>
-<xsl:param name="iSensitivity" select="'__NONE__'"/>
-
-<SET ID="{$iName}" CLASS="PORT">
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="NAME" NAME="NAME" VALUE="{$iName}"/>
-
- <xsl:variable name="is_interrupt">
- <xsl:if test="$iSigIs = 'INTERRUPT'">TRUE</xsl:if>
- <xsl:if test="not($iSigIs = 'INTERRUPT')">FALSE</xsl:if>
- </xsl:variable>
-
- <xsl:variable name="is_input">
- <xsl:choose>
- <xsl:when test="($iDir = 'I')">TRUE</xsl:when>
- <xsl:when test="($iDir = 'IN')">TRUE</xsl:when>
- <xsl:when test="($iDir = 'INPUT')">TRUE</xsl:when>
- <xsl:otherwise>FALSE</xsl:otherwise>
- </xsl:choose>
- </xsl:variable>
-
- <xsl:choose>
-
- <xsl:when test="(($iSigName = '__NOC__') and ($is_input = 'TRUE') and ($is_interrupt = 'TRUE') and ($iVecFormula = '__NONE__'))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="No Connection" IS_INTERRUPT="{$is_interrupt}"/>
- </xsl:when>
- <xsl:when test="(($iSigName = '__NOC__') and ($is_input ='TRUE') and ($is_interrupt = 'TRUE') and not($iVecFormula = '__NONE__'))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="No Connection" IS_INTERRUPT="{$is_interrupt}" IS_RANGE="TRUE"/>
- </xsl:when>
- <xsl:when test="$iSigName = '__NOC__'">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="No Connection" IS_EDITABLE="TRUE"/>
- </xsl:when>
-
- <xsl:when test="(($iSigName = '__DEF__') and ($is_input = 'TRUE') and ($is_interrupt = 'TRUE') and ($iVecFormula = '__NONE__'))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="Default Connection" IS_INTERRUPT="{$is_interrupt}"/>
- </xsl:when>
- <xsl:when test="(($iSigName = '__DEF__') and ($is_input = 'TRUE') and ($is_interrupt = 'TRUE') and not($iVecFormula = '__NONE__'))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="Default Connection" IS_INTERRUPT="{$is_interrupt}" IS_RANGE="TRUE"/>
- </xsl:when>
-
- <xsl:when test="($iSigName = '__DEF__')">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="Default Connection"/>
- </xsl:when>
-
- <xsl:when test="(not($iSigName = '__DEF__') and not($iSigName = '__NOC__') and ($is_input ='TRUE') and ($is_interrupt = 'TRUE') and not($iVecFormula = '__NONE__'))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="{$iSigName}" IS_INTERRUPT="{$is_interrupt}" IS_RANGE="TRUE"/>
- </xsl:when>
-
- <xsl:when test="(not($iSigName = '__DEF__') and not($iSigName = '__NOC__') and ($is_input ='TRUE') and ($is_interrupt = 'TRUE'))">
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="{$iSigName}" IS_INTERRUPT="{$is_interrupt}"/>
- </xsl:when>
-
- <xsl:otherwise>
- <VARIABLE VIEWTYPE="DROPDOWN" VIEWDISP="Net" NAME="SIGNAME" VALUE="{$iSigName}" IS_EDITABLE="TRUE"/>
- </xsl:otherwise>
- </xsl:choose>
-
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Direction" NAME="DIR" VALUE="{$iDir}"/>
-
- <xsl:if test="not($iSigIs = '__NONE__')">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Class" NAME="SIGIS" VALUE="{$iSigIs}"/>
- </xsl:if>
-
- <xsl:if test="not($iVecFormula = '__NONE__')">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Range" NAME="VECFORMULA" VALUE="{$iVecFormula}"/>
- </xsl:if>
-
- <xsl:if test="not($iSensitivity = '__NONE__')">
- <VARIABLE VIEWTYPE="STATIC" VIEWDISP="Sensitivity" NAME="SENSITIVITY" VALUE="{$iSensitivity}"/>
- </xsl:if>
-</SET>
-</xsl:template>
-
-
-</xsl:stylesheet>
-
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/gensav_cmd.xml b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/gensav_cmd.xml
deleted file mode 100644
index 42f1efa6ce..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/gensav_cmd.xml
+++ /dev/null
@@ -1,2 +0,0 @@
-
-<SAV MODE="TREE" VIEW="ADDRESS"/>
\ No newline at end of file
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/system.xreport b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/system.xreport
deleted file mode 100644
index 2223369163..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/system.xreport
+++ /dev/null
@@ -1,218 +0,0 @@
-<?xml version='1.0' encoding='UTF-8'?>
-<report-views version="2.0" >
- <header>
- <DateModified>2011-08-27T15:17:50</DateModified>
- <ModuleName>system</ModuleName>
- <SummaryTimeStamp>2011-08-27T15:17:49</SummaryTimeStamp>
- <SavedFilePath>C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/system.xreport</SavedFilePath>
- <FilterFile>filter.filter</FilterFile>
- <SavedFilterFilePath>C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise</SavedFilterFilePath>
- <DateInitialized>2011-08-26T19:44:45</DateInitialized>
- <EnableMessageFiltering>false</EnableMessageFiltering>
- </header>
- <body>
- <viewgroup label="Design Overview" >
- <view inputState="Unknown" program="implementation" ShowPartitionData="false" type="FPGASummary" file="implementation\system_summary.html" label="Summary" >
- <toc-item title="Design Overview" target="Design Overview" />
- <toc-item title="Design Utilization Summary" target="Design Utilization Summary" />
- <toc-item title="Performance Summary" target="Performance Summary" />
- <toc-item title="Failing Constraints" target="Failing Constraints" />
- <toc-item title="Detailed Reports" target="Detailed Reports" />
- </view>
- <view inputState="Unknown" program="implementation" contextTags="FPGA_ONLY" hidden="true" type="HTML" file="implementation\system_envsettings.html" label="System Settings" />
- <view inputState="Translated" program="map" locator="MAP_IOB_TABLE" contextTags="FPGA_ONLY" type="IOBProperties" file="implementation\system_map.xrpt" label="IOB Properties" />
- <view inputState="Translated" program="map" contextTags="FPGA_ONLY" hidden="true" type="Control_Sets" file="implementation\system_map.xrpt" label="Control Set Information" />
- <view inputState="Translated" program="map" locator="MAP_MODULE_HIERARCHY" contextTags="FPGA_ONLY" type="Module_Utilization" file="implementation\system_map.xrpt" label="Module Level Utilization" />
- <view inputState="Mapped" program="par" locator="CONSTRAINT_TABLE" contextTags="FPGA_ONLY" type="ConstraintsData" file="implementation\system.ptwx" label="Timing Constraints" translator="ptwxToTableXML.xslt" />
- <view inputState="Mapped" program="par" locator="PAR_PINOUT_BY_PIN_NUMBER" contextTags="FPGA_ONLY" type="PinoutData" file="implementation\system_par.xrpt" label="Pinout Report" />
- <view inputState="Mapped" program="par" locator="PAR_CLOCK_TABLE" contextTags="FPGA_ONLY" type="ClocksData" file="implementation\system_par.xrpt" label="Clock Report" />
- <view inputState="Mapped" program="par" contextTags="FPGA_ONLY,EDK_OFF" hidden="true" type="Timing_Analyzer" file="implementation\system.twx" label="Static Timing" />
- <view inputState="Translated" program="cpldfit" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="EXTERNAL_HTML" file="implementation\system_html/fit/report.htm" label="CPLD Fitter Report" />
- <view inputState="Fitted" program="taengine" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="EXTERNAL_HTML" file="implementation\system_html/tim/report.htm" label="CPLD Timing Report" />
- </viewgroup>
- <viewgroup label="XPS Errors and Warnings" >
- <view program="platgen" WrapMessages="true" contextTags="EDK_ON" hidden="false" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/platgen.xmsgs" label="Platgen Messages" />
- <view program="libgen" WrapMessages="true" contextTags="EDK_ON" hidden="false" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/libgen.xmsgs" label="Libgen Messages" />
- <view program="simgen" WrapMessages="true" contextTags="EDK_ON" hidden="false" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/simgen.xmsgs" label="Simgen Messages" />
- <view program="bitinit" WrapMessages="true" contextTags="EDK_ON" hidden="false" type="MessageList" hideColumns="Filtered" file="__xps/ise/_xmsgs/bitinit.xmsgs" label="BitInit Messages" />
- </viewgroup>
- <viewgroup label="XPS Reports" >
- <view inputState="PreSynthesized" program="platgen" contextTags="EDK_ON" hidden="false" type="Secondary_Report" file="platgen.log" label="Platgen Log File" />
- <view inputState="PreSynthesized" program="libgen" contextTags="EDK_ON" hidden="false" type="Secondary_Report" file="libgen.log" label="Libgen Log File" />
- <view inputState="PreSynthesized" program="simgen" contextTags="EDK_ON" hidden="false" type="Secondary_Report" file="simgen.log" label="Simgen Log File" />
- <view inputState="PreSynthesized" program="bitinit" contextTags="EDK_ON" hidden="false" type="Secondary_Report" file="bitinit.log" label="BitInit Log File" />
- <view inputState="PreSynthesized" program="system" contextTags="EDK_ON" hidden="false" type="Secondary_Report" file="system.log" label="System Log File" />
- </viewgroup>
- <viewgroup label="Errors and Warnings" >
- <view program="pn" WrapMessages="true" contextTags="EDK_OFF" hidden="true" type="MessageList" hideColumns="Filtered, New" file="implementation\_xmsgs/pn_parser.xmsgs" label="Parser Messages" />
- <view program="xst" WrapMessages="true" contextTags="XST_ONLY,EDK_OFF" hidden="true" type="MessageList" hideColumns="Filtered" file="synthesis\_xmsgs/xst.xmsgs" label="Synthesis Messages" />
- <view inputState="Synthesized" program="ngdbuild" WrapMessages="true" type="MessageList" hideColumns="Filtered" file="implementation\_xmsgs/ngdbuild.xmsgs" label="Translation Messages" />
- <view inputState="Translated" program="map" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="implementation\_xmsgs/map.xmsgs" label="Map Messages" />
- <view inputState="Mapped" program="par" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="implementation\_xmsgs/par.xmsgs" label="Place and Route Messages" />
- <view inputState="Routed" program="trce" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="implementation\_xmsgs/trce.xmsgs" label="Timing Messages" />
- <view inputState="Routed" program="xpwr" WrapMessages="true" contextTags="EDK_OFF" hidden="true" type="MessageList" hideColumns="Filtered" file="implementation\_xmsgs/xpwr.xmsgs" label="Power Messages" />
- <view inputState="Routed" program="bitgen" WrapMessages="true" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="implementation\_xmsgs/bitgen.xmsgs" label="Bitgen Messages" />
- <view inputState="Translated" program="cpldfit" WrapMessages="true" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="MessageList" hideColumns="Filtered" file="implementation\_xmsgs/cpldfit.xmsgs" label="Fitter Messages" />
- <view inputState="Current" program="implementation" WrapMessages="true" fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/map.xmsgs,_xmsgs/par.xmsgs,_xmsgs/trce.xmsgs,_xmsgs/xpwr.xmsgs,_xmsgs/bitgen.xmsgs" contextTags="FPGA_ONLY" type="MessageList" hideColumns="Filtered" file="implementation\_xmsgs/*.xmsgs" label="All Implementation Messages" />
- <view inputState="Current" program="fitting" WrapMessages="true" fileList="_xmsgs/xst.xmsgs,_xmsgs/ngdbuild.xmsgs,_xmsgs/cpldfit.xmsgs,_xmsgs/xpwr.xmsgs" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="CPLD_MessageList" hideColumns="Filtered" file="implementation\_xmsgs/*.xmsgs" label="All Implementation Messages (CPLD)" />
- </viewgroup>
- <viewgroup label="Detailed Reports" >
- <view program="xst" contextTags="XST_ONLY,EDK_OFF" hidden="true" type="Report" file="implementation\system.syr" label="Synthesis Report" >
- <toc-item title="Top of Report" target="Copyright " searchDir="Forward" />
- <toc-item title="Synthesis Options Summary" target=" Synthesis Options Summary " />
- <toc-item title="HDL Compilation" target=" HDL Compilation " />
- <toc-item title="Design Hierarchy Analysis" target=" Design Hierarchy Analysis " />
- <toc-item title="HDL Analysis" target=" HDL Analysis " />
- <toc-item title="HDL Parsing" target=" HDL Parsing " />
- <toc-item title="HDL Elaboration" target=" HDL Elaboration " />
- <toc-item title="HDL Synthesis" target=" HDL Synthesis " />
- <toc-item title="HDL Synthesis Report" target="HDL Synthesis Report" searchCnt="2" searchDir="Backward" subItemLevel="1" />
- <toc-item title="Advanced HDL Synthesis" target=" Advanced HDL Synthesis " searchDir="Backward" />
- <toc-item title="Advanced HDL Synthesis Report" target="Advanced HDL Synthesis Report" subItemLevel="1" />
- <toc-item title="Low Level Synthesis" target=" Low Level Synthesis " />
- <toc-item title="Partition Report" target=" Partition Report " />
- <toc-item title="Final Report" target=" Final Report " />
- <toc-item title="Design Summary" target=" Design Summary " />
- <toc-item title="Primitive and Black Box Usage" target="Primitive and Black Box Usage:" subItemLevel="1" />
- <toc-item title="Device Utilization Summary" target="Device utilization summary:" subItemLevel="1" />
- <toc-item title="Partition Resource Summary" target="Partition Resource Summary:" subItemLevel="1" />
- <toc-item title="Timing Report" target="Timing Report" subItemLevel="1" />
- <toc-item title="Clock Information" target="Clock Information" subItemLevel="2" />
- <toc-item title="Asynchronous Control Signals Information" target="Asynchronous Control Signals Information" subItemLevel="2" />
- <toc-item title="Timing Summary" target="Timing Summary" subItemLevel="2" />
- <toc-item title="Timing Details" target="Timing Details" subItemLevel="2" />
- <toc-item title="Cross Clock Domains Report" target="Cross Clock Domains Report:" subItemLevel="2" />
- </view>
- <view program="synplify" contextTags="SYNPLIFY_ONLY,EDK_OFF" hidden="true" type="Report" file="implementation\system.srr" label="Synplify Report" />
- <view program="precision" contextTags="PRECISION_ONLY,EDK_OFF" hidden="true" type="Report" file="implementation\system.prec_log" label="Precision Report" />
- <view inputState="Synthesized" program="ngdbuild" type="Report" file="implementation\system.bld" label="Translation Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- <toc-item title="Command Line" target="Command Line:" />
- <toc-item title="Partition Status" target="Partition Implementation Status" />
- <toc-item title="Final Summary" target="NGDBUILD Design Results Summary:" />
- </view>
- <view inputState="Translated" program="map" contextTags="FPGA_ONLY" type="Report" file="implementation\system_map.mrp" label="Map Report" >
- <toc-item title="Top of Report" target="Release" searchDir="Forward" />
- <toc-item title="Section 1: Errors" target="Section 1 -" searchDir="Backward" />
- <toc-item title="Section 2: Warnings" target="Section 2 -" searchDir="Backward" />
- <toc-item title="Section 3: Infos" target="Section 3 -" searchDir="Backward" />
- <toc-item title="Section 4: Removed Logic Summary" target="Section 4 -" searchDir="Backward" />
- <toc-item title="Section 5: Removed Logic" target="Section 5 -" searchDir="Backward" />
- <toc-item title="Section 6: IOB Properties" target="Section 6 -" searchDir="Backward" />
- <toc-item title="Section 7: RPMs" target="Section 7 -" searchDir="Backward" />
- <toc-item title="Section 8: Guide Report" target="Section 8 -" searchDir="Backward" />
- <toc-item title="Section 9: Area Group and Partition Summary" target="Section 9 -" searchDir="Backward" />
- <toc-item title="Section 10: Timing Report" target="Section 10 -" searchDir="Backward" />
- <toc-item title="Section 11: Configuration String Details" target="Section 11 -" searchDir="Backward" />
- <toc-item title="Section 12: Control Set Information" target="Section 12 -" searchDir="Backward" />
- <toc-item title="Section 13: Utilization by Hierarchy" target="Section 13 -" searchDir="Backward" />
- </view>
- <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" type="Report" file="implementation\system.par" label="Place and Route Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- <toc-item title="Device Utilization" target="Device Utilization Summary:" />
- <toc-item title="Router Information" target="Starting Router" />
- <toc-item title="Partition Status" target="Partition Implementation Status" />
- <toc-item title="Clock Report" target="Generating Clock Report" />
- <toc-item title="Timing Results" target="Timing Score:" />
- <toc-item title="Final Summary" target="Peak Memory Usage:" />
- </view>
- <view inputState="Routed" program="trce" contextTags="FPGA_ONLY" type="Report" file="implementation\system.twr" label="Post-PAR Static Timing Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- <toc-item title="Timing Report Description" target="Device,package,speed:" />
- <toc-item title="Informational Messages" target="INFO:" />
- <toc-item title="Warning Messages" target="WARNING:" />
- <toc-item title="Timing Constraints" target="Timing constraint:" />
- <toc-item title="Derived Constraint Report" target="Derived Constraint Report" />
- <toc-item title="Data Sheet Report" target="Data Sheet report:" />
- <toc-item title="Timing Summary" target="Timing summary:" />
- <toc-item title="Trace Settings" target="Trace Settings:" />
- </view>
- <view inputState="Translated" program="cpldfit" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="Report" file="implementation\system.rpt" label="CPLD Fitter Report (Text)" >
- <toc-item title="Top of Report" target="cpldfit:" searchDir="Forward" />
- <toc-item title="Resources Summary" target="** Mapped Resource Summary **" />
- <toc-item title="Pin Resources" target="** Pin Resources **" />
- <toc-item title="Global Resources" target="** Global Control Resources **" />
- </view>
- <view inputState="Fitted" program="taengine" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="Report" file="implementation\system.tim" label="CPLD Timing Report (Text)" >
- <toc-item title="Top of Report" target="Performance Summary Report" searchDir="Forward" />
- <toc-item title="Performance Summary" target="Performance Summary:" />
- </view>
- <view inputState="Routed" program="xpwr" contextTags="EDK_OFF" hidden="true" type="Report" file="implementation\system.pwr" label="Power Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- <toc-item title="Power summary" target="Power summary" />
- <toc-item title="Thermal summary" target="Thermal summary" />
- </view>
- <view inputState="Routed" program="bitgen" contextTags="FPGA_ONLY" type="Report" file="implementation\system.bgn" label="Bitgen Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- <toc-item title="Bitgen Options" target="Summary of Bitgen Options:" />
- <toc-item title="Final Summary" target="DRC detected" />
- </view>
- </viewgroup>
- <viewgroup label="Secondary Reports" >
- <view inputState="PreSynthesized" program="isim" hidden="if_missing" type="Secondary_Report" file="implementation\isim.log" label="ISIM Simulator Log" />
- <view inputState="Synthesized" program="netgen" hidden="if_missing" type="Secondary_Report" file="implementation\netgen/synthesis/system_synthesis.nlf" label="Post-Synthesis Simulation Model Report" >
- <toc-item title="Top of Report" target="Release" searchDir="Forward" />
- </view>
- <view inputState="Translated" program="netgen" hidden="if_missing" type="Secondary_Report" file="implementation\netgen/translate/system_translate.nlf" label="Post-Translate Simulation Model Report" >
- <toc-item title="Top of Report" target="Release" searchDir="Forward" />
- </view>
- <view inputState="Translated" program="netgen" hidden="if_missing" type="Secondary_Report" file="implementation\system_tran_fecn.nlf" label="Post-Translate Formality Netlist Report" />
- <view inputState="Translated" program="map" contextTags="FPGA_ONLY" hidden="true" type="Secondary_Report" file="implementation\system_map.map" label="Map Log File" >
- <toc-item title="Top of Report" target="Release" searchDir="Forward" />
- <toc-item title="Design Information" target="Design Information" />
- <toc-item title="Design Summary" target="Design Summary" />
- </view>
- <view inputState="Routed" program="smartxplorer" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\smartxplorer_results/smartxplorer.txt" label="SmartXplorer Report" />
- <view inputState="Mapped" program="trce" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\system_preroute.twr" label="Post-Map Static Timing Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- <toc-item title="Timing Report Description" target="Device,package,speed:" />
- <toc-item title="Informational Messages" target="INFO:" />
- <toc-item title="Warning Messages" target="WARNING:" />
- <toc-item title="Timing Constraints" target="Timing constraint:" />
- <toc-item title="Derived Constraint Report" target="Derived Constraint Report" />
- <toc-item title="Data Sheet Report" target="Data Sheet report:" />
- <toc-item title="Timing Summary" target="Timing summary:" />
- <toc-item title="Trace Settings" target="Trace Settings:" />
- </view>
- <view inputState="Mapped" program="netgen" hidden="if_missing" type="Secondary_Report" file="implementation\netgen/map/system_map.nlf" label="Post-Map Simulation Model Report" />
- <view inputState="Mapped" program="map" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\system_map.psr" label="Physical Synthesis Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- </view>
- <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" hidden="true" type="Pad_Report" file="implementation\system_pad.txt" label="Pad Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- </view>
- <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" hidden="true" type="Secondary_Report" file="implementation\system.unroutes" label="Unroutes Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- </view>
- <view inputState="Mapped" program="map" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\system_preroute.tsi" label="Post-Map Constraints Interaction Report" >
- <toc-item title="Top of Report" target="Release" searchDir="Forward" />
- </view>
- <view inputState="Mapped" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\system.grf" label="Guide Results Report" />
- <view inputState="Routed" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\system.dly" label="Asynchronous Delay Report" />
- <view inputState="Routed" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\system.clk_rgn" label="Clock Region Report" />
- <view inputState="Routed" program="par" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\system.tsi" label="Post-Place and Route Constraints Interaction Report" >
- <toc-item title="Top of Report" target="Copyright (c)" searchDir="Forward" />
- </view>
- <view inputState="Routed" program="netgen" hidden="if_missing" type="Secondary_Report" file="implementation\system_par_fecn.nlf" label="Post-Place and Route Formality Netlist Report" />
- <view inputState="Routed" program="netgen" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\netgen/par/system_timesim.nlf" label="Post-Place and Route Simulation Model Report" />
- <view inputState="Routed" program="netgen" hidden="if_missing" type="Secondary_Report" file="implementation\system_sta.nlf" label="Primetime Netlist Report" >
- <toc-item title="Top of Report" target="Release" searchDir="Forward" />
- </view>
- <view inputState="Routed" program="ibiswriter" hidden="if_missing" type="Secondary_Report" file="implementation\system.ibs" label="IBIS Model" >
- <toc-item title="Top of Report" target="IBIS Models for" searchDir="Forward" />
- <toc-item title="Component" target="Component " />
- </view>
- <view inputState="Routed" program="pin2ucf" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\system.lck" label="Back-annotate Pin Report" >
- <toc-item title="Top of Report" target="pin2ucf Report File" searchDir="Forward" />
- <toc-item title="Constraint Conflicts Information" target="Constraint Conflicts Information" />
- </view>
- <view inputState="Routed" program="pin2ucf" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\system.lpc" label="Locked Pin Constraints" >
- <toc-item title="Top of Report" target="top.lpc" searchDir="Forward" />
- <toc-item title="Newly Added Constraints" target="The following constraints were newly added" />
- </view>
- <view inputState="Translated" program="netgen" contextTags="CPLD_ONLY,EDK_OFF" hidden="true" type="Secondary_Report" file="implementation\netgen/fit/system_timesim.nlf" label="Post-Fit Simulation Model Report" />
- <view inputState="Routed" program="bitgen" contextTags="FPGA_ONLY" hidden="if_missing" type="HTML" file="implementation\usage_statistics_webtalk.html" label="WebTalk Report" />
- <view inputState="Routed" program="bitgen" contextTags="FPGA_ONLY" hidden="if_missing" type="Secondary_Report" file="implementation\webtalk.log" label="WebTalk Log File" />
- </viewgroup>
- </body>
-</report-views>
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/xmsgprops.lst b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/xmsgprops.lst
deleted file mode 100644
index 10c9bb7ac5..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/ise/xmsgprops.lst
+++ /dev/null
@@ -1,3 +0,0 @@
-MessageCaptureEnabled: TRUE
-MessageFilteringEnabled: FALSE
-IncrementalMessagingEnabled: TRUE
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/platgen.opt b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/platgen.opt
deleted file mode 100644
index 14ffabbc85..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/platgen.opt
+++ /dev/null
@@ -1,2 +0,0 @@
- -p xc6slx45tfgg484-3 -lang vhdl$(PROJECT_SEARCHPATHOPT) $(GLOBAL_SEARCHPATHOPT) -msg __xps/ise/xmsgprops.lst
-ethernet Hardware_Evaluation
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/simgen.opt b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/simgen.opt
deleted file mode 100644
index 9fbb0051c7..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/simgen.opt
+++ /dev/null
@@ -1 +0,0 @@
- -p spartan6 -lang vhdl$(PROJECT_SEARCHPATHOPT) $(GLOBAL_SEARCHPATHOPT) -msg __xps/ise/xmsgprops.lst -s isim
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/system.xml b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/system.xml
deleted file mode 100644
index 86498813da..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/system.xml
+++ /dev/null
@@ -1,5757 +0,0 @@
-<EDKSYSTEM EDKVERSION="13.1" EDWVERSION="1.2" TIMESTAMP="Sat Aug 27 15:17:48 2011">
-
- <SYSTEMINFO ARCH="spartan6" DEVICE="xc6slx45t" PACKAGE="fgg484" PART="xc6slx45tfgg484-3" SOURCE="C:/E/Dev/FreeRTOS/WorkingCopy/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.xmp" SPEEDGRADE="-3"/>
-
- <EXTERNALPORTS>
- <PORT DIR="I" MHS_INDEX="0" NAME="RESET" RSTPOLARITY="1" SIGIS="RST" SIGNAME="RESET"/>
- <PORT CLKFREQUENCY="200000000" DIFFPOLARITY="P" DIR="I" MHS_INDEX="1" NAME="CLK_P" SIGIS="CLK" SIGNAME="CLK"/>
- <PORT CLKFREQUENCY="200000000" DIFFPOLARITY="N" DIR="I" MHS_INDEX="2" NAME="CLK_N" SIGIS="CLK" SIGNAME="CLK"/>
- <PORT DIR="O" MHS_INDEX="3" NAME="RS232_Uart_1_sout" SIGNAME="RS232_Uart_1_sout"/>
- <PORT DIR="I" MHS_INDEX="4" NAME="RS232_Uart_1_sin" SIGNAME="RS232_Uart_1_sin"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="5" MSB="3" NAME="LEDs_4Bits_TRI_O" RIGHT="0" SIGNAME="LEDs_4Bits_TRI_O"/>
- <PORT DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MHS_INDEX="6" MSB="3" NAME="Push_Buttons_4Bits_TRI_I" RIGHT="0" SIGNAME="Push_Buttons_4Bits_TRI_I"/>
- <PORT DIR="O" MHS_INDEX="7" NAME="mcbx_dram_clk" SIGNAME="mcbx_dram_clk"/>
- <PORT DIR="O" MHS_INDEX="8" NAME="mcbx_dram_clk_n" SIGNAME="mcbx_dram_clk_n"/>
- <PORT DIR="O" MHS_INDEX="9" NAME="mcbx_dram_cke" SIGNAME="mcbx_dram_cke"/>
- <PORT DIR="O" MHS_INDEX="10" NAME="mcbx_dram_odt" SIGNAME="mcbx_dram_odt"/>
- <PORT DIR="O" MHS_INDEX="11" NAME="mcbx_dram_ras_n" SIGNAME="mcbx_dram_ras_n"/>
- <PORT DIR="O" MHS_INDEX="12" NAME="mcbx_dram_cas_n" SIGNAME="mcbx_dram_cas_n"/>
- <PORT DIR="O" MHS_INDEX="13" NAME="mcbx_dram_we_n" SIGNAME="mcbx_dram_we_n"/>
- <PORT DIR="O" MHS_INDEX="14" NAME="mcbx_dram_udm" SIGNAME="mcbx_dram_udm"/>
- <PORT DIR="O" MHS_INDEX="15" NAME="mcbx_dram_ldm" SIGNAME="mcbx_dram_ldm"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MHS_INDEX="16" MSB="2" NAME="mcbx_dram_ba" RIGHT="0" SIGNAME="mcbx_dram_ba"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="12" LSB="0" MHS_INDEX="17" MSB="12" NAME="mcbx_dram_addr" RIGHT="0" SIGNAME="mcbx_dram_addr"/>
- <PORT DIR="O" MHS_INDEX="18" NAME="mcbx_dram_ddr3_rst" SIGNAME="mcbx_dram_ddr3_rst"/>
- <PORT DIR="IO" ENDIAN="LITTLE" LEFT="15" LSB="0" MHS_INDEX="19" MSB="15" NAME="mcbx_dram_dq" RIGHT="0" SIGNAME="mcbx_dram_dq"/>
- <PORT DIR="IO" MHS_INDEX="20" NAME="mcbx_dram_dqs" SIGNAME="mcbx_dram_dqs"/>
- <PORT DIR="IO" MHS_INDEX="21" NAME="mcbx_dram_dqs_n" SIGNAME="mcbx_dram_dqs_n"/>
- <PORT DIR="IO" MHS_INDEX="22" NAME="mcbx_dram_udqs" SIGNAME="mcbx_dram_udqs"/>
- <PORT DIR="IO" MHS_INDEX="23" NAME="mcbx_dram_udqs_n" SIGNAME="mcbx_dram_udqs_n"/>
- <PORT DIR="IO" MHS_INDEX="24" NAME="rzq" SIGNAME="rzq"/>
- <PORT DIR="IO" MHS_INDEX="25" NAME="zio" SIGNAME="zio"/>
- <PORT DIR="IO" MHS_INDEX="26" NAME="ETHERNET_MDIO" SIGNAME="ETHERNET_MDIO"/>
- <PORT DIR="O" MHS_INDEX="27" NAME="ETHERNET_MDC" SIGNAME="ETHERNET_MDC"/>
- <PORT DIR="O" MHS_INDEX="28" NAME="ETHERNET_TX_ER" SIGNAME="ETHERNET_TX_ER"/>
- <PORT DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="29" MSB="7" NAME="ETHERNET_TXD" RIGHT="0" SIGNAME="ETHERNET_TXD"/>
- <PORT DIR="O" MHS_INDEX="30" NAME="ETHERNET_TX_EN" SIGNAME="ETHERNET_TX_EN"/>
- <PORT DIR="I" MHS_INDEX="31" NAME="ETHERNET_MII_TX_CLK" SIGNAME="ETHERNET_MII_TX_CLK"/>
- <PORT DIR="O" MHS_INDEX="32" NAME="ETHERNET_TX_CLK" SIGNAME="ETHERNET_TX_CLK"/>
- <PORT DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MHS_INDEX="33" MSB="7" NAME="ETHERNET_RXD" RIGHT="0" SIGNAME="ETHERNET_RXD"/>
- <PORT DIR="I" MHS_INDEX="34" NAME="ETHERNET_RX_ER" SIGNAME="ETHERNET_RX_ER"/>
- <PORT DIR="I" MHS_INDEX="35" NAME="ETHERNET_RX_CLK" SIGNAME="ETHERNET_RX_CLK"/>
- <PORT DIR="I" MHS_INDEX="36" NAME="ETHERNET_RX_DV" SIGNAME="ETHERNET_RX_DV"/>
- <PORT DIR="O" MHS_INDEX="37" NAME="ETHERNET_PHY_RST_N" SIGNAME="ETHERNET_PHY_RST_N"/>
- </EXTERNALPORTS>
-
- <MODULES>
- <MODULE BUSSTD="AXI" BUSSTD_PSF="AXI" HWVERSION="1.02.a" INSTANCE="axi4_0" IPTYPE="BUS" IS_CROSSBAR="TRUE" MHS_INDEX="0" MODCLASS="BUS" MODTYPE="axi_interconnect">
- <DESCRIPTION TYPE="SHORT">AXI Interconnect</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">AXI4 Memory-Mapped Interconnect</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_interconnect_v1_02_a/doc/ds768_axi_interconnect.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_BASEFAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_NUM_SLAVE_SLOTS" TYPE="INTEGER" VALUE="5"/>
- <PARAMETER MPD_INDEX="3" NAME="C_NUM_MASTER_SLOTS" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="3"/>
- <PARAMETER MPD_INDEX="5" NAME="C_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="6" NAME="C_AXI_DATA_MAX_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="7" NAME="C_S_AXI_DATA_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020"/>
- <PARAMETER MPD_INDEX="8" NAME="C_M_AXI_DATA_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020"/>
- <PARAMETER MPD_INDEX="9" NAME="C_INTERCONNECT_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="10" NAME="C_S_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
- <PARAMETER MPD_INDEX="11" NAME="C_M_AXI_PROTOCOL" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_M_AXI_BASE_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffffff0000000080000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="13" NAME="C_M_AXI_HIGH_ADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000807fffff"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="14" NAME="C_S_AXI_BASE_ID" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000400000003000000020000000100000000"/>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_THREAD_ID_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
- <PARAMETER MPD_INDEX="16" NAME="C_S_AXI_IS_INTERCONNECT" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_S_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e10005f5e10005f5e10005f5e10005f5e100"/>
- <PARAMETER MPD_INDEX="18" NAME="C_S_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="19" NAME="C_M_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000105f5e100"/>
- <PARAMETER MPD_INDEX="20" NAME="C_M_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="21" NAME="C_INTERCONNECT_ACLK_RATIO" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="22" NAME="C_S_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111110101"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="23" NAME="C_S_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111101111"/>
- <PARAMETER MPD_INDEX="24" NAME="C_M_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="25" NAME="C_M_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="26" NAME="C_AXI_SUPPORTS_USER_SIGNALS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="27" NAME="C_AXI_AWUSER_WIDTH" TYPE="INTEGER" VALUE="5"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="28" NAME="C_AXI_ARUSER_WIDTH" TYPE="INTEGER" VALUE="5"/>
- <PARAMETER MPD_INDEX="29" NAME="C_AXI_WUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="30" NAME="C_AXI_RUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="31" NAME="C_AXI_BUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="32" NAME="C_AXI_CONNECTIVITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x0000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001f"/>
- <PARAMETER MPD_INDEX="33" NAME="C_S_AXI_SINGLE_THREAD" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER MPD_INDEX="34" NAME="C_M_AXI_SUPPORTS_REORDERING" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="35" NAME="C_S_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111100000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="36" NAME="C_M_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111110"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="37" NAME="C_S_AXI_WRITE_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000400000001000000010000000100000020"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="38" NAME="C_S_AXI_READ_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004000000010000000200000002"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="39" NAME="C_M_AXI_WRITE_ISSUING" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="40" NAME="C_M_AXI_READ_ISSUING" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000004"/>
- <PARAMETER MPD_INDEX="41" NAME="C_S_AXI_ARB_PRIORITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
- <PARAMETER MPD_INDEX="42" NAME="C_M_AXI_SECURE" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="43" NAME="C_S_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000020000000000000000000000000000000000"/>
- <PARAMETER MPD_INDEX="44" NAME="C_S_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="45" NAME="C_S_AXI_WRITE_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="46" NAME="C_S_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000200000000000000000000000000"/>
- <PARAMETER MPD_INDEX="47" NAME="C_S_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="48" NAME="C_S_AXI_READ_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER MPD_INDEX="49" NAME="C_M_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
- <PARAMETER MPD_INDEX="50" NAME="C_M_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="51" NAME="C_M_AXI_WRITE_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER MPD_INDEX="52" NAME="C_M_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
- <PARAMETER MPD_INDEX="53" NAME="C_M_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="54" NAME="C_M_AXI_READ_FIFO_DELAY" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="55" NAME="C_S_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="56" NAME="C_S_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="57" NAME="C_S_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="58" NAME="C_S_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="59" NAME="C_S_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000100000001000000010000000100000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="60" NAME="C_M_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="61" NAME="C_M_AXI_AR_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="62" NAME="C_M_AXI_W_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="63" NAME="C_M_AXI_R_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="64" NAME="C_M_AXI_B_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001"/>
- <PARAMETER MPD_INDEX="65" NAME="C_INTERCONNECT_R_REGISTER" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="66" NAME="C_INTERCONNECT_CONNECTIVITY_MODE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="67" NAME="C_USE_CTRL_PORT" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="68" NAME="C_USE_INTERRUPT" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="69" NAME="C_RANGE_CHECK" TYPE="INTEGER" VALUE="2"/>
- <PARAMETER MPD_INDEX="70" NAME="C_S_AXI_CTRL_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER MPD_INDEX="71" NAME="C_S_AXI_CTRL_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="72" NAME="C_S_AXI_CTRL_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="73" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="74" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="75" NAME="C_DEBUG" TYPE="INTEGER" VALUE="0"/>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="S_AXI_CTRL" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="interconnect_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="INTERCONNECT_ARESETN" SIGIS="RST" SIGNAME="proc_sys_reset_0_Interconnect_aresetn"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARESETN" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="2" MSB="4" NAME="S_AXI_ARESET_OUT_N" RIGHT="0" SIGIS="RST" SIGNAME="axi4_0_S_ARESETN" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARESETN" DIR="O" MPD_INDEX="3" NAME="M_AXI_ARESET_OUT_N" SIGIS="RST" SIGNAME="axi4_0_M_ARESETN" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="4" NAME="IRQ" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DEF_SIGNAME="axi4_0_S_ACLK" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="5" MSB="4" NAME="S_AXI_ACLK" RIGHT="0" SIGIS="CLK" SIGNAME="axi4_0_S_ACLK" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWID" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="6" MSB="14" NAME="S_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_S_AWID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="7" MSB="159" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWLEN" DIR="I" ENDIAN="LITTLE" LEFT="39" LSB="0" MPD_INDEX="8" MSB="39" NAME="S_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="9" MSB="14" NAME="S_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWBURST" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="10" MSB="9" NAME="S_AXI_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="11" MSB="9" NAME="S_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4_0_S_AWLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="12" MSB="19" NAME="S_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWPROT" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="13" MSB="14" NAME="S_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWQOS" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="14" MSB="19" NAME="S_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWUSER" DIR="I" ENDIAN="LITTLE" LEFT="24" LSB="0" MPD_INDEX="15" MSB="24" NAME="S_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="16" MSB="4" NAME="S_AXI_AWVALID" RIGHT="0" SIGNAME="axi4_0_S_AWVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_AWREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="17" MSB="4" NAME="S_AXI_AWREADY" RIGHT="0" SIGNAME="axi4_0_S_AWREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="18" MSB="159" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="19" MSB="19" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WLAST" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="20" MSB="4" NAME="S_AXI_WLAST" RIGHT="0" SIGNAME="axi4_0_S_WLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WUSER" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="21" MSB="4" NAME="S_AXI_WUSER" RIGHT="0" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="22" MSB="4" NAME="S_AXI_WVALID" RIGHT="0" SIGNAME="axi4_0_S_WVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_WREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="23" MSB="4" NAME="S_AXI_WREADY" RIGHT="0" SIGNAME="axi4_0_S_WREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BID" DIR="O" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="24" MSB="14" NAME="S_AXI_BID" RIGHT="0" SIGNAME="axi4_0_S_BID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="25" MSB="9" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="26" MSB="4" NAME="S_AXI_BUSER" RIGHT="0" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BVALID" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="27" MSB="4" NAME="S_AXI_BVALID" RIGHT="0" SIGNAME="axi4_0_S_BVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_BREADY" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="28" MSB="4" NAME="S_AXI_BREADY" RIGHT="0" SIGNAME="axi4_0_S_BREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARID" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="29" MSB="14" NAME="S_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_S_ARID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="30" MSB="159" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARLEN" DIR="I" ENDIAN="LITTLE" LEFT="39" LSB="0" MPD_INDEX="31" MSB="39" NAME="S_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="32" MSB="14" NAME="S_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARBURST" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="33" MSB="9" NAME="S_AXI_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="I" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="34" MSB="9" NAME="S_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4_0_S_ARLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="35" MSB="19" NAME="S_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARPROT" DIR="I" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="36" MSB="14" NAME="S_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARQOS" DIR="I" ENDIAN="LITTLE" LEFT="19" LSB="0" MPD_INDEX="37" MSB="19" NAME="S_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARUSER" DIR="I" ENDIAN="LITTLE" LEFT="24" LSB="0" MPD_INDEX="38" MSB="24" NAME="S_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARVALID" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="39" MSB="4" NAME="S_AXI_ARVALID" RIGHT="0" SIGNAME="axi4_0_S_ARVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_ARREADY" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="40" MSB="4" NAME="S_AXI_ARREADY" RIGHT="0" SIGNAME="axi4_0_S_ARREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RID" DIR="O" ENDIAN="LITTLE" LEFT="14" LSB="0" MPD_INDEX="41" MSB="14" NAME="S_AXI_RID" RIGHT="0" SIGNAME="axi4_0_S_RID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="159" LSB="0" MPD_INDEX="42" MSB="159" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="9" LSB="0" MPD_INDEX="43" MSB="9" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RLAST" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="44" MSB="4" NAME="S_AXI_RLAST" RIGHT="0" SIGNAME="axi4_0_S_RLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="45" MSB="4" NAME="S_AXI_RUSER" RIGHT="0" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RVALID" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="46" MSB="4" NAME="S_AXI_RVALID" RIGHT="0" SIGNAME="axi4_0_S_RVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_S_RREADY" DIR="I" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="47" MSB="4" NAME="S_AXI_RREADY" RIGHT="0" SIGNAME="axi4_0_S_RREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ACLK" DIR="I" MPD_INDEX="48" NAME="M_AXI_ACLK" SIGIS="CLK" SIGNAME="axi4_0_M_ACLK" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="49" MSB="2" NAME="M_AXI_AWID" RIGHT="0" SIGNAME="axi4_0_M_AWID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="50" MSB="31" NAME="M_AXI_AWADDR" RIGHT="0" SIGNAME="axi4_0_M_AWADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="51" MSB="7" NAME="M_AXI_AWLEN" RIGHT="0" SIGNAME="axi4_0_M_AWLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="52" MSB="2" NAME="M_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4_0_M_AWSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="53" MSB="1" NAME="M_AXI_AWBURST" RIGHT="0" SIGNAME="axi4_0_M_AWBURST" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWLOCK" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="54" MSB="1" NAME="M_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4_0_M_AWLOCK" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="55" MSB="3" NAME="M_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4_0_M_AWCACHE" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="56" MSB="2" NAME="M_AXI_AWPROT" RIGHT="0" SIGNAME="axi4_0_M_AWPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWREGION" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="57" MSB="3" NAME="M_AXI_AWREGION" RIGHT="0" SIGNAME="axi4_0_M_AWREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="58" MSB="3" NAME="M_AXI_AWQOS" RIGHT="0" SIGNAME="axi4_0_M_AWQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="59" MSB="4" NAME="M_AXI_AWUSER" RIGHT="0" SIGNAME="axi4_0_M_AWUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWVALID" DIR="O" MPD_INDEX="60" NAME="M_AXI_AWVALID" SIGNAME="axi4_0_M_AWVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_AWREADY" DIR="I" MPD_INDEX="61" NAME="M_AXI_AWREADY" SIGNAME="axi4_0_M_AWREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="62" MSB="2" NAME="M_AXI_WID" RIGHT="0" SIGNAME="axi4_0_M_WID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="63" MSB="31" NAME="M_AXI_WDATA" RIGHT="0" SIGNAME="axi4_0_M_WDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="64" MSB="3" NAME="M_AXI_WSTRB" RIGHT="0" SIGNAME="axi4_0_M_WSTRB" VECFORMULA="[(((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WLAST" DIR="O" MPD_INDEX="65" NAME="M_AXI_WLAST" SIGNAME="axi4_0_M_WLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WUSER" DIR="O" MPD_INDEX="66" NAME="M_AXI_WUSER" SIGNAME="axi4_0_M_WUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WVALID" DIR="O" MPD_INDEX="67" NAME="M_AXI_WVALID" SIGNAME="axi4_0_M_WVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_WREADY" DIR="I" MPD_INDEX="68" NAME="M_AXI_WREADY" SIGNAME="axi4_0_M_WREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="69" MSB="2" NAME="M_AXI_BID" RIGHT="0" SIGNAME="axi4_0_M_BID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="70" MSB="1" NAME="M_AXI_BRESP" RIGHT="0" SIGNAME="axi4_0_M_BRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BUSER" DIR="I" MPD_INDEX="71" NAME="M_AXI_BUSER" SIGNAME="axi4_0_M_BUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BVALID" DIR="I" MPD_INDEX="72" NAME="M_AXI_BVALID" SIGNAME="axi4_0_M_BVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_BREADY" DIR="O" MPD_INDEX="73" NAME="M_AXI_BREADY" SIGNAME="axi4_0_M_BREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARID" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="74" MSB="2" NAME="M_AXI_ARID" RIGHT="0" SIGNAME="axi4_0_M_ARID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="75" MSB="31" NAME="M_AXI_ARADDR" RIGHT="0" SIGNAME="axi4_0_M_ARADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="76" MSB="7" NAME="M_AXI_ARLEN" RIGHT="0" SIGNAME="axi4_0_M_ARLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="77" MSB="2" NAME="M_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4_0_M_ARSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="78" MSB="1" NAME="M_AXI_ARBURST" RIGHT="0" SIGNAME="axi4_0_M_ARBURST" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARLOCK" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="79" MSB="1" NAME="M_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4_0_M_ARLOCK" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="80" MSB="3" NAME="M_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4_0_M_ARCACHE" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="81" MSB="2" NAME="M_AXI_ARPROT" RIGHT="0" SIGNAME="axi4_0_M_ARPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARREGION" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="82" MSB="3" NAME="M_AXI_ARREGION" RIGHT="0" SIGNAME="axi4_0_M_ARREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="83" MSB="3" NAME="M_AXI_ARQOS" RIGHT="0" SIGNAME="axi4_0_M_ARQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="84" MSB="4" NAME="M_AXI_ARUSER" RIGHT="0" SIGNAME="axi4_0_M_ARUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARVALID" DIR="O" MPD_INDEX="85" NAME="M_AXI_ARVALID" SIGNAME="axi4_0_M_ARVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_ARREADY" DIR="I" MPD_INDEX="86" NAME="M_AXI_ARREADY" SIGNAME="axi4_0_M_ARREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RID" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="87" MSB="2" NAME="M_AXI_RID" RIGHT="0" SIGNAME="axi4_0_M_RID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="88" MSB="31" NAME="M_AXI_RDATA" RIGHT="0" SIGNAME="axi4_0_M_RDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="89" MSB="1" NAME="M_AXI_RRESP" RIGHT="0" SIGNAME="axi4_0_M_RRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RLAST" DIR="I" MPD_INDEX="90" NAME="M_AXI_RLAST" SIGNAME="axi4_0_M_RLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RUSER" DIR="I" MPD_INDEX="91" NAME="M_AXI_RUSER" SIGNAME="axi4_0_M_RUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RVALID" DIR="I" MPD_INDEX="92" NAME="M_AXI_RVALID" SIGNAME="axi4_0_M_RVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4_0_M_RREADY" DIR="O" MPD_INDEX="93" NAME="M_AXI_RREADY" SIGNAME="axi4_0_M_RREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="94" MSB="31" NAME="S_AXI_CTRL_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="95" NAME="S_AXI_CTRL_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="96" NAME="S_AXI_CTRL_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="97" MSB="31" NAME="S_AXI_CTRL_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="98" NAME="S_AXI_CTRL_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="99" NAME="S_AXI_CTRL_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="100" MSB="1" NAME="S_AXI_CTRL_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1 : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="101" NAME="S_AXI_CTRL_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="102" NAME="S_AXI_CTRL_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="103" MSB="31" NAME="S_AXI_CTRL_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="104" NAME="S_AXI_CTRL_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="105" NAME="S_AXI_CTRL_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="106" MSB="31" NAME="S_AXI_CTRL_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="107" MSB="1" NAME="S_AXI_CTRL_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1 : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="108" NAME="S_AXI_CTRL_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="109" NAME="S_AXI_CTRL_RREADY" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="0" NAME="S_AXI_CTRL" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="interconnect_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE BUSSTD="AXI" BUSSTD_PSF="AXI" HWVERSION="1.02.a" INSTANCE="axi4lite_0" IPTYPE="BUS" MHS_INDEX="1" MODCLASS="BUS" MODTYPE="axi_interconnect">
- <DESCRIPTION TYPE="SHORT">AXI Interconnect</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">AXI4 Memory-Mapped Interconnect</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_interconnect_v1_02_a/doc/ds768_axi_interconnect.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_BASEFAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER MPD_INDEX="2" NAME="C_NUM_SLAVE_SLOTS" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_NUM_MASTER_SLOTS" TYPE="INTEGER" VALUE="8"/>
- <PARAMETER MPD_INDEX="4" NAME="C_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="5" NAME="C_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="6" NAME="C_AXI_DATA_MAX_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="7" NAME="C_S_AXI_DATA_WIDTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020000000200000002000000020"/>
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- <PARAMETER MPD_INDEX="18" NAME="C_S_AXI_IS_ACLK_ASYNC" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="19" NAME="C_M_AXI_ACLK_RATIO" TYPE="STD_LOGIC_VECTOR" VALUE="0x000000010000000100000001000000010000000100000001000000010000000102faf08002faf08005f5e10002faf08002faf08002faf08002faf08002faf080"/>
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- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="21" NAME="C_INTERCONNECT_ACLK_RATIO" TYPE="INTEGER" VALUE="50000000"/>
- <PARAMETER MPD_INDEX="22" NAME="C_S_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="23" NAME="C_S_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="24" NAME="C_M_AXI_SUPPORTS_WRITE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="25" NAME="C_M_AXI_SUPPORTS_READ" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="26" NAME="C_AXI_SUPPORTS_USER_SIGNALS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="27" NAME="C_AXI_AWUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="28" NAME="C_AXI_ARUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
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- <PARAMETER MPD_INDEX="30" NAME="C_AXI_RUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="31" NAME="C_AXI_BUSER_WIDTH" TYPE="INTEGER" VALUE="1"/>
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- <PARAMETER MPD_INDEX="33" NAME="C_S_AXI_SINGLE_THREAD" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER MPD_INDEX="34" NAME="C_M_AXI_SUPPORTS_REORDERING" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="35" NAME="C_S_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111110"/>
- <PARAMETER MPD_INDEX="36" NAME="C_M_AXI_SUPPORTS_NARROW_BURST" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
- <PARAMETER MPD_INDEX="37" NAME="C_S_AXI_WRITE_ACCEPTANCE" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001000000010000000100000001"/>
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- <PARAMETER MPD_INDEX="41" NAME="C_S_AXI_ARB_PRIORITY" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
- <PARAMETER MPD_INDEX="42" NAME="C_M_AXI_SECURE" TYPE="STD_LOGIC_VECTOR" VALUE="0b0000000000000000"/>
- <PARAMETER MPD_INDEX="43" NAME="C_S_AXI_WRITE_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
- <PARAMETER MPD_INDEX="44" NAME="C_S_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
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- <PARAMETER MPD_INDEX="47" NAME="C_S_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
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- <PARAMETER MPD_INDEX="50" NAME="C_M_AXI_WRITE_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
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- <PARAMETER MPD_INDEX="52" NAME="C_M_AXI_READ_FIFO_DEPTH" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000"/>
- <PARAMETER MPD_INDEX="53" NAME="C_M_AXI_READ_FIFO_TYPE" TYPE="STD_LOGIC_VECTOR" VALUE="0b1111111111111111"/>
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- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="55" NAME="C_S_AXI_AW_REGISTER" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000000001"/>
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- <PARAMETER MPD_INDEX="65" NAME="C_INTERCONNECT_R_REGISTER" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="66" NAME="C_INTERCONNECT_CONNECTIVITY_MODE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="67" NAME="C_USE_CTRL_PORT" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="68" NAME="C_USE_INTERRUPT" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="69" NAME="C_RANGE_CHECK" TYPE="INTEGER" VALUE="2"/>
- <PARAMETER MPD_INDEX="70" NAME="C_S_AXI_CTRL_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER MPD_INDEX="71" NAME="C_S_AXI_CTRL_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="72" NAME="C_S_AXI_CTRL_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="73" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="74" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="75" NAME="C_DEBUG" TYPE="INTEGER" VALUE="0"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="INTERCONNECT_ARESETN" SIGIS="RST" SIGNAME="proc_sys_reset_0_Interconnect_aresetn"/>
- <PORT BUS="S_AXI_CTRL" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="INTERCONNECT_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARESETN" DIR="O" MPD_INDEX="2" NAME="S_AXI_ARESET_OUT_N" SIGIS="RST" SIGNAME="axi4lite_0_S_ARESETN" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="3" MSB="7" NAME="M_AXI_ARESET_OUT_N" RIGHT="0" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="4" NAME="IRQ" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ACLK" DIR="I" MPD_INDEX="5" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="axi4lite_0_S_ACLK" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWID" DIR="I" MPD_INDEX="6" NAME="S_AXI_AWID" SIGNAME="axi4lite_0_S_AWID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="7" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_S_AWADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWLEN" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="8" MSB="7" NAME="S_AXI_AWLEN" RIGHT="0" SIGNAME="axi4lite_0_S_AWLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWSIZE" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="9" MSB="2" NAME="S_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4lite_0_S_AWSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWBURST" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="10" MSB="1" NAME="S_AXI_AWBURST" RIGHT="0" SIGNAME="axi4lite_0_S_AWBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWLOCK" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="11" MSB="1" NAME="S_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4lite_0_S_AWLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWCACHE" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="12" MSB="3" NAME="S_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4lite_0_S_AWCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWPROT" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="13" MSB="2" NAME="S_AXI_AWPROT" RIGHT="0" SIGNAME="axi4lite_0_S_AWPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWQOS" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="14" MSB="3" NAME="S_AXI_AWQOS" RIGHT="0" SIGNAME="axi4lite_0_S_AWQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWUSER" DIR="I" MPD_INDEX="15" NAME="S_AXI_AWUSER" SIGNAME="axi4lite_0_S_AWUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWVALID" DIR="I" MPD_INDEX="16" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_S_AWVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_AWREADY" DIR="O" MPD_INDEX="17" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_S_AWREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="18" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_S_WDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="19" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_S_WSTRB" VECFORMULA="[(((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WLAST" DIR="I" MPD_INDEX="20" NAME="S_AXI_WLAST" SIGNAME="axi4lite_0_S_WLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WUSER" DIR="I" MPD_INDEX="21" NAME="S_AXI_WUSER" SIGNAME="axi4lite_0_S_WUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WVALID" DIR="I" MPD_INDEX="22" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_S_WVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_WREADY" DIR="O" MPD_INDEX="23" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_S_WREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BID" DIR="O" MPD_INDEX="24" NAME="S_AXI_BID" SIGNAME="axi4lite_0_S_BID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="25" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_S_BRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BUSER" DIR="O" MPD_INDEX="26" NAME="S_AXI_BUSER" SIGNAME="axi4lite_0_S_BUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BVALID" DIR="O" MPD_INDEX="27" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_S_BVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_BREADY" DIR="I" MPD_INDEX="28" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_S_BREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARID" DIR="I" MPD_INDEX="29" NAME="S_AXI_ARID" SIGNAME="axi4lite_0_S_ARID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="30" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_S_ARADDR" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARLEN" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="31" MSB="7" NAME="S_AXI_ARLEN" RIGHT="0" SIGNAME="axi4lite_0_S_ARLEN" VECFORMULA="[((C_NUM_SLAVE_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARSIZE" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="32" MSB="2" NAME="S_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4lite_0_S_ARSIZE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARBURST" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="33" MSB="1" NAME="S_AXI_ARBURST" RIGHT="0" SIGNAME="axi4lite_0_S_ARBURST" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARLOCK" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="34" MSB="1" NAME="S_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4lite_0_S_ARLOCK" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARCACHE" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="35" MSB="3" NAME="S_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4lite_0_S_ARCACHE" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARPROT" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="36" MSB="2" NAME="S_AXI_ARPROT" RIGHT="0" SIGNAME="axi4lite_0_S_ARPROT" VECFORMULA="[((C_NUM_SLAVE_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARQOS" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="37" MSB="3" NAME="S_AXI_ARQOS" RIGHT="0" SIGNAME="axi4lite_0_S_ARQOS" VECFORMULA="[((C_NUM_SLAVE_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARUSER" DIR="I" MPD_INDEX="38" NAME="S_AXI_ARUSER" SIGNAME="axi4lite_0_S_ARUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARVALID" DIR="I" MPD_INDEX="39" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_S_ARVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_ARREADY" DIR="O" MPD_INDEX="40" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_S_ARREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RID" DIR="O" MPD_INDEX="41" NAME="S_AXI_RID" SIGNAME="axi4lite_0_S_RID" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="42" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_S_RDATA" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="43" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_S_RRESP" VECFORMULA="[((C_NUM_SLAVE_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RLAST" DIR="O" MPD_INDEX="44" NAME="S_AXI_RLAST" SIGNAME="axi4lite_0_S_RLAST" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RUSER" DIR="O" MPD_INDEX="45" NAME="S_AXI_RUSER" SIGNAME="axi4lite_0_S_RUSER" VECFORMULA="[((C_NUM_SLAVE_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RVALID" DIR="O" MPD_INDEX="46" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_S_RVALID" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_S_RREADY" DIR="I" MPD_INDEX="47" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_S_RREADY" VECFORMULA="[(C_NUM_SLAVE_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ACLK" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="48" MSB="7" NAME="M_AXI_ACLK" RIGHT="0" SIGIS="CLK" SIGNAME="axi4lite_0_M_ACLK" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="49" MSB="7" NAME="M_AXI_AWID" RIGHT="0" SIGNAME="axi4lite_0_M_AWID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="255" LSB="0" MPD_INDEX="50" MSB="255" NAME="M_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="63" LSB="0" MPD_INDEX="51" MSB="63" NAME="M_AXI_AWLEN" RIGHT="0" SIGNAME="axi4lite_0_M_AWLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="52" MSB="23" NAME="M_AXI_AWSIZE" RIGHT="0" SIGNAME="axi4lite_0_M_AWSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="53" MSB="15" NAME="M_AXI_AWBURST" RIGHT="0" SIGNAME="axi4lite_0_M_AWBURST" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWLOCK" DIR="O" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="54" MSB="15" NAME="M_AXI_AWLOCK" RIGHT="0" SIGNAME="axi4lite_0_M_AWLOCK" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="55" MSB="31" NAME="M_AXI_AWCACHE" RIGHT="0" SIGNAME="axi4lite_0_M_AWCACHE" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="56" MSB="23" NAME="M_AXI_AWPROT" RIGHT="0" SIGNAME="axi4lite_0_M_AWPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWREGION" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="57" MSB="31" NAME="M_AXI_AWREGION" RIGHT="0" SIGNAME="axi4lite_0_M_AWREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="58" MSB="31" NAME="M_AXI_AWQOS" RIGHT="0" SIGNAME="axi4lite_0_M_AWQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="59" MSB="7" NAME="M_AXI_AWUSER" RIGHT="0" SIGNAME="axi4lite_0_M_AWUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_AWUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="60" MSB="7" NAME="M_AXI_AWVALID" RIGHT="0" SIGNAME="axi4lite_0_M_AWVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="61" MSB="7" NAME="M_AXI_AWREADY" RIGHT="0" SIGNAME="axi4lite_0_M_AWREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="62" MSB="7" NAME="M_AXI_WID" RIGHT="0" SIGNAME="axi4lite_0_M_WID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="255" LSB="0" MPD_INDEX="63" MSB="255" NAME="M_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="64" MSB="31" NAME="M_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[(((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)/8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WLAST" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="65" MSB="7" NAME="M_AXI_WLAST" RIGHT="0" SIGNAME="axi4lite_0_M_WLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WUSER" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="66" MSB="7" NAME="M_AXI_WUSER" RIGHT="0" SIGNAME="axi4lite_0_M_WUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_WUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="67" MSB="7" NAME="M_AXI_WVALID" RIGHT="0" SIGNAME="axi4lite_0_M_WVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="68" MSB="7" NAME="M_AXI_WREADY" RIGHT="0" SIGNAME="axi4lite_0_M_WREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BID" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="69" MSB="7" NAME="M_AXI_BID" RIGHT="0" SIGNAME="axi4lite_0_M_BID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="70" MSB="15" NAME="M_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BUSER" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="71" MSB="7" NAME="M_AXI_BUSER" RIGHT="0" SIGNAME="axi4lite_0_M_BUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_BUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="72" MSB="7" NAME="M_AXI_BVALID" RIGHT="0" SIGNAME="axi4lite_0_M_BVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="73" MSB="7" NAME="M_AXI_BREADY" RIGHT="0" SIGNAME="axi4lite_0_M_BREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="74" MSB="7" NAME="M_AXI_ARID" RIGHT="0" SIGNAME="axi4lite_0_M_ARID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="255" LSB="0" MPD_INDEX="75" MSB="255" NAME="M_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ADDR_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="63" LSB="0" MPD_INDEX="76" MSB="63" NAME="M_AXI_ARLEN" RIGHT="0" SIGNAME="axi4lite_0_M_ARLEN" VECFORMULA="[((C_NUM_MASTER_SLOTS*8)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="77" MSB="23" NAME="M_AXI_ARSIZE" RIGHT="0" SIGNAME="axi4lite_0_M_ARSIZE" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="78" MSB="15" NAME="M_AXI_ARBURST" RIGHT="0" SIGNAME="axi4lite_0_M_ARBURST" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARLOCK" DIR="O" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="79" MSB="15" NAME="M_AXI_ARLOCK" RIGHT="0" SIGNAME="axi4lite_0_M_ARLOCK" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="80" MSB="31" NAME="M_AXI_ARCACHE" RIGHT="0" SIGNAME="axi4lite_0_M_ARCACHE" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="23" LSB="0" MPD_INDEX="81" MSB="23" NAME="M_AXI_ARPROT" RIGHT="0" SIGNAME="axi4lite_0_M_ARPROT" VECFORMULA="[((C_NUM_MASTER_SLOTS*3)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARREGION" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="82" MSB="31" NAME="M_AXI_ARREGION" RIGHT="0" SIGNAME="axi4lite_0_M_ARREGION" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="83" MSB="31" NAME="M_AXI_ARQOS" RIGHT="0" SIGNAME="axi4lite_0_M_ARQOS" VECFORMULA="[((C_NUM_MASTER_SLOTS*4)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="84" MSB="7" NAME="M_AXI_ARUSER" RIGHT="0" SIGNAME="axi4lite_0_M_ARUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ARUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="85" MSB="7" NAME="M_AXI_ARVALID" RIGHT="0" SIGNAME="axi4lite_0_M_ARVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="86" MSB="7" NAME="M_AXI_ARREADY" RIGHT="0" SIGNAME="axi4lite_0_M_ARREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RID" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="87" MSB="7" NAME="M_AXI_RID" RIGHT="0" SIGNAME="axi4lite_0_M_RID" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_ID_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="255" LSB="0" MPD_INDEX="88" MSB="255" NAME="M_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_DATA_MAX_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="15" LSB="0" MPD_INDEX="89" MSB="15" NAME="M_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[((C_NUM_MASTER_SLOTS*2)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RLAST" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="90" MSB="7" NAME="M_AXI_RLAST" RIGHT="0" SIGNAME="axi4lite_0_M_RLAST" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RUSER" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="91" MSB="7" NAME="M_AXI_RUSER" RIGHT="0" SIGNAME="axi4lite_0_M_RUSER" VECFORMULA="[((C_NUM_MASTER_SLOTS*C_AXI_RUSER_WIDTH)-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="92" MSB="7" NAME="M_AXI_RVALID" RIGHT="0" SIGNAME="axi4lite_0_M_RVALID" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="93" MSB="7" NAME="M_AXI_RREADY" RIGHT="0" SIGNAME="axi4lite_0_M_RREADY" VECFORMULA="[(C_NUM_MASTER_SLOTS-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="94" MSB="31" NAME="S_AXI_CTRL_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="95" NAME="S_AXI_CTRL_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="96" NAME="S_AXI_CTRL_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="97" MSB="31" NAME="S_AXI_CTRL_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="98" NAME="S_AXI_CTRL_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="99" NAME="S_AXI_CTRL_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="100" MSB="1" NAME="S_AXI_CTRL_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1 : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="101" NAME="S_AXI_CTRL_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="102" NAME="S_AXI_CTRL_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="103" MSB="31" NAME="S_AXI_CTRL_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="104" NAME="S_AXI_CTRL_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="105" NAME="S_AXI_CTRL_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="106" MSB="31" NAME="S_AXI_CTRL_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH - 1) : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="107" MSB="1" NAME="S_AXI_CTRL_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1 : 0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="108" NAME="S_AXI_CTRL_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="109" NAME="S_AXI_CTRL_RREADY" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="0" NAME="S_AXI_CTRL" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="INTERCONNECT_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="8.10.a" INSTANCE="microblaze_0" IPTYPE="PROCESSOR" MHS_INDEX="2" MODCLASS="PROCESSOR" MODTYPE="microblaze" PROCTYPE="MICROBLAZE">
- <DESCRIPTION TYPE="SHORT">MicroBlaze</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">The MicroBlaze 32 bit soft processor</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/microblaze_v8_10_a/doc/microblaze.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_SCO" TYPE="integer" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_FREQ" TYPE="integer" VALUE="100000000"/>
- <PARAMETER MPD_INDEX="2" NAME="C_DATA_SIZE" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="3" NAME="C_DYNAMIC_BUS_SIZING" TYPE="integer" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="5" NAME="C_INSTANCE" TYPE="string" VALUE="microblaze_0"/>
- <PARAMETER MPD_INDEX="6" NAME="C_FAULT_TOLERANT" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="7" NAME="C_ECC_USE_CE_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="8" NAME="C_ENDIANNESS" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="9" NAME="C_AREA_OPTIMIZED" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="10" NAME="C_OPTIMIZATION" TYPE="integer" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="11" NAME="C_INTERCONNECT" TYPE="integer" VALUE="2"/>
- <PARAMETER MPD_INDEX="12" NAME="C_STREAM_INTERCONNECT" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="13" NAME="C_DPLB_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="14" NAME="C_DPLB_NATIVE_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="15" NAME="C_DPLB_BURST_EN" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="16" NAME="C_DPLB_P2P" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="17" NAME="C_IPLB_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="18" NAME="C_IPLB_NATIVE_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="19" NAME="C_IPLB_BURST_EN" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="20" NAME="C_IPLB_P2P" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="21" NAME="C_M_AXI_DP_SUPPORTS_THREADS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="22" NAME="C_M_AXI_DP_THREAD_ID_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="23" NAME="C_M_AXI_DP_SUPPORTS_READ" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="24" NAME="C_M_AXI_DP_SUPPORTS_WRITE" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="25" NAME="C_M_AXI_DP_SUPPORTS_NARROW_BURST" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="26" NAME="C_M_AXI_DP_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="27" NAME="C_M_AXI_DP_ADDR_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="28" NAME="C_M_AXI_DP_PROTOCOL" TYPE="string" VALUE="AXI4LITE"/>
- <PARAMETER MPD_INDEX="29" NAME="C_M_AXI_DP_EXCLUSIVE_ACCESS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="30" NAME="C_INTERCONNECT_M_AXI_DP_READ_ISSUING" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="31" NAME="C_INTERCONNECT_M_AXI_DP_WRITE_ISSUING" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="32" NAME="C_M_AXI_IP_SUPPORTS_THREADS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="33" NAME="C_M_AXI_IP_THREAD_ID_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="34" NAME="C_M_AXI_IP_SUPPORTS_READ" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="35" NAME="C_M_AXI_IP_SUPPORTS_WRITE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="36" NAME="C_M_AXI_IP_SUPPORTS_NARROW_BURST" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="37" NAME="C_M_AXI_IP_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="38" NAME="C_M_AXI_IP_ADDR_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="39" NAME="C_M_AXI_IP_PROTOCOL" TYPE="string" VALUE="AXI4LITE"/>
- <PARAMETER MPD_INDEX="40" NAME="C_INTERCONNECT_M_AXI_IP_READ_ISSUING" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="41" NAME="C_D_AXI" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="42" NAME="C_D_PLB" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="43" NAME="C_D_LMB" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="44" NAME="C_I_AXI" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="45" NAME="C_I_PLB" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="46" NAME="C_I_LMB" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="47" NAME="C_USE_MSR_INSTR" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="48" NAME="C_USE_PCMP_INSTR" TYPE="integer" VALUE="1"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="49" NAME="C_USE_BARREL" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="50" NAME="C_USE_DIV" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="51" NAME="C_USE_HW_MUL" TYPE="integer" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="52" NAME="C_USE_FPU" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="53" NAME="C_UNALIGNED_EXCEPTIONS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="54" NAME="C_ILL_OPCODE_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="55" NAME="C_M_AXI_I_BUS_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="56" NAME="C_M_AXI_D_BUS_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="57" NAME="C_IPLB_BUS_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="58" NAME="C_DPLB_BUS_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="59" NAME="C_DIV_ZERO_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="60" NAME="C_FPU_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="61" NAME="C_FSL_EXCEPTION" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="62" NAME="C_USE_STACK_PROTECTION" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="63" NAME="C_PVR" TYPE="integer" VALUE="0"/>
- <PARAMETER ENDIAN="BIG" LSB="7" MPD_INDEX="64" MSB="0" NAME="C_PVR_USER1" TYPE="std_logic_vector" VALUE="0x00"/>
- <PARAMETER ENDIAN="BIG" LSB="31" MPD_INDEX="65" MSB="0" NAME="C_PVR_USER2" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="66" NAME="C_DEBUG_ENABLED" TYPE="integer" VALUE="1"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="29" MPD_INDEX="67" NAME="C_NUMBER_OF_PC_BRK" TYPE="integer" VALUE="7"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="31" MPD_INDEX="68" NAME="C_NUMBER_OF_RD_ADDR_BRK" TYPE="integer" VALUE="2"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="30" MPD_INDEX="69" NAME="C_NUMBER_OF_WR_ADDR_BRK" TYPE="integer" VALUE="2"/>
- <PARAMETER MPD_INDEX="70" NAME="C_INTERRUPT_IS_EDGE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="71" NAME="C_EDGE_IS_POSITIVE" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="72" NAME="C_RESET_MSR" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="73" NAME="C_OPCODE_0x0_ILLEGAL" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="74" NAME="C_FSL_LINKS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="75" NAME="C_FSL_DATA_SIZE" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="76" NAME="C_USE_EXTENDED_FSL_INSTR" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="77" NAME="C_M0_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="78" NAME="C_S0_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="79" NAME="C_M1_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="80" NAME="C_S1_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="81" NAME="C_M2_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="82" NAME="C_S2_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="83" NAME="C_M3_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="84" NAME="C_S3_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="85" NAME="C_M4_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="86" NAME="C_S4_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="87" NAME="C_M5_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="88" NAME="C_S5_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="89" NAME="C_M6_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="90" NAME="C_S6_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="91" NAME="C_M7_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="92" NAME="C_S7_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="93" NAME="C_M8_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="94" NAME="C_S8_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="95" NAME="C_M9_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="96" NAME="C_S9_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="97" NAME="C_M10_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="98" NAME="C_S10_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="99" NAME="C_M11_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="100" NAME="C_S11_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="101" NAME="C_M12_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="102" NAME="C_S12_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="103" NAME="C_M13_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="104" NAME="C_S13_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="105" NAME="C_M14_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="106" NAME="C_S14_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="107" NAME="C_M15_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="108" NAME="C_S15_AXIS_PROTOCOL" TYPE="string" VALUE="GENERIC"/>
- <PARAMETER MPD_INDEX="109" NAME="C_M0_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="110" NAME="C_S0_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="111" NAME="C_M1_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="112" NAME="C_S1_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="113" NAME="C_M2_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="114" NAME="C_S2_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="115" NAME="C_M3_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="116" NAME="C_S3_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="117" NAME="C_M4_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="118" NAME="C_S4_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="119" NAME="C_M5_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="120" NAME="C_S5_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="121" NAME="C_M6_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="122" NAME="C_S6_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="123" NAME="C_M7_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="124" NAME="C_S7_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="125" NAME="C_M8_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="126" NAME="C_S8_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="127" NAME="C_M9_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="128" NAME="C_S9_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="129" NAME="C_M10_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="130" NAME="C_S10_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="131" NAME="C_M11_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="132" NAME="C_S11_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="133" NAME="C_M12_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="134" NAME="C_S12_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="135" NAME="C_M13_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="136" NAME="C_S13_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="137" NAME="C_M14_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="138" NAME="C_S14_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="139" NAME="C_M15_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="140" NAME="C_S15_AXIS_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="141" NAME="C_ICACHE_BASEADDR" TYPE="std_logic_vector" VALUE="0xc0000000"/>
- <PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="142" NAME="C_ICACHE_HIGHADDR" TYPE="std_logic_vector" VALUE="0xc7ffffff"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="143" NAME="C_USE_ICACHE" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="144" NAME="C_ALLOW_ICACHE_WR" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="145" NAME="C_ADDR_TAG_BITS" TYPE="integer" VALUE="17"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="32" MPD_INDEX="146" NAME="C_CACHE_BYTE_SIZE" TYPE="integer" VALUE="16384"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="147" NAME="C_ICACHE_USE_FSL" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="148" NAME="C_ICACHE_LINE_LEN" TYPE="integer" VALUE="4"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="149" NAME="C_ICACHE_ALWAYS_USED" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="150" NAME="C_ICACHE_INTERFACE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="151" NAME="C_ICACHE_VICTIMS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="152" NAME="C_ICACHE_STREAMS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="153" NAME="C_ICACHE_FORCE_TAG_LUTRAM" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="154" NAME="C_ICACHE_DATA_WIDTH" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="155" NAME="C_M_AXI_IC_SUPPORTS_THREADS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="156" NAME="C_M_AXI_IC_THREAD_ID_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="157" NAME="C_M_AXI_IC_SUPPORTS_READ" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="158" NAME="C_M_AXI_IC_SUPPORTS_WRITE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="159" NAME="C_M_AXI_IC_SUPPORTS_NARROW_BURST" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="160" NAME="C_M_AXI_IC_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="161" NAME="C_M_AXI_IC_ADDR_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="162" NAME="C_M_AXI_IC_PROTOCOL" TYPE="string" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="163" NAME="C_M_AXI_IC_USER_VALUE" TYPE="integer" VALUE="0b11111"/>
- <PARAMETER MPD_INDEX="164" NAME="C_M_AXI_IC_SUPPORTS_USER_SIGNALS" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="165" NAME="C_M_AXI_IC_AWUSER_WIDTH" TYPE="integer" VALUE="5"/>
- <PARAMETER MPD_INDEX="166" NAME="C_M_AXI_IC_ARUSER_WIDTH" TYPE="integer" VALUE="5"/>
- <PARAMETER MPD_INDEX="167" NAME="C_M_AXI_IC_WUSER_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="168" NAME="C_M_AXI_IC_RUSER_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="169" NAME="C_M_AXI_IC_BUSER_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="170" NAME="C_INTERCONNECT_M_AXI_IC_READ_ISSUING" TYPE="integer" VALUE="2"/>
- <PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="171" NAME="C_DCACHE_BASEADDR" TYPE="std_logic_vector" VALUE="0xc0000000"/>
- <PARAMETER ADDRESS="NONE" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="172" NAME="C_DCACHE_HIGHADDR" TYPE="std_logic_vector" VALUE="0xc7ffffff"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="173" NAME="C_USE_DCACHE" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="174" NAME="C_ALLOW_DCACHE_WR" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="175" NAME="C_DCACHE_ADDR_TAG" TYPE="integer" VALUE="17"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="33" MPD_INDEX="176" NAME="C_DCACHE_BYTE_SIZE" TYPE="integer" VALUE="16384"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="177" NAME="C_DCACHE_USE_FSL" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="178" NAME="C_DCACHE_LINE_LEN" TYPE="integer" VALUE="4"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="179" NAME="C_DCACHE_ALWAYS_USED" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="180" NAME="C_DCACHE_INTERFACE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="181" NAME="C_DCACHE_USE_WRITEBACK" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="182" NAME="C_DCACHE_VICTIMS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="183" NAME="C_DCACHE_FORCE_TAG_LUTRAM" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="184" NAME="C_DCACHE_DATA_WIDTH" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="185" NAME="C_M_AXI_DC_SUPPORTS_THREADS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="186" NAME="C_M_AXI_DC_THREAD_ID_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="187" NAME="C_M_AXI_DC_SUPPORTS_READ" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="188" NAME="C_M_AXI_DC_SUPPORTS_WRITE" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="189" NAME="C_M_AXI_DC_SUPPORTS_NARROW_BURST" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="190" NAME="C_M_AXI_DC_DATA_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="191" NAME="C_M_AXI_DC_ADDR_WIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="192" NAME="C_M_AXI_DC_PROTOCOL" TYPE="string" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="193" NAME="C_M_AXI_DC_EXCLUSIVE_ACCESS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="194" NAME="C_M_AXI_DC_USER_VALUE" TYPE="integer" VALUE="0b11111"/>
- <PARAMETER MPD_INDEX="195" NAME="C_M_AXI_DC_SUPPORTS_USER_SIGNALS" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="196" NAME="C_M_AXI_DC_AWUSER_WIDTH" TYPE="integer" VALUE="5"/>
- <PARAMETER MPD_INDEX="197" NAME="C_M_AXI_DC_ARUSER_WIDTH" TYPE="integer" VALUE="5"/>
- <PARAMETER MPD_INDEX="198" NAME="C_M_AXI_DC_WUSER_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="199" NAME="C_M_AXI_DC_RUSER_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="200" NAME="C_M_AXI_DC_BUSER_WIDTH" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="201" NAME="C_INTERCONNECT_M_AXI_DC_READ_ISSUING" TYPE="integer" VALUE="2"/>
- <PARAMETER MPD_INDEX="202" NAME="C_INTERCONNECT_M_AXI_DC_WRITE_ISSUING" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="203" NAME="C_USE_MMU" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="204" NAME="C_MMU_DTLB_SIZE" TYPE="integer" VALUE="4"/>
- <PARAMETER MPD_INDEX="205" NAME="C_MMU_ITLB_SIZE" TYPE="integer" VALUE="2"/>
- <PARAMETER MPD_INDEX="206" NAME="C_MMU_TLB_ACCESS" TYPE="integer" VALUE="3"/>
- <PARAMETER MPD_INDEX="207" NAME="C_MMU_ZONES" TYPE="integer" VALUE="16"/>
- <PARAMETER MPD_INDEX="208" NAME="C_MMU_PRIVILEGED_INSTR" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="209" NAME="C_USE_INTERRUPT" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="210" NAME="C_USE_EXT_BRK" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="211" NAME="C_USE_EXT_NM_BRK" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="212" NAME="C_USE_BRANCH_TARGET_CACHE" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="213" NAME="C_BRANCH_TARGET_CACHE_SIZE" TYPE="integer" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="14" NAME="C_INTERCONNECT_M_AXI_DC_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="15" NAME="C_INTERCONNECT_M_AXI_DC_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="16" NAME="C_INTERCONNECT_M_AXI_DP_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="17" NAME="C_INTERCONNECT_M_AXI_DP_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="18" NAME="C_INTERCONNECT_M_AXI_DP_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="19" NAME="C_INTERCONNECT_M_AXI_DP_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="20" NAME="C_INTERCONNECT_M_AXI_DP_B_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="21" NAME="C_INTERCONNECT_M_AXI_DC_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="22" NAME="C_INTERCONNECT_M_AXI_DC_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="23" NAME="C_INTERCONNECT_M_AXI_DC_B_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="24" NAME="C_INTERCONNECT_M_AXI_IC_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="25" NAME="C_INTERCONNECT_M_AXI_IC_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="26" NAME="C_INTERCONNECT_M_AXI_IC_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="27" NAME="C_INTERCONNECT_M_AXI_IC_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="28" NAME="C_INTERCONNECT_M_AXI_IC_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="2" NAME="MB_RESET" SIGIS="RST" SIGNAME="proc_sys_reset_0_MB_Reset"/>
- <PORT BUS="DPLB:IPLB:DLMB:ILMB:M_AXI_DP:M_AXI_IP:M_AXI_DC:M_AXI_IC" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="CLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="3" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="microblaze_0_interrupt"/>
- <PORT BUS="DLMB:ILMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_Rst" DIR="I" MPD_INDEX="1" NAME="RESET" SIGIS="RST" SIGNAME="microblaze_0_dlmb_LMB_Rst"/>
- <PORT DEF_SIGNAME="Ext_BRK" DIR="I" MPD_INDEX="4" NAME="EXT_BRK" SIGNAME="Ext_BRK"/>
- <PORT DEF_SIGNAME="Ext_NM_BRK" DIR="I" MPD_INDEX="5" NAME="EXT_NM_BRK" SIGNAME="Ext_NM_BRK"/>
- <PORT DIR="I" MPD_INDEX="6" NAME="DBG_STOP" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="7" NAME="MB_Halted" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="8" NAME="MB_Error" SIGNAME="__NOC__"/>
- <PORT BUS="ILMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_ReadDBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="9" MSB="0" NAME="INSTR" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_ReadDBus" VECFORMULA="[0:31]"/>
- <PORT BUS="ILMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_Ready" DIR="I" MPD_INDEX="10" NAME="IREADY" SIGNAME="microblaze_0_ilmb_LMB_Ready"/>
- <PORT BUS="ILMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_Wait" DIR="I" MPD_INDEX="11" NAME="IWAIT" SIGNAME="microblaze_0_ilmb_LMB_Wait"/>
- <PORT BUS="ILMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_CE" DIR="I" MPD_INDEX="12" NAME="ICE" SIGNAME="microblaze_0_ilmb_LMB_CE"/>
- <PORT BUS="ILMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_UE" DIR="I" MPD_INDEX="13" NAME="IUE" SIGNAME="microblaze_0_ilmb_LMB_UE"/>
- <PORT BUS="ILMB" DEF_SIGNAME="microblaze_0_ilmb_M_ABus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="14" MSB="0" NAME="INSTR_ADDR" RIGHT="31" SIGNAME="microblaze_0_ilmb_M_ABus" VECFORMULA="[0:31]"/>
- <PORT BUS="ILMB" DEF_SIGNAME="microblaze_0_ilmb_M_ReadStrobe" DIR="O" MPD_INDEX="15" NAME="IFETCH" SIGNAME="microblaze_0_ilmb_M_ReadStrobe"/>
- <PORT BUS="ILMB" DEF_SIGNAME="microblaze_0_ilmb_M_AddrStrobe" DIR="O" MPD_INDEX="16" NAME="I_AS" SIGNAME="microblaze_0_ilmb_M_AddrStrobe"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="17" NAME="IPLB_M_ABort" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="18" MSB="0" NAME="IPLB_M_ABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="19" MSB="0" NAME="IPLB_M_UABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="20" MSB="0" NAME="IPLB_M_BE" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:(C_IPLB_DWIDTH-1)/8]"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="21" NAME="IPLB_M_busLock" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="22" NAME="IPLB_M_lockErr" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="23" MSB="0" NAME="IPLB_M_MSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="24" MSB="0" NAME="IPLB_M_priority" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="25" NAME="IPLB_M_rdBurst" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="26" NAME="IPLB_M_request" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="27" NAME="IPLB_M_RNW" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="28" MSB="0" NAME="IPLB_M_size" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="15" MPD_INDEX="29" MSB="0" NAME="IPLB_M_TAttribute" RIGHT="15" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="2" MPD_INDEX="30" MSB="0" NAME="IPLB_M_type" RIGHT="2" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="IPLB_M_wrBurst" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="32" MSB="0" NAME="IPLB_M_wrDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:C_IPLB_DWIDTH-1]"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="33" NAME="IPLB_MBusy" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="34" NAME="IPLB_MRdErr" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="35" NAME="IPLB_MWrErr" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="36" NAME="IPLB_MIRQ" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="37" NAME="IPLB_MWrBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="IPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="38" NAME="IPLB_MWrDAck" SIGNAME="__NOC__"/>
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- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_BVALID" DIR="I" MPD_INDEX="143" NAME="M_AXI_DP_BVALID" SIGNAME="axi4lite_0_S_BVALID"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_BREADY" DIR="O" MPD_INDEX="144" NAME="M_AXI_DP_BREADY" SIGNAME="axi4lite_0_S_BREADY"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARID" DIR="O" MPD_INDEX="145" NAME="M_AXI_DP_ARID" SIGNAME="axi4lite_0_S_ARID" VECFORMULA="[(C_M_AXI_DP_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="146" MSB="31" NAME="M_AXI_DP_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_S_ARADDR" VECFORMULA="[(C_M_AXI_DP_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="147" MSB="7" NAME="M_AXI_DP_ARLEN" RIGHT="0" SIGNAME="axi4lite_0_S_ARLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="148" MSB="2" NAME="M_AXI_DP_ARSIZE" RIGHT="0" SIGNAME="axi4lite_0_S_ARSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="149" MSB="1" NAME="M_AXI_DP_ARBURST" RIGHT="0" SIGNAME="axi4lite_0_S_ARBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARLOCK" DIR="O" MPD_INDEX="150" NAME="M_AXI_DP_ARLOCK" SIGNAME="axi4lite_0_S_ARLOCK"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="151" MSB="3" NAME="M_AXI_DP_ARCACHE" RIGHT="0" SIGNAME="axi4lite_0_S_ARCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="152" MSB="2" NAME="M_AXI_DP_ARPROT" RIGHT="0" SIGNAME="axi4lite_0_S_ARPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="153" MSB="3" NAME="M_AXI_DP_ARQOS" RIGHT="0" SIGNAME="axi4lite_0_S_ARQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARVALID" DIR="O" MPD_INDEX="154" NAME="M_AXI_DP_ARVALID" SIGNAME="axi4lite_0_S_ARVALID"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_ARREADY" DIR="I" MPD_INDEX="155" NAME="M_AXI_DP_ARREADY" SIGNAME="axi4lite_0_S_ARREADY"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RID" DIR="I" MPD_INDEX="156" NAME="M_AXI_DP_RID" SIGNAME="axi4lite_0_S_RID" VECFORMULA="[(C_M_AXI_DP_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="157" MSB="31" NAME="M_AXI_DP_RDATA" RIGHT="0" SIGNAME="axi4lite_0_S_RDATA" VECFORMULA="[(C_M_AXI_DP_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="158" MSB="1" NAME="M_AXI_DP_RRESP" RIGHT="0" SIGNAME="axi4lite_0_S_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RLAST" DIR="I" MPD_INDEX="159" NAME="M_AXI_DP_RLAST" SIGNAME="axi4lite_0_S_RLAST"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RVALID" DIR="I" MPD_INDEX="160" NAME="M_AXI_DP_RVALID" SIGNAME="axi4lite_0_S_RVALID"/>
- <PORT BUS="M_AXI_DP" DEF_SIGNAME="axi4lite_0_S_RREADY" DIR="O" MPD_INDEX="161" NAME="M_AXI_DP_RREADY" SIGNAME="axi4lite_0_S_RREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWID" DIR="O" MPD_INDEX="162" NAME="M_AXI_IC_AWID" SIGNAME="axi4_0_S_AWID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="163" MSB="31" NAME="M_AXI_IC_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[(C_M_AXI_IC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="164" MSB="7" NAME="M_AXI_IC_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="165" MSB="2" NAME="M_AXI_IC_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="166" MSB="1" NAME="M_AXI_IC_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="O" MPD_INDEX="167" NAME="M_AXI_IC_AWLOCK" SIGNAME="axi4_0_S_AWLOCK"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="168" MSB="3" NAME="M_AXI_IC_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="169" MSB="2" NAME="M_AXI_IC_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="170" MSB="3" NAME="M_AXI_IC_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="171" NAME="M_AXI_IC_AWVALID" SIGNAME="axi4_0_S_AWVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="172" NAME="M_AXI_IC_AWREADY" SIGNAME="axi4_0_S_AWREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="173" MSB="4" NAME="M_AXI_IC_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[(C_M_AXI_IC_AWUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="174" MSB="31" NAME="M_AXI_IC_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="175" MSB="3" NAME="M_AXI_IC_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[((C_M_AXI_IC_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="176" NAME="M_AXI_IC_WLAST" SIGNAME="axi4_0_S_WLAST"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="177" NAME="M_AXI_IC_WVALID" SIGNAME="axi4_0_S_WVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="178" NAME="M_AXI_IC_WREADY" SIGNAME="axi4_0_S_WREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_WUSER" DIR="O" MPD_INDEX="179" NAME="M_AXI_IC_WUSER" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[(C_M_AXI_IC_WUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BID" DIR="I" MPD_INDEX="180" NAME="M_AXI_IC_BID" SIGNAME="axi4_0_S_BID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="181" MSB="1" NAME="M_AXI_IC_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="182" NAME="M_AXI_IC_BVALID" SIGNAME="axi4_0_S_BVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="183" NAME="M_AXI_IC_BREADY" SIGNAME="axi4_0_S_BREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_BUSER" DIR="I" MPD_INDEX="184" NAME="M_AXI_IC_BUSER" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[(C_M_AXI_IC_BUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARID" DIR="O" MPD_INDEX="185" NAME="M_AXI_IC_ARID" SIGNAME="axi4_0_S_ARID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="186" MSB="31" NAME="M_AXI_IC_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[(C_M_AXI_IC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="187" MSB="7" NAME="M_AXI_IC_ARLEN" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="188" MSB="2" NAME="M_AXI_IC_ARSIZE" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="189" MSB="1" NAME="M_AXI_IC_ARBURST" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARLOCK" DIR="O" MPD_INDEX="190" NAME="M_AXI_IC_ARLOCK" SIGNAME="axi4_0_S_ARLOCK"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="191" MSB="3" NAME="M_AXI_IC_ARCACHE" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="192" MSB="2" NAME="M_AXI_IC_ARPROT" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="193" MSB="3" NAME="M_AXI_IC_ARQOS" RIGHT="0" SIGNAME="axi4_0_S_ARQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="194" NAME="M_AXI_IC_ARVALID" SIGNAME="axi4_0_S_ARVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="195" NAME="M_AXI_IC_ARREADY" SIGNAME="axi4_0_S_ARREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_ARUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="196" MSB="4" NAME="M_AXI_IC_ARUSER" RIGHT="0" SIGNAME="axi4_0_S_ARUSER" VECFORMULA="[(C_M_AXI_IC_ARUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RID" DIR="I" MPD_INDEX="197" NAME="M_AXI_IC_RID" SIGNAME="axi4_0_S_RID" VECFORMULA="[(C_M_AXI_IC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="198" MSB="31" NAME="M_AXI_IC_RDATA" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[(C_M_AXI_IC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="199" MSB="1" NAME="M_AXI_IC_RRESP" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="200" NAME="M_AXI_IC_RLAST" SIGNAME="axi4_0_S_RLAST"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="201" NAME="M_AXI_IC_RVALID" SIGNAME="axi4_0_S_RVALID"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="202" NAME="M_AXI_IC_RREADY" SIGNAME="axi4_0_S_RREADY"/>
- <PORT BUS="M_AXI_IC" DEF_SIGNAME="axi4_0_S_RUSER" DIR="I" MPD_INDEX="203" NAME="M_AXI_IC_RUSER" SIGNAME="axi4_0_S_RUSER" VECFORMULA="[(C_M_AXI_IC_RUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWID" DIR="O" MPD_INDEX="204" NAME="M_AXI_DC_AWID" SIGNAME="axi4_0_S_AWID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="205" MSB="31" NAME="M_AXI_DC_AWADDR" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="206" MSB="7" NAME="M_AXI_DC_AWLEN" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="207" MSB="2" NAME="M_AXI_DC_AWSIZE" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="208" MSB="1" NAME="M_AXI_DC_AWBURST" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWLOCK" DIR="O" MPD_INDEX="209" NAME="M_AXI_DC_AWLOCK" SIGNAME="axi4_0_S_AWLOCK"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="210" MSB="3" NAME="M_AXI_DC_AWCACHE" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="211" MSB="2" NAME="M_AXI_DC_AWPROT" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWQOS" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="212" MSB="3" NAME="M_AXI_DC_AWQOS" RIGHT="0" SIGNAME="axi4_0_S_AWQOS" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="213" NAME="M_AXI_DC_AWVALID" SIGNAME="axi4_0_S_AWVALID"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="214" NAME="M_AXI_DC_AWREADY" SIGNAME="axi4_0_S_AWREADY"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_AWUSER" DIR="O" ENDIAN="LITTLE" LEFT="4" LSB="0" MPD_INDEX="215" MSB="4" NAME="M_AXI_DC_AWUSER" RIGHT="0" SIGNAME="axi4_0_S_AWUSER" VECFORMULA="[(C_M_AXI_DC_AWUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="216" MSB="31" NAME="M_AXI_DC_WDATA" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[(C_M_AXI_DC_DATA_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="217" MSB="3" NAME="M_AXI_DC_WSTRB" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[((C_M_AXI_DC_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="218" NAME="M_AXI_DC_WLAST" SIGNAME="axi4_0_S_WLAST"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="219" NAME="M_AXI_DC_WVALID" SIGNAME="axi4_0_S_WVALID"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="220" NAME="M_AXI_DC_WREADY" SIGNAME="axi4_0_S_WREADY"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_WUSER" DIR="O" MPD_INDEX="221" NAME="M_AXI_DC_WUSER" SIGNAME="axi4_0_S_WUSER" VECFORMULA="[(C_M_AXI_DC_WUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BID" DIR="I" MPD_INDEX="222" NAME="M_AXI_DC_BID" SIGNAME="axi4_0_S_BID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="223" MSB="1" NAME="M_AXI_DC_BRESP" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="224" NAME="M_AXI_DC_BVALID" SIGNAME="axi4_0_S_BVALID"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="225" NAME="M_AXI_DC_BREADY" SIGNAME="axi4_0_S_BREADY"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_BUSER" DIR="I" MPD_INDEX="226" NAME="M_AXI_DC_BUSER" SIGNAME="axi4_0_S_BUSER" VECFORMULA="[(C_M_AXI_DC_BUSER_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARID" DIR="O" MPD_INDEX="227" NAME="M_AXI_DC_ARID" SIGNAME="axi4_0_S_ARID" VECFORMULA="[(C_M_AXI_DC_THREAD_ID_WIDTH-1):0]"/>
- <PORT BUS="M_AXI_DC" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="228" MSB="31" NAME="M_AXI_DC_ARADDR" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[(C_M_AXI_DC_ADDR_WIDTH-1):0]"/>
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- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_ABort"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_ABus"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_UABus"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_BE"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_busLock"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_lockErr"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_MSize"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_priority"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_rdBurst"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_request"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_RNW"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_size"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_TAttribute"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_type"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_wrBurst"/>
- <PORTMAP DIR="O" PHYSICAL="DPLB_M_wrDBus"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MBusy"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MRdErr"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MWrErr"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MIRQ"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MWrBTerm"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MWrDAck"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MAddrAck"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MRdBTerm"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MRdDAck"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MRdDBus"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MRdWdAddr"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MRearbitrate"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MSSize"/>
- <PORTMAP DIR="I" PHYSICAL="DPLB_MTimeout"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_INSTRUCTION="TRUE" IS_VALID="FALSE" MPD_INDEX="3" NAME="IPLB" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_ABort"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_ABus"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_UABus"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_BE"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_busLock"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_lockErr"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_MSize"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_priority"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_rdBurst"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_request"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_RNW"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_size"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_TAttribute"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_type"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_wrBurst"/>
- <PORTMAP DIR="O" PHYSICAL="IPLB_M_wrDBus"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MBusy"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MRdErr"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MWrErr"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MIRQ"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MWrBTerm"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MWrDAck"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MAddrAck"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MRdBTerm"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MRdDAck"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MRdDBus"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MRdWdAddr"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MRearbitrate"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MSSize"/>
- <PORTMAP DIR="I" PHYSICAL="IPLB_MTimeout"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_dlmb" BUSSTD="LMB" BUSSTD_PSF="LMB" IS_DATA="TRUE" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="0" NAME="DLMB" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="I" PHYSICAL="RESET"/>
- <PORTMAP DIR="I" PHYSICAL="DATA_READ"/>
- <PORTMAP DIR="I" PHYSICAL="DREADY"/>
- <PORTMAP DIR="I" PHYSICAL="DWAIT"/>
- <PORTMAP DIR="I" PHYSICAL="DCE"/>
- <PORTMAP DIR="I" PHYSICAL="DUE"/>
- <PORTMAP DIR="O" PHYSICAL="DATA_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="DATA_ADDR"/>
- <PORTMAP DIR="O" PHYSICAL="D_AS"/>
- <PORTMAP DIR="O" PHYSICAL="READ_STROBE"/>
- <PORTMAP DIR="O" PHYSICAL="WRITE_STROBE"/>
- <PORTMAP DIR="O" PHYSICAL="BYTE_ENABLE"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_ilmb" BUSSTD="LMB" BUSSTD_PSF="LMB" IS_INSTANTIATED="TRUE" IS_INSTRUCTION="TRUE" MHS_INDEX="3" MPD_INDEX="1" NAME="ILMB" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="I" PHYSICAL="RESET"/>
- <PORTMAP DIR="I" PHYSICAL="INSTR"/>
- <PORTMAP DIR="I" PHYSICAL="IREADY"/>
- <PORTMAP DIR="I" PHYSICAL="IWAIT"/>
- <PORTMAP DIR="I" PHYSICAL="ICE"/>
- <PORTMAP DIR="I" PHYSICAL="IUE"/>
- <PORTMAP DIR="O" PHYSICAL="INSTR_ADDR"/>
- <PORTMAP DIR="O" PHYSICAL="IFETCH"/>
- <PORTMAP DIR="O" PHYSICAL="I_AS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_DATA="TRUE" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="4" NAME="M_AXI_DP" PROTOCOL="AXI4LITE" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_AWVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_AWREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_WDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_WSTRB"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_WLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_WVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_WREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_BID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_BRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_BVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_BREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_ARVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_ARREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_RID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_RDATA"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_RRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_RLAST"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DP_RVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DP_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTRUCTION="TRUE" MPD_INDEX="5" NAME="M_AXI_IP" PROTOCOL="AXI4LITE" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_AWVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_AWREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_WDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_WSTRB"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_WLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_WVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_WREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_BID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_BRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_BVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_BREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_ARVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_ARREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RDATA"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RLAST"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IP_RVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IP_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_DATA="TRUE" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="104" NAME="M_AXI_DC" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_AWREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_AWUSER"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WSTRB"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_WUSER"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_BID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_BRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_BVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_BUSER"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_ARUSER"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RDATA"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RLAST"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_DC_RREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_DC_RUSER"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" IS_INSTRUCTION="TRUE" MHS_INDEX="5" MPD_INDEX="105" NAME="M_AXI_IC" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="CLK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_AWREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_AWUSER"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WSTRB"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_WUSER"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_BID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_BRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_BVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_BUSER"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARADDR"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARLEN"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARSIZE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARBURST"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARLOCK"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARCACHE"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARPROT"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARQOS"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_ARUSER"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RID"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RDATA"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RRESP"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RLAST"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RVALID"/>
- <PORTMAP DIR="O" PHYSICAL="M_AXI_IC_RREADY"/>
- <PORTMAP DIR="I" PHYSICAL="M_AXI_IC_RUSER"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_debug" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="106" NAME="DEBUG" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="DBG_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_TDI"/>
- <PORTMAP DIR="O" PHYSICAL="DBG_TDO"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_REG_EN"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_SHIFT"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_CAPTURE"/>
- <PORTMAP DIR="I" PHYSICAL="DBG_UPDATE"/>
- <PORTMAP DIR="I" PHYSICAL="DEBUG_RST"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MBTRACE2" MPD_INDEX="107" NAME="TRACE" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Trace_Instruction"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Valid_Instr"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_PC"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Reg_Write"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Reg_Addr"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_MSR_Reg"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_PID_Reg"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_New_Reg_Value"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Exception_Taken"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Exception_Kind"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Jump_Taken"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Delay_Slot"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Address"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Access"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Read"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Write"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Write_Value"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Data_Byte_Enable"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_DCache_Req"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_DCache_Hit"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_DCache_Rdy"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_DCache_Read"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_ICache_Req"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_ICache_Hit"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_ICache_Rdy"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_OF_PipeRun"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_EX_PipeRun"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_MEM_PipeRun"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_MB_Halted"/>
- <PORTMAP DIR="O" PHYSICAL="Trace_Jump_Hit"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="6" NAME="SFSL0" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL0_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="38" NAME="DRFSL0" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL0_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="7" NAME="MFSL0" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="39" NAME="DWFSL0" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL0_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL0_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="8" NAME="SFSL1" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL1_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="40" NAME="DRFSL1" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL1_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="9" NAME="MFSL1" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="41" NAME="DWFSL1" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL1_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL1_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="10" NAME="SFSL2" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL2_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="42" NAME="DRFSL2" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL2_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="11" NAME="MFSL2" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="43" NAME="DWFSL2" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL2_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL2_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="12" NAME="SFSL3" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL3_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="44" NAME="DRFSL3" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL3_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="13" NAME="MFSL3" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="45" NAME="DWFSL3" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL3_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL3_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="14" NAME="SFSL4" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL4_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="46" NAME="DRFSL4" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL4_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="15" NAME="MFSL4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="47" NAME="DWFSL4" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL4_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL4_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="16" NAME="SFSL5" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL5_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="48" NAME="DRFSL5" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL5_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="17" NAME="MFSL5" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="49" NAME="DWFSL5" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL5_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL5_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="18" NAME="SFSL6" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL6_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="50" NAME="DRFSL6" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL6_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="19" NAME="MFSL6" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="51" NAME="DWFSL6" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL6_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL6_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="20" NAME="SFSL7" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL7_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="52" NAME="DRFSL7" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL7_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="21" NAME="MFSL7" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="53" NAME="DWFSL7" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL7_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL7_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="22" NAME="SFSL8" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL8_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="54" NAME="DRFSL8" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL8_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="23" NAME="MFSL8" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="55" NAME="DWFSL8" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL8_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL8_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="24" NAME="SFSL9" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL9_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="56" NAME="DRFSL9" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL9_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="25" NAME="MFSL9" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="57" NAME="DWFSL9" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL9_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL9_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="26" NAME="SFSL10" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL10_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="58" NAME="DRFSL10" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL10_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="27" NAME="MFSL10" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="59" NAME="DWFSL10" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL10_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL10_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="28" NAME="SFSL11" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL11_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="60" NAME="DRFSL11" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL11_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="29" NAME="MFSL11" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="61" NAME="DWFSL11" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL11_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL11_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="30" NAME="SFSL12" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL12_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="62" NAME="DRFSL12" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL12_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="31" NAME="MFSL12" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="63" NAME="DWFSL12" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL12_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL12_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="32" NAME="SFSL13" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL13_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="64" NAME="DRFSL13" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL13_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="33" NAME="MFSL13" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="65" NAME="DWFSL13" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL13_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL13_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="34" NAME="SFSL14" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL14_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="66" NAME="DRFSL14" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL14_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="35" NAME="MFSL14" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="67" NAME="DWFSL14" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL14_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL14_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="36" NAME="SFSL15" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL15_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DRFSL" IS_VALID="FALSE" MPD_INDEX="68" NAME="DRFSL15" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL15_S_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_S_READ"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_S_EXISTS"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="FSL" BUSSTD_PSF="FSL" IS_VALID="FALSE" MPD_INDEX="37" NAME="MFSL15" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_DWFSL" IS_VALID="FALSE" MPD_INDEX="69" NAME="DWFSL15" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="FSL15_M_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="FSL15_M_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="70" NAME="M0_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M0_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M0_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M0_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M0_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="71" NAME="S0_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S0_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S0_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S0_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S0_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="72" NAME="M1_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M1_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M1_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M1_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M1_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="73" NAME="S1_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S1_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S1_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S1_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S1_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="74" NAME="M2_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M2_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M2_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M2_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M2_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="75" NAME="S2_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S2_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S2_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S2_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S2_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="76" NAME="M3_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M3_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M3_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M3_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M3_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="77" NAME="S3_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S3_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S3_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S3_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S3_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="78" NAME="M4_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M4_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M4_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M4_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M4_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="79" NAME="S4_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S4_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S4_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S4_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S4_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="80" NAME="M5_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M5_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M5_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M5_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M5_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="81" NAME="S5_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S5_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S5_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S5_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S5_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="82" NAME="M6_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M6_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M6_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M6_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M6_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="83" NAME="S6_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S6_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S6_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S6_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S6_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="84" NAME="M7_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M7_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M7_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M7_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M7_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="85" NAME="S7_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S7_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S7_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S7_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S7_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="86" NAME="M8_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M8_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M8_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M8_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M8_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="87" NAME="S8_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S8_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S8_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S8_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S8_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="88" NAME="M9_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M9_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M9_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M9_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M9_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="89" NAME="S9_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S9_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S9_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S9_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S9_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="90" NAME="M10_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M10_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M10_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M10_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M10_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="91" NAME="S10_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S10_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S10_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S10_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S10_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="92" NAME="M11_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M11_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M11_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M11_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M11_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="93" NAME="S11_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S11_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S11_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S11_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S11_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="94" NAME="M12_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M12_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M12_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M12_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M12_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="95" NAME="S12_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S12_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S12_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S12_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S12_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="96" NAME="M13_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M13_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M13_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M13_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M13_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="97" NAME="S13_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S13_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S13_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S13_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S13_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="98" NAME="M14_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M14_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M14_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M14_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M14_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="99" NAME="S14_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S14_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S14_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S14_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S14_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="100" NAME="M15_AXIS" PROTOCOL="GENERIC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="M15_AXIS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="M15_AXIS_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="M15_AXIS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="M15_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="101" NAME="S15_AXIS" PROTOCOL="GENERIC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S15_AXIS_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="S15_AXIS_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S15_AXIS_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S15_AXIS_TREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_INSTRUCTION="TRUE" IS_VALID="FALSE" MPD_INDEX="103" NAME="IXCL" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_IN_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_IN_READ"/>
- <PORTMAP DIR="I" PHYSICAL="ICACHE_FSL_IN_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="ICACHE_FSL_IN_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="ICACHE_FSL_IN_EXISTS"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_OUT_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_OUT_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_OUT_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="ICACHE_FSL_OUT_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="ICACHE_FSL_OUT_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MEMORY_CHANNEL" IS_DATA="TRUE" IS_VALID="FALSE" MPD_INDEX="102" NAME="DXCL" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_IN_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_IN_READ"/>
- <PORTMAP DIR="I" PHYSICAL="DCACHE_FSL_IN_DATA"/>
- <PORTMAP DIR="I" PHYSICAL="DCACHE_FSL_IN_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="DCACHE_FSL_IN_EXISTS"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_OUT_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_OUT_WRITE"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_OUT_DATA"/>
- <PORTMAP DIR="O" PHYSICAL="DCACHE_FSL_OUT_CONTROL"/>
- <PORTMAP DIR="I" PHYSICAL="DCACHE_FSL_OUT_FULL"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" INSTANCE="microblaze_0_d_bram_ctrl" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="microblaze_0_dlmb"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" INSTANCE="microblaze_0_i_bram_ctrl" IS_DATA="FALSE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8192" SIZEABRV="8K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="microblaze_0_ilmb"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480FFFF" INSTANCE="debug_module" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1080033280" BASENAME="C_BASEADDR" BASEVALUE="0x40600000" HIGHDECIMAL="1080098815" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4060ffff" INSTANCE="RS232_Uart_1" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1073872896" BASENAME="C_BASEADDR" BASEVALUE="0x40020000" HIGHDECIMAL="1073938431" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4002ffff" INSTANCE="LEDs_4Bits" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1073741824" BASENAME="C_BASEADDR" BASEVALUE="0x40000000" HIGHDECIMAL="1073807359" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4000ffff" INSTANCE="Push_Buttons_4Bits" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1092878336" BASENAME="C_BASEADDR" BASEVALUE="0x41240000" HIGHDECIMAL="1093140479" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4127ffff" INSTANCE="ETHERNET" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="262144" SIZEABRV="256K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1105199104" BASENAME="C_BASEADDR" BASEVALUE="0x41e00000" HIGHDECIMAL="1105264639" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41e0ffff" INSTANCE="ETHERNET_dma" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1092616192" BASENAME="C_BASEADDR" BASEVALUE="0x41200000" HIGHDECIMAL="1092681727" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4120ffff" INSTANCE="microblaze_0_intc" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="1103101952" BASENAME="C_BASEADDR" BASEVALUE="0x41c00000" HIGHDECIMAL="1103167487" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41c0ffff" INSTANCE="axi_timer_0" IS_DATA="TRUE" IS_INSTRUCTION="FALSE" IS_VALID="TRUE" MEMTYPE="REGISTER" SIZE="65536" SIZEABRV="64K">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4lite_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2155872255" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x807FFFFF" INSTANCE="MCB_DDR3" IS_DATA="TRUE" IS_INSTRUCTION="TRUE" IS_VALID="TRUE" MEMTYPE="MEMORY" SIZE="8388608" SIZEABRV="8M">
- <ACCESSROUTE>
- <ROUTEPNT INDEX="0" INSTANCE="axi4_0"/>
- </ACCESSROUTE>
- </MEMRANGE>
- </MEMORYMAP>
- <PERIPHERALS>
- <PERIPHERAL INSTANCE="microblaze_0_d_bram_ctrl"/>
- <PERIPHERAL INSTANCE="microblaze_0_i_bram_ctrl"/>
- <PERIPHERAL INSTANCE="debug_module"/>
- <PERIPHERAL INSTANCE="RS232_Uart_1"/>
- <PERIPHERAL INSTANCE="LEDs_4Bits"/>
- <PERIPHERAL INSTANCE="Push_Buttons_4Bits"/>
- <PERIPHERAL INSTANCE="ETHERNET"/>
- <PERIPHERAL INSTANCE="ETHERNET_dma"/>
- <PERIPHERAL INSTANCE="microblaze_0_intc"/>
- <PERIPHERAL INSTANCE="axi_timer_0"/>
- <PERIPHERAL INSTANCE="MCB_DDR3"/>
- </PERIPHERALS>
- <INTERRUPTINFO TYPE="TARGET">
- <SOURCE INSTANCE="microblaze_0_intc" INTC_INDEX="0"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE BUSSTD="LMB" BUSSTD_PSF="LMB" HWVERSION="2.00.a" INSTANCE="microblaze_0_ilmb" IPTYPE="BUS" MHS_INDEX="3" MODCLASS="BUS" MODTYPE="lmb_v10">
- <DESCRIPTION TYPE="SHORT">Local Memory Bus (LMB) 1.0</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">'The LMB is a fast, local bus for connecting MicroBlaze I and D ports to peripherals and BRAM'</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v2_00_a/doc/lmb_v10.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_LMB_NUM_SLAVES" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="1" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="2" NAME="C_LMB_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="3" NAME="C_EXT_RESET_HIGH" TYPE="integer" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="SYS_RST" SIGNAME="proc_sys_reset_0_BUS_STRUCT_RESET"/>
- <PORT CLKFREQUENCY="100000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="LMB_CLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_Rst" DIR="O" MPD_INDEX="2" NAME="LMB_Rst" SIGNAME="microblaze_0_ilmb_LMB_Rst"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_ABus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="3" MSB="0" NAME="M_ABus" RIGHT="31" SIGNAME="microblaze_0_ilmb_M_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_ReadStrobe" DIR="I" MPD_INDEX="4" NAME="M_ReadStrobe" SIGNAME="microblaze_0_ilmb_M_ReadStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_WriteStrobe" DIR="I" MPD_INDEX="5" NAME="M_WriteStrobe" SIGNAME="microblaze_0_ilmb_M_WriteStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_AddrStrobe" DIR="I" MPD_INDEX="6" NAME="M_AddrStrobe" SIGNAME="microblaze_0_ilmb_M_AddrStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_DBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="7" MSB="0" NAME="M_DBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_M_DBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_M_BE" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="8" MSB="0" NAME="M_BE" RIGHT="3" SIGNAME="microblaze_0_ilmb_M_BE" VECFORMULA="[0:(C_LMB_DWIDTH+7)/8-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_DBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="9" MSB="0" NAME="Sl_DBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_Sl_DBus" VECFORMULA="[0:(C_LMB_DWIDTH*C_LMB_NUM_SLAVES)-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_Ready" DIR="I" MPD_INDEX="10" NAME="Sl_Ready" SIGNAME="microblaze_0_ilmb_Sl_Ready" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_Wait" DIR="I" MPD_INDEX="11" NAME="Sl_Wait" SIGNAME="microblaze_0_ilmb_Sl_Wait" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_UE" DIR="I" MPD_INDEX="12" NAME="Sl_UE" SIGNAME="microblaze_0_ilmb_Sl_UE" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_Sl_CE" DIR="I" MPD_INDEX="13" NAME="Sl_CE" SIGNAME="microblaze_0_ilmb_Sl_CE" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_ABus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="14" MSB="0" NAME="LMB_ABus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_ReadStrobe" DIR="O" MPD_INDEX="15" NAME="LMB_ReadStrobe" SIGNAME="microblaze_0_ilmb_LMB_ReadStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_WriteStrobe" DIR="O" MPD_INDEX="16" NAME="LMB_WriteStrobe" SIGNAME="microblaze_0_ilmb_LMB_WriteStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_AddrStrobe" DIR="O" MPD_INDEX="17" NAME="LMB_AddrStrobe" SIGNAME="microblaze_0_ilmb_LMB_AddrStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_ReadDBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="18" MSB="0" NAME="LMB_ReadDBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_ReadDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_WriteDBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="19" MSB="0" NAME="LMB_WriteDBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_WriteDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_Ready" DIR="O" MPD_INDEX="20" NAME="LMB_Ready" SIGNAME="microblaze_0_ilmb_LMB_Ready"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_Wait" DIR="O" MPD_INDEX="21" NAME="LMB_Wait" SIGNAME="microblaze_0_ilmb_LMB_Wait"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_UE" DIR="O" MPD_INDEX="22" NAME="LMB_UE" SIGNAME="microblaze_0_ilmb_LMB_UE"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_CE" DIR="O" MPD_INDEX="23" NAME="LMB_CE" SIGNAME="microblaze_0_ilmb_LMB_CE"/>
- <PORT DEF_SIGNAME="microblaze_0_ilmb_LMB_BE" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="24" MSB="0" NAME="LMB_BE" RIGHT="3" SIGNAME="microblaze_0_ilmb_LMB_BE" VECFORMULA="[0:(C_LMB_DWIDTH+7)/8-1]"/>
- </PORTS>
- <BUSINTERFACES/>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
- </IOINTERFACES>
- </MODULE>
- <MODULE BUSSTD="LMB" BUSSTD_PSF="LMB" HWVERSION="2.00.a" INSTANCE="microblaze_0_dlmb" IPTYPE="BUS" MHS_INDEX="4" MODCLASS="BUS" MODTYPE="lmb_v10">
- <DESCRIPTION TYPE="SHORT">Local Memory Bus (LMB) 1.0</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">'The LMB is a fast, local bus for connecting MicroBlaze I and D ports to peripherals and BRAM'</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_v10_v2_00_a/doc/lmb_v10.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_LMB_NUM_SLAVES" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="1" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="2" NAME="C_LMB_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="3" NAME="C_EXT_RESET_HIGH" TYPE="integer" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="SYS_RST" SIGNAME="proc_sys_reset_0_BUS_STRUCT_RESET"/>
- <PORT CLKFREQUENCY="100000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="LMB_CLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_Rst" DIR="O" MPD_INDEX="2" NAME="LMB_Rst" SIGNAME="microblaze_0_dlmb_LMB_Rst"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_ABus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="3" MSB="0" NAME="M_ABus" RIGHT="31" SIGNAME="microblaze_0_dlmb_M_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_ReadStrobe" DIR="I" MPD_INDEX="4" NAME="M_ReadStrobe" SIGNAME="microblaze_0_dlmb_M_ReadStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_WriteStrobe" DIR="I" MPD_INDEX="5" NAME="M_WriteStrobe" SIGNAME="microblaze_0_dlmb_M_WriteStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_AddrStrobe" DIR="I" MPD_INDEX="6" NAME="M_AddrStrobe" SIGNAME="microblaze_0_dlmb_M_AddrStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_DBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="7" MSB="0" NAME="M_DBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_M_DBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_M_BE" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="8" MSB="0" NAME="M_BE" RIGHT="3" SIGNAME="microblaze_0_dlmb_M_BE" VECFORMULA="[0:(C_LMB_DWIDTH+7)/8-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_DBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="9" MSB="0" NAME="Sl_DBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_Sl_DBus" VECFORMULA="[0:(C_LMB_DWIDTH*C_LMB_NUM_SLAVES)-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_Ready" DIR="I" MPD_INDEX="10" NAME="Sl_Ready" SIGNAME="microblaze_0_dlmb_Sl_Ready" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_Wait" DIR="I" MPD_INDEX="11" NAME="Sl_Wait" SIGNAME="microblaze_0_dlmb_Sl_Wait" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_UE" DIR="I" MPD_INDEX="12" NAME="Sl_UE" SIGNAME="microblaze_0_dlmb_Sl_UE" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_Sl_CE" DIR="I" MPD_INDEX="13" NAME="Sl_CE" SIGNAME="microblaze_0_dlmb_Sl_CE" VECFORMULA="[0:C_LMB_NUM_SLAVES-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_ABus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="14" MSB="0" NAME="LMB_ABus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_ReadStrobe" DIR="O" MPD_INDEX="15" NAME="LMB_ReadStrobe" SIGNAME="microblaze_0_dlmb_LMB_ReadStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_WriteStrobe" DIR="O" MPD_INDEX="16" NAME="LMB_WriteStrobe" SIGNAME="microblaze_0_dlmb_LMB_WriteStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_AddrStrobe" DIR="O" MPD_INDEX="17" NAME="LMB_AddrStrobe" SIGNAME="microblaze_0_dlmb_LMB_AddrStrobe"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_ReadDBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="18" MSB="0" NAME="LMB_ReadDBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_ReadDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_WriteDBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="19" MSB="0" NAME="LMB_WriteDBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_WriteDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_Ready" DIR="O" MPD_INDEX="20" NAME="LMB_Ready" SIGNAME="microblaze_0_dlmb_LMB_Ready"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_Wait" DIR="O" MPD_INDEX="21" NAME="LMB_Wait" SIGNAME="microblaze_0_dlmb_LMB_Wait"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_UE" DIR="O" MPD_INDEX="22" NAME="LMB_UE" SIGNAME="microblaze_0_dlmb_LMB_UE"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_CE" DIR="O" MPD_INDEX="23" NAME="LMB_CE" SIGNAME="microblaze_0_dlmb_LMB_CE"/>
- <PORT DEF_SIGNAME="microblaze_0_dlmb_LMB_BE" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="24" MSB="0" NAME="LMB_BE" RIGHT="3" SIGNAME="microblaze_0_dlmb_LMB_BE" VECFORMULA="[0:(C_LMB_DWIDTH+7)/8-1]"/>
- </PORTS>
- <BUSINTERFACES/>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
- </IOINTERFACES>
- </MODULE>
- <MODULE HWVERSION="3.00.a" INSTANCE="microblaze_0_i_bram_ctrl" IPTYPE="PERIPHERAL" MHS_INDEX="5" MODCLASS="MEMORY_CNTLR" MODTYPE="lmb_bram_if_cntlr">
- <DESCRIPTION TYPE="SHORT">LMB BRAM Controller</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller connects to an lmb bus</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v3_00_a/doc/lmb_bram_if_cntlr.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="2" MPD_INDEX="0" MSB="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00001FFF"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
- <PARAMETER ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0x00800000"/>
- <PARAMETER MPD_INDEX="4" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="5" NAME="C_LMB_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="6" NAME="C_ECC" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="7" NAME="C_INTERCONNECT" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="8" NAME="C_FAULT_INJECT" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="9" NAME="C_CE_FAILING_REGISTERS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="10" NAME="C_UE_FAILING_REGISTERS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="11" NAME="C_ECC_STATUS_REGISTERS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="12" NAME="C_ECC_ONOFF_REGISTER" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="13" NAME="C_ECC_ONOFF_RESET_VALUE" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="14" NAME="C_CE_COUNTER_WIDTH" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="15" NAME="C_WRITE_ACCESS" TYPE="integer" VALUE="2"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="16" NAME="C_SPLB_CTRL_BASEADDR" TYPE="std_logic_vector" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="17" NAME="C_SPLB_CTRL_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="18" NAME="C_SPLB_CTRL_AWIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="19" NAME="C_SPLB_CTRL_DWIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="20" NAME="C_SPLB_CTRL_P2P" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="21" NAME="C_SPLB_CTRL_MID_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="22" NAME="C_SPLB_CTRL_NUM_MASTERS" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="23" NAME="C_SPLB_CTRL_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="24" NAME="C_SPLB_CTRL_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="25" NAME="C_SPLB_CTRL_CLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER MPD_INDEX="26" NAME="C_S_AXI_CTRL_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="27" NAME="C_S_AXI_CTRL_BASEADDR" TYPE="std_logic_vector" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="28" NAME="C_S_AXI_CTRL_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="29" NAME="C_S_AXI_CTRL_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="30" NAME="C_S_AXI_CTRL_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="31" NAME="C_S_AXI_CTRL_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="SLMB" CLKFREQUENCY="100000000" DEF_SIGNAME="clk_100_0000MHzPLL0" DIR="I" MPD_INDEX="0" NAME="LMB_Clk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_Rst" DIR="I" MPD_INDEX="1" NAME="LMB_Rst" SIGIS="RST" SIGNAME="microblaze_0_ilmb_LMB_Rst"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_ABus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="2" MSB="0" NAME="LMB_ABus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_WriteDBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="3" MSB="0" NAME="LMB_WriteDBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_LMB_WriteDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_AddrStrobe" DIR="I" MPD_INDEX="4" NAME="LMB_AddrStrobe" SIGNAME="microblaze_0_ilmb_LMB_AddrStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_ReadStrobe" DIR="I" MPD_INDEX="5" NAME="LMB_ReadStrobe" SIGNAME="microblaze_0_ilmb_LMB_ReadStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_WriteStrobe" DIR="I" MPD_INDEX="6" NAME="LMB_WriteStrobe" SIGNAME="microblaze_0_ilmb_LMB_WriteStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_LMB_BE" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="7" MSB="0" NAME="LMB_BE" RIGHT="3" SIGNAME="microblaze_0_ilmb_LMB_BE" VECFORMULA="[0:C_LMB_DWIDTH/8-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_DBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="8" MSB="0" NAME="Sl_DBus" RIGHT="31" SIGNAME="microblaze_0_ilmb_Sl_DBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_Ready" DIR="O" MPD_INDEX="9" NAME="Sl_Ready" SIGNAME="microblaze_0_ilmb_Sl_Ready"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_Wait" DIR="O" MPD_INDEX="10" NAME="Sl_Wait" SIGNAME="microblaze_0_ilmb_Sl_Wait"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_UE" DIR="O" MPD_INDEX="11" NAME="Sl_UE" SIGNAME="microblaze_0_ilmb_Sl_UE"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_ilmb_Sl_CE" DIR="O" MPD_INDEX="12" NAME="Sl_CE" SIGNAME="microblaze_0_ilmb_Sl_CE"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst" DIR="O" MPD_INDEX="13" NAME="BRAM_Rst_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk" DIR="O" MPD_INDEX="14" NAME="BRAM_Clk_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN" DIR="O" MPD_INDEX="15" NAME="BRAM_EN_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="16" MSB="0" NAME="BRAM_WEN_A" RIGHT="3" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" VECFORMULA="[0:((C_LMB_DWIDTH+8*C_ECC)/8)-1]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="17" MSB="0" NAME="BRAM_Addr_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="18" MSB="0" NAME="BRAM_Din_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" VECFORMULA="[0:C_LMB_DWIDTH-1+8*C_ECC]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="19" MSB="0" NAME="BRAM_Dout_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" VECFORMULA="[0:C_LMB_DWIDTH-1+8*C_ECC]"/>
- <PORT DIR="O" MPD_INDEX="20" NAME="Interrupt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="21" MSB="0" NAME="SPLB_CTRL_PLB_ABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="22" NAME="SPLB_CTRL_PLB_PAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="23" NAME="SPLB_CTRL_PLB_masterID" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_MID_WIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="24" NAME="SPLB_CTRL_PLB_RNW" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="25" MSB="0" NAME="SPLB_CTRL_PLB_BE" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:((C_SPLB_CTRL_DWIDTH/8)-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="26" MSB="0" NAME="SPLB_CTRL_PLB_size" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="2" MPD_INDEX="27" MSB="0" NAME="SPLB_CTRL_PLB_type" RIGHT="2" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="28" MSB="0" NAME="SPLB_CTRL_PLB_wrDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_DWIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="29" NAME="SPLB_CTRL_Sl_addrAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="30" MSB="0" NAME="SPLB_CTRL_Sl_SSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="SPLB_CTRL_Sl_wait" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="32" NAME="SPLB_CTRL_Sl_rearbitrate" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="33" NAME="SPLB_CTRL_Sl_wrDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="34" NAME="SPLB_CTRL_Sl_wrComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="35" MSB="0" NAME="SPLB_CTRL_Sl_rdDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_DWIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="36" NAME="SPLB_CTRL_Sl_rdDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="37" NAME="SPLB_CTRL_Sl_rdComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="38" NAME="SPLB_CTRL_Sl_MBusy" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="39" NAME="SPLB_CTRL_Sl_MWrErr" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="40" NAME="SPLB_CTRL_Sl_MRdErr" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="41" MSB="0" NAME="SPLB_CTRL_PLB_UABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="42" NAME="SPLB_CTRL_PLB_SAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="43" NAME="SPLB_CTRL_PLB_rdPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="44" NAME="SPLB_CTRL_PLB_wrPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="45" NAME="SPLB_CTRL_PLB_abort" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="46" NAME="SPLB_CTRL_PLB_busLock" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="47" MSB="0" NAME="SPLB_CTRL_PLB_MSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="48" NAME="SPLB_CTRL_PLB_lockErr" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="49" NAME="SPLB_CTRL_PLB_wrBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="50" NAME="SPLB_CTRL_PLB_rdBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="51" NAME="SPLB_CTRL_PLB_wrPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="52" NAME="SPLB_CTRL_PLB_rdPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="53" MSB="0" NAME="SPLB_CTRL_PLB_wrPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="54" MSB="0" NAME="SPLB_CTRL_PLB_rdPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="55" MSB="0" NAME="SPLB_CTRL_PLB_reqPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="15" MPD_INDEX="56" MSB="0" NAME="SPLB_CTRL_PLB_TAttribute" RIGHT="15" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="57" NAME="SPLB_CTRL_Sl_wrBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="58" MSB="0" NAME="SPLB_CTRL_Sl_rdWdAddr" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="59" NAME="SPLB_CTRL_Sl_rdBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="60" NAME="SPLB_CTRL_Sl_MIRQ" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" IS_VALID="FALSE" MPD_INDEX="61" NAME="S_AXI_CTRL_ACLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" IS_VALID="FALSE" MPD_INDEX="62" NAME="S_AXI_CTRL_ARESETN" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="63" MSB="31" NAME="S_AXI_CTRL_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="64" NAME="S_AXI_CTRL_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="65" NAME="S_AXI_CTRL_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="66" MSB="31" NAME="S_AXI_CTRL_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="67" MSB="3" NAME="S_AXI_CTRL_WSTRB" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[((C_S_AXI_CTRL_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="68" NAME="S_AXI_CTRL_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="69" NAME="S_AXI_CTRL_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="70" MSB="1" NAME="S_AXI_CTRL_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="71" NAME="S_AXI_CTRL_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="72" NAME="S_AXI_CTRL_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="73" MSB="31" NAME="S_AXI_CTRL_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="74" NAME="S_AXI_CTRL_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="75" NAME="S_AXI_CTRL_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="76" MSB="31" NAME="S_AXI_CTRL_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="77" MSB="1" NAME="S_AXI_CTRL_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="78" NAME="S_AXI_CTRL_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="79" NAME="S_AXI_CTRL_RREADY" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="microblaze_0_ilmb" BUSSTD="LMB" BUSSTD_PSF="LMB" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="SLMB" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="LMB_Clk"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_Rst"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_ABus"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_WriteDBus"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_AddrStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_ReadStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_WriteStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_BE"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_DBus"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_Ready"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_Wait"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_UE"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_CE"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="BRAM_PORT" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Rst_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Clk_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_EN_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_WEN_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Addr_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Din_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Dout_A"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_VALID="FALSE" MPD_INDEX="2" NAME="SPLB_CTRL" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_ABus"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_PAValid"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_masterID"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_RNW"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_BE"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_size"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_type"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrDBus"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_addrAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_SSize"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wait"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rearbitrate"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrDAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrComp"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdDBus"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdDAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdComp"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MBusy"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MWrErr"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MRdErr"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_UABus"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_SAValid"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPrim"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPrim"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_abort"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_busLock"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_MSize"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_lockErr"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrBurst"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdBurst"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_reqPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_TAttribute"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdWdAddr"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MIRQ"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="3" NAME="S_AXI_CTRL" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" MEMTYPE="MEMORY" MINSIZE="0x800" SIZE="8192" SIZEABRV="8K">
- <SLAVES>
- <SLAVE BUSINTERFACE="SLMB"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB_CTRL_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_SPLB_CTRL_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="SPLB_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S_AXI_CTRL_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S_AXI_CTRL_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="3.00.a" INSTANCE="microblaze_0_d_bram_ctrl" IPTYPE="PERIPHERAL" MHS_INDEX="6" MODCLASS="MEMORY_CNTLR" MODTYPE="lmb_bram_if_cntlr">
- <DESCRIPTION TYPE="SHORT">LMB BRAM Controller</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Local Memory Bus (LMB) Block RAM (BRAM) Interface Controller connects to an lmb bus</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/lmb_bram_if_cntlr_v3_00_a/doc/lmb_bram_if_cntlr.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="2" MPD_INDEX="0" MSB="0" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" ENDIAN="BIG" IS_INSTANTIATED="TRUE" LSB="31" MHS_INDEX="3" MPD_INDEX="1" MSB="0" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00001FFF"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
- <PARAMETER ENDIAN="BIG" LSB="31" MPD_INDEX="3" MSB="0" NAME="C_MASK" TYPE="std_logic_vector" VALUE="0x00800000"/>
- <PARAMETER MPD_INDEX="4" NAME="C_LMB_AWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="5" NAME="C_LMB_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="6" NAME="C_ECC" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="7" NAME="C_INTERCONNECT" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="8" NAME="C_FAULT_INJECT" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="9" NAME="C_CE_FAILING_REGISTERS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="10" NAME="C_UE_FAILING_REGISTERS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="11" NAME="C_ECC_STATUS_REGISTERS" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="12" NAME="C_ECC_ONOFF_REGISTER" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="13" NAME="C_ECC_ONOFF_RESET_VALUE" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="14" NAME="C_CE_COUNTER_WIDTH" TYPE="integer" VALUE="0"/>
- <PARAMETER MPD_INDEX="15" NAME="C_WRITE_ACCESS" TYPE="integer" VALUE="2"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="16" NAME="C_SPLB_CTRL_BASEADDR" TYPE="std_logic_vector" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="17" NAME="C_SPLB_CTRL_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="18" NAME="C_SPLB_CTRL_AWIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="19" NAME="C_SPLB_CTRL_DWIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="20" NAME="C_SPLB_CTRL_P2P" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="21" NAME="C_SPLB_CTRL_MID_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="22" NAME="C_SPLB_CTRL_NUM_MASTERS" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="23" NAME="C_SPLB_CTRL_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="24" NAME="C_SPLB_CTRL_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="25" NAME="C_SPLB_CTRL_CLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER MPD_INDEX="26" NAME="C_S_AXI_CTRL_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" MPD_INDEX="27" NAME="C_S_AXI_CTRL_BASEADDR" TYPE="std_logic_vector" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" MPD_INDEX="28" NAME="C_S_AXI_CTRL_HIGHADDR" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="29" NAME="C_S_AXI_CTRL_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="30" NAME="C_S_AXI_CTRL_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="31" NAME="C_S_AXI_CTRL_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="SLMB" CLKFREQUENCY="100000000" DEF_SIGNAME="clk_100_0000MHzPLL0" DIR="I" MPD_INDEX="0" NAME="LMB_Clk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_Rst" DIR="I" MPD_INDEX="1" NAME="LMB_Rst" SIGIS="RST" SIGNAME="microblaze_0_dlmb_LMB_Rst"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_ABus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="2" MSB="0" NAME="LMB_ABus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_ABus" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_WriteDBus" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="3" MSB="0" NAME="LMB_WriteDBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_LMB_WriteDBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_AddrStrobe" DIR="I" MPD_INDEX="4" NAME="LMB_AddrStrobe" SIGNAME="microblaze_0_dlmb_LMB_AddrStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_ReadStrobe" DIR="I" MPD_INDEX="5" NAME="LMB_ReadStrobe" SIGNAME="microblaze_0_dlmb_LMB_ReadStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_WriteStrobe" DIR="I" MPD_INDEX="6" NAME="LMB_WriteStrobe" SIGNAME="microblaze_0_dlmb_LMB_WriteStrobe"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_LMB_BE" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="7" MSB="0" NAME="LMB_BE" RIGHT="3" SIGNAME="microblaze_0_dlmb_LMB_BE" VECFORMULA="[0:C_LMB_DWIDTH/8-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_DBus" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="8" MSB="0" NAME="Sl_DBus" RIGHT="31" SIGNAME="microblaze_0_dlmb_Sl_DBus" VECFORMULA="[0:C_LMB_DWIDTH-1]"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_Ready" DIR="O" MPD_INDEX="9" NAME="Sl_Ready" SIGNAME="microblaze_0_dlmb_Sl_Ready"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_Wait" DIR="O" MPD_INDEX="10" NAME="Sl_Wait" SIGNAME="microblaze_0_dlmb_Sl_Wait"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_UE" DIR="O" MPD_INDEX="11" NAME="Sl_UE" SIGNAME="microblaze_0_dlmb_Sl_UE"/>
- <PORT BUS="SLMB" DEF_SIGNAME="microblaze_0_dlmb_Sl_CE" DIR="O" MPD_INDEX="12" NAME="Sl_CE" SIGNAME="microblaze_0_dlmb_Sl_CE"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst" DIR="O" MPD_INDEX="13" NAME="BRAM_Rst_A" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk" DIR="O" MPD_INDEX="14" NAME="BRAM_Clk_A" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN" DIR="O" MPD_INDEX="15" NAME="BRAM_EN_A" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="16" MSB="0" NAME="BRAM_WEN_A" RIGHT="3" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" VECFORMULA="[0:((C_LMB_DWIDTH+8*C_ECC)/8)-1]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="17" MSB="0" NAME="BRAM_Addr_A" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" VECFORMULA="[0:C_LMB_AWIDTH-1]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="18" MSB="0" NAME="BRAM_Din_A" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" VECFORMULA="[0:C_LMB_DWIDTH-1+8*C_ECC]"/>
- <PORT BUS="BRAM_PORT" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="19" MSB="0" NAME="BRAM_Dout_A" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" VECFORMULA="[0:C_LMB_DWIDTH-1+8*C_ECC]"/>
- <PORT DIR="O" MPD_INDEX="20" NAME="Interrupt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="21" MSB="0" NAME="SPLB_CTRL_PLB_ABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="22" NAME="SPLB_CTRL_PLB_PAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="23" NAME="SPLB_CTRL_PLB_masterID" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_MID_WIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="24" NAME="SPLB_CTRL_PLB_RNW" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="25" MSB="0" NAME="SPLB_CTRL_PLB_BE" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:((C_SPLB_CTRL_DWIDTH/8)-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="26" MSB="0" NAME="SPLB_CTRL_PLB_size" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="2" MPD_INDEX="27" MSB="0" NAME="SPLB_CTRL_PLB_type" RIGHT="2" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="28" MSB="0" NAME="SPLB_CTRL_PLB_wrDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_DWIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="29" NAME="SPLB_CTRL_Sl_addrAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="30" MSB="0" NAME="SPLB_CTRL_Sl_SSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="31" NAME="SPLB_CTRL_Sl_wait" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="32" NAME="SPLB_CTRL_Sl_rearbitrate" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="33" NAME="SPLB_CTRL_Sl_wrDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="34" NAME="SPLB_CTRL_Sl_wrComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="35" MSB="0" NAME="SPLB_CTRL_Sl_rdDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_DWIDTH-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="36" NAME="SPLB_CTRL_Sl_rdDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="37" NAME="SPLB_CTRL_Sl_rdComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="38" NAME="SPLB_CTRL_Sl_MBusy" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="39" NAME="SPLB_CTRL_Sl_MWrErr" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="40" NAME="SPLB_CTRL_Sl_MRdErr" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="41" MSB="0" NAME="SPLB_CTRL_PLB_UABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="42" NAME="SPLB_CTRL_PLB_SAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="43" NAME="SPLB_CTRL_PLB_rdPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="44" NAME="SPLB_CTRL_PLB_wrPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="45" NAME="SPLB_CTRL_PLB_abort" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="46" NAME="SPLB_CTRL_PLB_busLock" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="47" MSB="0" NAME="SPLB_CTRL_PLB_MSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="48" NAME="SPLB_CTRL_PLB_lockErr" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="49" NAME="SPLB_CTRL_PLB_wrBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="50" NAME="SPLB_CTRL_PLB_rdBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="51" NAME="SPLB_CTRL_PLB_wrPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="52" NAME="SPLB_CTRL_PLB_rdPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="53" MSB="0" NAME="SPLB_CTRL_PLB_wrPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="54" MSB="0" NAME="SPLB_CTRL_PLB_rdPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="55" MSB="0" NAME="SPLB_CTRL_PLB_reqPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="15" MPD_INDEX="56" MSB="0" NAME="SPLB_CTRL_PLB_TAttribute" RIGHT="15" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="57" NAME="SPLB_CTRL_Sl_wrBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="58" MSB="0" NAME="SPLB_CTRL_Sl_rdWdAddr" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="59" NAME="SPLB_CTRL_Sl_rdBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="60" NAME="SPLB_CTRL_Sl_MIRQ" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_CTRL_NUM_MASTERS-1)]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" IS_VALID="FALSE" MPD_INDEX="61" NAME="S_AXI_CTRL_ACLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" IS_VALID="FALSE" MPD_INDEX="62" NAME="S_AXI_CTRL_ARESETN" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="63" MSB="31" NAME="S_AXI_CTRL_AWADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="64" NAME="S_AXI_CTRL_AWVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="65" NAME="S_AXI_CTRL_AWREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="66" MSB="31" NAME="S_AXI_CTRL_WDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="67" MSB="3" NAME="S_AXI_CTRL_WSTRB" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[((C_S_AXI_CTRL_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="68" NAME="S_AXI_CTRL_WVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="69" NAME="S_AXI_CTRL_WREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="70" MSB="1" NAME="S_AXI_CTRL_BRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="71" NAME="S_AXI_CTRL_BVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="72" NAME="S_AXI_CTRL_BREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="73" MSB="31" NAME="S_AXI_CTRL_ARADDR" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="74" NAME="S_AXI_CTRL_ARVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="75" NAME="S_AXI_CTRL_ARREADY" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="76" MSB="31" NAME="S_AXI_CTRL_RDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S_AXI_CTRL_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="77" MSB="1" NAME="S_AXI_CTRL_RRESP" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="78" NAME="S_AXI_CTRL_RVALID" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI_CTRL" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="79" NAME="S_AXI_CTRL_RREADY" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="microblaze_0_dlmb" BUSSTD="LMB" BUSSTD_PSF="LMB" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="SLMB" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="LMB_Clk"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_Rst"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_ABus"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_WriteDBus"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_AddrStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_ReadStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_WriteStrobe"/>
- <PORTMAP DIR="I" PHYSICAL="LMB_BE"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_DBus"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_Ready"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_Wait"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_UE"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_CE"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="BRAM_PORT" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Rst_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Clk_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_EN_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_WEN_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Addr_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Din_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Dout_A"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_VALID="FALSE" MPD_INDEX="2" NAME="SPLB_CTRL" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_ABus"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_PAValid"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_masterID"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_RNW"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_BE"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_size"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_type"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrDBus"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_addrAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_SSize"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wait"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rearbitrate"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrDAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrComp"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdDBus"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdDAck"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdComp"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MBusy"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MWrErr"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MRdErr"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_UABus"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_SAValid"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPrim"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPrim"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_abort"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_busLock"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_MSize"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_lockErr"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrBurst"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdBurst"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_wrPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_rdPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_reqPri"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_CTRL_PLB_TAttribute"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_wrBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdWdAddr"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_rdBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="SPLB_CTRL_Sl_MIRQ"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="3" NAME="S_AXI_CTRL" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_CTRL_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_CTRL_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="0" BASENAME="C_BASEADDR" BASEVALUE="0x00000000" HIGHDECIMAL="8191" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x00001FFF" MEMTYPE="MEMORY" MINSIZE="0x800" SIZE="8192" SIZEABRV="8K">
- <SLAVES>
- <SLAVE BUSINTERFACE="SLMB"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_SPLB_CTRL_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_SPLB_CTRL_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="SPLB_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S_AXI_CTRL_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S_AXI_CTRL_HIGHADDR" HIGHVALUE="0x00000000" IS_VALID="FALSE" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_CTRL"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="1.00.a" INSTANCE="microblaze_0_bram_block" IPTYPE="PERIPHERAL" MHS_INDEX="7" MODCLASS="MEMORY" MODTYPE="bram_block">
- <DESCRIPTION TYPE="SHORT">Block RAM (BRAM) Block</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">The BRAM Block is a configurable memory module that attaches to a variety of BRAM Interface Controllers.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/bram_block_v1_00_a/doc/bram_block.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_MEMSIZE" TYPE="integer" VALUE="0x2000"/>
- <PARAMETER MPD_INDEX="1" NAME="C_PORT_DWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="2" NAME="C_PORT_AWIDTH" TYPE="integer" VALUE="32"/>
- <PARAMETER MPD_INDEX="3" NAME="C_NUM_WE" TYPE="integer" VALUE="4"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="4" NAME="C_FAMILY" TYPE="string" VALUE="spartan6"/>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst" DIR="I" MPD_INDEX="0" NAME="BRAM_Rst_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk" DIR="I" MPD_INDEX="1" NAME="BRAM_Clk_A" SIGIS="CLK" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN" DIR="I" MPD_INDEX="2" NAME="BRAM_EN_A" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="3" MSB="0" NAME="BRAM_WEN_A" RIGHT="3" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" VECFORMULA="[0:C_NUM_WE-1]"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="4" MSB="0" NAME="BRAM_Addr_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" VECFORMULA="[0:C_PORT_AWIDTH-1]"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="5" MSB="0" NAME="BRAM_Din_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
- <PORT BUS="PORTA" DEF_SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="6" MSB="0" NAME="BRAM_Dout_A" RIGHT="31" SIGNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst" DIR="I" MPD_INDEX="7" NAME="BRAM_Rst_B" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Rst"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk" DIR="I" MPD_INDEX="8" NAME="BRAM_Clk_B" SIGIS="CLK" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Clk"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN" DIR="I" MPD_INDEX="9" NAME="BRAM_EN_B" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_EN"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="10" MSB="0" NAME="BRAM_WEN_B" RIGHT="3" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_WEN" VECFORMULA="[0:C_NUM_WE-1]"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="11" MSB="0" NAME="BRAM_Addr_B" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Addr" VECFORMULA="[0:C_PORT_AWIDTH-1]"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="12" MSB="0" NAME="BRAM_Din_B" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Din" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
- <PORT BUS="PORTB" DEF_SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="13" MSB="0" NAME="BRAM_Dout_B" RIGHT="31" SIGNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block_BRAM_Dout" VECFORMULA="[0:C_PORT_DWIDTH-1]"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="PORTA" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Rst_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Clk_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_EN_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_WEN_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Addr_A"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Din_A"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Dout_A"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block" BUSSTD="XIL" BUSSTD_PSF="XIL_BRAM" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="PORTB" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Rst_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Clk_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_EN_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_WEN_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Addr_B"/>
- <PORTMAP DIR="O" PHYSICAL="BRAM_Din_B"/>
- <PORTMAP DIR="I" PHYSICAL="BRAM_Dout_B"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- </MODULE>
- <MODULE HWVERSION="3.00.a" INSTANCE="proc_sys_reset_0" IPTYPE="PERIPHERAL" MHS_INDEX="8" MODCLASS="PERIPHERAL" MODTYPE="proc_sys_reset">
- <DESCRIPTION TYPE="SHORT">Processor System Reset Module</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Reset management module</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/proc_sys_reset_v3_00_a/doc/proc_sys_reset.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_SUBFAMILY" TYPE="string" VALUE="t"/>
- <PARAMETER MPD_INDEX="1" NAME="C_EXT_RST_WIDTH" TYPE="integer" VALUE="4"/>
- <PARAMETER MPD_INDEX="2" NAME="C_AUX_RST_WIDTH" TYPE="integer" VALUE="4"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="3" NAME="C_EXT_RESET_HIGH" TYPE="std_logic" VALUE="1"/>
- <PARAMETER MPD_INDEX="4" NAME="C_AUX_RESET_HIGH" TYPE="std_logic" VALUE="1"/>
- <PARAMETER MPD_INDEX="5" NAME="C_NUM_BUS_RST" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="6" NAME="C_NUM_PERP_RST" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="7" NAME="C_NUM_INTERCONNECT_ARESETN" TYPE="integer" VALUE="1"/>
- <PARAMETER MPD_INDEX="8" NAME="C_NUM_PERP_ARESETN" TYPE="integer" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="9" NAME="C_FAMILY" VALUE="spartan6"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="1" NAME="Ext_Reset_In" SIGIS="RST" SIGNAME="RESET"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="17" NAME="MB_Reset" SIGIS="RST" SIGNAME="proc_sys_reset_0_MB_Reset"/>
- <PORT CLKFREQUENCY="50000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="0" NAME="Slowest_sync_clk" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="20" NAME="Interconnect_aresetn" SIGIS="RST" SIGNAME="proc_sys_reset_0_Interconnect_aresetn" VECFORMULA="[0:C_NUM_INTERCONNECT_ARESETN-1]"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="10" NAME="Dcm_locked" SIGNAME="proc_sys_reset_0_Dcm_locked"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="3" NAME="MB_Debug_Sys_Rst" SIGIS="RST" SIGNAME="proc_sys_reset_0_MB_Debug_Sys_Rst"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="18" NAME="BUS_STRUCT_RESET" SIGIS="RST" SIGNAME="proc_sys_reset_0_BUS_STRUCT_RESET" VECFORMULA="[0:C_NUM_BUS_RST-1]"/>
- <PORT DIR="I" MPD_INDEX="2" NAME="Aux_Reset_In" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="4" NAME="Core_Reset_Req_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="5" NAME="Chip_Reset_Req_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="6" NAME="System_Reset_Req_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="7" NAME="Core_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="8" NAME="Chip_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="9" NAME="System_Reset_Req_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="11" NAME="RstcPPCresetcore_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="12" NAME="RstcPPCresetchip_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC0" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="13" NAME="RstcPPCresetsys_0" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="14" NAME="RstcPPCresetcore_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="15" NAME="RstcPPCresetchip_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="RESETPPC1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="16" NAME="RstcPPCresetsys_1" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="19" NAME="Peripheral_Reset" SIGIS="RST" SIGNAME="__NOC__" VECFORMULA="[0:C_NUM_PERP_RST-1]"/>
- <PORT DIR="O" MPD_INDEX="21" NAME="Peripheral_aresetn" SIGIS="RST" SIGNAME="__NOC__" VECFORMULA="[0:C_NUM_PERP_ARESETN-1]"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_VALID="FALSE" MPD_INDEX="0" NAME="RESETPPC0" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="Core_Reset_Req_0"/>
- <PORTMAP DIR="I" PHYSICAL="Chip_Reset_Req_0"/>
- <PORTMAP DIR="I" PHYSICAL="System_Reset_Req_0"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetcore_0"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetchip_0"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetsys_0"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_RESETPPC" IS_VALID="FALSE" MPD_INDEX="1" NAME="RESETPPC1" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="Core_Reset_Req_1"/>
- <PORTMAP DIR="I" PHYSICAL="Chip_Reset_Req_1"/>
- <PORTMAP DIR="I" PHYSICAL="System_Reset_Req_1"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetcore_1"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetchip_1"/>
- <PORTMAP DIR="O" PHYSICAL="RstcPPCresetsys_1"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="reset_0"/>
- </IOINTERFACES>
- </MODULE>
- <MODULE HWVERSION="4.01.a" INSTANCE="clock_generator_0" IPTYPE="PERIPHERAL" MHS_INDEX="9" MODCLASS="IP" MODTYPE="clock_generator">
- <DESCRIPTION TYPE="SHORT">Clock Generator</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Clock generator for processor system.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/clock_generator_v4_01_a/doc/clock_generator.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_DEVICE" TYPE="STRING" VALUE="6slx45t"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="2" NAME="C_PACKAGE" TYPE="STRING" VALUE="fgg484"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="3" NAME="C_SPEEDGRADE" TYPE="STRING" VALUE="-3"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="4" NAME="C_CLKIN_FREQ" TYPE="INTEGER" VALUE="200000000"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="5" NAME="C_CLKOUT0_FREQ" TYPE="INTEGER" VALUE="600000000"/>
- <PARAMETER MPD_INDEX="6" NAME="C_CLKOUT0_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="7" NAME="C_CLKOUT0_GROUP" TYPE="STRING" VALUE="PLL0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="8" NAME="C_CLKOUT0_BUF" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="9" NAME="C_CLKOUT0_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="10" NAME="C_CLKOUT1_FREQ" TYPE="INTEGER" VALUE="600000000"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="11" NAME="C_CLKOUT1_PHASE" TYPE="INTEGER" VALUE="180"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="12" NAME="C_CLKOUT1_GROUP" TYPE="STRING" VALUE="PLL0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="13" NAME="C_CLKOUT1_BUF" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="14" NAME="C_CLKOUT1_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="15" NAME="C_CLKOUT2_FREQ" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER MPD_INDEX="16" NAME="C_CLKOUT2_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="17" NAME="C_CLKOUT2_GROUP" TYPE="STRING" VALUE="PLL0"/>
- <PARAMETER MPD_INDEX="18" NAME="C_CLKOUT2_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="19" NAME="C_CLKOUT2_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="20" NAME="C_CLKOUT3_FREQ" TYPE="INTEGER" VALUE="125000000"/>
- <PARAMETER MPD_INDEX="21" NAME="C_CLKOUT3_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="22" NAME="C_CLKOUT3_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="23" NAME="C_CLKOUT3_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="24" NAME="C_CLKOUT3_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="14" MPD_INDEX="25" NAME="C_CLKOUT4_FREQ" TYPE="INTEGER" VALUE="200000000"/>
- <PARAMETER MPD_INDEX="26" NAME="C_CLKOUT4_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="15" MPD_INDEX="27" NAME="C_CLKOUT4_GROUP" TYPE="STRING" VALUE="PLL0"/>
- <PARAMETER MPD_INDEX="28" NAME="C_CLKOUT4_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="29" NAME="C_CLKOUT4_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="16" MPD_INDEX="30" NAME="C_CLKOUT5_FREQ" TYPE="INTEGER" VALUE="50000000"/>
- <PARAMETER MPD_INDEX="31" NAME="C_CLKOUT5_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="17" MPD_INDEX="32" NAME="C_CLKOUT5_GROUP" TYPE="STRING" VALUE="PLL0"/>
- <PARAMETER MPD_INDEX="33" NAME="C_CLKOUT5_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="34" NAME="C_CLKOUT5_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="35" NAME="C_CLKOUT6_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="36" NAME="C_CLKOUT6_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="37" NAME="C_CLKOUT6_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="38" NAME="C_CLKOUT6_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="39" NAME="C_CLKOUT6_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="40" NAME="C_CLKOUT7_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="41" NAME="C_CLKOUT7_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="42" NAME="C_CLKOUT7_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="43" NAME="C_CLKOUT7_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="44" NAME="C_CLKOUT7_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="45" NAME="C_CLKOUT8_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="46" NAME="C_CLKOUT8_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="47" NAME="C_CLKOUT8_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="48" NAME="C_CLKOUT8_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="49" NAME="C_CLKOUT8_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="50" NAME="C_CLKOUT9_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="51" NAME="C_CLKOUT9_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="52" NAME="C_CLKOUT9_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="53" NAME="C_CLKOUT9_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="54" NAME="C_CLKOUT9_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="55" NAME="C_CLKOUT10_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="56" NAME="C_CLKOUT10_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="57" NAME="C_CLKOUT10_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="58" NAME="C_CLKOUT10_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="59" NAME="C_CLKOUT10_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="60" NAME="C_CLKOUT11_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="61" NAME="C_CLKOUT11_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="62" NAME="C_CLKOUT11_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="63" NAME="C_CLKOUT11_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="64" NAME="C_CLKOUT11_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="65" NAME="C_CLKOUT12_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="66" NAME="C_CLKOUT12_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="67" NAME="C_CLKOUT12_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="68" NAME="C_CLKOUT12_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="69" NAME="C_CLKOUT12_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="70" NAME="C_CLKOUT13_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="71" NAME="C_CLKOUT13_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="72" NAME="C_CLKOUT13_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="73" NAME="C_CLKOUT13_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="74" NAME="C_CLKOUT13_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="75" NAME="C_CLKOUT14_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="76" NAME="C_CLKOUT14_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="77" NAME="C_CLKOUT14_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="78" NAME="C_CLKOUT14_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="79" NAME="C_CLKOUT14_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="80" NAME="C_CLKOUT15_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="81" NAME="C_CLKOUT15_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="82" NAME="C_CLKOUT15_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="83" NAME="C_CLKOUT15_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="84" NAME="C_CLKOUT15_VARIABLE_PHASE" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="85" NAME="C_CLKFBIN_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="86" NAME="C_CLKFBIN_DESKEW" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="87" NAME="C_CLKFBOUT_FREQ" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="88" NAME="C_CLKFBOUT_PHASE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="89" NAME="C_CLKFBOUT_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="90" NAME="C_CLKFBOUT_BUF" TYPE="BOOLEAN" VALUE="TRUE"/>
- <PARAMETER MPD_INDEX="91" NAME="C_PSDONE_GROUP" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="92" NAME="C_EXT_RESET_HIGH" VALUE="1"/>
- <PARAMETER MPD_INDEX="93" NAME="C_CLK_PRIMITIVE_FEEDBACK_BUF" TYPE="BOOLEAN" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="94" NAME="C_CLK_GEN" VALUE="UPDATE"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="23" NAME="RST" SIGIS="RST" SIGNAME="RESET"/>
- <PORT CLKFREQUENCY="200000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="CLKIN" SIGIS="CLK" SIGNAME="CLK"/>
- <PORT CLKFREQUENCY="100000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="3" NAME="CLKOUT2" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="50000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="6" NAME="CLKOUT5" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="125000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="CLKOUT3" SIGIS="CLK" SIGNAME="clk_125_0000MHz"/>
- <PORT CLKFREQUENCY="200000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="5" NAME="CLKOUT4" SIGIS="CLK" SIGNAME="clk_200_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="600000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="1" NAME="CLKOUT0" SIGIS="CLK" SIGNAME="clk_600_0000MHzPLL0_nobuf"/>
- <PORT CLKFREQUENCY="600000000" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="2" NAME="CLKOUT1" SIGIS="CLK" SIGNAME="clk_600_0000MHz180PLL0_nobuf"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="24" NAME="LOCKED" SIGNAME="proc_sys_reset_0_Dcm_locked"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="7" NAME="CLKOUT6" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="8" NAME="CLKOUT7" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="9" NAME="CLKOUT8" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="10" NAME="CLKOUT9" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="11" NAME="CLKOUT10" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="12" NAME="CLKOUT11" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="13" NAME="CLKOUT12" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="14" NAME="CLKOUT13" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="15" NAME="CLKOUT14" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="16" NAME="CLKOUT15" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="17" NAME="CLKFBIN" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="18" NAME="CLKFBOUT" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="I" MPD_INDEX="19" NAME="PSCLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="I" MPD_INDEX="20" NAME="PSEN" SIGNAME="__NOC__"/>
- <PORT DIR="I" MPD_INDEX="21" NAME="PSINCDEC" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="22" NAME="PSDONE" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES/>
- </MODULE>
- <MODULE HWVERSION="2.00.b" INSTANCE="debug_module" IPTYPE="PERIPHERAL" MHS_INDEX="10" MODCLASS="DEBUG" MODTYPE="mdm">
- <DESCRIPTION TYPE="SHORT">MicroBlaze Debug Module (MDM)</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Debug module for MicroBlaze Soft Processor.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/mdm_v2_00_b/doc/mdm.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER MPD_INDEX="1" NAME="C_JTAG_CHAIN" TYPE="INTEGER" VALUE="2"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="C_INTERCONNECT" TYPE="INTEGER" VALUE="2"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="3" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x74800000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="4" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x7480FFFF"/>
- <PARAMETER MPD_INDEX="5" NAME="C_SPLB_AWIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="6" NAME="C_SPLB_DWIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="7" NAME="C_SPLB_P2P" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="8" NAME="C_SPLB_MID_WIDTH" TYPE="INTEGER" VALUE="3"/>
- <PARAMETER MPD_INDEX="9" NAME="C_SPLB_NUM_MASTERS" TYPE="INTEGER" VALUE="8"/>
- <PARAMETER MPD_INDEX="10" NAME="C_SPLB_NATIVE_DWIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="11" NAME="C_SPLB_SUPPORT_BURSTS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="12" NAME="C_MB_DBG_PORTS" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="13" NAME="C_USE_UART" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="14" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="16" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="4" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="Debug_SYS_Rst" SIGNAME="proc_sys_reset_0_MB_Debug_Sys_Rst"/>
- <PORT DIR="O" MPD_INDEX="0" NAME="Interrupt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DEF_SIGNAME="Ext_BRK" DIR="O" MPD_INDEX="2" NAME="Ext_BRK" SIGNAME="Ext_BRK"/>
- <PORT DEF_SIGNAME="Ext_NM_BRK" DIR="O" MPD_INDEX="3" NAME="Ext_NM_BRK" SIGNAME="Ext_NM_BRK"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="5" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="6" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="7" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="8" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="9" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="10" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[(C_S_AXI_DATA_WIDTH/8-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="11" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="12" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="13" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="14" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="15" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="16" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="17" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="18" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="19" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="20" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="21" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="22" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="23" NAME="SPLB_Clk" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="24" NAME="SPLB_Rst" SIGIS="RST" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="25" MSB="0" NAME="PLB_ABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="26" MSB="0" NAME="PLB_UABus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:31]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="27" NAME="PLB_PAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="28" NAME="PLB_SAValid" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="29" NAME="PLB_rdPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="30" NAME="PLB_wrPrim" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="2" MPD_INDEX="31" MSB="0" NAME="PLB_masterID" RIGHT="2" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_MID_WIDTH-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="32" NAME="PLB_abort" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="33" NAME="PLB_busLock" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="34" NAME="PLB_RNW" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="35" MSB="0" NAME="PLB_BE" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:((C_SPLB_DWIDTH/8)-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="36" MSB="0" NAME="PLB_MSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="37" MSB="0" NAME="PLB_size" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="2" MPD_INDEX="38" MSB="0" NAME="PLB_type" RIGHT="2" SIGNAME="__NOC__" VECFORMULA="[0:2]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="39" NAME="PLB_lockErr" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="40" MSB="0" NAME="PLB_wrDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="41" NAME="PLB_wrBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="42" NAME="PLB_rdBurst" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="43" NAME="PLB_wrPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="44" NAME="PLB_rdPendReq" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="45" MSB="0" NAME="PLB_wrPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="46" MSB="0" NAME="PLB_rdPendPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="47" MSB="0" NAME="PLB_reqPri" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="BIG" LEFT="0" LSB="15" MPD_INDEX="48" MSB="0" NAME="PLB_TAttribute" RIGHT="15" SIGNAME="__NOC__" VECFORMULA="[0:15]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="49" NAME="Sl_addrAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="1" MPD_INDEX="50" MSB="0" NAME="Sl_SSize" RIGHT="1" SIGNAME="__NOC__" VECFORMULA="[0:1]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="51" NAME="Sl_wait" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="52" NAME="Sl_rearbitrate" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="53" NAME="Sl_wrDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="54" NAME="Sl_wrComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="55" NAME="Sl_wrBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="31" MPD_INDEX="56" MSB="0" NAME="Sl_rdDBus" RIGHT="31" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_DWIDTH-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="3" MPD_INDEX="57" MSB="0" NAME="Sl_rdWdAddr" RIGHT="3" SIGNAME="__NOC__" VECFORMULA="[0:3]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="58" NAME="Sl_rdDAck" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="59" NAME="Sl_rdComp" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="60" NAME="Sl_rdBTerm" SIGNAME="__NOC__"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="61" MSB="0" NAME="Sl_MBusy" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="62" MSB="0" NAME="Sl_MWrErr" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="63" MSB="0" NAME="Sl_MRdErr" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
- <PORT BUS="SPLB" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="64" MSB="0" NAME="Sl_MIRQ" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:(C_SPLB_NUM_MASTERS-1)]"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Clk" DIR="O" MPD_INDEX="65" NAME="Dbg_Clk_0" SIGNAME="microblaze_0_debug_Dbg_Clk"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_TDI" DIR="O" MPD_INDEX="66" NAME="Dbg_TDI_0" SIGNAME="microblaze_0_debug_Dbg_TDI"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_TDO" DIR="I" MPD_INDEX="67" NAME="Dbg_TDO_0" SIGNAME="microblaze_0_debug_Dbg_TDO"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Reg_En" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="68" MSB="0" NAME="Dbg_Reg_En_0" RIGHT="7" SIGNAME="microblaze_0_debug_Dbg_Reg_En" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Capture" DIR="O" MPD_INDEX="69" NAME="Dbg_Capture_0" SIGNAME="microblaze_0_debug_Dbg_Capture"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Shift" DIR="O" MPD_INDEX="70" NAME="Dbg_Shift_0" SIGNAME="microblaze_0_debug_Dbg_Shift"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Dbg_Update" DIR="O" MPD_INDEX="71" NAME="Dbg_Update_0" SIGNAME="microblaze_0_debug_Dbg_Update"/>
- <PORT BUS="MBDEBUG_0" DEF_SIGNAME="microblaze_0_debug_Debug_Rst" DIR="O" MPD_INDEX="72" NAME="Dbg_Rst_0" SIGNAME="microblaze_0_debug_Debug_Rst"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="73" NAME="Dbg_Clk_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="74" NAME="Dbg_TDI_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="75" NAME="Dbg_TDO_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="76" MSB="0" NAME="Dbg_Reg_En_1" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="77" NAME="Dbg_Capture_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="78" NAME="Dbg_Shift_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="79" NAME="Dbg_Update_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_1" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="80" NAME="Dbg_Rst_1" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="81" NAME="Dbg_Clk_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="82" NAME="Dbg_TDI_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="83" NAME="Dbg_TDO_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="84" MSB="0" NAME="Dbg_Reg_En_2" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="85" NAME="Dbg_Capture_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="86" NAME="Dbg_Shift_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="87" NAME="Dbg_Update_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_2" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="88" NAME="Dbg_Rst_2" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="89" NAME="Dbg_Clk_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="90" NAME="Dbg_TDI_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="91" NAME="Dbg_TDO_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="92" MSB="0" NAME="Dbg_Reg_En_3" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="93" NAME="Dbg_Capture_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="94" NAME="Dbg_Shift_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="95" NAME="Dbg_Update_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_3" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="96" NAME="Dbg_Rst_3" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="97" NAME="Dbg_Clk_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="98" NAME="Dbg_TDI_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="99" NAME="Dbg_TDO_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="100" MSB="0" NAME="Dbg_Reg_En_4" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="101" NAME="Dbg_Capture_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="102" NAME="Dbg_Shift_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="103" NAME="Dbg_Update_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_4" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="104" NAME="Dbg_Rst_4" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="105" NAME="Dbg_Clk_5" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="106" NAME="Dbg_TDI_5" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="107" NAME="Dbg_TDO_5" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="108" MSB="0" NAME="Dbg_Reg_En_5" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="109" NAME="Dbg_Capture_5" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="110" NAME="Dbg_Shift_5" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="111" NAME="Dbg_Update_5" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_5" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="112" NAME="Dbg_Rst_5" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="113" NAME="Dbg_Clk_6" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="114" NAME="Dbg_TDI_6" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="115" NAME="Dbg_TDO_6" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="116" MSB="0" NAME="Dbg_Reg_En_6" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="117" NAME="Dbg_Capture_6" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="118" NAME="Dbg_Shift_6" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="119" NAME="Dbg_Update_6" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_6" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="120" NAME="Dbg_Rst_6" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_7" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="121" NAME="Dbg_Clk_7" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_7" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="122" NAME="Dbg_TDI_7" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_7" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="123" NAME="Dbg_TDO_7" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_7" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="BIG" LEFT="0" LSB="7" MPD_INDEX="124" MSB="0" NAME="Dbg_Reg_En_7" RIGHT="7" SIGNAME="__NOC__" VECFORMULA="[0:7]"/>
- <PORT BUS="MBDEBUG_7" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="125" NAME="Dbg_Capture_7" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_7" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="126" NAME="Dbg_Shift_7" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_7" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="127" NAME="Dbg_Update_7" SIGNAME="__NOC__"/>
- <PORT BUS="MBDEBUG_7" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="128" NAME="Dbg_Rst_7" SIGNAME="__NOC__"/>
- <PORT DEF_SIGNAME="bscan_tdi" DIR="O" MPD_INDEX="129" NAME="bscan_tdi" SIGNAME="bscan_tdi"/>
- <PORT DEF_SIGNAME="bscan_reset" DIR="O" MPD_INDEX="130" NAME="bscan_reset" SIGNAME="bscan_reset"/>
- <PORT DEF_SIGNAME="bscan_shift" DIR="O" MPD_INDEX="131" NAME="bscan_shift" SIGNAME="bscan_shift"/>
- <PORT DEF_SIGNAME="bscan_update" DIR="O" MPD_INDEX="132" NAME="bscan_update" SIGNAME="bscan_update"/>
- <PORT DEF_SIGNAME="bscan_capture" DIR="O" MPD_INDEX="133" NAME="bscan_capture" SIGNAME="bscan_capture"/>
- <PORT DEF_SIGNAME="bscan_sel1" DIR="O" MPD_INDEX="134" NAME="bscan_sel1" SIGNAME="bscan_sel1"/>
- <PORT DEF_SIGNAME="bscan_drck1" DIR="O" MPD_INDEX="135" NAME="bscan_drck1" SIGNAME="bscan_drck1"/>
- <PORT DEF_SIGNAME="bscan_tdo1" DIR="I" MPD_INDEX="136" NAME="bscan_tdo1" SIGNAME="bscan_tdo1"/>
- <PORT BUS="XMTC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="137" NAME="Ext_JTAG_DRCK" SIGNAME="__NOC__"/>
- <PORT BUS="XMTC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="138" NAME="Ext_JTAG_RESET" SIGNAME="__NOC__"/>
- <PORT BUS="XMTC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="139" NAME="Ext_JTAG_SEL" SIGNAME="__NOC__"/>
- <PORT BUS="XMTC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="140" NAME="Ext_JTAG_CAPTURE" SIGNAME="__NOC__"/>
- <PORT BUS="XMTC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="141" NAME="Ext_JTAG_SHIFT" SIGNAME="__NOC__"/>
- <PORT BUS="XMTC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="142" NAME="Ext_JTAG_UPDATE" SIGNAME="__NOC__"/>
- <PORT BUS="XMTC" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="143" NAME="Ext_JTAG_TDI" SIGNAME="__NOC__"/>
- <PORT BUS="XMTC" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="144" NAME="Ext_JTAG_TDO" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="PLBV46" BUSSTD_PSF="PLBV46" IS_VALID="FALSE" MPD_INDEX="1" NAME="SPLB" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="SPLB_Clk"/>
- <PORTMAP DIR="I" PHYSICAL="SPLB_Rst"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_ABus"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_UABus"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_PAValid"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_SAValid"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_rdPrim"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_wrPrim"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_masterID"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_abort"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_busLock"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_RNW"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_BE"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_MSize"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_size"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_type"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_lockErr"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_wrDBus"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_wrBurst"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_rdBurst"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_wrPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_rdPendReq"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_wrPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_rdPendPri"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_reqPri"/>
- <PORTMAP DIR="I" PHYSICAL="PLB_TAttribute"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_addrAck"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_SSize"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_wait"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_rearbitrate"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_wrDAck"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_wrComp"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_wrBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_rdDBus"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_rdWdAddr"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_rdDAck"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_rdComp"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_rdBTerm"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_MBusy"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_MWrErr"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_MRdErr"/>
- <PORTMAP DIR="O" PHYSICAL="Sl_MIRQ"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="microblaze_0_debug" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="2" NAME="MBDEBUG_0" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Clk_0"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_TDI_0"/>
- <PORTMAP DIR="I" PHYSICAL="Dbg_TDO_0"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Reg_En_0"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Capture_0"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Shift_0"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Update_0"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Rst_0"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_VALID="FALSE" MPD_INDEX="3" NAME="MBDEBUG_1" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Clk_1"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_TDI_1"/>
- <PORTMAP DIR="I" PHYSICAL="Dbg_TDO_1"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Reg_En_1"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Capture_1"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Shift_1"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Update_1"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Rst_1"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_VALID="FALSE" MPD_INDEX="4" NAME="MBDEBUG_2" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Clk_2"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_TDI_2"/>
- <PORTMAP DIR="I" PHYSICAL="Dbg_TDO_2"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Reg_En_2"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Capture_2"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Shift_2"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Update_2"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Rst_2"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_VALID="FALSE" MPD_INDEX="5" NAME="MBDEBUG_3" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Clk_3"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_TDI_3"/>
- <PORTMAP DIR="I" PHYSICAL="Dbg_TDO_3"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Reg_En_3"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Capture_3"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Shift_3"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Update_3"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Rst_3"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_VALID="FALSE" MPD_INDEX="6" NAME="MBDEBUG_4" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Clk_4"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_TDI_4"/>
- <PORTMAP DIR="I" PHYSICAL="Dbg_TDO_4"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Reg_En_4"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Capture_4"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Shift_4"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Update_4"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Rst_4"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_VALID="FALSE" MPD_INDEX="7" NAME="MBDEBUG_5" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Clk_5"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_TDI_5"/>
- <PORTMAP DIR="I" PHYSICAL="Dbg_TDO_5"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Reg_En_5"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Capture_5"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Shift_5"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Update_5"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Rst_5"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_VALID="FALSE" MPD_INDEX="8" NAME="MBDEBUG_6" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Clk_6"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_TDI_6"/>
- <PORTMAP DIR="I" PHYSICAL="Dbg_TDO_6"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Reg_En_6"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Capture_6"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Shift_6"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Update_6"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Rst_6"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_MBDEBUG3" IS_VALID="FALSE" MPD_INDEX="9" NAME="MBDEBUG_7" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Clk_7"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_TDI_7"/>
- <PORTMAP DIR="I" PHYSICAL="Dbg_TDO_7"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Reg_En_7"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Capture_7"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Shift_7"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Update_7"/>
- <PORTMAP DIR="O" PHYSICAL="Dbg_Rst_7"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="XIL" BUSSTD_PSF="XIL_BSCAN" MPD_INDEX="10" NAME="XMTC" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_DRCK"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_RESET"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_SEL"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_CAPTURE"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_SHIFT"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_UPDATE"/>
- <PORTMAP DIR="O" PHYSICAL="Ext_JTAG_TDI"/>
- <PORTMAP DIR="I" PHYSICAL="Ext_JTAG_TDO"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1954545664" BASENAME="C_BASEADDR" BASEVALUE="0x74800000" HIGHDECIMAL="1954611199" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x7480FFFF" MEMTYPE="REGISTER" MINSIZE="0x100" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="SPLB"/>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="RS232_Uart_1" IPTYPE="PERIPHERAL" MHS_INDEX="11" MODCLASS="PERIPHERAL" MODTYPE="axi_uartlite">
- <DESCRIPTION TYPE="SHORT">AXI UART (Lite)</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Generic UART (Universal Asynchronous Receiver/Transmitter) for AXI.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_uartlite_v1_01_a/doc/axi_uartlite_ds741.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_S_AXI_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="50000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="2" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40600000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="3" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4060ffff"/>
- <PARAMETER MPD_INDEX="4" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="5" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="6" NAME="C_BAUDRATE" TYPE="INTEGER" VALUE="115200"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="7" NAME="C_DATA_BITS" TYPE="INTEGER" VALUE="8"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="8" NAME="C_USE_PARITY" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="9" NAME="C_ODD_PARITY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="10" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="O" IOS="uart_0" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="21" NAME="TX" SIGNAME="RS232_Uart_1_sout">
- <DESCRIPTION>Serial Data Out</DESCRIPTION>
- </PORT>
- <PORT DIR="I" IOS="uart_0" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="20" NAME="RX" SIGNAME="RS232_Uart_1_sin">
- <DESCRIPTION>Serial Data In</DESCRIPTION>
- </PORT>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="2" NAME="Interrupt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="RS232_Uart_1_Interrupt"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="3" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="4" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="5" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="6" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="7" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="8" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="9" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="10" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="11" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="12" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="13" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="14" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="15" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="16" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="17" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="18" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="19" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="uart_0" TYPE="XIL_UART_V1_hide">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="TX"/>
- <PORTMAP DIR="I" PHYSICAL="RX"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1080033280" BASENAME="C_BASEADDR" BASEVALUE="0x40600000" HIGHDECIMAL="1080098815" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4060ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="4"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="LEDs_4Bits" IPTYPE="PERIPHERAL" MHS_INDEX="12" MODCLASS="PERIPHERAL" MODTYPE="axi_gpio">
- <DESCRIPTION TYPE="SHORT">AXI General Purpose IO</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the AXI bus.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_gpio_v1_01_a/doc/ds744_axi_gpio.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40020000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4002ffff"/>
- <PARAMETER MPD_INDEX="3" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="4" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="5" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="6" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="7" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="8" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="9" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="10" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="11" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="12" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="13" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="14" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff"/>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_INSTANTIATED="TRUE" LEFT="3" LSB="0" MHS_INDEX="0" MPD_INDEX="21" MSB="3" NAME="GPIO_IO_O" RIGHT="0" SIGNAME="LEDs_4Bits_TRI_O" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="2" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="3" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="4" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="5" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="6" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="7" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="8" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="9" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="10" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="11" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="12" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="13" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="14" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="15" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="16" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="17" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="18" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="19" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="gpio_0" LEFT="3" LSB="0" MPD_INDEX="20" MSB="3" NAME="GPIO_IO_I" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" LEFT="3" LSB="0" MPD_INDEX="22" MSB="3" NAME="GPIO_IO_T" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="23" MSB="31" NAME="GPIO2_IO_I" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="24" MSB="31" NAME="GPIO2_IO_O" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="25" MSB="31" NAME="GPIO2_IO_T" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="gpio_0" IS_THREE_STATE="TRUE" LEFT="3" LSB="0" MPD_INDEX="26" MSB="3" NAME="GPIO_IO" RIGHT="0" SIGNAME="__NOC__" TRI_I="GPIO_IO_I" TRI_O="GPIO_IO_O" TRI_T="GPIO_IO_T" VECFORMULA="[(C_GPIO_WIDTH-1):0]">
- <DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
- </PORT>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="gpio_0" IS_THREE_STATE="TRUE" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="27" MSB="31" NAME="GPIO2_IO" RIGHT="0" SIGNAME="__NOC__" TRI_I="GPIO2_IO_I" TRI_O="GPIO2_IO_O" TRI_T="GPIO2_IO_T" VECFORMULA="[(C_GPIO2_WIDTH-1):0]">
- <DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
- </PORT>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="gpio_0" TYPE="XIL_AXI_GPIO_V1">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="GPIO_IO_O"/>
- <PORTMAP DIR="I" PHYSICAL="GPIO_IO_I"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO_IO_T"/>
- <PORTMAP DIR="I" PHYSICAL="GPIO2_IO_I"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO2_IO_O"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO2_IO_T"/>
- <PORTMAP DIR="IO" PHYSICAL="GPIO_IO"/>
- <PORTMAP DIR="IO" PHYSICAL="GPIO2_IO"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1073872896" BASENAME="C_BASEADDR" BASEVALUE="0x40020000" HIGHDECIMAL="1073938431" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4002ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="Push_Buttons_4Bits" IPTYPE="PERIPHERAL" MHS_INDEX="13" MODCLASS="PERIPHERAL" MODTYPE="axi_gpio">
- <DESCRIPTION TYPE="SHORT">AXI General Purpose IO</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">General Purpose Input/Output (GPIO) core for the AXI bus.</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_gpio_v1_01_a/doc/ds744_axi_gpio.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x40000000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4000ffff"/>
- <PARAMETER MPD_INDEX="3" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="4" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="5" NAME="C_GPIO_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="6" NAME="C_GPIO2_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="7" NAME="C_ALL_INPUTS" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="8" NAME="C_ALL_INPUTS_2" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="9" NAME="C_INTERRUPT_PRESENT" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="10" NAME="C_DOUT_DEFAULT" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="11" NAME="C_TRI_DEFAULT" TYPE="std_logic_vector" VALUE="0xffffffff"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="12" NAME="C_IS_DUAL" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="13" NAME="C_DOUT_DEFAULT_2" TYPE="std_logic_vector" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="14" NAME="C_TRI_DEFAULT_2" TYPE="std_logic_vector" VALUE="0xffffffff"/>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="gpio_0" IS_INSTANTIATED="TRUE" LEFT="3" LSB="0" MHS_INDEX="0" MPD_INDEX="20" MSB="3" NAME="GPIO_IO_I" RIGHT="0" SIGNAME="Push_Buttons_4Bits_TRI_I" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="19" NAME="IP2INTC_Irpt" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="Push_Buttons_4Bits_IP2INTC_Irpt"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="2" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="3" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="4" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="5" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="6" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="7" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="8" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="9" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="10" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="11" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="12" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="13" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="14" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="15" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="16" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="17" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="18" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" LEFT="3" LSB="0" MPD_INDEX="21" MSB="3" NAME="GPIO_IO_O" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" LEFT="3" LSB="0" MPD_INDEX="22" MSB="3" NAME="GPIO_IO_T" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO_WIDTH-1):0]"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="23" MSB="31" NAME="GPIO2_IO_I" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="24" MSB="31" NAME="GPIO2_IO_O" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="gpio_0" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="25" MSB="31" NAME="GPIO2_IO_T" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_GPIO2_WIDTH-1):0]"/>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="gpio_0" IS_THREE_STATE="TRUE" LEFT="3" LSB="0" MPD_INDEX="26" MSB="3" NAME="GPIO_IO" RIGHT="0" SIGNAME="__NOC__" TRI_I="GPIO_IO_I" TRI_O="GPIO_IO_O" TRI_T="GPIO_IO_T" VECFORMULA="[(C_GPIO_WIDTH-1):0]">
- <DESCRIPTION>GPIO1 Data IO</DESCRIPTION>
- </PORT>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="gpio_0" IS_THREE_STATE="TRUE" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="27" MSB="31" NAME="GPIO2_IO" RIGHT="0" SIGNAME="__NOC__" TRI_I="GPIO2_IO_I" TRI_O="GPIO2_IO_O" TRI_T="GPIO2_IO_T" VECFORMULA="[(C_GPIO2_WIDTH-1):0]">
- <DESCRIPTION>GPIO2 Data IO</DESCRIPTION>
- </PORT>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="gpio_0" TYPE="XIL_AXI_GPIO_V1">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="GPIO_IO_I"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO_IO_O"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO_IO_T"/>
- <PORTMAP DIR="I" PHYSICAL="GPIO2_IO_I"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO2_IO_O"/>
- <PORTMAP DIR="O" PHYSICAL="GPIO2_IO_T"/>
- <PORTMAP DIR="IO" PHYSICAL="GPIO_IO"/>
- <PORTMAP DIR="IO" PHYSICAL="GPIO2_IO"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1073741824" BASENAME="C_BASEADDR" BASEVALUE="0x40000000" HIGHDECIMAL="1073807359" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4000ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="3"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="1.02.a" INSTANCE="MCB_DDR3" IPTYPE="PERIPHERAL" MHS_INDEX="14" MODCLASS="MEMORY_CNTLR" MODTYPE="axi_s6_ddrx">
- <DESCRIPTION TYPE="SHORT">AXI S6 Memory Controller(DDR/DDR2/DDR3)</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Spartan-6 memory controller</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_s6_ddrx_v1_02_a/doc/axi_s6_ddrx.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_MCB_LOC" VALUE="MEMC3"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="1" NAME="C_MCB_RZQ_LOC" TYPE="STRING" VALUE="K7"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="2" NAME="C_MCB_ZIO_LOC" TYPE="STRING" VALUE="R7"/>
- <PARAMETER MPD_INDEX="3" NAME="C_MCB_PERFORMANCE" TYPE="STRING" VALUE="STANDARD"/>
- <PARAMETER MPD_INDEX="4" NAME="C_BYPASS_CORE_UCF" VALUE="0"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="5" NAME="C_S0_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x80000000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="6" NAME="C_S0_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x807FFFFF"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="7" NAME="C_S1_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="8" NAME="C_S1_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="9" NAME="C_S2_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="10" NAME="C_S2_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="11" NAME="C_S3_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="12" NAME="C_S3_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="13" NAME="C_S4_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="14" NAME="C_S4_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="MEMORY" MPD_INDEX="15" NAME="C_S5_AXI_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0xFFFFFFFF"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="MEMORY" MPD_INDEX="16" NAME="C_S5_AXI_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000000"/>
- <PARAMETER MPD_INDEX="17" NAME="C_MEM_TYPE" TYPE="STRING" VALUE="DDR3"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="18" NAME="C_MEM_PARTNO" TYPE="STRING" VALUE="MT41J64M16XX-187E"/>
- <PARAMETER MPD_INDEX="19" NAME="C_MEM_BASEPARTNO" TYPE="STRING" VALUE="NOT_SET"/>
- <PARAMETER MPD_INDEX="20" NAME="C_NUM_DQ_PINS" TYPE="INTEGER" VALUE="16"/>
- <PARAMETER MPD_INDEX="21" NAME="C_MEM_ADDR_WIDTH" TYPE="INTEGER" VALUE="13"/>
- <PARAMETER MPD_INDEX="22" NAME="C_MEM_BANKADDR_WIDTH" TYPE="INTEGER" VALUE="3"/>
- <PARAMETER MPD_INDEX="23" NAME="C_MEM_NUM_COL_BITS" TYPE="INTEGER" VALUE="10"/>
- <PARAMETER MPD_INDEX="24" NAME="C_MEM_TRAS" TYPE="INTEGER" VALUE="-1"/>
- <PARAMETER MPD_INDEX="25" NAME="C_MEM_TRCD" TYPE="INTEGER" VALUE="-1"/>
- <PARAMETER MPD_INDEX="26" NAME="C_MEM_TREFI" TYPE="INTEGER" VALUE="-1"/>
- <PARAMETER MPD_INDEX="27" NAME="C_MEM_TRFC" TYPE="INTEGER" VALUE="-1"/>
- <PARAMETER MPD_INDEX="28" NAME="C_MEM_TRP" TYPE="INTEGER" VALUE="-1"/>
- <PARAMETER MPD_INDEX="29" NAME="C_MEM_TWR" TYPE="INTEGER" VALUE="-1"/>
- <PARAMETER MPD_INDEX="30" NAME="C_MEM_TRTP" TYPE="INTEGER" VALUE="-1"/>
- <PARAMETER MPD_INDEX="31" NAME="C_MEM_TWTR" TYPE="INTEGER" VALUE="-1"/>
- <PARAMETER MPD_INDEX="32" NAME="C_PORT_CONFIG" TYPE="STRING" VALUE="B32_B32_B32_B32"/>
- <PARAMETER MPD_INDEX="33" NAME="C_SKIP_IN_TERM_CAL" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="34" NAME="C_SKIP_IN_TERM_CAL_VALUE" TYPE="STRING" VALUE="NONE"/>
- <PARAMETER MPD_INDEX="35" NAME="C_MEMCLK_PERIOD" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="36" NAME="C_MEM_ADDR_ORDER" TYPE="STRING" VALUE="ROW_BANK_COLUMN"/>
- <PARAMETER MPD_INDEX="37" NAME="C_MEM_TZQINIT_MAXCNT" TYPE="INTEGER" VALUE="512"/>
- <PARAMETER MPD_INDEX="38" NAME="C_MEM_CAS_LATENCY" TYPE="INTEGER" VALUE="6"/>
- <PARAMETER MPD_INDEX="39" NAME="C_SIMULATION" TYPE="STRING" VALUE="FALSE"/>
- <PARAMETER MPD_INDEX="40" NAME="C_MEM_DDR1_2_ODS" TYPE="STRING" VALUE="FULL"/>
- <PARAMETER MPD_INDEX="41" NAME="C_MEM_DDR1_2_ADDR_CONTROL_SSTL_ODS" TYPE="STRING" VALUE="CLASS_II"/>
- <PARAMETER MPD_INDEX="42" NAME="C_MEM_DDR1_2_DATA_CONTROL_SSTL_ODS" TYPE="STRING" VALUE="CLASS_II"/>
- <PARAMETER MPD_INDEX="43" NAME="C_MEM_DDR2_RTT" TYPE="STRING" VALUE="150OHMS"/>
- <PARAMETER MPD_INDEX="44" NAME="C_MEM_DDR2_DIFF_DQS_EN" TYPE="STRING" VALUE="YES"/>
- <PARAMETER MPD_INDEX="45" NAME="C_MEM_DDR2_3_PA_SR" TYPE="STRING" VALUE="FULL"/>
- <PARAMETER MPD_INDEX="46" NAME="C_MEM_DDR2_3_HIGH_TEMP_SR" TYPE="STRING" VALUE="NORMAL"/>
- <PARAMETER MPD_INDEX="47" NAME="C_MEM_DDR3_CAS_WR_LATENCY" TYPE="INTEGER" VALUE="5"/>
- <PARAMETER MPD_INDEX="48" NAME="C_MEM_DDR3_CAS_LATENCY" TYPE="INTEGER" VALUE="6"/>
- <PARAMETER MPD_INDEX="49" NAME="C_MEM_DDR3_ODS" TYPE="STRING" VALUE="DIV6"/>
- <PARAMETER MPD_INDEX="50" NAME="C_MEM_DDR3_RTT" TYPE="STRING" VALUE="DIV4"/>
- <PARAMETER MPD_INDEX="51" NAME="C_MEM_DDR3_AUTO_SR" TYPE="STRING" VALUE="ENABLED"/>
- <PARAMETER MPD_INDEX="52" NAME="C_MEM_MOBILE_PA_SR" TYPE="STRING" VALUE="FULL"/>
- <PARAMETER MPD_INDEX="53" NAME="C_MEM_MDDR_ODS" TYPE="STRING" VALUE="FULL"/>
- <PARAMETER MPD_INDEX="54" NAME="C_ARB_ALGORITHM" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="55" NAME="C_ARB_NUM_TIME_SLOTS" TYPE="INTEGER" VALUE="12"/>
- <PARAMETER MPD_INDEX="56" NAME="C_ARB_TIME_SLOT_0" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000000001010011"/>
- <PARAMETER MPD_INDEX="57" NAME="C_ARB_TIME_SLOT_1" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000001010011000"/>
- <PARAMETER MPD_INDEX="58" NAME="C_ARB_TIME_SLOT_2" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000010011000001"/>
- <PARAMETER MPD_INDEX="59" NAME="C_ARB_TIME_SLOT_3" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000011000001010"/>
- <PARAMETER MPD_INDEX="60" NAME="C_ARB_TIME_SLOT_4" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000000001010011"/>
- <PARAMETER MPD_INDEX="61" NAME="C_ARB_TIME_SLOT_5" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000001010011000"/>
- <PARAMETER MPD_INDEX="62" NAME="C_ARB_TIME_SLOT_6" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000010011000001"/>
- <PARAMETER MPD_INDEX="63" NAME="C_ARB_TIME_SLOT_7" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000011000001010"/>
- <PARAMETER MPD_INDEX="64" NAME="C_ARB_TIME_SLOT_8" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000000001010011"/>
- <PARAMETER MPD_INDEX="65" NAME="C_ARB_TIME_SLOT_9" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000001010011000"/>
- <PARAMETER MPD_INDEX="66" NAME="C_ARB_TIME_SLOT_10" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000010011000001"/>
- <PARAMETER MPD_INDEX="67" NAME="C_ARB_TIME_SLOT_11" TYPE="STD_LOGIC_VECTOR" VALUE="0b000000011000001010"/>
- <PARAMETER MPD_INDEX="68" NAME="C_S0_AXI_ENABLE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="69" NAME="C_S0_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="70" NAME="C_S0_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="3"/>
- <PARAMETER MPD_INDEX="71" NAME="C_S0_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="72" NAME="C_S0_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="73" NAME="C_S0_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="74" NAME="C_S0_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="75" NAME="C_S0_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="76" NAME="C_S0_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000"/>
- <PARAMETER MPD_INDEX="77" NAME="C_S0_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="78" NAME="C_S0_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="79" NAME="C_S0_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="80" NAME="C_INTERCONNECT_S0_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="81" NAME="C_INTERCONNECT_S0_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="82" NAME="C_S1_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="83" NAME="C_S1_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="84" NAME="C_S1_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="85" NAME="C_S1_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="86" NAME="C_S1_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="87" NAME="C_S1_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="88" NAME="C_S1_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="89" NAME="C_S1_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="90" NAME="C_S1_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000"/>
- <PARAMETER MPD_INDEX="91" NAME="C_S1_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="92" NAME="C_S1_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="93" NAME="C_S1_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="94" NAME="C_INTERCONNECT_S1_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="95" NAME="C_INTERCONNECT_S1_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="96" NAME="C_S2_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="97" NAME="C_S2_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="98" NAME="C_S2_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="99" NAME="C_S2_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="100" NAME="C_S2_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="101" NAME="C_S2_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="102" NAME="C_S2_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="103" NAME="C_S2_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="104" NAME="C_S2_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000"/>
- <PARAMETER MPD_INDEX="105" NAME="C_S2_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="106" NAME="C_S2_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="107" NAME="C_S2_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="108" NAME="C_INTERCONNECT_S2_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="109" NAME="C_INTERCONNECT_S2_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="110" NAME="C_S3_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="111" NAME="C_S3_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="112" NAME="C_S3_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="113" NAME="C_S3_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="114" NAME="C_S3_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="115" NAME="C_S3_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="116" NAME="C_S3_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="117" NAME="C_S3_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="118" NAME="C_S3_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000"/>
- <PARAMETER MPD_INDEX="119" NAME="C_S3_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="120" NAME="C_S3_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="121" NAME="C_S3_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="122" NAME="C_INTERCONNECT_S3_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="123" NAME="C_INTERCONNECT_S3_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="124" NAME="C_S4_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="125" NAME="C_S4_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="126" NAME="C_S4_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="127" NAME="C_S4_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="128" NAME="C_S4_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="129" NAME="C_S4_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="130" NAME="C_S4_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="131" NAME="C_S4_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="132" NAME="C_S4_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000"/>
- <PARAMETER MPD_INDEX="133" NAME="C_S4_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="134" NAME="C_S4_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="135" NAME="C_S4_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="136" NAME="C_INTERCONNECT_S4_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="137" NAME="C_INTERCONNECT_S4_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="138" NAME="C_S5_AXI_ENABLE" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="139" NAME="C_S5_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="140" NAME="C_S5_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="141" NAME="C_S5_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="142" NAME="C_S5_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="143" NAME="C_S5_AXI_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="144" NAME="C_S5_AXI_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="145" NAME="C_S5_AXI_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="146" NAME="C_S5_AXI_REG_EN0" TYPE="STD_LOGIC_VECTOR" VALUE="0x00000"/>
- <PARAMETER MPD_INDEX="147" NAME="C_S5_AXI_REG_EN1" TYPE="STD_LOGIC_VECTOR" VALUE="0x01000"/>
- <PARAMETER MPD_INDEX="148" NAME="C_S5_AXI_STRICT_COHERENCY" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="149" NAME="C_S5_AXI_ENABLE_AP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="150" NAME="C_INTERCONNECT_S5_AXI_READ_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="151" NAME="C_INTERCONNECT_S5_AXI_WRITE_ACCEPTANCE" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="152" NAME="C_MCB_USE_EXTERNAL_BUFPLL" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="153" NAME="C_SYS_RST_PRESENT" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S0_AXI_MASTERS" VALUE="microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S0_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" NAME="C_INTERCONNECT_S0_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" NAME="C_INTERCONNECT_S0_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" NAME="C_INTERCONNECT_S0_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" NAME="C_INTERCONNECT_S0_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="17" NAME="mcbx_dram_clk" SIGIS="CLK" SIGNAME="mcbx_dram_clk"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="18" NAME="mcbx_dram_clk_n" SIGIS="CLK" SIGNAME="mcbx_dram_clk_n"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="16" NAME="mcbx_dram_cke" SIGNAME="mcbx_dram_cke"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="26" NAME="mcbx_dram_odt" SIGNAME="mcbx_dram_odt"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="13" NAME="mcbx_dram_ras_n" SIGNAME="mcbx_dram_ras_n"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="14" NAME="mcbx_dram_cas_n" SIGNAME="mcbx_dram_cas_n"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="15" NAME="mcbx_dram_we_n" SIGNAME="mcbx_dram_we_n"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="24" NAME="mcbx_dram_udm" SIGNAME="mcbx_dram_udm"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="25" NAME="mcbx_dram_ldm" SIGNAME="mcbx_dram_ldm"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="memory_0" IS_INSTANTIATED="TRUE" LEFT="2" LSB="0" MHS_INDEX="9" MPD_INDEX="12" MSB="2" NAME="mcbx_dram_ba" RIGHT="0" SIGNAME="mcbx_dram_ba" VECFORMULA="[C_MEM_BANKADDR_WIDTH-1:0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="memory_0" IS_INSTANTIATED="TRUE" LEFT="12" LSB="0" MHS_INDEX="10" MPD_INDEX="11" MSB="12" NAME="mcbx_dram_addr" RIGHT="0" SIGNAME="mcbx_dram_addr" VECFORMULA="[C_MEM_ADDR_WIDTH-1:0]"/>
- <PORT DIR="O" IOS="memory_0" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="27" NAME="mcbx_dram_ddr3_rst" SIGNAME="mcbx_dram_ddr3_rst"/>
- <PORT DIR="IO" ENDIAN="LITTLE" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" LEFT="15" LSB="0" MHS_INDEX="12" MPD_INDEX="19" MSB="15" NAME="mcbx_dram_dq" RIGHT="0" SIGNAME="mcbx_dram_dq" VECFORMULA="[C_NUM_DQ_PINS-1:0]"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="13" MPD_INDEX="20" NAME="mcbx_dram_dqs" SIGNAME="mcbx_dram_dqs"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="14" MPD_INDEX="21" NAME="mcbx_dram_dqs_n" SIGNAME="mcbx_dram_dqs_n"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="15" MPD_INDEX="22" NAME="mcbx_dram_udqs" SIGNAME="mcbx_dram_udqs"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="16" MPD_INDEX="23" NAME="mcbx_dram_udqs_n" SIGNAME="mcbx_dram_udqs_n"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="17" MPD_INDEX="28" NAME="rzq" SIGNAME="rzq"/>
- <PORT DIR="IO" IOS="memory_0" IS_INSTANTIATED="TRUE" IS_THREE_STATE="FALSE" MHS_INDEX="18" MPD_INDEX="29" NAME="zio" SIGNAME="zio"/>
- <PORT BUS="S0_AXI" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="19" MPD_INDEX="32" NAME="s0_axi_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="100000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="20" MPD_INDEX="30" NAME="ui_clk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="600000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="21" MPD_INDEX="0" NAME="sysclk_2x" SIGIS="CLK" SIGNAME="clk_600_0000MHzPLL0_nobuf"/>
- <PORT CLKFREQUENCY="600000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="22" MPD_INDEX="1" NAME="sysclk_2x_180" SIGIS="CLK" SIGNAME="clk_600_0000MHz180PLL0_nobuf"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="23" MPD_INDEX="10" NAME="SYS_RST" SIGIS="RST" SIGNAME="proc_sys_reset_0_BUS_STRUCT_RESET"/>
- <PORT DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="24" MPD_INDEX="4" NAME="PLL_LOCK" SIGNAME="proc_sys_reset_0_Dcm_locked"/>
- <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="2" NAME="pll_ce_0" SIGNAME="__NOC__"/>
- <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="3" NAME="pll_ce_90" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="5" NAME="pll_lock_bufpll_o" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="6" NAME="sysclk_2x_bufpll_o" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="7" NAME="sysclk_2x_180_bufpll_o" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="8" NAME="pll_ce_0_bufpll_o" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="9" NAME="pll_ce_90_bufpll_o" SIGNAME="__NOC__"/>
- <PORT DIR="O" MPD_INDEX="31" NAME="uo_done_cal" SIGNAME="__NOC__"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_aresetn" DIR="I" MPD_INDEX="33" NAME="s0_axi_aresetn" SIGIS="RST" SIGNAME="axi4_0_M_aresetn"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awid" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="34" MSB="2" NAME="s0_axi_awid" RIGHT="0" SIGNAME="axi4_0_M_awid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awaddr" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="35" MSB="31" NAME="s0_axi_awaddr" RIGHT="0" SIGNAME="axi4_0_M_awaddr" VECFORMULA="[(C_S0_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awlen" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="36" MSB="7" NAME="s0_axi_awlen" RIGHT="0" SIGNAME="axi4_0_M_awlen" VECFORMULA="[7:0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awsize" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="37" MSB="2" NAME="s0_axi_awsize" RIGHT="0" SIGNAME="axi4_0_M_awsize" VECFORMULA="[2:0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awburst" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="38" MSB="1" NAME="s0_axi_awburst" RIGHT="0" SIGNAME="axi4_0_M_awburst" VECFORMULA="[1:0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awlock" DIR="I" MPD_INDEX="39" NAME="s0_axi_awlock" SIGNAME="axi4_0_M_awlock" VECFORMULA="[0:0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awcache" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="40" MSB="3" NAME="s0_axi_awcache" RIGHT="0" SIGNAME="axi4_0_M_awcache" VECFORMULA="[3:0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awprot" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="41" MSB="2" NAME="s0_axi_awprot" RIGHT="0" SIGNAME="axi4_0_M_awprot" VECFORMULA="[2:0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awqos" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="42" MSB="3" NAME="s0_axi_awqos" RIGHT="0" SIGNAME="axi4_0_M_awqos" VECFORMULA="[3:0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awvalid" DIR="I" MPD_INDEX="43" NAME="s0_axi_awvalid" SIGNAME="axi4_0_M_awvalid"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_awready" DIR="O" MPD_INDEX="44" NAME="s0_axi_awready" SIGNAME="axi4_0_M_awready"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wdata" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="45" MSB="31" NAME="s0_axi_wdata" RIGHT="0" SIGNAME="axi4_0_M_wdata" VECFORMULA="[(C_S0_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wstrb" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="46" MSB="3" NAME="s0_axi_wstrb" RIGHT="0" SIGNAME="axi4_0_M_wstrb" VECFORMULA="[((C_S0_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wlast" DIR="I" MPD_INDEX="47" NAME="s0_axi_wlast" SIGNAME="axi4_0_M_wlast"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wvalid" DIR="I" MPD_INDEX="48" NAME="s0_axi_wvalid" SIGNAME="axi4_0_M_wvalid"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_wready" DIR="O" MPD_INDEX="49" NAME="s0_axi_wready" SIGNAME="axi4_0_M_wready"/>
- <PORT BUS="S0_AXI" DEF_SIGNAME="axi4_0_M_bid" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="50" MSB="2" NAME="s0_axi_bid" RIGHT="0" SIGNAME="axi4_0_M_bid" VECFORMULA="[(C_S0_AXI_ID_WIDTH-1):0]"/>
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- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="251" MSB="7" NAME="s5_axi_arlen" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="252" MSB="2" NAME="s5_axi_arsize" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="253" MSB="1" NAME="s5_axi_arburst" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="254" NAME="s5_axi_arlock" SIGNAME="__NOC__" VECFORMULA="[0:0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="255" MSB="3" NAME="s5_axi_arcache" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="256" MSB="2" NAME="s5_axi_arprot" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[2:0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="257" MSB="3" NAME="s5_axi_arqos" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="258" NAME="s5_axi_arvalid" SIGNAME="__NOC__"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="259" NAME="s5_axi_arready" SIGNAME="__NOC__"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="260" MSB="3" NAME="s5_axi_rid" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S5_AXI_ID_WIDTH-1):0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="261" MSB="31" NAME="s5_axi_rdata" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[(C_S5_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="262" MSB="1" NAME="s5_axi_rresp" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[1:0]"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="263" NAME="s5_axi_rlast" SIGNAME="__NOC__"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="264" NAME="s5_axi_rvalid" SIGNAME="__NOC__"/>
- <PORT BUS="S5_AXI" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="265" NAME="s5_axi_rready" SIGNAME="__NOC__"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S0_AXI" PROTOCOL="AXI4" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_aresetn"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awid"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awlen"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awsize"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awburst"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awlock"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awcache"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awprot"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awqos"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_wdata"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_wstrb"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_wlast"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_wready"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_bid"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_arid"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_araddr"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_arlen"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_arburst"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_arlock"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_arcache"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_arprot"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s0_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s0_axi_rready"/>
- </PORTMAPS>
- <MASTERS>
- <MASTER BUSINTERFACE="M_AXI_DC" INSTANCE="microblaze_0"/>
- <MASTER BUSINTERFACE="M_AXI_IC" INSTANCE="microblaze_0"/>
- <MASTER BUSINTERFACE="M_AXI_SG" INSTANCE="ETHERNET_dma"/>
- <MASTER BUSINTERFACE="M_AXI_MM2S" INSTANCE="ETHERNET_dma"/>
- <MASTER BUSINTERFACE="M_AXI_S2MM" INSTANCE="ETHERNET_dma"/>
- </MASTERS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="1" NAME="S1_AXI" PROTOCOL="AXI4" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_aresetn"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awid"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awlen"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awsize"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awburst"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awlock"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awcache"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awprot"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awqos"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_wdata"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_wstrb"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_wlast"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_wready"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_bid"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arid"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_araddr"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arlen"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arburst"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arlock"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arcache"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arprot"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s1_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s1_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="2" NAME="S2_AXI" PROTOCOL="AXI4" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_aresetn"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awid"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awlen"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awsize"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awburst"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awlock"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awcache"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awprot"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awqos"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_wdata"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_wstrb"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_wlast"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_wready"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_bid"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arid"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_araddr"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arlen"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arburst"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arlock"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arcache"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arprot"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s2_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s2_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="3" NAME="S3_AXI" PROTOCOL="AXI4" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_aresetn"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awid"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awlen"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awsize"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awburst"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awlock"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awcache"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awprot"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awqos"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_wdata"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_wstrb"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_wlast"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_wready"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_bid"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arid"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_araddr"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arlen"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arburst"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arlock"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arcache"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arprot"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s3_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s3_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="4" NAME="S4_AXI" PROTOCOL="AXI4" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_aresetn"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awid"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awlen"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awsize"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awburst"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awlock"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awcache"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awprot"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awqos"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_wdata"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_wstrb"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_wlast"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_wready"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_bid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arid"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_araddr"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arlen"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arburst"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arlock"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arcache"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arprot"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s4_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s4_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_VALID="FALSE" MPD_INDEX="5" NAME="S5_AXI" PROTOCOL="AXI4" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_aresetn"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awid"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awlen"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awsize"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awburst"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awlock"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awcache"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awprot"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awqos"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_wdata"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_wstrb"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_wlast"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_wready"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_bid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arid"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_araddr"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arlen"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arsize"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arburst"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arlock"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arcache"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arprot"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arqos"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_arready"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rid"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rresp"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rlast"/>
- <PORTMAP DIR="O" PHYSICAL="s5_axi_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s5_axi_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="memory_0" TYPE="hide_122_XIL_MEMORY_V1">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_clk"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_clk_n"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_cke"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_odt"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_ras_n"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_cas_n"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_we_n"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_udm"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_ldm"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_ba"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_addr"/>
- <PORTMAP DIR="O" PHYSICAL="mcbx_dram_ddr3_rst"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_dq"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_dqs"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_dqs_n"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_udqs"/>
- <PORTMAP DIR="IO" PHYSICAL="mcbx_dram_udqs_n"/>
- <PORTMAP DIR="IO" PHYSICAL="rzq"/>
- <PORTMAP DIR="IO" PHYSICAL="zio"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="2147483648" BASENAME="C_S0_AXI_BASEADDR" BASEVALUE="0x80000000" HIGHDECIMAL="2155872255" HIGHNAME="C_S0_AXI_HIGHADDR" HIGHVALUE="0x807FFFFF" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="8388608" SIZEABRV="8M">
- <SLAVES>
- <SLAVE BUSINTERFACE="S0_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S1_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S1_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S1_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S2_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S2_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S2_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S3_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S3_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S3_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S4_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S4_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S4_AXI"/>
- </SLAVES>
- </MEMRANGE>
- <MEMRANGE BASEDECIMAL="4294967295" BASENAME="C_S5_AXI_BASEADDR" BASEVALUE="0xFFFFFFFF" HIGHDECIMAL="0" HIGHNAME="C_S5_AXI_HIGHADDR" HIGHVALUE="0x00000000" IS_CACHEABLE="TRUE" IS_DCACHED="TRUE" IS_ICACHED="TRUE" IS_VALID="FALSE" MEMTYPE="MEMORY" MINSIZE="0x1000" SIZE="0" SIZEABRV="U">
- <SLAVES>
- <SLAVE BUSINTERFACE="S5_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- </MODULE>
- <MODULE HWVERSION="2.01.a" INSTANCE="ETHERNET" IPTYPE="PERIPHERAL" MHS_INDEX="15" MODCLASS="PERIPHERAL" MODTYPE="axi_ethernet">
- <DESCRIPTION TYPE="SHORT">AXI Ethernet</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">AXI Ethernet MAC</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_ethernet_v2_01_a/doc/ds759_axi_ethernet.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO EXPIRESON="Jan-30-2016" ICON_NAME="ps_core_preferred" STATE="Hardware Evaluation" TYPE="Hardware_Evaluation"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER MPD_INDEX="1" NAME="C_AXI_STR_TXC_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="2" NAME="C_AXI_STR_TXD_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="3" NAME="C_AXI_STR_RXS_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="4" NAME="C_AXI_STR_RXD_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="5" NAME="C_AXI_STR_TXC_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_CTRL"/>
- <PARAMETER MPD_INDEX="6" NAME="C_AXI_STR_TXD_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_DATA"/>
- <PARAMETER MPD_INDEX="7" NAME="C_AXI_STR_RXS_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_CTRL"/>
- <PARAMETER MPD_INDEX="8" NAME="C_AXI_STR_RXD_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_DATA"/>
- <PARAMETER MPD_INDEX="9" NAME="C_AXI_STR_AVBTX_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_AVB_TX"/>
- <PARAMETER MPD_INDEX="10" NAME="C_AXI_STR_AVBRX_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_AVB_RX"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="11" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="12" NAME="C_S_AXI_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="50000000"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="26" MPD_INDEX="13" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x41240000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="27" MPD_INDEX="14" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4127ffff"/>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="16" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="17" NAME="C_S_AXI_ID_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="18" NAME="C_TRANS" TYPE="STRING" VALUE="A"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="19" NAME="C_PHYADDR" TYPE="std_logic_vector" VALUE="0B00001"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="20" NAME="C_INCLUDE_IO" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="21" NAME="C_TYPE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="22" NAME="C_PHY_TYPE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="23" NAME="C_HALFDUP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="24" NAME="C_TXMEM" TYPE="INTEGER" VALUE="4096"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="25" NAME="C_RXMEM" TYPE="INTEGER" VALUE="4096"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="26" NAME="C_TXCSUM" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="27" NAME="C_RXCSUM" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="28" NAME="C_TXVLAN_TRAN" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="29" NAME="C_RXVLAN_TRAN" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="30" NAME="C_TXVLAN_TAG" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="14" MPD_INDEX="31" NAME="C_RXVLAN_TAG" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="15" MPD_INDEX="32" NAME="C_TXVLAN_STRP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="16" MPD_INDEX="33" NAME="C_RXVLAN_STRP" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="17" MPD_INDEX="34" NAME="C_MCAST_EXTEND" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="18" MPD_INDEX="35" NAME="C_STATS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="19" MPD_INDEX="36" NAME="C_AVB" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="37" NAME="C_SIMULATION" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="20" NAME="C_INTERCONNECT_S_AXI_IS_ACLK_ASYNC" VALUE="0"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="21" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="22" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="23" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="24" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="25" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="IO" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" IS_THREE_STATE="TRUE" MHS_INDEX="0" MPD_INDEX="108" NAME="MDIO" SIGNAME="ETHERNET_MDIO" TRI_I="MDIO_I" TRI_O="MDIO_O" TRI_T="MDIO_T"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="83" NAME="MDC" SIGNAME="ETHERNET_MDC"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="65" NAME="GMII_TX_ER" SIGNAME="ETHERNET_TX_ER"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" LEFT="7" LSB="0" MHS_INDEX="3" MPD_INDEX="63" MSB="7" NAME="GMII_TXD" RIGHT="0" SIGNAME="ETHERNET_TXD" VECFORMULA="[7:0]"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="64" NAME="GMII_TX_EN" SIGNAME="ETHERNET_TX_EN"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="60" NAME="MII_TX_CLK" SIGNAME="ETHERNET_MII_TX_CLK"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="66" NAME="GMII_TX_CLK" SIGNAME="ETHERNET_TX_CLK"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" LEFT="7" LSB="0" MHS_INDEX="7" MPD_INDEX="67" MSB="7" NAME="GMII_RXD" RIGHT="0" SIGNAME="ETHERNET_RXD" VECFORMULA="[7:0]"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="69" NAME="GMII_RX_ER" SIGNAME="ETHERNET_RX_ER"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="70" NAME="GMII_RX_CLK" SIGNAME="ETHERNET_RX_CLK"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="68" NAME="GMII_RX_DV" SIGNAME="ETHERNET_RX_DV"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="48" NAME="PHY_RST_N" SIGNAME="ETHERNET_PHY_RST_N"/>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="12" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT CLKFREQUENCY="125000000" DIR="I" IOS="AXIETHERNETIF" IS_INSTANTIATED="TRUE" MHS_INDEX="13" MPD_INDEX="49" NAME="GTX_CLK" SIGIS="CLK" SIGNAME="clk_125_0000MHz"/>
- <PORT CLKFREQUENCY="200000000" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="14" MPD_INDEX="52" NAME="REF_CLK" SIGIS="CLK" SIGNAME="clk_200_0000MHzPLL0"/>
- <PORT BUS="AXI_STR_TXD" CLKFREQUENCY="100000000" DEF_SIGNAME="ACLK" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="15" MPD_INDEX="20" NAME="AXI_STR_TXD_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="AXI_STR_TXC" CLKFREQUENCY="100000000" DEF_SIGNAME="ACLK" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="16" MPD_INDEX="27" NAME="AXI_STR_TXC_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="AXI_STR_RXD" CLKFREQUENCY="100000000" DEF_SIGNAME="ACLK" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="17" MPD_INDEX="34" NAME="AXI_STR_RXD_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="AXI_STR_RXS" CLKFREQUENCY="100000000" DEF_SIGNAME="ACLK" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="18" MPD_INDEX="41" NAME="AXI_STR_RXS_ACLK" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="ARESETN" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="19" MPD_INDEX="21" NAME="AXI_STR_TXD_ARESETN" SIGIS="RST" SIGNAME="AXI_STR_TXD_ARESETN"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="ARESETN" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="20" MPD_INDEX="28" NAME="AXI_STR_TXC_ARESETN" SIGIS="RST" SIGNAME="AXI_STR_TXC_ARESETN"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="ARESETN" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="21" MPD_INDEX="35" NAME="AXI_STR_RXD_ARESETN" SIGIS="RST" SIGNAME="AXI_STR_RXD_ARESETN"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="ARESETN" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="22" MPD_INDEX="42" NAME="AXI_STR_RXS_ARESETN" SIGIS="RST" SIGNAME="AXI_STR_RXS_ARESETN"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="23" MPD_INDEX="2" NAME="INTERRUPT" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="ETHERNET_INTERRUPT"/>
- <PORT BUS="S_AXI:AXI_STR_TXC:AXI_STR_TXD:AXI_STR_RXS:AXI_STR_RXD" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="3" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="4" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="5" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="6" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="7" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="8" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="9" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="10" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="11" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="12" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="13" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="14" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="15" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="16" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="17" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="18" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="19" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TVALID" DIR="I" MPD_INDEX="22" NAME="AXI_STR_TXD_TVALID" SIGNAME="ETHERNET_dma_txd_TVALID"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TREADY" DIR="O" MPD_INDEX="23" NAME="AXI_STR_TXD_TREADY" SIGNAME="ETHERNET_dma_txd_TREADY"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TLAST" DIR="I" MPD_INDEX="24" NAME="AXI_STR_TXD_TLAST" SIGNAME="ETHERNET_dma_txd_TLAST"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TKEEP" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="25" MSB="3" NAME="AXI_STR_TXD_TKEEP" RIGHT="0" SIGNAME="ETHERNET_dma_txd_TKEEP" VECFORMULA="[3:0]"/>
- <PORT BUS="AXI_STR_TXD" DEF_SIGNAME="ETHERNET_dma_txd_TDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="26" MSB="31" NAME="AXI_STR_TXD_TDATA" RIGHT="0" SIGNAME="ETHERNET_dma_txd_TDATA" VECFORMULA="[31:0]"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TVALID" DIR="I" MPD_INDEX="29" NAME="AXI_STR_TXC_TVALID" SIGNAME="ETHERNET_dma_txc_TVALID"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TREADY" DIR="O" MPD_INDEX="30" NAME="AXI_STR_TXC_TREADY" SIGNAME="ETHERNET_dma_txc_TREADY"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TLAST" DIR="I" MPD_INDEX="31" NAME="AXI_STR_TXC_TLAST" SIGNAME="ETHERNET_dma_txc_TLAST"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TKEEP" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="32" MSB="3" NAME="AXI_STR_TXC_TKEEP" RIGHT="0" SIGNAME="ETHERNET_dma_txc_TKEEP" VECFORMULA="[3:0]"/>
- <PORT BUS="AXI_STR_TXC" DEF_SIGNAME="ETHERNET_dma_txc_TDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="33" MSB="31" NAME="AXI_STR_TXC_TDATA" RIGHT="0" SIGNAME="ETHERNET_dma_txc_TDATA" VECFORMULA="[31:0]"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TVALID" DIR="O" MPD_INDEX="36" NAME="AXI_STR_RXD_TVALID" SIGNAME="ETHERNET_dma_rxd_TVALID"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TREADY" DIR="I" MPD_INDEX="37" NAME="AXI_STR_RXD_TREADY" SIGNAME="ETHERNET_dma_rxd_TREADY"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TLAST" DIR="O" MPD_INDEX="38" NAME="AXI_STR_RXD_TLAST" SIGNAME="ETHERNET_dma_rxd_TLAST"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TKEEP" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="39" MSB="3" NAME="AXI_STR_RXD_TKEEP" RIGHT="0" SIGNAME="ETHERNET_dma_rxd_TKEEP" VECFORMULA="[3:0]"/>
- <PORT BUS="AXI_STR_RXD" DEF_SIGNAME="ETHERNET_dma_rxd_TDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="40" MSB="31" NAME="AXI_STR_RXD_TDATA" RIGHT="0" SIGNAME="ETHERNET_dma_rxd_TDATA" VECFORMULA="[31:0]"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TVALID" DIR="O" MPD_INDEX="43" NAME="AXI_STR_RXS_TVALID" SIGNAME="ETHERNET_dma_rxs_TVALID"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TREADY" DIR="I" MPD_INDEX="44" NAME="AXI_STR_RXS_TREADY" SIGNAME="ETHERNET_dma_rxs_TREADY"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TLAST" DIR="O" MPD_INDEX="45" NAME="AXI_STR_RXS_TLAST" SIGNAME="ETHERNET_dma_rxs_TLAST"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TKEEP" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="46" MSB="3" NAME="AXI_STR_RXS_TKEEP" RIGHT="0" SIGNAME="ETHERNET_dma_rxs_TKEEP" VECFORMULA="[3:0]"/>
- <PORT BUS="AXI_STR_RXS" DEF_SIGNAME="ETHERNET_dma_rxs_TDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="47" MSB="31" NAME="AXI_STR_RXS_TDATA" RIGHT="0" SIGNAME="ETHERNET_dma_rxs_TDATA" VECFORMULA="[31:0]"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="50" NAME="MGT_CLK_P" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="51" NAME="MGT_CLK_N" SIGNAME="__NOC__"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_VALID="FALSE" LEFT="3" LSB="0" MPD_INDEX="53" MSB="3" NAME="MII_TXD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="54" NAME="MII_TX_EN" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="55" NAME="MII_TX_ER" SIGNAME="__NOC__"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_VALID="FALSE" LEFT="3" LSB="0" MPD_INDEX="56" MSB="3" NAME="MII_RXD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="57" NAME="MII_RX_DV" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="58" NAME="MII_RX_ER" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="59" NAME="MII_RX_CLK" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="61" NAME="MII_COL" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="62" NAME="MII_CRS" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" MPD_INDEX="71" NAME="GMII_COL" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" MPD_INDEX="72" NAME="GMII_CRS" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="73" NAME="TXP" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="74" NAME="TXN" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="75" NAME="RXP" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="76" NAME="RXN" SIGNAME="__NOC__"/>
- <PORT DIR="O" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_VALID="FALSE" LEFT="3" LSB="0" MPD_INDEX="77" MSB="3" NAME="RGMII_TXD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="78" NAME="RGMII_TX_CTL" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="79" NAME="RGMII_TXC" SIGNAME="__NOC__"/>
- <PORT DIR="I" ENDIAN="LITTLE" IOS="AXIETHERNETIF" IS_VALID="FALSE" LEFT="3" LSB="0" MPD_INDEX="80" MSB="3" NAME="RGMII_RXD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[3:0]"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="81" NAME="RGMII_RX_CTL" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" IS_VALID="FALSE" MPD_INDEX="82" NAME="RGMII_RXC" SIGNAME="__NOC__"/>
- <PORT DIR="I" IOS="AXIETHERNETIF" MPD_INDEX="84" NAME="MDIO_I" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" MPD_INDEX="85" NAME="MDIO_O" SIGNAME="__NOC__"/>
- <PORT DIR="O" IOS="AXIETHERNETIF" MPD_INDEX="86" NAME="MDIO_T" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="87" NAME="AXI_STR_AVBTX_ACLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="88" NAME="AXI_STR_AVBTX_ARESETN" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="89" NAME="AXI_STR_AVBTX_TVALID" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="90" NAME="AXI_STR_AVBTX_TREADY" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="91" NAME="AXI_STR_AVBTX_TLAST" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="92" MSB="7" NAME="AXI_STR_AVBTX_TDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="AXI_STR_AVBTX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="93" NAME="AXI_STR_AVBTX_TUSER" SIGNAME="__NOC__" VECFORMULA="[0:0]"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="94" NAME="AXI_STR_AVBRX_ACLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="I" MPD_INDEX="95" NAME="AXI_STR_AVBRX_ARESETN" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="96" NAME="AXI_STR_AVBRX_TVALID" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="97" NAME="AXI_STR_AVBRX_TLAST" SIGNAME="__NOC__"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="98" MSB="7" NAME="AXI_STR_AVBRX_TDATA" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[7:0]"/>
- <PORT BUS="AXI_STR_AVBRX" DEF_SIGNAME="__BUS__" DIR="O" MPD_INDEX="99" NAME="AXI_STR_AVBRX_TUSER" SIGNAME="__NOC__" VECFORMULA="[0:0]"/>
- <PORT DIR="I" IS_VALID="FALSE" MPD_INDEX="100" NAME="RTC_CLK" SIGIS="CLK" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="101" NAME="AV_INTERRUPT_10MS" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="102" NAME="AV_INTERRUPT_PTP_TX" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="103" NAME="AV_INTERRUPT_PTP_RX" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="__NOC__"/>
- <PORT DIR="O" ENDIAN="LITTLE" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="104" MSB="31" NAME="AV_RTC_NANOSECFIELD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[31:0]"/>
- <PORT DIR="O" ENDIAN="LITTLE" IS_VALID="FALSE" LEFT="47" LSB="0" MPD_INDEX="105" MSB="47" NAME="AV_RTC_SECFIELD" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[47:0]"/>
- <PORT DIR="O" IS_VALID="FALSE" MPD_INDEX="106" NAME="AV_CLK_8K" SIGNAME="__NOC__"/>
- <PORT DIR="O" ENDIAN="LITTLE" IS_VALID="FALSE" LEFT="31" LSB="0" MPD_INDEX="107" MSB="31" NAME="AV_RTC_NANOSECFIELD_1722" RIGHT="0" SIGNAME="__NOC__" VECFORMULA="[31:0]"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_txd" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="2" NAME="AXI_STR_TXD" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_TXD_TREADY"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_TKEEP"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_TDATA"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_txc" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="1" NAME="AXI_STR_TXC" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_TXC_TREADY"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_TKEEP"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_TDATA"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_rxd" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="AXI_STR_RXD" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXD_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_TREADY"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXD_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXD_TKEEP"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXD_TDATA"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_rxs" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="AXI_STR_RXS" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_TXC_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXD_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXS_TVALID"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_RXS_TREADY"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXS_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXS_TKEEP"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_RXS_TDATA"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="5" NAME="AXI_STR_AVBTX" PROTOCOL="XIL_AXI_STREAM_ETH_AVB_TX" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBTX_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBTX_TREADY"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_TLAST"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_TDATA"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBTX_TUSER"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="__NOC__" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_VALID="FALSE" MPD_INDEX="6" NAME="AXI_STR_AVBRX" PROTOCOL="XIL_AXI_STREAM_ETH_AVB_RX" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="AXI_STR_AVBRX_ARESETN"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_TVALID"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_TLAST"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_TDATA"/>
- <PORTMAP DIR="O" PHYSICAL="AXI_STR_AVBRX_TUSER"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <IOINTERFACES>
- <IOINTERFACE MPD_INDEX="0" NAME="AXIETHERNETIF" TYPE="XIL_AXIETHERNET_V1">
- <PORTMAPS>
- <PORTMAP DIR="IO" PHYSICAL="MDIO"/>
- <PORTMAP DIR="O" PHYSICAL="MDC"/>
- <PORTMAP DIR="O" PHYSICAL="GMII_TX_ER"/>
- <PORTMAP DIR="O" PHYSICAL="GMII_TXD"/>
- <PORTMAP DIR="O" PHYSICAL="GMII_TX_EN"/>
- <PORTMAP DIR="I" PHYSICAL="MII_TX_CLK"/>
- <PORTMAP DIR="O" PHYSICAL="GMII_TX_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_RXD"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_RX_ER"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_RX_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_RX_DV"/>
- <PORTMAP DIR="O" PHYSICAL="PHY_RST_N"/>
- <PORTMAP DIR="I" PHYSICAL="GTX_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="MGT_CLK_P"/>
- <PORTMAP DIR="I" PHYSICAL="MGT_CLK_N"/>
- <PORTMAP DIR="O" PHYSICAL="MII_TXD"/>
- <PORTMAP DIR="O" PHYSICAL="MII_TX_EN"/>
- <PORTMAP DIR="O" PHYSICAL="MII_TX_ER"/>
- <PORTMAP DIR="I" PHYSICAL="MII_RXD"/>
- <PORTMAP DIR="I" PHYSICAL="MII_RX_DV"/>
- <PORTMAP DIR="I" PHYSICAL="MII_RX_ER"/>
- <PORTMAP DIR="I" PHYSICAL="MII_RX_CLK"/>
- <PORTMAP DIR="I" PHYSICAL="MII_COL"/>
- <PORTMAP DIR="I" PHYSICAL="MII_CRS"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_COL"/>
- <PORTMAP DIR="I" PHYSICAL="GMII_CRS"/>
- <PORTMAP DIR="O" PHYSICAL="TXP"/>
- <PORTMAP DIR="O" PHYSICAL="TXN"/>
- <PORTMAP DIR="I" PHYSICAL="RXP"/>
- <PORTMAP DIR="I" PHYSICAL="RXN"/>
- <PORTMAP DIR="O" PHYSICAL="RGMII_TXD"/>
- <PORTMAP DIR="O" PHYSICAL="RGMII_TX_CTL"/>
- <PORTMAP DIR="O" PHYSICAL="RGMII_TXC"/>
- <PORTMAP DIR="I" PHYSICAL="RGMII_RXD"/>
- <PORTMAP DIR="I" PHYSICAL="RGMII_RX_CTL"/>
- <PORTMAP DIR="I" PHYSICAL="RGMII_RXC"/>
- <PORTMAP DIR="I" PHYSICAL="MDIO_I"/>
- <PORTMAP DIR="O" PHYSICAL="MDIO_O"/>
- <PORTMAP DIR="O" PHYSICAL="MDIO_T"/>
- </PORTMAPS>
- </IOINTERFACE>
- </IOINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1092878336" BASENAME="C_BASEADDR" BASEVALUE="0x41240000" HIGHDECIMAL="1093140479" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4127ffff" MEMTYPE="REGISTER" MINSIZE="0x40000" SIZE="262144" SIZEABRV="256K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="0"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="3.00.a" INSTANCE="ETHERNET_dma" IPTYPE="PERIPHERAL" MHS_INDEX="16" MODCLASS="PERIPHERAL" MODTYPE="axi_dma">
- <DESCRIPTION TYPE="SHORT">AXI DMA Engine</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">AXI MemoryMap to/from AXI Stream Direct Memory Access Engine</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_dma_v3_00_a/doc/axi_dma_ds781.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_S_AXI_LITE_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="1" NAME="C_S_AXI_LITE_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="2" NAME="C_DLYTMR_RESOLUTION" TYPE="INTEGER" VALUE="1250"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="3" NAME="C_PRMRY_IS_ACLK_ASYNC" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="4" NAME="C_SG_INCLUDE_DESC_QUEUE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="5" NAME="C_SG_INCLUDE_STSCNTRL_STRM" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="6" NAME="C_SG_USE_STSAPP_LENGTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="7" NAME="C_SG_LENGTH_WIDTH" TYPE="INTEGER" VALUE="16"/>
- <PARAMETER MPD_INDEX="8" NAME="C_M_AXI_SG_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="9" NAME="C_M_AXI_SG_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="10" NAME="C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="11" NAME="C_S_AXIS_S2MM_STS_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="10" MPD_INDEX="12" NAME="C_INCLUDE_MM2S" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="13" NAME="C_INCLUDE_MM2S_DRE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="14" NAME="C_MM2S_BURST_SIZE" TYPE="INTEGER" VALUE="16"/>
- <PARAMETER MPD_INDEX="15" NAME="C_M_AXI_MM2S_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="16" NAME="C_M_AXI_MM2S_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="17" NAME="C_M_AXIS_MM2S_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="11" MPD_INDEX="18" NAME="C_INCLUDE_S2MM" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="19" NAME="C_INCLUDE_S2MM_DRE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="20" NAME="C_S2MM_BURST_SIZE" TYPE="INTEGER" VALUE="16"/>
- <PARAMETER MPD_INDEX="21" NAME="C_M_AXI_S2MM_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="22" NAME="C_M_AXI_S2MM_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="23" NAME="C_S_AXIS_S2MM_TDATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="24" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="32" MPD_INDEX="25" NAME="C_BASEADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x41e00000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="33" MPD_INDEX="26" NAME="C_HIGHADDR" TYPE="STD_LOGIC_VECTOR" VALUE="0x41e0ffff"/>
- <PARAMETER MPD_INDEX="27" NAME="C_S_AXI_LITE_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER MPD_INDEX="28" NAME="C_M_AXI_SG_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER MPD_INDEX="29" NAME="C_M_AXI_MM2S_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER MPD_INDEX="30" NAME="C_M_AXI_S2MM_ACLK_FREQ_HZ" TYPE="INTEGER" VALUE="100000000"/>
- <PARAMETER MPD_INDEX="31" NAME="C_S_AXI_LITE_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER MPD_INDEX="32" NAME="C_S_AXI_LITE_SUPPORTS_READ" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="33" NAME="C_S_AXI_LITE_SUPPORTS_WRITE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="34" NAME="C_M_AXI_SG_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="35" NAME="C_M_AXI_SG_SUPPORTS_THREADS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="36" NAME="C_M_AXI_SG_THREAD_ID_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="37" NAME="C_M_AXI_SG_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="38" NAME="C_M_AXI_SG_SUPPORTS_READ" TYPE="STRING" VALUE="1"/>
- <PARAMETER MPD_INDEX="39" NAME="C_M_AXI_SG_SUPPORTS_WRITE" TYPE="STRING" VALUE="1"/>
- <PARAMETER MPD_INDEX="40" NAME="C_M_AXI_MM2S_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="41" NAME="C_M_AXI_MM2S_SUPPORTS_THREADS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="42" NAME="C_M_AXI_MM2S_THREAD_ID_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="43" NAME="C_M_AXI_MM2S_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="44" NAME="C_M_AXI_MM2S_SUPPORTS_READ" TYPE="STRING" VALUE="1"/>
- <PARAMETER MPD_INDEX="45" NAME="C_M_AXI_MM2S_SUPPORTS_WRITE" TYPE="STRING" VALUE="0"/>
- <PARAMETER MPD_INDEX="46" NAME="C_INTERCONNECT_M_AXI_MM2S_READ_ISSUING" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="47" NAME="C_INTERCONNECT_M_AXI_MM2S_READ_FIFO_DEPTH" TYPE="INTEGER" VALUE="512"/>
- <PARAMETER MPD_INDEX="48" NAME="C_M_AXI_S2MM_PROTOCOL" TYPE="STRING" VALUE="AXI4"/>
- <PARAMETER MPD_INDEX="49" NAME="C_M_AXI_S2MM_SUPPORTS_THREADS" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="50" NAME="C_M_AXI_S2MM_THREAD_ID_WIDTH" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="51" NAME="C_M_AXI_S2MM_SUPPORTS_NARROW_BURST" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="52" NAME="C_M_AXI_S2MM_SUPPORTS_WRITE" TYPE="STRING" VALUE="1"/>
- <PARAMETER MPD_INDEX="53" NAME="C_M_AXI_S2MM_SUPPORTS_READ" TYPE="STRING" VALUE="0"/>
- <PARAMETER MPD_INDEX="54" NAME="C_INTERCONNECT_M_AXI_S2MM_WRITE_ISSUING" TYPE="INTEGER" VALUE="4"/>
- <PARAMETER MPD_INDEX="55" NAME="C_INTERCONNECT_M_AXI_S2MM_WRITE_FIFO_DEPTH" TYPE="INTEGER" VALUE="512"/>
- <PARAMETER MPD_INDEX="56" NAME="C_M_AXIS_MM2S_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_DATA"/>
- <PARAMETER MPD_INDEX="57" NAME="C_S_AXIS_S2MM_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_DATA"/>
- <PARAMETER MPD_INDEX="58" NAME="C_M_AXIS_CNTRL_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_CTRL"/>
- <PARAMETER MPD_INDEX="59" NAME="C_S_AXIS_STS_PROTOCOL" TYPE="STRING" VALUE="XIL_AXI_STREAM_ETH_CTRL"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="12" NAME="C_INTERCONNECT_S_AXI_LITE_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="13" NAME="C_INTERCONNECT_S_AXI_LITE_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="14" NAME="C_INTERCONNECT_S_AXI_LITE_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="15" NAME="C_INTERCONNECT_S_AXI_LITE_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="16" NAME="C_INTERCONNECT_S_AXI_LITE_B_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="17" NAME="C_INTERCONNECT_M_AXI_SG_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="18" NAME="C_INTERCONNECT_M_AXI_SG_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="19" NAME="C_INTERCONNECT_M_AXI_SG_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="20" NAME="C_INTERCONNECT_M_AXI_SG_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="21" NAME="C_INTERCONNECT_M_AXI_SG_B_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="22" NAME="C_INTERCONNECT_M_AXI_MM2S_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="23" NAME="C_INTERCONNECT_M_AXI_MM2S_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="24" NAME="C_INTERCONNECT_M_AXI_MM2S_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="25" NAME="C_INTERCONNECT_M_AXI_MM2S_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="26" NAME="C_INTERCONNECT_M_AXI_MM2S_B_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="27" NAME="C_INTERCONNECT_M_AXI_S2MM_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="28" NAME="C_INTERCONNECT_M_AXI_S2MM_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="29" NAME="C_INTERCONNECT_M_AXI_S2MM_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="30" NAME="C_INTERCONNECT_M_AXI_S2MM_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="31" NAME="C_INTERCONNECT_M_AXI_S2MM_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="S_AXI_LITE" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="s_axi_lite_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="M_AXI_SG" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="m_axi_sg_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="M_AXI_MM2S:M_AXIS_CNTRL" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="m_axi_mm2s_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="M_AXI_S2MM:S_AXIS_STS" CLKFREQUENCY="100000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="m_axi_s2mm_aclk" SIGIS="CLK" SIGNAME="clk_100_0000MHzPLL0"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="RESET_OUT_N" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="63" NAME="mm2s_prmry_reset_out_n" SIGNAME="AXI_STR_TXD_ARESETN"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="RESET_OUT_N" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="69" NAME="mm2s_cntrl_reset_out_n" SIGNAME="AXI_STR_TXC_ARESETN"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="RESET_OUT_N" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="91" NAME="s2mm_prmry_reset_out_n" SIGNAME="AXI_STR_RXD_ARESETN"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="RESET_OUT_N" DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="97" NAME="s2mm_sts_reset_out_n" SIGNAME="AXI_STR_RXS_ARESETN"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="103" NAME="mm2s_introut" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="ETHERNET_dma_mm2s_introut"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="9" MPD_INDEX="104" NAME="s2mm_introut" SENSITIVITY="LEVEL_HIGH" SIGIS="INTERRUPT" SIGNAME="ETHERNET_dma_s2mm_introut"/>
- <PORT BUS="S_AXI_LITE:M_AXI_SG:M_AXI_MM2S:M_AXI_S2MM:S_AXIS_STS:M_AXIS_CNTRL:M_AXIS_MM2S:S_AXIS_S2MM" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="4" NAME="axi_resetn" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="5" NAME="s_axi_lite_awvalid" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="6" NAME="s_axi_lite_awready" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="7" MSB="31" NAME="s_axi_lite_awaddr" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[C_S_AXI_LITE_ADDR_WIDTH-1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="8" NAME="s_axi_lite_wvalid" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="9" NAME="s_axi_lite_wready" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="10" MSB="31" NAME="s_axi_lite_wdata" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[C_S_AXI_LITE_DATA_WIDTH-1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="11" MSB="1" NAME="s_axi_lite_bresp" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="12" NAME="s_axi_lite_bvalid" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="13" NAME="s_axi_lite_bready" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="14" NAME="s_axi_lite_arvalid" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="15" NAME="s_axi_lite_arready" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="16" MSB="31" NAME="s_axi_lite_araddr" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[C_S_AXI_LITE_ADDR_WIDTH-1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="17" NAME="s_axi_lite_rvalid" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="18" NAME="s_axi_lite_rready" SIGNAME="axi4lite_0_M_RREADY"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="19" MSB="31" NAME="s_axi_lite_rdata" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[C_S_AXI_LITE_DATA_WIDTH-1:0]"/>
- <PORT BUS="S_AXI_LITE" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="20" MSB="1" NAME="s_axi_lite_rresp" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="21" MSB="31" NAME="m_axi_sg_awaddr" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[C_M_AXI_SG_ADDR_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="22" MSB="7" NAME="m_axi_sg_awlen" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="23" MSB="2" NAME="m_axi_sg_awsize" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="24" MSB="1" NAME="m_axi_sg_awburst" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="25" MSB="2" NAME="m_axi_sg_awprot" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="26" MSB="3" NAME="m_axi_sg_awcache" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="27" NAME="m_axi_sg_awvalid" SIGNAME="axi4_0_S_AWVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="28" NAME="m_axi_sg_awready" SIGNAME="axi4_0_S_AWREADY"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="29" MSB="31" NAME="m_axi_sg_wdata" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[C_M_AXI_SG_DATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="30" MSB="3" NAME="m_axi_sg_wstrb" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(C_M_AXI_SG_DATA_WIDTH/8)-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="31" NAME="m_axi_sg_wlast" SIGNAME="axi4_0_S_WLAST"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="32" NAME="m_axi_sg_wvalid" SIGNAME="axi4_0_S_WVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="33" NAME="m_axi_sg_wready" SIGNAME="axi4_0_S_WREADY"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="34" MSB="1" NAME="m_axi_sg_bresp" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="35" NAME="m_axi_sg_bvalid" SIGNAME="axi4_0_S_BVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="36" NAME="m_axi_sg_bready" SIGNAME="axi4_0_S_BREADY"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="37" MSB="31" NAME="m_axi_sg_araddr" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[C_M_AXI_SG_ADDR_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="38" MSB="7" NAME="m_axi_sg_arlen" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="39" MSB="2" NAME="m_axi_sg_arsize" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="40" MSB="1" NAME="m_axi_sg_arburst" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="41" MSB="2" NAME="m_axi_sg_arprot" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="42" MSB="3" NAME="m_axi_sg_arcache" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="43" NAME="m_axi_sg_arvalid" SIGNAME="axi4_0_S_ARVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="44" NAME="m_axi_sg_arready" SIGNAME="axi4_0_S_ARREADY"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="45" MSB="31" NAME="m_axi_sg_rdata" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[C_M_AXI_SG_DATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="46" MSB="1" NAME="m_axi_sg_rresp" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="47" NAME="m_axi_sg_rlast" SIGNAME="axi4_0_S_RLAST"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="48" NAME="m_axi_sg_rvalid" SIGNAME="axi4_0_S_RVALID"/>
- <PORT BUS="M_AXI_SG" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="49" NAME="m_axi_sg_rready" SIGNAME="axi4_0_S_RREADY"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="50" MSB="31" NAME="m_axi_mm2s_araddr" RIGHT="0" SIGNAME="axi4_0_S_ARADDR" VECFORMULA="[C_M_AXI_MM2S_ADDR_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="51" MSB="7" NAME="m_axi_mm2s_arlen" RIGHT="0" SIGNAME="axi4_0_S_ARLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="52" MSB="2" NAME="m_axi_mm2s_arsize" RIGHT="0" SIGNAME="axi4_0_S_ARSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="53" MSB="1" NAME="m_axi_mm2s_arburst" RIGHT="0" SIGNAME="axi4_0_S_ARBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="54" MSB="2" NAME="m_axi_mm2s_arprot" RIGHT="0" SIGNAME="axi4_0_S_ARPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="55" MSB="3" NAME="m_axi_mm2s_arcache" RIGHT="0" SIGNAME="axi4_0_S_ARCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARVALID" DIR="O" MPD_INDEX="56" NAME="m_axi_mm2s_arvalid" SIGNAME="axi4_0_S_ARVALID"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_ARREADY" DIR="I" MPD_INDEX="57" NAME="m_axi_mm2s_arready" SIGNAME="axi4_0_S_ARREADY"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="58" MSB="31" NAME="m_axi_mm2s_rdata" RIGHT="0" SIGNAME="axi4_0_S_RDATA" VECFORMULA="[C_M_AXI_MM2S_DATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="59" MSB="1" NAME="m_axi_mm2s_rresp" RIGHT="0" SIGNAME="axi4_0_S_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RLAST" DIR="I" MPD_INDEX="60" NAME="m_axi_mm2s_rlast" SIGNAME="axi4_0_S_RLAST"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RVALID" DIR="I" MPD_INDEX="61" NAME="m_axi_mm2s_rvalid" SIGNAME="axi4_0_S_RVALID"/>
- <PORT BUS="M_AXI_MM2S" DEF_SIGNAME="axi4_0_S_RREADY" DIR="O" MPD_INDEX="62" NAME="m_axi_mm2s_rready" SIGNAME="axi4_0_S_RREADY"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="64" MSB="31" NAME="m_axis_mm2s_tdata" RIGHT="0" SIGNAME="ETHERNET_dma_txd_TDATA" VECFORMULA="[C_M_AXIS_MM2S_TDATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TKEEP" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="65" MSB="3" NAME="m_axis_mm2s_tkeep" RIGHT="0" SIGNAME="ETHERNET_dma_txd_TKEEP" VECFORMULA="[(C_M_AXIS_MM2S_TDATA_WIDTH/8)-1:0]"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TVALID" DIR="O" MPD_INDEX="66" NAME="m_axis_mm2s_tvalid" SIGNAME="ETHERNET_dma_txd_TVALID"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TREADY" DIR="I" MPD_INDEX="67" NAME="m_axis_mm2s_tready" SIGNAME="ETHERNET_dma_txd_TREADY"/>
- <PORT BUS="M_AXIS_MM2S" DEF_SIGNAME="ETHERNET_dma_txd_TLAST" DIR="O" MPD_INDEX="68" NAME="m_axis_mm2s_tlast" SIGNAME="ETHERNET_dma_txd_TLAST"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="70" MSB="31" NAME="m_axis_mm2s_cntrl_tdata" RIGHT="0" SIGNAME="ETHERNET_dma_txc_TDATA" VECFORMULA="[C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TKEEP" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="71" MSB="3" NAME="m_axis_mm2s_cntrl_tkeep" RIGHT="0" SIGNAME="ETHERNET_dma_txc_TKEEP" VECFORMULA="[(C_M_AXIS_MM2S_CNTRL_TDATA_WIDTH/8)-1:0]"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TVALID" DIR="O" MPD_INDEX="72" NAME="m_axis_mm2s_cntrl_tvalid" SIGNAME="ETHERNET_dma_txc_TVALID"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TREADY" DIR="I" MPD_INDEX="73" NAME="m_axis_mm2s_cntrl_tready" SIGNAME="ETHERNET_dma_txc_TREADY"/>
- <PORT BUS="M_AXIS_CNTRL" DEF_SIGNAME="ETHERNET_dma_txc_TLAST" DIR="O" MPD_INDEX="74" NAME="m_axis_mm2s_cntrl_tlast" SIGNAME="ETHERNET_dma_txc_TLAST"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWADDR" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="75" MSB="31" NAME="m_axi_s2mm_awaddr" RIGHT="0" SIGNAME="axi4_0_S_AWADDR" VECFORMULA="[C_M_AXI_S2MM_ADDR_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWLEN" DIR="O" ENDIAN="LITTLE" LEFT="7" LSB="0" MPD_INDEX="76" MSB="7" NAME="m_axi_s2mm_awlen" RIGHT="0" SIGNAME="axi4_0_S_AWLEN" VECFORMULA="[7:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWSIZE" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="77" MSB="2" NAME="m_axi_s2mm_awsize" RIGHT="0" SIGNAME="axi4_0_S_AWSIZE" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWBURST" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="78" MSB="1" NAME="m_axi_s2mm_awburst" RIGHT="0" SIGNAME="axi4_0_S_AWBURST" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWPROT" DIR="O" ENDIAN="LITTLE" LEFT="2" LSB="0" MPD_INDEX="79" MSB="2" NAME="m_axi_s2mm_awprot" RIGHT="0" SIGNAME="axi4_0_S_AWPROT" VECFORMULA="[2:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWCACHE" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="80" MSB="3" NAME="m_axi_s2mm_awcache" RIGHT="0" SIGNAME="axi4_0_S_AWCACHE" VECFORMULA="[3:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWVALID" DIR="O" MPD_INDEX="81" NAME="m_axi_s2mm_awvalid" SIGNAME="axi4_0_S_AWVALID"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_AWREADY" DIR="I" MPD_INDEX="82" NAME="m_axi_s2mm_awready" SIGNAME="axi4_0_S_AWREADY"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="83" MSB="31" NAME="m_axi_s2mm_wdata" RIGHT="0" SIGNAME="axi4_0_S_WDATA" VECFORMULA="[C_M_AXI_S2MM_DATA_WIDTH-1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WSTRB" DIR="O" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="84" MSB="3" NAME="m_axi_s2mm_wstrb" RIGHT="0" SIGNAME="axi4_0_S_WSTRB" VECFORMULA="[(C_M_AXI_S2MM_DATA_WIDTH/8)-1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WLAST" DIR="O" MPD_INDEX="85" NAME="m_axi_s2mm_wlast" SIGNAME="axi4_0_S_WLAST"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WVALID" DIR="O" MPD_INDEX="86" NAME="m_axi_s2mm_wvalid" SIGNAME="axi4_0_S_WVALID"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_WREADY" DIR="I" MPD_INDEX="87" NAME="m_axi_s2mm_wready" SIGNAME="axi4_0_S_WREADY"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_BRESP" DIR="I" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="88" MSB="1" NAME="m_axi_s2mm_bresp" RIGHT="0" SIGNAME="axi4_0_S_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_BVALID" DIR="I" MPD_INDEX="89" NAME="m_axi_s2mm_bvalid" SIGNAME="axi4_0_S_BVALID"/>
- <PORT BUS="M_AXI_S2MM" DEF_SIGNAME="axi4_0_S_BREADY" DIR="O" MPD_INDEX="90" NAME="m_axi_s2mm_bready" SIGNAME="axi4_0_S_BREADY"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="92" MSB="31" NAME="s_axis_s2mm_tdata" RIGHT="0" SIGNAME="ETHERNET_dma_rxd_TDATA" VECFORMULA="[C_S_AXIS_S2MM_TDATA_WIDTH-1:0]"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TKEEP" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="93" MSB="3" NAME="s_axis_s2mm_tkeep" RIGHT="0" SIGNAME="ETHERNET_dma_rxd_TKEEP" VECFORMULA="[(C_S_AXIS_S2MM_TDATA_WIDTH/8)-1:0]"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TVALID" DIR="I" MPD_INDEX="94" NAME="s_axis_s2mm_tvalid" SIGNAME="ETHERNET_dma_rxd_TVALID"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TREADY" DIR="O" MPD_INDEX="95" NAME="s_axis_s2mm_tready" SIGNAME="ETHERNET_dma_rxd_TREADY"/>
- <PORT BUS="S_AXIS_S2MM" DEF_SIGNAME="ETHERNET_dma_rxd_TLAST" DIR="I" MPD_INDEX="96" NAME="s_axis_s2mm_tlast" SIGNAME="ETHERNET_dma_rxd_TLAST"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="98" MSB="31" NAME="s_axis_s2mm_sts_tdata" RIGHT="0" SIGNAME="ETHERNET_dma_rxs_TDATA" VECFORMULA="[C_S_AXIS_S2MM_STS_TDATA_WIDTH-1:0]"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TKEEP" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="99" MSB="3" NAME="s_axis_s2mm_sts_tkeep" RIGHT="0" SIGNAME="ETHERNET_dma_rxs_TKEEP" VECFORMULA="[(C_S_AXIS_S2MM_STS_TDATA_WIDTH/8)-1:0]"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TVALID" DIR="I" MPD_INDEX="100" NAME="s_axis_s2mm_sts_tvalid" SIGNAME="ETHERNET_dma_rxs_TVALID"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TREADY" DIR="O" MPD_INDEX="101" NAME="s_axis_s2mm_sts_tready" SIGNAME="ETHERNET_dma_rxs_TREADY"/>
- <PORT BUS="S_AXIS_STS" DEF_SIGNAME="ETHERNET_dma_rxs_TLAST" DIR="I" MPD_INDEX="102" NAME="s_axis_s2mm_sts_tlast" SIGNAME="ETHERNET_dma_rxs_TLAST"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI_LITE" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_awvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_awready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_awaddr"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_wvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_wready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_wdata"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_bresp"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_bvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_bready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_arvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_arready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_araddr"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_rvalid"/>
- <PORTMAP DIR="I" PHYSICAL="s_axi_lite_rready"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_rdata"/>
- <PORTMAP DIR="O" PHYSICAL="s_axi_lite_rresp"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="1" NAME="M_AXI_SG" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awaddr"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awlen"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awsize"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awburst"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awprot"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awcache"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_awvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_awready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_wdata"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_wstrb"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_wlast"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_wvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_wready"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_bresp"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_bvalid"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_bready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_araddr"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arlen"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arsize"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arburst"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arprot"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arcache"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_arvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_arready"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_rdata"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_rresp"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_rlast"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_sg_rvalid"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_sg_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="2" NAME="M_AXI_MM2S" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_araddr"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arlen"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arsize"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arburst"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arprot"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arcache"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_arvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_arready"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_rdata"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_rresp"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_rlast"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_rvalid"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_mm2s_rready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_txc" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="5" MPD_INDEX="6" NAME="M_AXIS_CNTRL" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_mm2s_aclk"/>
- <PORTMAP DIR="O" PHYSICAL="mm2s_cntrl_reset_out_n"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_cntrl_tdata"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_cntrl_tkeep"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_cntrl_tvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axis_mm2s_cntrl_tready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_cntrl_tlast"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="axi4_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="3" NAME="M_AXI_S2MM" PROTOCOL="AXI4" TYPE="MASTER">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_aclk"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awaddr"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awlen"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awsize"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awburst"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awprot"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awcache"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_awvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_awready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_wdata"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_wstrb"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_wlast"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_wvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_wready"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_bresp"/>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_bvalid"/>
- <PORTMAP DIR="O" PHYSICAL="m_axi_s2mm_bready"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_rxs" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="6" MPD_INDEX="7" NAME="S_AXIS_STS" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="m_axi_s2mm_aclk"/>
- <PORTMAP DIR="O" PHYSICAL="s2mm_sts_reset_out_n"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_sts_tdata"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_sts_tkeep"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_sts_tvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axis_s2mm_sts_tready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_sts_tlast"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_txd" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="4" MPD_INDEX="4" NAME="M_AXIS_MM2S" TYPE="INITIATOR">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="mm2s_prmry_reset_out_n"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_tdata"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_tkeep"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_tvalid"/>
- <PORTMAP DIR="I" PHYSICAL="m_axis_mm2s_tready"/>
- <PORTMAP DIR="O" PHYSICAL="m_axis_mm2s_tlast"/>
- </PORTMAPS>
- </BUSINTERFACE>
- <BUSINTERFACE BUSNAME="ETHERNET_dma_rxd" BUSSTD="AXIS" BUSSTD_PSF="AXIS" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="5" NAME="S_AXIS_S2MM" TYPE="TARGET">
- <PORTMAPS>
- <PORTMAP DIR="O" PHYSICAL="s2mm_prmry_reset_out_n"/>
- <PORTMAP DIR="I" PHYSICAL="axi_resetn"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_tdata"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_tkeep"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_tvalid"/>
- <PORTMAP DIR="O" PHYSICAL="s_axis_s2mm_tready"/>
- <PORTMAP DIR="I" PHYSICAL="s_axis_s2mm_tlast"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1105199104" BASENAME="C_BASEADDR" BASEVALUE="0x41e00000" HIGHDECIMAL="1105264639" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41e0ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI_LITE"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="1"/>
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="2"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="microblaze_0_intc" IPTYPE="PERIPHERAL" MHS_INDEX="17" MODCLASS="INTERRUPT_CNTLR" MODTYPE="axi_intc">
- <DESCRIPTION TYPE="SHORT">AXI Interrupt Controller</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">intc core attached to the AXI</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_intc_v1_01_a/doc/ds747_axi_intc.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="0" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="7" MPD_INDEX="1" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x41200000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="8" MPD_INDEX="2" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x4120ffff"/>
- <PARAMETER MPD_INDEX="3" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="4" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="5" NAME="C_NUM_INTR_INPUTS" TYPE="INTEGER" VALUE="2"/>
- <PARAMETER MPD_INDEX="6" NAME="C_KIND_OF_INTR" TYPE="std_logic_vector" VALUE="0xffffffff"/>
- <PARAMETER MPD_INDEX="7" NAME="C_KIND_OF_EDGE" TYPE="std_logic_vector" VALUE="0xffffffff"/>
- <PARAMETER MPD_INDEX="8" NAME="C_KIND_OF_LVL" TYPE="std_logic_vector" VALUE="0xffffffff"/>
- <PARAMETER MPD_INDEX="9" NAME="C_HAS_IPR" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="10" NAME="C_HAS_SIE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="11" NAME="C_HAS_CIE" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="12" NAME="C_HAS_IVR" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="13" NAME="C_IRQ_IS_LEVEL" TYPE="INTEGER" VALUE="1"/>
- <PARAMETER MPD_INDEX="14" NAME="C_IRQ_ACTIVE" TYPE="std_logic" VALUE="1"/>
- <PARAMETER MPD_INDEX="15" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="2" NAME="C_INTERCONNECT_S_AXI_AW_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="3" NAME="C_INTERCONNECT_S_AXI_AR_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="4" NAME="C_INTERCONNECT_S_AXI_W_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="5" NAME="C_INTERCONNECT_S_AXI_R_REGISTER" VALUE="1"/>
- <PARAMETER IS_INSTANTIATED="TRUE" MHS_INDEX="6" NAME="C_INTERCONNECT_S_AXI_B_REGISTER" VALUE="1"/>
- </PARAMETERS>
- <PORTS>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="20" NAME="IRQ" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="microblaze_0_interrupt">
- <DESCRIPTION>Interrupt Request Output</DESCRIPTION>
- </PORT>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="0" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="I" ENDIAN="LITTLE" IS_INSTANTIATED="TRUE" LEFT="1" LSB="0" MHS_INDEX="2" MPD_INDEX="19" MSB="1" NAME="INTR" RIGHT="0" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="ETHERNET_INTERRUPT & ETHERNET_dma_mm2s_introut & ETHERNET_dma_s2mm_introut & Push_Buttons_4Bits_IP2INTC_Irpt & RS232_Uart_1_Interrupt & axi_timer_0_Interrupt" VECFORMULA="[(C_NUM_INTR_INPUTS-1):0]">
- <SIGNALS>
- <SIGNAL NAME="ETHERNET_INTERRUPT"/>
- <SIGNAL NAME="ETHERNET_dma_mm2s_introut"/>
- <SIGNAL NAME="ETHERNET_dma_s2mm_introut"/>
- <SIGNAL NAME="Push_Buttons_4Bits_IP2INTC_Irpt"/>
- <SIGNAL NAME="RS232_Uart_1_Interrupt"/>
- <SIGNAL NAME="axi_timer_0_Interrupt"/>
- </SIGNALS>
- <DESCRIPTION>Interrupt Inputs</DESCRIPTION>
- </PORT>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="1" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="2" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="3" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="4" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="5" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="6" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="7" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="8" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="9" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="10" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="11" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="12" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="13" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="14" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="15" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="16" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="17" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="18" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1092616192" BASENAME="C_BASEADDR" BASEVALUE="0x41200000" HIGHDECIMAL="1092681727" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x4120ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO INTC_INDEX="0" TYPE="CONTROLLER">
- <SOURCE INSTANCE="ETHERNET" PRIORITY="0" SIGNAME="ETHERNET_INTERRUPT"/>
- <SOURCE INSTANCE="ETHERNET_dma" PRIORITY="1" SIGNAME="ETHERNET_dma_mm2s_introut"/>
- <SOURCE INSTANCE="ETHERNET_dma" PRIORITY="2" SIGNAME="ETHERNET_dma_s2mm_introut"/>
- <SOURCE INSTANCE="Push_Buttons_4Bits" PRIORITY="3" SIGNAME="Push_Buttons_4Bits_IP2INTC_Irpt"/>
- <SOURCE INSTANCE="RS232_Uart_1" PRIORITY="4" SIGNAME="RS232_Uart_1_Interrupt"/>
- <SOURCE INSTANCE="axi_timer_0" PRIORITY="5" SIGNAME="axi_timer_0_Interrupt"/>
- <TARGET INSTANCE="microblaze_0"/>
- </INTERRUPTINFO>
- </MODULE>
- <MODULE HWVERSION="1.01.a" INSTANCE="axi_timer_0" IPTYPE="PERIPHERAL" MHS_INDEX="18" MODCLASS="PERIPHERAL" MODTYPE="axi_timer">
- <DESCRIPTION TYPE="SHORT">AXI Timer/Counter</DESCRIPTION>
- <DESCRIPTION TYPE="LONG">Timer counter with AXI interface</DESCRIPTION>
- <DOCUMENTATION>
- <DOCUMENT SOURCE="C:/devtools/Xilinx/13.1/ISE_DS/EDK/hw/XilinxProcessorIPLib/pcores/axi_timer_v1_01_a/doc/axi_timer_ds764.pdf" TYPE="IP"/>
- </DOCUMENTATION>
- <LICENSEINFO ICON_NAME="ps_core_preferred"/>
- <PARAMETERS>
- <PARAMETER MPD_INDEX="0" NAME="C_S_AXI_PROTOCOL" TYPE="STRING" VALUE="AXI4LITE"/>
- <PARAMETER CHANGEDBY="SYSTEM" MPD_INDEX="1" NAME="C_FAMILY" TYPE="STRING" VALUE="spartan6"/>
- <PARAMETER MPD_INDEX="2" NAME="C_COUNT_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="3" NAME="C_ONE_TIMER_ONLY" TYPE="INTEGER" VALUE="0"/>
- <PARAMETER MPD_INDEX="4" NAME="C_TRIG0_ASSERT" TYPE="std_logic" VALUE="1"/>
- <PARAMETER MPD_INDEX="5" NAME="C_TRIG1_ASSERT" TYPE="std_logic" VALUE="1"/>
- <PARAMETER MPD_INDEX="6" NAME="C_GEN0_ASSERT" TYPE="std_logic" VALUE="1"/>
- <PARAMETER MPD_INDEX="7" NAME="C_GEN1_ASSERT" TYPE="std_logic" VALUE="1"/>
- <PARAMETER ADDRESS="BASE" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="2" MPD_INDEX="8" NAME="C_BASEADDR" TYPE="std_logic_vector" VALUE="0x41c00000"/>
- <PARAMETER ADDRESS="HIGH" ADDR_TYPE="REGISTER" CHANGEDBY="USER" IS_INSTANTIATED="TRUE" MHS_INDEX="3" MPD_INDEX="9" NAME="C_HIGHADDR" TYPE="std_logic_vector" VALUE="0x41c0ffff"/>
- <PARAMETER MPD_INDEX="10" NAME="C_S_AXI_ADDR_WIDTH" TYPE="INTEGER" VALUE="32"/>
- <PARAMETER MPD_INDEX="11" NAME="C_S_AXI_DATA_WIDTH" TYPE="INTEGER" VALUE="32"/>
- </PARAMETERS>
- <PORTS>
- <PORT BUS="S_AXI" CLKFREQUENCY="50000000" DEF_SIGNAME="__BUS__" DIR="I" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="7" NAME="S_AXI_ACLK" SIGIS="CLK" SIGNAME="clk_50_0000MHzPLL0"/>
- <PORT DIR="O" IS_INSTANTIATED="TRUE" MHS_INDEX="1" MPD_INDEX="5" NAME="Interrupt" SENSITIVITY="EDGE_RISING" SIGIS="INTERRUPT" SIGNAME="axi_timer_0_Interrupt"/>
- <PORT DIR="I" MPD_INDEX="0" NAME="CaptureTrig0" SIGNAME="__NOC__">
- <DESCRIPTION>Capture Trig 0</DESCRIPTION>
- </PORT>
- <PORT DIR="I" MPD_INDEX="1" NAME="CaptureTrig1" SIGNAME="__NOC__">
- <DESCRIPTION>Capture Trig 1</DESCRIPTION>
- </PORT>
- <PORT DIR="O" MPD_INDEX="2" NAME="GenerateOut0" SIGNAME="__NOC__">
- <DESCRIPTION>Generate Out 0</DESCRIPTION>
- </PORT>
- <PORT DIR="O" MPD_INDEX="3" NAME="GenerateOut1" SIGNAME="__NOC__">
- <DESCRIPTION>Generate Out 1</DESCRIPTION>
- </PORT>
- <PORT DIR="O" MPD_INDEX="4" NAME="PWM0" SIGNAME="__NOC__">
- <DESCRIPTION>Pulse Width Modulation 0</DESCRIPTION>
- </PORT>
- <PORT DIR="I" MPD_INDEX="6" NAME="Freeze" SIGNAME="__NOC__"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARESETN" DIR="I" MPD_INDEX="8" NAME="S_AXI_ARESETN" SIGIS="RST" SIGNAME="axi4lite_0_M_ARESETN"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="9" MSB="31" NAME="S_AXI_AWADDR" RIGHT="0" SIGNAME="axi4lite_0_M_AWADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWVALID" DIR="I" MPD_INDEX="10" NAME="S_AXI_AWVALID" SIGNAME="axi4lite_0_M_AWVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_AWREADY" DIR="O" MPD_INDEX="11" NAME="S_AXI_AWREADY" SIGNAME="axi4lite_0_M_AWREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WDATA" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="12" MSB="31" NAME="S_AXI_WDATA" RIGHT="0" SIGNAME="axi4lite_0_M_WDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WSTRB" DIR="I" ENDIAN="LITTLE" LEFT="3" LSB="0" MPD_INDEX="13" MSB="3" NAME="S_AXI_WSTRB" RIGHT="0" SIGNAME="axi4lite_0_M_WSTRB" VECFORMULA="[((C_S_AXI_DATA_WIDTH/8)-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WVALID" DIR="I" MPD_INDEX="14" NAME="S_AXI_WVALID" SIGNAME="axi4lite_0_M_WVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_WREADY" DIR="O" MPD_INDEX="15" NAME="S_AXI_WREADY" SIGNAME="axi4lite_0_M_WREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="16" MSB="1" NAME="S_AXI_BRESP" RIGHT="0" SIGNAME="axi4lite_0_M_BRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BVALID" DIR="O" MPD_INDEX="17" NAME="S_AXI_BVALID" SIGNAME="axi4lite_0_M_BVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_BREADY" DIR="I" MPD_INDEX="18" NAME="S_AXI_BREADY" SIGNAME="axi4lite_0_M_BREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARADDR" DIR="I" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="19" MSB="31" NAME="S_AXI_ARADDR" RIGHT="0" SIGNAME="axi4lite_0_M_ARADDR" VECFORMULA="[(C_S_AXI_ADDR_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARVALID" DIR="I" MPD_INDEX="20" NAME="S_AXI_ARVALID" SIGNAME="axi4lite_0_M_ARVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_ARREADY" DIR="O" MPD_INDEX="21" NAME="S_AXI_ARREADY" SIGNAME="axi4lite_0_M_ARREADY"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RDATA" DIR="O" ENDIAN="LITTLE" LEFT="31" LSB="0" MPD_INDEX="22" MSB="31" NAME="S_AXI_RDATA" RIGHT="0" SIGNAME="axi4lite_0_M_RDATA" VECFORMULA="[(C_S_AXI_DATA_WIDTH-1):0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RRESP" DIR="O" ENDIAN="LITTLE" LEFT="1" LSB="0" MPD_INDEX="23" MSB="1" NAME="S_AXI_RRESP" RIGHT="0" SIGNAME="axi4lite_0_M_RRESP" VECFORMULA="[1:0]"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RVALID" DIR="O" MPD_INDEX="24" NAME="S_AXI_RVALID" SIGNAME="axi4lite_0_M_RVALID"/>
- <PORT BUS="S_AXI" DEF_SIGNAME="axi4lite_0_M_RREADY" DIR="I" MPD_INDEX="25" NAME="S_AXI_RREADY" SIGNAME="axi4lite_0_M_RREADY"/>
- </PORTS>
- <BUSINTERFACES>
- <BUSINTERFACE BUSNAME="axi4lite_0" BUSSTD="AXI" BUSSTD_PSF="AXI" IS_INSTANTIATED="TRUE" MHS_INDEX="0" MPD_INDEX="0" NAME="S_AXI" PROTOCOL="AXI4LITE" TYPE="SLAVE">
- <PORTMAPS>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ACLK"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARESETN"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_AWVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_AWREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WDATA"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WSTRB"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_WVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_WREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_BVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_BREADY"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARADDR"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_ARVALID"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_ARREADY"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RDATA"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RRESP"/>
- <PORTMAP DIR="O" PHYSICAL="S_AXI_RVALID"/>
- <PORTMAP DIR="I" PHYSICAL="S_AXI_RREADY"/>
- </PORTMAPS>
- </BUSINTERFACE>
- </BUSINTERFACES>
- <MEMORYMAP>
- <MEMRANGE BASEDECIMAL="1103101952" BASENAME="C_BASEADDR" BASEVALUE="0x41c00000" HIGHDECIMAL="1103167487" HIGHNAME="C_HIGHADDR" HIGHVALUE="0x41c0ffff" MEMTYPE="REGISTER" MINSIZE="0x1000" SIZE="65536" SIZEABRV="64K">
- <SLAVES>
- <SLAVE BUSINTERFACE="S_AXI"/>
- </SLAVES>
- </MEMRANGE>
- </MEMORYMAP>
- <INTERRUPTINFO TYPE="SOURCE">
- <TARGET INSTANCE="microblaze_0_intc" INTC_INDEX="0" PRIORITY="5"/>
- </INTERRUPTINFO>
- </MODULE>
- </MODULES>
-
-</EDKSYSTEM>
\ No newline at end of file
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/xplorer.opt b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/xplorer.opt
deleted file mode 100644
index 1ba7dad078..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/xplorer.opt
+++ /dev/null
@@ -1 +0,0 @@
- -device xc6slx45tfgg484-3 data/system.ucf 7 0
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/xpsxflow.opt b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/xpsxflow.opt
deleted file mode 100644
index 51c612843b..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/__xps/xpsxflow.opt
+++ /dev/null
@@ -1 +0,0 @@
- -device xc6slx45tfgg484-3 data/system.ucf 0
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/data/system.ucf b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/data/system.ucf
deleted file mode 100644
index 345fc68c19..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/data/system.ucf
+++ /dev/null
@@ -1,356 +0,0 @@
-#
-# pin constraints
-#
-NET CLK_N LOC = "K22" | DIFF_TERM = "TRUE" | IOSTANDARD = "LVDS_25";
-NET CLK_P LOC = "K21" | DIFF_TERM = "TRUE" | IOSTANDARD = "LVDS_25";
-NET ETHERNET_MDC LOC = "R19" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_MDIO LOC = "V20" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_MII_TX_CLK LOC = "L20" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_PHY_RST_N LOC = "J22" | IOSTANDARD = "LVCMOS25" | TIG;
-NET ETHERNET_RXD[0] LOC = "P19" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RXD[1] LOC = "Y22" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RXD[2] LOC = "Y21" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RXD[3] LOC = "W22" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RXD[4] LOC = "W20" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RXD[5] LOC = "V22" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RXD[6] LOC = "V21" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RXD[7] LOC = "U22" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RX_CLK LOC = "P20" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RX_DV LOC = "T22" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_RX_ER LOC = "U20" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TXD[0] LOC = "U10" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TXD[1] LOC = "T10" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TXD[2] LOC = "AB8" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TXD[3] LOC = "AA8" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TXD[4] LOC = "AB9" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TXD[5] LOC = "Y9" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TXD[6] LOC = "Y12" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TXD[7] LOC = "W12" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TX_CLK LOC = "AB7" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TX_EN LOC = "T8" | IOSTANDARD = "LVCMOS25";
-NET ETHERNET_TX_ER LOC = "U8" | IOSTANDARD = "LVCMOS25";
-NET LEDs_4Bits_TRI_O[0] LOC = "D17" | IOSTANDARD = "LVCMOS25";
-NET LEDs_4Bits_TRI_O[1] LOC = "AB4" | IOSTANDARD = "LVCMOS25";
-NET LEDs_4Bits_TRI_O[2] LOC = "D21" | IOSTANDARD = "LVCMOS25";
-NET LEDs_4Bits_TRI_O[3] LOC = "W15" | IOSTANDARD = "LVCMOS25";
-NET Push_Buttons_4Bits_TRI_I[0] LOC = "F3" | IOSTANDARD = "LVCMOS25";
-NET Push_Buttons_4Bits_TRI_I[1] LOC = "G6" | IOSTANDARD = "LVCMOS25";
-NET Push_Buttons_4Bits_TRI_I[2] LOC = "F5" | IOSTANDARD = "LVCMOS25";
-NET Push_Buttons_4Bits_TRI_I[3] LOC = "C1" | IOSTANDARD = "LVCMOS25";
-NET RESET LOC = "H8" | IOSTANDARD = "LVCMOS15" | TIG;
-NET RS232_Uart_1_sin LOC = "H17" | IOSTANDARD = "LVCMOS25";
-NET RS232_Uart_1_sout LOC = "B21" | IOSTANDARD = "LVCMOS25";
-#
-# additional constraints
-#
-
-NET "CLK" TNM_NET = sys_clk_pin;
-TIMESPEC TS_sys_clk_pin = PERIOD sys_clk_pin 200000 kHz;
-###### Soft ETHERNET
-# This is a GMII system
-# AXI_STR_*_ACLK is not the same as S_AXI_ACLK from clock generator
-# Rx/Tx Client clocks are Rx/Tx PHY clocks so CORE Gen PHY clock constraints propagate to Rx/Tx client clock periods
-# Time domain crossing constraints (DATAPATHONLY) are set for maximum bus frequency
-# allowed by IP which is the maximum option in BSB. For lower bus frequency choice in BSB,
-# the constraints are over constrained. Relaxing them for your system may reduce build time.
-
-NET "*ETHERNET*/S_AXI_ACLK" TNM_NET = "axi4lite_clk";
-NET "*ETHERNET*/AXI_STR_TXD_ACLK" TNM_NET = "axistream_clk";
-NET "*ETHERNET*/AXI_STR_TXC_ACLK" TNM_NET = "axistream_clk";
-NET "*ETHERNET*/AXI_STR_RXD_ACLK" TNM_NET = "axistream_clk";
-NET "*ETHERNET*/AXI_STR_RXS_ACLK" TNM_NET = "axistream_clk";
-
-############################################################
-# Clock Period Constraints #
-############################################################
-
-############################################################
-# RX Clock period Constraints #
-############################################################
-# Ethernet GMII PHY-side receive clock
-# __________
-# | |
-# --- GMII_RX_CLK-----| BUFR |---Rx_Client_Clk
-# |__________|
-#
-# Receiver clock period constraints: please do not relax
-# Changed NET name
-# Changed TNM_NET name from CoreGen name to be consistent in
-# EDK constraints
-# NET "*/rx_gmii_clk_int" TNM_NET = "clk_rx";
-NET "*/GMII_RX_CLK" TNM_NET = "phy_clk_rx";
-# Added TIMEGRP for later DATAPATHONLY constraint
-TIMEGRP "rx_clock" = "phy_clk_rx";
-TIMESPEC "TS_rx_clk" = PERIOD "rx_clock" 8000 ps HIGH 50 %;
-
-############################################################
-# TX Clock period Constraints #
-############################################################
-############################################################
-# TIG for BUFGMUX SPEED CLK: please do not edit #
-############################################################
-# Want to TIG any timing paths to the select of the TX clock BUFGMUXs
-# at this point and subsequent constraints can override. MII_TX_CLK
-# will remained TIG so that path is not used in any setup/hold timing
-# analysis.
-# Changed net name in synthesis of axi_ethernet
-# PIN "*clock_inst*BUFGMUX*.I?" TNM="clk_bufgmux";
-PIN "*I_CLOCK_INST*/*BUFGMUX_SPEED_CLK.I?" TNM="clk_bufgmux";
-TIMESPEC "TS_bufgmux" = FROM "async_config" TO "clk_bufgmux" TIG;
-
-###############################################################################
-# The following two TimeSpecs are from CoreGen Ethernet Core Example Design UCF
-# file. In systems GTX_CLK is driven by clock generator core, then the derived
-# period constraint will override these TimeSpecs.
-###############################################################################
-# Ethernet GTX_CLK high quality 125 MHz reference clock
-# __________
-# -GTX_CLK------------| |
-# | BUFGMUX |---Tx_Client_Clk
-# -MII_TX_CLK---------|__________|
-#
-# Depending on system configuration, the analysis tool may use either gtx_clk
-# or tx_client_clk so both nets are used in defining PERIOD constraint and
-# TNM_NETS for subsequent constraints.
-# The PERIOD constraints may not be analyzed if inferred clock generator
-# constraints are generated for the system.
-
-# Transmitter clock period constraints: please do not relax
-# Changed NET name
-# NET "gtx_clk*" TNM_NET = "clk_gtx";
-NET "*/GTX_CLK" TNM_NET = "clk_gtx";
-# Added TIMEGRP for later DATAPATHONLY constraint
-TIMEGRP "gtx_clock" = "clk_gtx";
-TIMESPEC "TS_gtx_clk" = PERIOD "gtx_clock" 8000 ps HIGH 50 %;
-
-# Changed NET name
-# Changed TNM_NET name from CoreGen name to be consistent in
-# EDK constraints
-# NET "*tx_gmii_clk" TNM_NET = "clk_tx_gmii";
-NET "*/GMII.tx_gmii_clk_int" TNM_NET = "phy_clk_tx";
-TIMEGRP "tx_clock_gmii" = "phy_clk_tx";
-TIMESPEC "TS_tx_clk_gmii" = PERIOD "tx_clock_gmii" 8000 ps HIGH 50 %;
-
-############################################################
-# Host Clock period Constraint #
-############################################################
-# Management Clock period constraints: relax as required
-# Changed NET name
-# NET "host_clk" TNM_NET = "host";
-NET "*/S_AXI_ACLK" TNM_NET = "host_clk";
-TIMEGRP "host" = "host_clk" EXCEPT "mdio_logic";
-TIMESPEC "TS_host_clk" = PERIOD "host" 10000 ps HIGH 50 % PRIORITY 10;
-
-############################################################
-# External GMII Constraints #
-############################################################
-# GMII Transmitter Constraints: place flip-flops in IOB
-# Changed 'true' to 'force'
-# Shortened INST names to remove internal hierarchy
-# INST "*trimac_block*gmii_interface*gmii_txd*" IOB = true;
-# INST "*trimac_block*gmii_interface*gmii_tx_en" IOB = true;
-# INST "*trimac_block*gmii_interface*gmii_tx_er" IOB = true;
-INST "*gmii_txd*" IOB = force;
-INST "*gmii_tx_en" IOB = force;
-INST "*gmii_tx_er" IOB = force;
-
-# GMII Receiver Constraints: place flip-flops in IOB
-# Changed 'true' to 'force'
-# Shortened INST names to remove internal hierarchy
-# INST "*trimac_block*gmii_interface*rxd_to_mac*" IOB = true;
-# INST "*trimac_block*gmii_interface*rx_dv_to_mac" IOB = true;
-# INST "*trimac_block*gmii_interface*rx_er_to_mac" IOB = true;
-INST "*rxd_to_mac*" IOB = force;
-INST "*rx_dv_to_mac" IOB = force;
-INST "*rx_er_to_mac" IOB = force;
-
-############################################################
-# The following are required to maximize setup/hold #
-############################################################
-# Changed to add Drive strength and INST Name
-# INST "gmii_txd<?>" SLEW = FAST;
-# INST "gmii_tx_en" SLEW = FAST;
-# INST "gmii_tx_er" SLEW = FAST;
-# INST "gmii_tx_clk" SLEW = FAST;
-INST "ETHERNET_TXD_?_OBUF" SLEW = FAST;
-INST "ETHERNET_TX_EN_OBUF" SLEW = FAST;
-INST "ETHERNET_TX_ER_OBUF" SLEW = FAST;
-INST "ETHERNET_TX_CLK_OBUF" SLEW = FAST;
-
-############################################################
-# GMII: IODELAY Constraints #
-############################################################
-# Please modify the value of the IDELAY_VALUE
-# according to your design.
-# For more information on IDELAYCTRL and IODELAY, please
-# refer to the Spartan-6 User Guide.
-#
-INST "*delay_gmii_rx_dv" IDELAY_VALUE = 6;
-INST "*delay_gmii_rx_er" IDELAY_VALUE = 6;
-INST "*data_bus[0].delay_gmii_rxd" IDELAY_VALUE = 6;
-INST "*data_bus[1].delay_gmii_rxd" IDELAY_VALUE = 6;
-INST "*data_bus[2].delay_gmii_rxd" IDELAY_VALUE = 6;
-INST "*data_bus[3].delay_gmii_rxd" IDELAY_VALUE = 6;
-INST "*data_bus[4].delay_gmii_rxd" IDELAY_VALUE = 6;
-INST "*data_bus[5].delay_gmii_rxd" IDELAY_VALUE = 6;
-INST "*data_bus[6].delay_gmii_rxd" IDELAY_VALUE = 6;
-INST "*data_bus[7].delay_gmii_rxd" IDELAY_VALUE = 6;
-
-# Group IODELAY and IDELAYCTRL components to aid placement
-# INST "*delay_gmii_rx_clk" IODELAY_GROUP = "grp1";
-INST "*delay_gmii_rx_dv" IODELAY_GROUP = "grp1";
-INST "*delay_gmii_rx_er" IODELAY_GROUP = "grp1";
-INST "*delay_gmii_rxd" IODELAY_GROUP = "grp1";
-# INST "*dlyctrl" IODELAY_GROUP = "grp1";
-
-# Changed to let the tools pick the LOC
-# INST *trimac_block*clock_inst*BUFGMUX_SPEED_CLK LOC = BUFGMUX_X3Y13;
-
-############################################################
-# For Setup and Hold time analysis on GMII inputs #
-############################################################
-# Identify GMII Rx Pads only.
-# This prevents setup/hold analysis being performed on false inputs,
-# eg, the configuration_vector inputs.
-# Changed to remove TNM and changed INST Names
-# INST "gmii_rxd<?>" TNM = IN_GMII;
-# INST "gmii_rx_er" TNM = IN_GMII;
-# INST "gmii_rx_dv" TNM = IN_GMII;
-
-# Define data valid window with respect to the clock.
-# The spec states that, worst case, the data is valid 2 ns before the clock edge.
-# The worst case it to provide zero hold time (a 2ns window in total)
-# Changed to remove TIMEGRP
-# TIMEGRP "IN_GMII" OFFSET = IN 2 ns VALID 2 ns BEFORE "gmii_rx_clk";
-# Set to allow for 100ps setup/hold trace delay difference in relation to clock
-OFFSET = IN 2.4 ns VALID 2.8 ns BEFORE "ETHERNET_RX_CLK";
-
-############################################################
-# Crossing of Clock Domain Constraints: please do not edit #
-############################################################
-# Flow Control logic reclocking - control signal is synchronised
-# Changed net name in synthesis of axi_ethernet
-# INST "*trimac_core*FLOW?RX_PAUSE?PAUSE_REQ_TO_TX" TNM="flow_rx_to_tx";
-# INST "*trimac_core*FLOW?RX_PAUSE?PAUSE_VALUE_TO_TX*" TNM="flow_rx_to_tx";
-INST "*/I_FLOW/I_RX_PAUSE/PAUSE_REQ_TO_TX" TNM="flow_rx_to_tx";
-INST "*/I_FLOW/I_RX_PAUSE/PAUSE_VALUE_TO_TX*" TNM="flow_rx_to_tx";
-TIMESPEC "TS_flow_rx_to_tx" = FROM "flow_rx_to_tx" TO phy_clk_tx 8000 ps DATAPATHONLY;
-
-# Generate a group of all flops NOT in the host clock domain
-TIMEGRP "all_ffs" = FFS;
-TIMEGRP "ffs_except_host" = "all_ffs" EXCEPT "host";
-
-# Configuration Register reclocking
-# Changed net name in synthesis of axi_ethernet
-# INST "*trimac_core*MANIFGEN?MANAGEN?CONF?RX0_OUT*" TNM="async_config";
-# INST "*trimac_core*MANIFGEN?MANAGEN?CONF?RX1_OUT*" TNM="async_config";
-# INST "*trimac_core*MANIFGEN?MANAGEN?CONF?FC_OUT_29" TNM="async_config";
-INST "*/MANIFGEN.I_MANAGEN/I_CONF/RX0_OUT*" TNM="async_config";
-INST "*/MANIFGEN.I_MANAGEN/I_CONF/RX1_OUT*" TNM="async_config";
-INST "*/MANIFGEN.I_MANAGEN/I_CONF/FC_OUT_29" TNM="async_config";
-
-# INST "*trimac_core*MANIFGEN?MANAGEN?CONF?TX_OUT*" TNM="async_config";
-# INST "*trimac_core*MANIFGEN?MANAGEN?CONF?FC_OUT_30" TNM="async_config";
-INST "*/MANIFGEN.I_MANAGEN/I_CONF/TX_OUT*" TNM="async_config";
-INST "*/MANIFGEN.I_MANAGEN/I_CONF/FC_OUT_30" TNM="async_config";
-
-# Speed change config
-# Changed net name in synthesis of axi_ethernet
-# INST "*trimac_core*MANIFGEN?MANAGEN?CONF?CNFG_SPEED*" TNM="async_config";
-# INST "*trimac_core*SPEED_IS*" TNM="async_config";
-INST "*/MANIFGEN.I_MANAGEN/I_CONF/CNFG_SPEED*" TNM="async_config";
-INST "*/I_?XGEN/*SPEED*" TNM="async_config";
-
-# Changed to comment out.
-# In BSB systems the Host_clk = S_AXI_ACLK. Since the CORE Gen TIG'd constraints below
-# are affecting axi_ethernet DATAPATHONLY constraints above (at start of Soft_Ethernet_MAC constraints)
-# these paths are commented out in favor of using the DATAPATHONLY constraints. The constraints are:
-# "TS_axi4lite_clk_clk_2_TX_CLIENT_CLK" and "TS_TX_CLIENT_CLK_2_axi4lite_clk_clk"
-# TIMESPEC "TS_host_clk_to_rx_clk" = FROM "host" TO "rx_clock" TIG;
-# TIMESPEC "TS_host_clk_to_tx_clk" = FROM "host" TO "tx_clock_gmii" TIG;
-
-TIMESPEC "TS_config_to_all" = FROM "async_config" TO "ffs_except_host" TIG;
-
-# Address filter specific cross clocking
-# Changed net name in synthesis of axi_ethernet
-# INST "*trimac_core*addr_filter_top/dynamic_af_gen.dynamic_config/unicast_addr_*" TNM="addr_config_to_rx";
-INST "*/I_ADDR_FILTER_TOP/dynamic_af_gen.I_DYNAMIC_CONFIG/unicast_addr_*" TNM="addr_config_to_rx";
-TIMESPEC "TS_addr_config_to_rx" = FROM "addr_config_to_rx" TO "ffs_except_host" TIG;
-
-############################################################
-# Ignore paths to resync flops #
-############################################################
-# Changed to replace TIG with DATAPATHONLY constraints
-# INST "*data_sync" TNM = "resync_reg";
-# TIMESPEC "ts_resync_flops" = TO "resync_reg" TIG;
-
-######################################################################
-# MDIO Constraints: please do not edit unless TS_host_clk is relaxed #
-# in which case the multiplier needs to be adjusted to give the #
-# required 400ns (or faster) #
-######################################################################
-
-# Place the MDIO logic in it's own timing groups
-# Changed net name in synthesis of axi_ethernet
-# INST "*trimac_core*MANIFGEN?MANAGEN?PHY?ENABLE_REG" TNM = "mdio_logic";
-# INST "*trimac_core*MANIFGEN?MANAGEN?PHY?READY_INT" TNM = "mdio_logic";
-# INST "*trimac_core*MANIFGEN?MANAGEN?PHY?STATE_COUNT*" TNM = FFS "mdio_logic";
-# INST "*trimac_core*MANIFGEN?MANAGEN?PHY?MDIO_TRISTATE" TNM = "mdio_logic";
-# INST "*trimac_core*MANIFGEN?MANAGEN?PHY?MDIO_OUT" TNM = "mdio_logic";
-INST "*/I_RXGEN/ENABLE_REG" TNM = "mdio_logic";
-INST "*/MANIFGEN.I_MANAGEN/MIIM_READY_INT" TNM = "mdio_logic";
-INST "*/MANIFGEN.I_MANAGEN/I_PHY/STATE_COUNT*" TNM = FFS "mdio_logic";
-INST "*/MANIFGEN.I_MANAGEN/I_PHY/MDIO_TRISTATE" TNM = "mdio_logic";
-INST "*/MANIFGEN.I_MANAGEN/I_PHY/MDIO_OUT" TNM = "mdio_logic";
-
-# The MDIO logic is constrained to a 400ns period. this is generated by relating the required
-# period to that specified for host_clk. This ensures the two clocks are related timed
-# correctly.
-TIMESPEC "TS_mdio" = PERIOD "mdio_logic" "TS_host_clk" * 40 PRIORITY 0;
-
-############################################################
-# Crossing of Clock Domain Constraints: please do not edit #
-# In addition to CoreGen constraints #
-############################################################
-
-# The following TimeSpecs are required only when AXILite clock differs from AXI-Stream clock
-# Data path timing depends on the destination clock period
-TIMESPEC "TS_axistreamclks_2_axi4liteclks" = FROM axistream_clk TO axi4lite_clk 20000 ps DATAPATHONLY; #assumes axi4lite_clk <= 50 MHz
-TIMESPEC "TS_axi4liteclks_2_axistreamclks" = FROM axi4lite_clk TO axistream_clk 8333 ps DATAPATHONLY; #assumes axistream_clk <= 120 MHz
-
-# TNM_NET phy_clk_rx is rx_client_clk
-# TIMESPECs for AXI streaming clock crossing to/from rx_client_clk
-TIMESPEC "TS_axistreamclks_2_RX_CLIENT_CLK" = FROM axistream_clk TO phy_clk_rx 8000 ps DATAPATHONLY; #assumes phy_clk_rx <= 125 MHz
-TIMESPEC "TS_RX_CLIENT_CLK_2_axistreamclks" = FROM phy_clk_rx TO axistream_clk 8333 ps DATAPATHONLY; #assumes axistream_clk <= 120 MHz
-# TIMESPECs for AXI-Lite clock crossing to/from tx_client_clk
-TIMESPEC "TS_axi4liteclks_2_RX_CLIENT_CLK" = FROM axi4lite_clk TO phy_clk_rx 8000 ps DATAPATHONLY; #assumes phy_clk_rx <= 125 MHz
-TIMESPEC "TS_RX_CLIENT_CLK_2_axi4liteclks" = FROM phy_clk_rx TO axi4lite_clk 20000 ps DATAPATHONLY; #assumes axi4lite_clk <= 50 MHz
-
-# Depending on system configuration, the analysis tool may use either TNM_NET clk_gtx
-# or TNM_NET phy_clk_tx so only one set will be analyzed
-# TNM_NET phy_clk_tx is tx_client_clk
-# TIMESPECs for AXI streaming clock crossing to/from tx_client_clk
-TIMESPEC "TS_axistreamclks_2_TX_CLIENT_CLK" = FROM axistream_clk TO phy_clk_tx 8000 ps DATAPATHONLY; #assumes phy_clk_tx <= 125 MHz
-TIMESPEC "TS_TX_CLIENT_CLK_2_axistreamclks" = FROM phy_clk_tx TO axistream_clk 8333 ps DATAPATHONLY; #assumes axistream_clk <= 120 MHz
-# TIMESPECs for AXI-Lite clock crossing to/from tx_client_clk
-TIMESPEC "TS_axi4liteclks_2_TX_CLIENT_CLK" = FROM axi4lite_clk TO phy_clk_tx 8000 ps DATAPATHONLY; #assumes phy_clk_tx <= 125 MHz
-TIMESPEC "TS_TX_CLIENT_CLK_2_axi4liteclks" = FROM phy_clk_tx TO axi4lite_clk 20000 ps DATAPATHONLY; #assumes axi4lite_clk <= 50 MHz
-
-# TNM_NET clk_gtx is */GTX_CLK
-# TIMESPECs for AXI Streaming clock crossing to/from */GTX_CLK
-TIMESPEC "TS_axistreamclks_2_GTX_CLK" = FROM axistream_clk TO clk_gtx 8000 ps DATAPATHONLY; #assumes clk_gtx <= 125 MHz
-TIMESPEC "TS_GTX_CLK_2_axistreamclks" = FROM clk_gtx TO axistream_clk 8333 ps DATAPATHONLY; #assumes axistream_clk <= 120 MHz
-# TIMESPECs for AXI-Lite clock crossing to/from */GTX_CLK
-TIMESPEC "TS_axi4lite_clk_2_GTX_CLK" = FROM axi4lite_clk TO clk_gtx 8000 ps DATAPATHONLY; #assumes clk_gtx <= 125 MHz
-TIMESPEC "TS_GTX_CLK_2_axi4lite_clk" = FROM clk_gtx TO axi4lite_clk 20000 ps DATAPATHONLY; #assumes axi4lite_clk <= 50 MHz
-
-# Depending on system configuration, the analysis tool may use either TNM_NET clk_gtx
-# or TNM_NET phy_clk_tx so only one set will be analyzed
-# Rx Clock crossings - Some paths are analyzed by the TS_flow_rx_to_tx constraint also
-# Needed since ts_resync_flops is commented out
-TIMESPEC "TS_RX_CLIENT_CLK_2_TX_CLIENT_CLK" = FROM phy_clk_rx TO phy_clk_tx 8000 ps DATAPATHONLY; #assumes phy_clk_tx <= 125 MHz
-TIMESPEC "TS_TX_CLIENT_CLK_2_RX_CLIENT_CLK" = FROM phy_clk_tx TO phy_clk_rx 8000 ps DATAPATHONLY; #assumes phy_clk_rx <= 125 MHz
-TIMESPEC "TS_RX_CLIENT_CLK_2_GTX_CLK" = FROM phy_clk_rx TO clk_gtx 8000 ps DATAPATHONLY; #assumes phy_clk_tx <= 125 MHz
-TIMESPEC "TS_GTX_CLK_2_RX_CLIENT_CLK" = FROM clk_gtx TO phy_clk_rx 8000 ps DATAPATHONLY; #assumes phy_clk_rx <= 125 MHz
-
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/bitgen.ut b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/bitgen.ut
deleted file mode 100644
index bca21c81b1..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/bitgen.ut
+++ /dev/null
@@ -1,3 +0,0 @@
--g TdoPin:PULLNONE
--g StartUpClk:JTAGCLK
-#add other options here.
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/download.cmd b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/download.cmd
deleted file mode 100644
index da4d7717e1..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/download.cmd
+++ /dev/null
@@ -1,6 +0,0 @@
-setMode -bscan
-setCable -p auto
-identify
-assignfile -p 2 -file implementation/download.bit
-program -p 2
-quit
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/fast_runtime.opt b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/fast_runtime.opt
deleted file mode 100644
index 994a6d2f85..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/fast_runtime.opt
+++ /dev/null
@@ -1,84 +0,0 @@
-FLOWTYPE = FPGA;
-###############################################################
-## Filename: fast_runtime.opt
-##
-## Option File For Xilinx FPGA Implementation Flow for Fast
-## Runtime.
-##
-## Version: 4.1.1
-###############################################################
-#
-# Options for Translator
-#
-# Type "ngdbuild -h" for a detailed list of ngdbuild command line options
-#
-Program ngdbuild
--p <partname>; # Partname to use - picked from xflow commandline
--nt timestamp; # NGO File generation. Regenerate only when
- # source netlist is newer than existing
- # NGO file (default)
--bm <design>.bmm # Block RAM memory map file
-<userdesign>; # User design - pick from xflow command line
--uc <design>.ucf; # ucf constraints
-<design>.ngd; # Name of NGD file. Filebase same as design filebase
-End Program ngdbuild
-
-#
-# Options for Mapper
-#
-# Type "map -h <arch>" for a detailed list of map command line options
-#
-Program map
--o <design>_map.ncd; # Output Mapped ncd file
--w; # Overwrite output files.
--pr b; # Pack internal FF/latches into IOBs
-#-fp <design>.mfp; # Floorplan file
--ol high;
--timing;
--detail;
-<inputdir><design>.ngd; # Input NGD file
-<inputdir><design>.pcf; # Physical constraints file
-END Program map
-
-#
-# Options for Post Map Trace
-#
-# Type "trce -h" for a detailed list of trce command line options
-#
-Program post_map_trce
--e 3; # Produce error report limited to 3 items per constraint
-#-o <design>_map.twr; # Output trace report file
--xml <design>_map.twx; # Output XML version of the timing report
-#-tsi <design>_map.tsi; # Produce Timing Specification Interaction report
-<inputdir><design>_map.ncd; # Input mapped ncd
-<inputdir><design>.pcf; # Physical constraints file
-END Program post_map_trce
-
-#
-# Options for Place and Route
-#
-# Type "par -h" for a detailed list of par command line options
-#
-Program par
--w; # Overwrite existing placed and routed ncd
--ol high; # Overall effort level
-<inputdir><design>_map.ncd; # Input mapped NCD file
-<design>.ncd; # Output placed and routed NCD
-<inputdir><design>.pcf; # Input physical constraints file
-END Program par
-
-#
-# Options for Post Par Trace
-#
-# Type "trce -h" for a detailed list of trce command line options
-#
-Program post_par_trce
--e 3; # Produce error report limited to 3 items per constraint
-#-o <design>.twr; # Output trace report file
--xml <design>.twx; # Output XML version of the timing report
-#-tsi <design>.tsi; # Produce Timing Specification Interaction report
-<inputdir><design>.ncd; # Input placed and routed ncd
-<inputdir><design>.pcf; # Physical constraints file
-END Program post_par_trce
-
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/system.filters b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/system.filters
deleted file mode 100644
index ec65f7de28..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/system.filters
+++ /dev/null
@@ -1,158 +0,0 @@
-<FILTERS>
-
- <IDENTIFICATION VERSION="1.2" XTLVERSION="1.2"/>
-
- <SET CLASS="PROJECT" VIEW_ID="BUSINTERFACE">
- <HEADERS HSCROLL="0" VSCROLL="0">
- <VARIABLE COL_INDEX="0" COL_WIDTH="321" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SET CLASS="FILTER_GROUP" ID="By Connection" IS_EXPANDED="TRUE">
- <VARIABLE NAME="By Connection" VALUE="By Connection" VIEWDISP="Bus Interface Filters" VIEWTYPE="STATIC"/>
- <SET CLASS="FILTER" ID="Connected" ROW_INDEX="0">
- <VARIABLE IS_LABELED="TRUE" NAME="Connected" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Unconnected" ROW_INDEX="1">
- <VARIABLE IS_LABELED="TRUE" NAME="Unconnected" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- </SET>
- <SET CLASS="FILTER_GROUP" ID="By Bus Standard" IS_EXPANDED="TRUE">
- <VARIABLE COL_INDEX="0" NAME="By Bus Standard" VALUE="By Bus Standard" VIEWDISP="Bus Interface Filters" VIEWTYPE="STATIC"/>
- <SET CLASS="FILTER" ID="AXI" ROW_INDEX="0">
- <VARIABLE IS_LABELED="TRUE" NAME="AXI" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="AXIS" ROW_INDEX="1">
- <VARIABLE IS_LABELED="TRUE" NAME="AXIS" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="OPB" IS_VISIBLE="FALSE" ROW_INDEX="2">
- <VARIABLE IS_LABELED="TRUE" NAME="OPB" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="LMB" ROW_INDEX="3">
- <VARIABLE IS_LABELED="TRUE" NAME="LMB" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="PLBV34" IS_VISIBLE="FALSE" ROW_INDEX="4">
- <VARIABLE IS_LABELED="TRUE" NAME="PLBV34" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="PLBV46" IS_VISIBLE="FALSE" ROW_INDEX="5">
- <VARIABLE IS_LABELED="TRUE" NAME="PLBV46" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="OCM" IS_VISIBLE="FALSE" ROW_INDEX="6">
- <VARIABLE IS_LABELED="TRUE" NAME="OCM" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="FSL" IS_VISIBLE="FALSE" ROW_INDEX="7">
- <VARIABLE IS_LABELED="TRUE" NAME="FSL" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="DCR" IS_VISIBLE="FALSE" ROW_INDEX="8">
- <VARIABLE IS_LABELED="TRUE" NAME="DCR" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="FCB" IS_VISIBLE="FALSE" ROW_INDEX="9">
- <VARIABLE IS_LABELED="TRUE" NAME="FCB" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="XIL" IS_EXPANDED="TRUE" ROW_INDEX="10">
- <VARIABLE IS_LABELED="TRUE" NAME="Xilinx Point To Point" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- <SET CLASS="SUB_FILTER" ID="XIL_BRAM" ROW_INDEX="0">
- <VARIABLE IS_LABELED="TRUE" NAME="XIL_BRAM" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="SUB_FILTER" ID="XIL_BSCAN" ROW_INDEX="1">
- <VARIABLE IS_LABELED="TRUE" NAME="XIL_BSCAN" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="SUB_FILTER" ID="XIL_MBDEBUG3" ROW_INDEX="2">
- <VARIABLE IS_LABELED="TRUE" NAME="XIL_MBDEBUG3" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="SUB_FILTER" ID="XIL_MBTRACE2" ROW_INDEX="3">
- <VARIABLE IS_LABELED="TRUE" NAME="XIL_MBTRACE2" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- </SET>
- <SET CLASS="FILTER" ID="USER" IS_VISIBLE="FALSE" ROW_INDEX="11">
- <VARIABLE IS_LABELED="TRUE" NAME="User Defined" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="XCL" IS_VISIBLE="FALSE" ROW_INDEX="12">
- <VARIABLE IS_LABELED="TRUE" NAME="XCL" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- </SET>
- <SET CLASS="FILTER_GROUP" ID="By Interface Type" IS_EXPANDED="TRUE">
- <VARIABLE NAME="By Interface Type" VALUE="By Interface Type" VIEWDISP="Bus Interface Filters" VIEWTYPE="STATIC"/>
- <SET CLASS="FILTER" ID="Slaves" ROW_INDEX="0">
- <VARIABLE IS_LABELED="TRUE" NAME="Slaves" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Masters" ROW_INDEX="1">
- <VARIABLE IS_LABELED="TRUE" NAME="Masters" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Master Slaves" ROW_INDEX="2">
- <VARIABLE IS_LABELED="TRUE" NAME="Master Slaves" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Monitors" ROW_INDEX="3">
- <VARIABLE IS_LABELED="TRUE" NAME="Monitors" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Targets" ROW_INDEX="4">
- <VARIABLE IS_LABELED="TRUE" NAME="Targets" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Initiators" ROW_INDEX="5">
- <VARIABLE IS_LABELED="TRUE" NAME="Initiators" VALUE="TRUE" VIEWDISP="Bus Interface Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- </SET>
- </SET>
-
- <SET CLASS="PROJECT" VIEW_ID="PORT">
- <HEADERS HSCROLL="0" VSCROLL="0">
- <VARIABLE COL_INDEX="0" COL_WIDTH="307" IS_VISIBLE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SET CLASS="FILTER_GROUP" ID="By Interface" IS_EXPANDED="TRUE">
- <VARIABLE NAME="By Interface" VALUE="By Interface" VIEWDISP="Port Filters" VIEWTYPE="STATIC"/>
- <SET CLASS="FILTER" ID="BUS" ROW_INDEX="0">
- <VARIABLE IS_LABELED="TRUE" NAME="BUS" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="IO" ROW_INDEX="1">
- <VARIABLE IS_LABELED="TRUE" NAME="IO" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- </SET>
- <SET CLASS="FILTER_GROUP" ID="By Connection" IS_EXPANDED="TRUE">
- <VARIABLE NAME="By Connection" VALUE="By Connection" VIEWDISP="Port Filters" VIEWTYPE="STATIC"/>
- <SET CLASS="FILTER" ID="Defaults" ROW_INDEX="0">
- <VARIABLE IS_LABELED="TRUE" NAME="Defaults" VALUE="FALSE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Connected" ROW_INDEX="1">
- <VARIABLE IS_LABELED="TRUE" NAME="Connected" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Unconnected" ROW_INDEX="2">
- <VARIABLE IS_LABELED="TRUE" NAME="Unconnected" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- </SET>
- <SET CLASS="FILTER_GROUP" ID="By Class" IS_EXPANDED="TRUE">
- <VARIABLE COL_INDEX="0" NAME="By Class" VALUE="By Class" VIEWDISP="Port Filters" VIEWTYPE="STATIC"/>
- <SET CLASS="FILTER" ID="Clocks Only" ROW_INDEX="0">
- <VARIABLE NAME="Clocks Only" VALUE="Clocks Only" VIEWDISP="Port Filters" VIEWTYPE="BUTTON"/>
- </SET>
- <SET CLASS="FILTER" ID="Clocks" ROW_INDEX="1">
- <VARIABLE IS_LABELED="TRUE" NAME="Clocks" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Resets Only" ROW_INDEX="2">
- <VARIABLE NAME="Resets Only" VALUE="Resets Only" VIEWDISP="Port Filters" VIEWTYPE="BUTTON"/>
- </SET>
- <SET CLASS="FILTER" ID="Resets" ROW_INDEX="3">
- <VARIABLE IS_LABELED="TRUE" NAME="Resets" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Interrupts Only" ROW_INDEX="4">
- <VARIABLE NAME="Interrupts Only" VALUE="Interrupts Only" VIEWDISP="Port Filters" VIEWTYPE="BUTTON"/>
- </SET>
- <SET CLASS="FILTER" ID="Interrupts" ROW_INDEX="5">
- <VARIABLE IS_LABELED="TRUE" NAME="Interrupts" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Others" ROW_INDEX="6">
- <VARIABLE IS_LABELED="TRUE" NAME="Others" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- </SET>
- <SET CLASS="FILTER_GROUP" ID="By Direction" IS_EXPANDED="TRUE">
- <VARIABLE NAME="By Direction" VALUE="By Direction" VIEWDISP="Port Filters" VIEWTYPE="STATIC"/>
- <SET CLASS="FILTER" ID="Inputs" ROW_INDEX="0">
- <VARIABLE IS_LABELED="TRUE" NAME="Inputs" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="Outputs" ROW_INDEX="1">
- <VARIABLE IS_LABELED="TRUE" NAME="Outputs" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- <SET CLASS="FILTER" ID="InOuts" ROW_INDEX="2">
- <VARIABLE IS_LABELED="TRUE" NAME="InOuts" VALUE="TRUE" VIEWDISP="Port Filters" VIEWTYPE="CHECKBOX"/>
- </SET>
- </SET>
- </SET>
-
-</FILTERS>
\ No newline at end of file
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/system.gui b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/system.gui
deleted file mode 100644
index b5e00b4d77..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/etc/system.gui
+++ /dev/null
@@ -1,227 +0,0 @@
-
-<SETTINGS>
-
- <IDENTIFICATION VERSION="1.2" XTLVERSION="1.2"/>
-
- <SET CLASS="PROJECT" DISPLAYMODE="TREE" VIEW_ID="BUSINTERFACE">
- <HEADERS HSCROLL="0" VSCROLL="0">
- <VARIABLE COL_INDEX="0" COL_WIDTH="224" IS_VISIBLE="TRUE" VIEWDISP="Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" COL_WIDTH="542" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" IS_VISIBLE="FALSE" VIEWDISP="Bus Standard" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" COL_WIDTH="230" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" COL_WIDTH="797" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" IS_VISIBLE="FALSE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" IS_VISIBLE="FALSE" VIEWDISP="Type" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="172,900,325" VERSION="0"/>
- <SET ID="MCB_DDR3" IS_EXPANDED="TRUE"/>
- <STATUS>
- <SELECTIONS>
- <VARIABLE ID="S0_AXI" PARENT="MCB_DDR3"/>
- </SELECTIONS>
- </STATUS>
- <SEQUENCES IS_DEF_SEQUENCES="TRUE">
- <VARIABLE ID="axi4_0" ROW_INDEX="0"/>
- <VARIABLE ID="axi4lite_0" ROW_INDEX="1"/>
- <VARIABLE ID="microblaze_0" ROW_INDEX="4"/>
- <VARIABLE ID="microblaze_0_ilmb" ROW_INDEX="3"/>
- <VARIABLE ID="microblaze_0_dlmb" ROW_INDEX="2"/>
- <VARIABLE ID="microblaze_0_i_bram_ctrl" ROW_INDEX="7"/>
- <VARIABLE ID="microblaze_0_d_bram_ctrl" ROW_INDEX="6"/>
- <VARIABLE ID="microblaze_0_bram_block" ROW_INDEX="5"/>
- <VARIABLE ID="proc_sys_reset_0" ROW_INDEX="18"/>
- <VARIABLE ID="clock_generator_0" ROW_INDEX="17"/>
- <VARIABLE ID="debug_module" ROW_INDEX="9"/>
- <VARIABLE ID="RS232_Uart_1" ROW_INDEX="16"/>
- <VARIABLE ID="LEDs_4Bits" ROW_INDEX="13"/>
- <VARIABLE ID="Push_Buttons_4Bits" ROW_INDEX="14"/>
- <VARIABLE ID="MCB_DDR3" IS_EXPANDED="TRUE" ROW_INDEX="8"/>
- <VARIABLE ID="ETHERNET" ROW_INDEX="12"/>
- <VARIABLE ID="ETHERNET_dma" ROW_INDEX="11"/>
- <VARIABLE ID="microblaze_0_intc" ROW_INDEX="10"/>
- <VARIABLE ID="axi_timer_0" ROW_INDEX="15"/>
- </SEQUENCES>
- </SET>
-
- <SET CLASS="PROJECT" DISPLAYMODE="FOCUS_TREE" VIEW_ID="BUSINTERFACE">
- <HEADERS>
- <VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" IS_VISIBLE="FALSE" VIEWDISP="Bus Standard" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" IS_VISIBLE="FALSE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" IS_VISIBLE="FALSE" VIEWDISP="Type" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="180,450,180" VERSION="0"/>
- </SET>
-
- <SET CLASS="PROJECT" DISPLAYMODE="FLAT" VIEW_ID="BUSINTERFACE">
- <HEADERS>
- <VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" IS_VISIBLE="FALSE" VIEWDISP="Bus Standard" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" IS_VISIBLE="FALSE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="7" IS_VISIBLE="FALSE" VIEWDISP="Type" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="180,450,180" VERSION="0"/>
- </SET>
-
- <SET CLASS="PROJECT" DISPLAYMODE="FOCUS_FLAT" VIEW_ID="BUSINTERFACE">
- <HEADERS>
- <VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" IS_VISIBLE="FALSE" VIEWDISP="Bus Standard" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" IS_VISIBLE="FALSE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="7" IS_VISIBLE="FALSE" VIEWDISP="Type" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="180,450,180" VERSION="0"/>
- </SET>
-
- <SET CLASS="PROJECT" DISPLAYMODE="TREE" VIEW_ID="PORT">
- <HEADERS HSCROLL="0" VSCROLL="0">
- <VARIABLE COL_INDEX="0" COL_WIDTH="232" IS_VISIBLE="TRUE" VIEWDISP="Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" COL_WIDTH="265" IS_VISIBLE="TRUE" VIEWDISP="Net" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Direction" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Range" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Class" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Frequency(Hz)" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Reset Polarity" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="7" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Sensitivity" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="8" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="9" IS_VISIBLE="FALSE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="10" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,630,180" VERSION="0"/>
- <SET ID="MCB_DDR3" IS_EXPANDED="TRUE"/>
- <STATUS>
- <SELECTIONS/>
- </STATUS>
- <SEQUENCES IS_DEF_SEQUENCES="TRUE">
- <VARIABLE ID="ExternalPorts" ROW_INDEX="0"/>
- <VARIABLE ID="axi4_0" ROW_INDEX="1"/>
- <VARIABLE ID="axi4lite_0" ROW_INDEX="2"/>
- <VARIABLE ID="microblaze_0" ROW_INDEX="5"/>
- <VARIABLE ID="microblaze_0_ilmb" ROW_INDEX="4"/>
- <VARIABLE ID="microblaze_0_dlmb" ROW_INDEX="3"/>
- <VARIABLE ID="microblaze_0_i_bram_ctrl" ROW_INDEX="8"/>
- <VARIABLE ID="microblaze_0_d_bram_ctrl" ROW_INDEX="7"/>
- <VARIABLE ID="microblaze_0_bram_block" ROW_INDEX="6"/>
- <VARIABLE ID="proc_sys_reset_0" ROW_INDEX="19"/>
- <VARIABLE ID="clock_generator_0" ROW_INDEX="18"/>
- <VARIABLE ID="debug_module" ROW_INDEX="10"/>
- <VARIABLE ID="RS232_Uart_1" ROW_INDEX="17"/>
- <VARIABLE ID="LEDs_4Bits" ROW_INDEX="14"/>
- <VARIABLE ID="Push_Buttons_4Bits" ROW_INDEX="15"/>
- <VARIABLE ID="MCB_DDR3" IS_EXPANDED="TRUE" ROW_INDEX="9"/>
- <VARIABLE ID="ETHERNET" ROW_INDEX="13"/>
- <VARIABLE ID="ETHERNET_dma" ROW_INDEX="12"/>
- <VARIABLE ID="microblaze_0_intc" ROW_INDEX="11"/>
- <VARIABLE ID="axi_timer_0" ROW_INDEX="16"/>
- </SEQUENCES>
- </SET>
-
- <SET CLASS="PROJECT" DISPLAYMODE="FOCUS_TREE" VIEW_ID="PORT">
- <HEADERS>
- <VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Net" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Direction" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" IS_VISIBLE="TRUE" VIEWDISP="Range" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="Class" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="Frequency(Hz)" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" IS_VISIBLE="TRUE" VIEWDISP="Reset Polarity" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="7" IS_VISIBLE="TRUE" VIEWDISP="Sensitivity" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="8" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="9" IS_VISIBLE="FALSE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="10" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,630,180" VERSION="0"/>
- </SET>
-
- <SET CLASS="PROJECT" DISPLAYMODE="FLAT" VIEW_ID="PORT">
- <HEADERS>
- <VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Port Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Net" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" IS_VISIBLE="TRUE" VIEWDISP="Direction" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="Range" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="Class" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" IS_VISIBLE="TRUE" VIEWDISP="Frequency(Hz)" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="7" IS_VISIBLE="TRUE" VIEWDISP="Reset Polarity" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="8" IS_VISIBLE="TRUE" VIEWDISP="Sensitivity" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="9" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="10" IS_VISIBLE="FALSE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="11" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,630,180" VERSION="0"/>
- </SET>
-
- <SET CLASS="PROJECT" DISPLAYMODE="FOCUS_FLAT" VIEW_ID="PORT">
- <HEADERS>
- <VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Port Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Net" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" IS_VISIBLE="TRUE" VIEWDISP="Direction" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="Range" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="Class" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" IS_VISIBLE="TRUE" VIEWDISP="Frequency(Hz)" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="7" IS_VISIBLE="TRUE" VIEWDISP="Reset Polarity" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="8" IS_VISIBLE="TRUE" VIEWDISP="Sensitivity" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="9" IS_VISIBLE="TRUE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="10" IS_VISIBLE="FALSE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="11" IS_VISIBLE="TRUE" VIEWDISP="IP Classification" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,630,180" VERSION="0"/>
- </SET>
-
- <SET CLASS="PROJECT" DISPLAYMODE="TREE" VIEW_ID="ADDRESS">
- <HEADERS HSCROLL="0" VSCROLL="0">
- <VARIABLE COL_INDEX="0" COL_WIDTH="200" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Base Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Base Address" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="High Address" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Size" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" COL_WIDTH="105" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface(s)" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" COL_WIDTH="100" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="7" IS_VISIBLE="FALSE" VIEWDISP="ICache" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="8" IS_VISIBLE="FALSE" VIEWDISP="DCache" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="8" IS_VISIBLE="FALSE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="10" IS_VISIBLE="FALSE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="7" IS_VISIBLE="FALSE" VIEWDISP="Address Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="9" COL_WIDTH="592" IS_VISIBLE="TRUE" VIEWDISP="Lock" VIEWTYPE="HEADER"/>
- </HEADERS>
- <SPLITTERS COLLAPSIBLE="1" HANDLEWIDTH="4" MARKER="255" ORIENTATION="1" RESIZE="1" SIZES="0,630,180" VERSION="0"/>
- <SET ID="microblaze_0" IS_EXPANDED="TRUE"/>
- <STATUS>
- <SELECTIONS/>
- </STATUS>
- <SEQUENCES IS_DEF_SEQUENCES="TRUE">
- <VARIABLE ID="microblaze_0" IS_EXPANDED="TRUE" ROW_INDEX="0"/>
- </SEQUENCES>
- </SET>
-
- <SET CLASS="PROJECT" DISPLAYMODE="FLAT" VIEW_ID="ADDRESS">
- <HEADERS>
- <VARIABLE COL_INDEX="0" IS_VISIBLE="TRUE" VIEWDISP="Instance" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="1" IS_VISIBLE="TRUE" VIEWDISP="Base Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="2" IS_VISIBLE="TRUE" VIEWDISP="Base Address" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="3" IS_VISIBLE="TRUE" VIEWDISP="High Address" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="4" IS_VISIBLE="TRUE" VIEWDISP="Size" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="5" IS_VISIBLE="TRUE" VIEWDISP="Bus Interface(s)" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="6" IS_VISIBLE="TRUE" VIEWDISP="Bus Name" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="7" IS_VISIBLE="FALSE" VIEWDISP="ICache" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="8" IS_VISIBLE="FALSE" VIEWDISP="DCache" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="9" IS_VISIBLE="FALSE" VIEWDISP="IP Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="10" IS_VISIBLE="FALSE" VIEWDISP="IP Version" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="11" IS_VISIBLE="FALSE" VIEWDISP="Address Type" VIEWTYPE="HEADER"/>
- <VARIABLE COL_INDEX="12" IS_VISIBLE="TRUE" VIEWDISP="Lock" VIEWTYPE="HEADER"/>
- </HEADERS>
- </SET>
-
-</SETTINGS>
\ No newline at end of file
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.bsb b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.bsb
deleted file mode 100644
index 85c9d79947..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.bsb
+++ /dev/null
@@ -1 +0,0 @@
- ��Į��tt���������@Dbb\b\`bDv*��Į��tt�������@D������\���D@D��l`jD@D�Dv.��Į��tt�����ʄ����@D������������D@D�������lDv.��Į��tt�����ʄ����@D�����������D@D��l���hj�Dv'��Į��tt�����ʄ����@D�������D@D���hphDv'��Į��tt�����ʄ����@D������������D@DbDv&��Į��tt�����ʄ����@D����������D@DZfDv%��Į��tt��������@D�ľ��Ҿb��D@Db\`Dv;��Į��tt�����ʦ�����@D��־����D@Dd````````D@D���������ʾ`Dv@��Į��tt��Ƞ��������@D���������ʾ`D@D����������D@D���������ʾ`DvH��Į��tt�����ʆ��������@D���������ʾ`D@D���¾����ʾ��ھ����D@D�������fDv@��Į��tt�����ʆ��������@D���������ʾ`D@D���¾����ʾ����D@DpbrdDvI��Į��tt�����ʆ��������@D���������ʾ`D@D���������ʾ��ھ����D@D�������fDvA��Į��tt�����ʆ��������@D���������ʾ`D@D���������ʾ����D@DpbrdDvH��Į��tt�����ʆ��������@D���������ʾ`D@D�ľ����־���������D@Db````````Dv>��Į��tt�����ʆ��������@D���������ʾ`D@D�ľ���������D@D����DvF��Į��tt�����ʆ��������@D���������ʾ`D@D�ľ����ؾ����������D@DljjflDv?��Į��tt��Ƞ���������@D��������D@D��Ҿ��������D@D���������ʾ`Dv;��Į��tt�����ʆ��������@D��������D@D����������¾`D@D����Dv=��Į��tt�����ʆ��������@D��������D@D��ʾ�����������D@D����Dv=��Į��tt��Ƞ���������@D����h����D@D��Ҿ����D@D���������ʾ`Dv@��Į��tt�����ʆ��������@D����h����D@D��ʾ�����������D@D�����Dv>��Į��tt��Ƞ���������@D�������fD@D��Ҿ�l�����D@D���������ʾ`DvE��Į��tt��Ƞ���������@D���о�������h����D@D��Ҿ����D@D���������ʾ`DvH��Į��tt�����ʆ��������@D���о�������h����D@D��ʾ�����������D@D�����DvC��Į��tt��Ƞ���������@D��dfd�����bD@D��Ҿ��������D@D���������ʾ`DvA��Į��tt�����ʆ��������@D��dfd�����bD@D����`����Ⱦ����D@Drl``Dv>��Į��tt�����ʆ��������@D��dfd�����bD@D����`����������D@DpDv>��Į��tt�����ʆ��������@D��dfd�����bD@D����`�������D@D����DvB��Į��tt�����ʆ��������@D��dfd�����bD@D��ʾ�����������D@D�����Dv
\ No newline at end of file
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.make b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.make
deleted file mode 100644
index 87c158c232..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.make
+++ /dev/null
@@ -1,216 +0,0 @@
-#################################################################
-# Makefile generated by Xilinx Platform Studio
-# Project:C:\E\Dev\FreeRTOS\WorkingCopy\Demo\MicroBlaze_Spartan-6_EthernetFull\PlatformStudioProject\system.xmp
-#
-# WARNING : This file will be re-generated every time a command
-# to run a make target is invoked. So, any changes made to this
-# file manually, will be lost when make is invoked next.
-#################################################################
-
-# Name of the Microprocessor system
-# The hardware specification of the system is in file :
-# C:\E\Dev\FreeRTOS\WorkingCopy\Demo\MicroBlaze_Spartan-6_EthernetFull\PlatformStudioProject\system.mhs
-
-include system_incl.make
-
-#################################################################
-# PHONY TARGETS
-#################################################################
-.PHONY: dummy
-.PHONY: netlistclean
-.PHONY: bitsclean
-.PHONY: simclean
-.PHONY: exporttosdk
-
-#################################################################
-# EXTERNAL TARGETS
-#################################################################
-all:
- @echo "Makefile to build a Microprocessor system :"
- @echo "Run make with any of the following targets"
- @echo " "
- @echo " netlist : Generates the netlist for the given MHS "
- @echo " bits : Runs Implementation tools to generate the bitstream"
- @echo " exporttosdk: Export files to SDK"
- @echo " "
- @echo " init_bram: Initializes bitstream with BRAM data"
- @echo " ace : Generate ace file from bitstream and elf"
- @echo " download : Downloads the bitstream onto the board"
- @echo " "
- @echo " sim : Generates HDL simulation models and runs simulator for chosen simulation mode"
- @echo " simmodel : Generates HDL simulation models for chosen simulation mode"
- @echo " "
- @echo " netlistclean: Deletes netlist"
- @echo " bitsclean: Deletes bit, ncd, bmm files"
- @echo " hwclean : Deletes implementation dir"
- @echo " simclean : Deletes simulation dir"
- @echo " clean : Deletes all generated files/directories"
- @echo " "
-
-bits: $(SYSTEM_BIT)
-
-ace: $(SYSTEM_ACE)
-
-exporttosdk: $(SYSTEM_HW_HANDOFF_DEP)
-
-netlist: $(POSTSYN_NETLIST)
-
-download: $(DOWNLOAD_BIT) dummy
- @echo "*********************************************"
- @echo "Downloading Bitstream onto the target board"
- @echo "*********************************************"
- impact -batch etc/download.cmd
-
-init_bram: $(DOWNLOAD_BIT)
-
-sim: $(DEFAULT_SIM_SCRIPT)
- cd simulation/behavioral & \
- system_fuse.cmd
- cd simulation/behavioral & \
- start /B $(SIM_CMD) -gui -tclbatch system_setup.tcl
-
-simmodel: $(DEFAULT_SIM_SCRIPT)
-
-behavioral_model: $(BEHAVIORAL_SIM_SCRIPT)
-
-structural_model: $(STRUCTURAL_SIM_SCRIPT)
-
-clean: hwclean simclean
- rm -f _impact.cmd
-
-hwclean: netlistclean bitsclean
- rm -rf implementation synthesis xst hdl
- rm -rf xst.srp $(SYSTEM).srp
- rm -f __xps/ise/_xmsgs/bitinit.xmsgs
-
-netlistclean:
- rm -f $(POSTSYN_NETLIST)
- rm -f platgen.log
- rm -f __xps/ise/_xmsgs/platgen.xmsgs
- rm -f $(BMM_FILE)
-
-bitsclean:
- rm -f $(SYSTEM_BIT)
- rm -f implementation/$(SYSTEM).ncd
- rm -f implementation/$(SYSTEM)_bd.bmm
- rm -f implementation/$(SYSTEM)_map.ncd
- rm -f implementation/download.bit
- rm -f __xps/$(SYSTEM)_routed
-
-simclean:
- rm -rf simulation/behavioral
- rm -f simgen.log
- rm -f __xps/ise/_xmsgs/simgen.xmsgs
-
-#################################################################
-# BOOTLOOP ELF FILES
-#################################################################
-
-
-$(MICROBLAZE_0_BOOTLOOP): $(MICROBLAZE_BOOTLOOP_LE)
- IF NOT EXIST "$(BOOTLOOP_DIR)" @mkdir "$(BOOTLOOP_DIR)"
- cp -f $(MICROBLAZE_BOOTLOOP_LE) $(MICROBLAZE_0_BOOTLOOP)
-
-#################################################################
-# HARDWARE IMPLEMENTATION FLOW
-#################################################################
-
-
-$(BMM_FILE) \
-$(WRAPPER_NGC_FILES): $(MHSFILE) __xps/platgen.opt \
- $(CORE_STATE_DEVELOPMENT_FILES)
- @echo "****************************************************"
- @echo "Creating system netlist for hardware specification.."
- @echo "****************************************************"
- platgen $(PLATGEN_OPTIONS) $(MHSFILE)
-
-$(POSTSYN_NETLIST): $(WRAPPER_NGC_FILES)
- @echo "Running synthesis..."
- cd synthesis & synthesis.cmd
-
-__xps/$(SYSTEM)_routed: $(FPGA_IMP_DEPENDENCY)
- @echo "*********************************************"
- @echo "Running Xilinx Implementation tools.."
- @echo "*********************************************"
- @cp -f $(UCF_FILE) implementation/$(SYSTEM).ucf
- @cp -f etc/fast_runtime.opt implementation/xflow.opt
- xflow -wd implementation -p $(DEVICE) -implement xflow.opt $(SYSTEM).ngc
- touch __xps/$(SYSTEM)_routed
-
-$(SYSTEM_BIT): __xps/$(SYSTEM)_routed $(BITGEN_UT_FILE)
- xilperl $(XILINX_EDK_DIR)/data/fpga_impl/observe_par.pl $(OBSERVE_PAR_OPTIONS) implementation/$(SYSTEM).par
- @echo "*********************************************"
- @echo "Running Bitgen.."
- @echo "*********************************************"
- @cp -f $(BITGEN_UT_FILE) implementation/bitgen.ut
- cd implementation & bitgen -w -f bitgen.ut $(SYSTEM) & cd ..
-
-$(DOWNLOAD_BIT): $(SYSTEM_BIT) $(BRAMINIT_ELF_IMP_FILES) __xps/bitinit.opt
- @cp -f implementation/$(SYSTEM)_bd.bmm .
- @echo "*********************************************"
- @echo "Initializing BRAM contents of the bitstream"
- @echo "*********************************************"
- bitinit -p $(DEVICE) $(MHSFILE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_IMP_FILE_ARGS) \
- -bt $(SYSTEM_BIT) -o $(DOWNLOAD_BIT)
- @rm -f $(SYSTEM)_bd.bmm
-
-$(SYSTEM_ACE):
- @echo "In order to generate ace file, you must have:-"
- @echo "- exactly one processor."
- @echo "- opb_mdm, if using microblaze."
-
-#################################################################
-# EXPORT_TO_SDK FLOW
-#################################################################
-
-$(SYSTEM_HW_HANDOFF): $(MHSFILE) __xps/platgen.opt
- IF NOT EXIST "$(SDK_EXPORT_DIR)" @mkdir "$(SDK_EXPORT_DIR)"
- psf2Edward -inp $(SYSTEM).xmp -exit_on_error -edwver 1.2 -xml $(SDK_EXPORT_DIR)/$(SYSTEM).xml $(GLOBAL_SEARCHPATHOPT)
- xdsgen -inp $(SYSTEM).xmp -report $(SDK_EXPORT_DIR)/$(SYSTEM).html $(GLOBAL_SEARCHPATHOPT) -make_docs_local
-
-$(SYSTEM_HW_HANDOFF_BIT): $(SYSTEM_BIT)
- @rm -rf $(SYSTEM_HW_HANDOFF_BIT)
- @cp -f $(SYSTEM_BIT) $(SDK_EXPORT_DIR)
-
-$(SYSTEM_HW_HANDOFF_BMM): implementation/$(SYSTEM)_bd.bmm
- @rm -rf $(SYSTEM_HW_HANDOFF_BMM)
- @cp -f implementation/$(SYSTEM)_bd.bmm $(SDK_EXPORT_DIR)
-
-#################################################################
-# SIMULATION FLOW
-#################################################################
-
-
-################## BEHAVIORAL SIMULATION ##################
-
-$(BEHAVIORAL_SIM_SCRIPT): $(MHSFILE) __xps/simgen.opt \
- $(BRAMINIT_ELF_SIM_FILES)
- @echo "*********************************************"
- @echo "Creating behavioral simulation models..."
- @echo "*********************************************"
- simgen $(SIMGEN_OPTIONS) -m behavioral $(MHSFILE)
-
-################## STRUCTURAL SIMULATION ##################
-
-$(STRUCTURAL_SIM_SCRIPT): $(WRAPPER_NGC_FILES) __xps/simgen.opt \
- $(BRAMINIT_ELF_SIM_FILES)
- @echo "*********************************************"
- @echo "Creating structural simulation models..."
- @echo "*********************************************"
- simgen $(SIMGEN_OPTIONS) -sd implementation -m structural $(MHSFILE)
-
-
-################## TIMING SIMULATION ##################
-
-implementation/$(SYSTEM).ncd: __xps/$(SYSTEM)_routed
-
-$(TIMING_SIM_SCRIPT): implementation/$(SYSTEM).ncd __xps/simgen.opt \
- $(BRAMINIT_ELF_SIM_FILES)
- @echo "*********************************************"
- @echo "Creating timing simulation models..."
- @echo "*********************************************"
- simgen $(SIMGEN_OPTIONS) -sd implementation -m timing $(MHSFILE)
-
-dummy:
- @echo ""
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.mhs b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.mhs
deleted file mode 100644
index 8640944912..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.mhs
+++ /dev/null
@@ -1,458 +0,0 @@
-
-# ##############################################################################
-# Created by Base System Builder Wizard for Xilinx EDK 13.1 Build EDK_O.40d
-# Fri Aug 26 19:44:08 2011
-# Target Board: xilinx.com sp605 Rev C
-# Family: spartan6
-# Device: xc6slx45t
-# Package: fgg484
-# Speed Grade: -3
-# ##############################################################################
- PARAMETER VERSION = 2.1.0
-
-
- PORT RESET = RESET, DIR = I, SIGIS = RST, RST_POLARITY = 1
- PORT CLK_P = CLK, DIR = I, DIFFERENTIAL_POLARITY = P, SIGIS = CLK, CLK_FREQ = 200000000
- PORT CLK_N = CLK, DIR = I, DIFFERENTIAL_POLARITY = N, SIGIS = CLK, CLK_FREQ = 200000000
- PORT RS232_Uart_1_sout = RS232_Uart_1_sout, DIR = O
- PORT RS232_Uart_1_sin = RS232_Uart_1_sin, DIR = I
- PORT LEDs_4Bits_TRI_O = LEDs_4Bits_TRI_O, DIR = O, VEC = [3:0]
- PORT Push_Buttons_4Bits_TRI_I = Push_Buttons_4Bits_TRI_I, DIR = I, VEC = [3:0]
- PORT mcbx_dram_clk = mcbx_dram_clk, DIR = O
- PORT mcbx_dram_clk_n = mcbx_dram_clk_n, DIR = O
- PORT mcbx_dram_cke = mcbx_dram_cke, DIR = O
- PORT mcbx_dram_odt = mcbx_dram_odt, DIR = O
- PORT mcbx_dram_ras_n = mcbx_dram_ras_n, DIR = O
- PORT mcbx_dram_cas_n = mcbx_dram_cas_n, DIR = O
- PORT mcbx_dram_we_n = mcbx_dram_we_n, DIR = O
- PORT mcbx_dram_udm = mcbx_dram_udm, DIR = O
- PORT mcbx_dram_ldm = mcbx_dram_ldm, DIR = O
- PORT mcbx_dram_ba = mcbx_dram_ba, DIR = O, VEC = [2:0]
- PORT mcbx_dram_addr = mcbx_dram_addr, DIR = O, VEC = [12:0]
- PORT mcbx_dram_ddr3_rst = mcbx_dram_ddr3_rst, DIR = O
- PORT mcbx_dram_dq = mcbx_dram_dq, DIR = IO, VEC = [15:0]
- PORT mcbx_dram_dqs = mcbx_dram_dqs, DIR = IO
- PORT mcbx_dram_dqs_n = mcbx_dram_dqs_n, DIR = IO
- PORT mcbx_dram_udqs = mcbx_dram_udqs, DIR = IO
- PORT mcbx_dram_udqs_n = mcbx_dram_udqs_n, DIR = IO
- PORT rzq = rzq, DIR = IO
- PORT zio = zio, DIR = IO
- PORT ETHERNET_MDIO = ETHERNET_MDIO, DIR = IO
- PORT ETHERNET_MDC = ETHERNET_MDC, DIR = O
- PORT ETHERNET_TX_ER = ETHERNET_TX_ER, DIR = O
- PORT ETHERNET_TXD = ETHERNET_TXD, DIR = O, VEC = [7:0]
- PORT ETHERNET_TX_EN = ETHERNET_TX_EN, DIR = O
- PORT ETHERNET_MII_TX_CLK = ETHERNET_MII_TX_CLK, DIR = I
- PORT ETHERNET_TX_CLK = ETHERNET_TX_CLK, DIR = O
- PORT ETHERNET_RXD = ETHERNET_RXD, DIR = I, VEC = [7:0]
- PORT ETHERNET_RX_ER = ETHERNET_RX_ER, DIR = I
- PORT ETHERNET_RX_CLK = ETHERNET_RX_CLK, DIR = I
- PORT ETHERNET_RX_DV = ETHERNET_RX_DV, DIR = I
- PORT ETHERNET_PHY_RST_N = ETHERNET_PHY_RST_N, DIR = O
-
-
-BEGIN axi_interconnect
- PARAMETER INSTANCE = axi4_0
- PARAMETER HW_VER = 1.02.a
- PORT interconnect_aclk = clk_100_0000MHzPLL0
- PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
-END
-
-BEGIN axi_interconnect
- PARAMETER INSTANCE = axi4lite_0
- PARAMETER HW_VER = 1.02.a
- PARAMETER C_INTERCONNECT_CONNECTIVITY_MODE = 0
- PORT INTERCONNECT_ARESETN = proc_sys_reset_0_Interconnect_aresetn
- PORT INTERCONNECT_ACLK = clk_50_0000MHzPLL0
-END
-
-BEGIN microblaze
- PARAMETER INSTANCE = microblaze_0
- PARAMETER HW_VER = 8.10.a
- PARAMETER C_INTERCONNECT = 2
- PARAMETER C_USE_BARREL = 1
- PARAMETER C_USE_FPU = 0
- PARAMETER C_DEBUG_ENABLED = 1
- PARAMETER C_ICACHE_BASEADDR = 0xc0000000
- PARAMETER C_ICACHE_HIGHADDR = 0xc7ffffff
- PARAMETER C_USE_ICACHE = 1
- PARAMETER C_ICACHE_ALWAYS_USED = 1
- PARAMETER C_DCACHE_BASEADDR = 0xc0000000
- PARAMETER C_DCACHE_HIGHADDR = 0xc7ffffff
- PARAMETER C_USE_DCACHE = 1
- PARAMETER C_DCACHE_ALWAYS_USED = 1
- PARAMETER C_INTERCONNECT_M_AXI_DC_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_DC_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_DP_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_DP_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_DP_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_DP_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_DP_B_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_DC_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_DC_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_DC_B_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_IC_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_IC_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_IC_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_IC_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_IC_B_REGISTER = 1
- PARAMETER C_NUMBER_OF_PC_BRK = 7
- PARAMETER C_NUMBER_OF_WR_ADDR_BRK = 2
- PARAMETER C_NUMBER_OF_RD_ADDR_BRK = 2
- PARAMETER C_CACHE_BYTE_SIZE = 16384
- PARAMETER C_DCACHE_BYTE_SIZE = 16384
- BUS_INTERFACE M_AXI_DP = axi4lite_0
- BUS_INTERFACE DEBUG = microblaze_0_debug
- BUS_INTERFACE DLMB = microblaze_0_dlmb
- BUS_INTERFACE ILMB = microblaze_0_ilmb
- BUS_INTERFACE M_AXI_DC = axi4_0
- BUS_INTERFACE M_AXI_IC = axi4_0
- PORT MB_RESET = proc_sys_reset_0_MB_Reset
- PORT CLK = clk_100_0000MHzPLL0
- PORT INTERRUPT = microblaze_0_interrupt
-END
-
-BEGIN lmb_v10
- PARAMETER INSTANCE = microblaze_0_ilmb
- PARAMETER HW_VER = 2.00.a
- PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
- PORT LMB_CLK = clk_100_0000MHzPLL0
-END
-
-BEGIN lmb_v10
- PARAMETER INSTANCE = microblaze_0_dlmb
- PARAMETER HW_VER = 2.00.a
- PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
- PORT LMB_CLK = clk_100_0000MHzPLL0
-END
-
-BEGIN lmb_bram_if_cntlr
- PARAMETER INSTANCE = microblaze_0_i_bram_ctrl
- PARAMETER HW_VER = 3.00.a
- PARAMETER C_BASEADDR = 0x00000000
- PARAMETER C_HIGHADDR = 0x00001FFF
- BUS_INTERFACE SLMB = microblaze_0_ilmb
- BUS_INTERFACE BRAM_PORT = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
-END
-
-BEGIN lmb_bram_if_cntlr
- PARAMETER INSTANCE = microblaze_0_d_bram_ctrl
- PARAMETER HW_VER = 3.00.a
- PARAMETER C_BASEADDR = 0x00000000
- PARAMETER C_HIGHADDR = 0x00001FFF
- BUS_INTERFACE SLMB = microblaze_0_dlmb
- BUS_INTERFACE BRAM_PORT = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
-END
-
-BEGIN bram_block
- PARAMETER INSTANCE = microblaze_0_bram_block
- PARAMETER HW_VER = 1.00.a
- BUS_INTERFACE PORTA = microblaze_0_i_bram_ctrl_2_microblaze_0_bram_block
- BUS_INTERFACE PORTB = microblaze_0_d_bram_ctrl_2_microblaze_0_bram_block
-END
-
-BEGIN proc_sys_reset
- PARAMETER INSTANCE = proc_sys_reset_0
- PARAMETER HW_VER = 3.00.a
- PARAMETER C_EXT_RESET_HIGH = 1
- PORT Ext_Reset_In = RESET
- PORT MB_Reset = proc_sys_reset_0_MB_Reset
- PORT Slowest_sync_clk = clk_50_0000MHzPLL0
- PORT Interconnect_aresetn = proc_sys_reset_0_Interconnect_aresetn
- PORT Dcm_locked = proc_sys_reset_0_Dcm_locked
- PORT MB_Debug_Sys_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
- PORT BUS_STRUCT_RESET = proc_sys_reset_0_BUS_STRUCT_RESET
-END
-
-BEGIN clock_generator
- PARAMETER INSTANCE = clock_generator_0
- PARAMETER HW_VER = 4.01.a
- PARAMETER C_CLKIN_FREQ = 200000000
- PARAMETER C_CLKOUT0_FREQ = 600000000
- PARAMETER C_CLKOUT0_GROUP = PLL0
- PARAMETER C_CLKOUT0_BUF = FALSE
- PARAMETER C_CLKOUT1_FREQ = 600000000
- PARAMETER C_CLKOUT1_PHASE = 180
- PARAMETER C_CLKOUT1_GROUP = PLL0
- PARAMETER C_CLKOUT1_BUF = FALSE
- PARAMETER C_CLKOUT2_FREQ = 100000000
- PARAMETER C_CLKOUT2_GROUP = PLL0
- PARAMETER C_CLKOUT3_FREQ = 125000000
- PARAMETER C_CLKOUT3_GROUP = NONE
- PARAMETER C_CLKOUT4_FREQ = 200000000
- PARAMETER C_CLKOUT4_GROUP = PLL0
- PARAMETER C_CLKOUT5_FREQ = 50000000
- PARAMETER C_CLKOUT5_GROUP = PLL0
- PORT RST = RESET
- PORT CLKIN = CLK
- PORT CLKOUT2 = clk_100_0000MHzPLL0
- PORT CLKOUT5 = clk_50_0000MHzPLL0
- PORT CLKOUT3 = clk_125_0000MHz
- PORT CLKOUT4 = clk_200_0000MHzPLL0
- PORT CLKOUT0 = clk_600_0000MHzPLL0_nobuf
- PORT CLKOUT1 = clk_600_0000MHz180PLL0_nobuf
- PORT LOCKED = proc_sys_reset_0_Dcm_locked
-END
-
-BEGIN mdm
- PARAMETER INSTANCE = debug_module
- PARAMETER HW_VER = 2.00.b
- PARAMETER C_INTERCONNECT = 2
- PARAMETER C_USE_UART = 1
- PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
- PARAMETER C_BASEADDR = 0x74800000
- PARAMETER C_HIGHADDR = 0x7480FFFF
- BUS_INTERFACE S_AXI = axi4lite_0
- BUS_INTERFACE MBDEBUG_0 = microblaze_0_debug
- PORT S_AXI_ACLK = clk_50_0000MHzPLL0
- PORT Debug_SYS_Rst = proc_sys_reset_0_MB_Debug_Sys_Rst
-END
-
-BEGIN axi_uartlite
- PARAMETER INSTANCE = RS232_Uart_1
- PARAMETER HW_VER = 1.01.a
- PARAMETER C_BAUDRATE = 115200
- PARAMETER C_DATA_BITS = 8
- PARAMETER C_USE_PARITY = 0
- PARAMETER C_ODD_PARITY = 1
- PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
- PARAMETER C_BASEADDR = 0x40600000
- PARAMETER C_HIGHADDR = 0x4060ffff
- BUS_INTERFACE S_AXI = axi4lite_0
- PORT TX = RS232_Uart_1_sout
- PORT RX = RS232_Uart_1_sin
- PORT S_AXI_ACLK = clk_50_0000MHzPLL0
- PORT Interrupt = RS232_Uart_1_Interrupt
-END
-
-BEGIN axi_gpio
- PARAMETER INSTANCE = LEDs_4Bits
- PARAMETER HW_VER = 1.01.a
- PARAMETER C_GPIO_WIDTH = 4
- PARAMETER C_ALL_INPUTS = 0
- PARAMETER C_INTERRUPT_PRESENT = 0
- PARAMETER C_IS_DUAL = 0
- PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
- PARAMETER C_BASEADDR = 0x40020000
- PARAMETER C_HIGHADDR = 0x4002ffff
- BUS_INTERFACE S_AXI = axi4lite_0
- PORT GPIO_IO_O = LEDs_4Bits_TRI_O
- PORT S_AXI_ACLK = clk_50_0000MHzPLL0
-END
-
-BEGIN axi_gpio
- PARAMETER INSTANCE = Push_Buttons_4Bits
- PARAMETER HW_VER = 1.01.a
- PARAMETER C_GPIO_WIDTH = 4
- PARAMETER C_ALL_INPUTS = 1
- PARAMETER C_INTERRUPT_PRESENT = 1
- PARAMETER C_IS_DUAL = 0
- PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
- PARAMETER C_BASEADDR = 0x40000000
- PARAMETER C_HIGHADDR = 0x4000ffff
- BUS_INTERFACE S_AXI = axi4lite_0
- PORT GPIO_IO_I = Push_Buttons_4Bits_TRI_I
- PORT S_AXI_ACLK = clk_50_0000MHzPLL0
- PORT IP2INTC_Irpt = Push_Buttons_4Bits_IP2INTC_Irpt
-END
-
-BEGIN axi_s6_ddrx
- PARAMETER INSTANCE = MCB_DDR3
- PARAMETER HW_VER = 1.02.a
- PARAMETER C_MCB_RZQ_LOC = K7
- PARAMETER C_MCB_ZIO_LOC = R7
- PARAMETER C_MEM_PARTNO = MT41J64M16XX-187E
- PARAMETER C_INTERCONNECT_S0_AXI_MASTERS = microblaze_0.M_AXI_DC & microblaze_0.M_AXI_IC & ETHERNET_dma.M_AXI_SG & ETHERNET_dma.M_AXI_MM2S & ETHERNET_dma.M_AXI_S2MM
- PARAMETER C_INTERCONNECT_S0_AXI_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_S0_AXI_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_S0_AXI_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_S0_AXI_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_S0_AXI_B_REGISTER = 1
- PARAMETER C_S0_AXI_BASEADDR = 0x80000000
- PARAMETER C_S0_AXI_HIGHADDR = 0x807FFFFF
- PARAMETER C_S0_AXI_STRICT_COHERENCY = 0
- BUS_INTERFACE S0_AXI = axi4_0
- PORT mcbx_dram_clk = mcbx_dram_clk
- PORT mcbx_dram_clk_n = mcbx_dram_clk_n
- PORT mcbx_dram_cke = mcbx_dram_cke
- PORT mcbx_dram_odt = mcbx_dram_odt
- PORT mcbx_dram_ras_n = mcbx_dram_ras_n
- PORT mcbx_dram_cas_n = mcbx_dram_cas_n
- PORT mcbx_dram_we_n = mcbx_dram_we_n
- PORT mcbx_dram_udm = mcbx_dram_udm
- PORT mcbx_dram_ldm = mcbx_dram_ldm
- PORT mcbx_dram_ba = mcbx_dram_ba
- PORT mcbx_dram_addr = mcbx_dram_addr
- PORT mcbx_dram_ddr3_rst = mcbx_dram_ddr3_rst
- PORT mcbx_dram_dq = mcbx_dram_dq
- PORT mcbx_dram_dqs = mcbx_dram_dqs
- PORT mcbx_dram_dqs_n = mcbx_dram_dqs_n
- PORT mcbx_dram_udqs = mcbx_dram_udqs
- PORT mcbx_dram_udqs_n = mcbx_dram_udqs_n
- PORT rzq = rzq
- PORT zio = zio
- PORT s0_axi_aclk = clk_100_0000MHzPLL0
- PORT ui_clk = clk_100_0000MHzPLL0
- PORT sysclk_2x = clk_600_0000MHzPLL0_nobuf
- PORT sysclk_2x_180 = clk_600_0000MHz180PLL0_nobuf
- PORT SYS_RST = proc_sys_reset_0_BUS_STRUCT_RESET
- PORT PLL_LOCK = proc_sys_reset_0_Dcm_locked
-END
-
-BEGIN axi_ethernet
- PARAMETER INSTANCE = ETHERNET
- PARAMETER HW_VER = 2.01.a
- PARAMETER C_PHYADDR = 0B00001
- PARAMETER C_INCLUDE_IO = 1
- PARAMETER C_TYPE = 1
- PARAMETER C_PHY_TYPE = 1
- PARAMETER C_HALFDUP = 0
- PARAMETER C_TXMEM = 4096
- PARAMETER C_RXMEM = 4096
- PARAMETER C_TXCSUM = 0
- PARAMETER C_RXCSUM = 0
- PARAMETER C_TXVLAN_TRAN = 0
- PARAMETER C_RXVLAN_TRAN = 0
- PARAMETER C_TXVLAN_TAG = 0
- PARAMETER C_RXVLAN_TAG = 0
- PARAMETER C_TXVLAN_STRP = 0
- PARAMETER C_RXVLAN_STRP = 0
- PARAMETER C_MCAST_EXTEND = 0
- PARAMETER C_STATS = 0
- PARAMETER C_AVB = 0
- PARAMETER C_INTERCONNECT_S_AXI_IS_ACLK_ASYNC = 0
- PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
- PARAMETER C_BASEADDR = 0x41240000
- PARAMETER C_HIGHADDR = 0x4127ffff
- BUS_INTERFACE S_AXI = axi4lite_0
- BUS_INTERFACE AXI_STR_TXD = ETHERNET_dma_txd
- BUS_INTERFACE AXI_STR_TXC = ETHERNET_dma_txc
- BUS_INTERFACE AXI_STR_RXS = ETHERNET_dma_rxs
- BUS_INTERFACE AXI_STR_RXD = ETHERNET_dma_rxd
- PORT MDIO = ETHERNET_MDIO
- PORT MDC = ETHERNET_MDC
- PORT GMII_TX_ER = ETHERNET_TX_ER
- PORT GMII_TXD = ETHERNET_TXD
- PORT GMII_TX_EN = ETHERNET_TX_EN
- PORT MII_TX_CLK = ETHERNET_MII_TX_CLK
- PORT GMII_TX_CLK = ETHERNET_TX_CLK
- PORT GMII_RXD = ETHERNET_RXD
- PORT GMII_RX_ER = ETHERNET_RX_ER
- PORT GMII_RX_CLK = ETHERNET_RX_CLK
- PORT GMII_RX_DV = ETHERNET_RX_DV
- PORT PHY_RST_N = ETHERNET_PHY_RST_N
- PORT S_AXI_ACLK = clk_50_0000MHzPLL0
- PORT GTX_CLK = clk_125_0000MHz
- PORT REF_CLK = clk_200_0000MHzPLL0
- PORT AXI_STR_TXD_ACLK = clk_100_0000MHzPLL0
- PORT AXI_STR_TXC_ACLK = clk_100_0000MHzPLL0
- PORT AXI_STR_RXD_ACLK = clk_100_0000MHzPLL0
- PORT AXI_STR_RXS_ACLK = clk_100_0000MHzPLL0
- PORT AXI_STR_TXD_ARESETN = AXI_STR_TXD_ARESETN
- PORT AXI_STR_TXC_ARESETN = AXI_STR_TXC_ARESETN
- PORT AXI_STR_RXD_ARESETN = AXI_STR_RXD_ARESETN
- PORT AXI_STR_RXS_ARESETN = AXI_STR_RXS_ARESETN
- PORT INTERRUPT = ETHERNET_INTERRUPT
-END
-
-BEGIN axi_dma
- PARAMETER INSTANCE = ETHERNET_dma
- PARAMETER HW_VER = 3.00.a
- PARAMETER C_SG_INCLUDE_DESC_QUEUE = 1
- PARAMETER C_SG_USE_STSAPP_LENGTH = 1
- PARAMETER C_INCLUDE_MM2S_DRE = 1
- PARAMETER C_INCLUDE_S2MM_DRE = 1
- PARAMETER C_DLYTMR_RESOLUTION = 1250
- PARAMETER C_PRMRY_IS_ACLK_ASYNC = 0
- PARAMETER C_SG_INCLUDE_STSCNTRL_STRM = 1
- PARAMETER C_SG_LENGTH_WIDTH = 16
- PARAMETER C_INCLUDE_MM2S = 1
- PARAMETER C_INCLUDE_S2MM = 1
- PARAMETER C_INTERCONNECT_S_AXI_LITE_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_LITE_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_LITE_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_LITE_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_LITE_B_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_SG_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_SG_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_SG_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_SG_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_SG_B_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_MM2S_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_MM2S_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_MM2S_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_MM2S_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_MM2S_B_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_S2MM_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_S2MM_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_S2MM_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_S2MM_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_M_AXI_S2MM_B_REGISTER = 1
- PARAMETER C_BASEADDR = 0x41e00000
- PARAMETER C_HIGHADDR = 0x41e0ffff
- BUS_INTERFACE S_AXI_LITE = axi4lite_0
- BUS_INTERFACE M_AXI_SG = axi4_0
- BUS_INTERFACE M_AXI_MM2S = axi4_0
- BUS_INTERFACE M_AXI_S2MM = axi4_0
- BUS_INTERFACE M_AXIS_MM2S = ETHERNET_dma_txd
- BUS_INTERFACE M_AXIS_CNTRL = ETHERNET_dma_txc
- BUS_INTERFACE S_AXIS_STS = ETHERNET_dma_rxs
- BUS_INTERFACE S_AXIS_S2MM = ETHERNET_dma_rxd
- PORT s_axi_lite_aclk = clk_100_0000MHzPLL0
- PORT m_axi_sg_aclk = clk_100_0000MHzPLL0
- PORT m_axi_mm2s_aclk = clk_100_0000MHzPLL0
- PORT m_axi_s2mm_aclk = clk_100_0000MHzPLL0
- PORT mm2s_prmry_reset_out_n = AXI_STR_TXD_ARESETN
- PORT mm2s_cntrl_reset_out_n = AXI_STR_TXC_ARESETN
- PORT s2mm_prmry_reset_out_n = AXI_STR_RXD_ARESETN
- PORT s2mm_sts_reset_out_n = AXI_STR_RXS_ARESETN
- PORT mm2s_introut = ETHERNET_dma_mm2s_introut
- PORT s2mm_introut = ETHERNET_dma_s2mm_introut
-END
-
-BEGIN axi_intc
- PARAMETER INSTANCE = microblaze_0_intc
- PARAMETER HW_VER = 1.01.a
- PARAMETER C_INTERCONNECT_S_AXI_AW_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_AR_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_W_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_R_REGISTER = 1
- PARAMETER C_INTERCONNECT_S_AXI_B_REGISTER = 1
- PARAMETER C_BASEADDR = 0x41200000
- PARAMETER C_HIGHADDR = 0x4120ffff
- BUS_INTERFACE S_AXI = axi4lite_0
- PORT IRQ = microblaze_0_interrupt
- PORT S_AXI_ACLK = clk_50_0000MHzPLL0
- PORT INTR = ETHERNET_INTERRUPT & ETHERNET_dma_mm2s_introut & ETHERNET_dma_s2mm_introut & Push_Buttons_4Bits_IP2INTC_Irpt & RS232_Uart_1_Interrupt & axi_timer_0_Interrupt
-END
-
-BEGIN axi_timer
- PARAMETER INSTANCE = axi_timer_0
- PARAMETER HW_VER = 1.01.a
- PARAMETER C_BASEADDR = 0x41c00000
- PARAMETER C_HIGHADDR = 0x41c0ffff
- BUS_INTERFACE S_AXI = axi4lite_0
- PORT S_AXI_ACLK = clk_50_0000MHzPLL0
- PORT Interrupt = axi_timer_0_Interrupt
-END
-
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.xmp b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.xmp
deleted file mode 100644
index 3862cd3d63..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system.xmp
+++ /dev/null
@@ -1,38 +0,0 @@
-#Please do not modify this file by hand
-XmpVersion: 13.1
-VerMgmt: 13.1
-IntStyle: default
-MHS File: system.mhs
-Architecture: spartan6
-Device: xc6slx45t
-Package: fgg484
-SpeedGrade: -3
-UserCmd1:
-UserCmd1Type: 0
-UserCmd2:
-UserCmd2Type: 0
-GenSimTB: 0
-SdkExportBmmBit: 1
-SdkExportDir: SDK/SDK_Export
-InsertNoPads: 0
-WarnForEAArch: 1
-HdlLang: VHDL
-SimModel: BEHAVIORAL
-UcfFile: data/system.ucf
-EnableParTimingError: 1
-ShowLicenseDialog: 1
-ICacheAddr: MCB_DDR3,C_S0_AXI_BASEADDR
-ICacheAddr: MCB_DDR3,C_S1_AXI_BASEADDR
-ICacheAddr: MCB_DDR3,C_S2_AXI_BASEADDR
-ICacheAddr: MCB_DDR3,C_S3_AXI_BASEADDR
-ICacheAddr: MCB_DDR3,C_S4_AXI_BASEADDR
-ICacheAddr: MCB_DDR3,C_S5_AXI_BASEADDR
-DCacheAddr: MCB_DDR3,C_S0_AXI_BASEADDR
-DCacheAddr: MCB_DDR3,C_S1_AXI_BASEADDR
-DCacheAddr: MCB_DDR3,C_S2_AXI_BASEADDR
-DCacheAddr: MCB_DDR3,C_S3_AXI_BASEADDR
-DCacheAddr: MCB_DDR3,C_S4_AXI_BASEADDR
-DCacheAddr: MCB_DDR3,C_S5_AXI_BASEADDR
-Processor: microblaze_0
-ElfImp:
-ElfSim:
diff --git a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system_incl.make b/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system_incl.make
deleted file mode 100644
index b73b933aa6..0000000000
--- a/Demo/MicroBlaze_Spartan-6_EthernetFull/PlatformStudioProject/system_incl.make
+++ /dev/null
@@ -1,111 +0,0 @@
-#################################################################
-# Makefile generated by Xilinx Platform Studio
-# Project:C:\E\Dev\FreeRTOS\WorkingCopy\Demo\MicroBlaze_Spartan-6_EthernetFull\PlatformStudioProject\system.xmp
-#
-# WARNING : This file will be re-generated every time a command
-# to run a make target is invoked. So, any changes made to this
-# file manually, will be lost when make is invoked next.
-#################################################################
-
-SHELL = CMD
-
-XILINX_EDK_DIR = C:/devtools/Xilinx/13.1/ISE_DS/EDK
-
-SYSTEM = system
-
-MHSFILE = system.mhs
-
-FPGA_ARCH = spartan6
-
-DEVICE = xc6slx45tfgg484-3
-
-LANGUAGE = vhdl
-GLOBAL_SEARCHPATHOPT =
-PROJECT_SEARCHPATHOPT =
-
-SEARCHPATHOPT = $(PROJECT_SEARCHPATHOPT) $(GLOBAL_SEARCHPATHOPT)
-
-SUBMODULE_OPT =
-
-PLATGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(SUBMODULE_OPT) -msg __xps/ise/xmsgprops.lst
-
-OBSERVE_PAR_OPTIONS = -error yes
-
-MICROBLAZE_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/microblaze/mb_bootloop.elf
-MICROBLAZE_BOOTLOOP_LE = $(XILINX_EDK_DIR)/sw/lib/microblaze/mb_bootloop_le.elf
-PPC405_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc405/ppc_bootloop.elf
-PPC440_BOOTLOOP = $(XILINX_EDK_DIR)/sw/lib/ppc440/ppc440_bootloop.elf
-BOOTLOOP_DIR = bootloops
-
-MICROBLAZE_0_BOOTLOOP = $(BOOTLOOP_DIR)/microblaze_0.elf
-
-BRAMINIT_ELF_IMP_FILES = $(MICROBLAZE_0_BOOTLOOP)
-BRAMINIT_ELF_IMP_FILE_ARGS = -pe microblaze_0 $(MICROBLAZE_0_BOOTLOOP)
-
-BRAMINIT_ELF_SIM_FILES = $(MICROBLAZE_0_BOOTLOOP)
-BRAMINIT_ELF_SIM_FILE_ARGS = -pe microblaze_0 $(MICROBLAZE_0_BOOTLOOP)
-
-SIM_CMD = isim_system
-
-BEHAVIORAL_SIM_SCRIPT = simulation/behavioral/$(SYSTEM)_setup.tcl
-
-STRUCTURAL_SIM_SCRIPT = simulation/structural/$(SYSTEM)_setup.tcl
-
-TIMING_SIM_SCRIPT = simulation/timing/$(SYSTEM)_setup.tcl
-
-DEFAULT_SIM_SCRIPT = $(BEHAVIORAL_SIM_SCRIPT)
-
-MIX_LANG_SIM_OPT = -mixed yes
-
-SIMGEN_OPTIONS = -p $(DEVICE) -lang $(LANGUAGE) $(SEARCHPATHOPT) $(BRAMINIT_ELF_SIM_FILE_ARGS) $(MIX_LANG_SIM_OPT) -msg __xps/ise/xmsgprops.lst -s isim
-
-
-CORE_STATE_DEVELOPMENT_FILES =
-
-WRAPPER_NGC_FILES = implementation/axi4_0_wrapper.ngc \
-implementation/axi4lite_0_wrapper.ngc \
-implementation/microblaze_0_wrapper.ngc \
-implementation/microblaze_0_ilmb_wrapper.ngc \
-implementation/microblaze_0_dlmb_wrapper.ngc \
-implementation/microblaze_0_i_bram_ctrl_wrapper.ngc \
-implementation/microblaze_0_d_bram_ctrl_wrapper.ngc \
-implementation/microblaze_0_bram_block_wrapper.ngc \
-implementation/proc_sys_reset_0_wrapper.ngc \
-implementation/clock_generator_0_wrapper.ngc \
-implementation/debug_module_wrapper.ngc \
-implementation/rs232_uart_1_wrapper.ngc \
-implementation/leds_4bits_wrapper.ngc \
-implementation/push_buttons_4bits_wrapper.ngc \
-implementation/mcb_ddr3_wrapper.ngc \
-implementation/ethernet_wrapper.ngc \
-implementation/ethernet_dma_wrapper.ngc \
-implementation/microblaze_0_intc_wrapper.ngc \
-implementation/axi_timer_0_wrapper.ngc
-
-POSTSYN_NETLIST = implementation/$(SYSTEM).ngc
-
-SYSTEM_BIT = implementation/$(SYSTEM).bit
-
-DOWNLOAD_BIT = implementation/download.bit
-
-SYSTEM_ACE = implementation/$(SYSTEM).ace
-
-UCF_FILE = data/system.ucf
-
-BMM_FILE = implementation/$(SYSTEM).bmm
-
-BITGEN_UT_FILE = etc/bitgen.ut
-
-XFLOW_OPT_FILE = etc/fast_runtime.opt
-XFLOW_DEPENDENCY = __xps/xpsxflow.opt $(XFLOW_OPT_FILE)
-
-XPLORER_DEPENDENCY = __xps/xplorer.opt
-XPLORER_OPTIONS = -p $(DEVICE) -uc $(SYSTEM).ucf -bm $(SYSTEM).bmm -max_runs 7
-
-FPGA_IMP_DEPENDENCY = $(BMM_FILE) $(POSTSYN_NETLIST) $(UCF_FILE) $(XFLOW_DEPENDENCY)
-
-SDK_EXPORT_DIR = SDK\SDK_Export\hw
-SYSTEM_HW_HANDOFF = $(SDK_EXPORT_DIR)/$(SYSTEM).xml
-SYSTEM_HW_HANDOFF_BIT = $(SDK_EXPORT_DIR)/$(SYSTEM).bit
-SYSTEM_HW_HANDOFF_BMM = $(SDK_EXPORT_DIR)/$(SYSTEM)_bd.bmm
-SYSTEM_HW_HANDOFF_DEP = $(SYSTEM_HW_HANDOFF) $(SYSTEM_HW_HANDOFF_BIT) $(SYSTEM_HW_HANDOFF_BMM)