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Add some missing volatiles to __asm statements in the CA9 GCC port.

This commit is contained in:
Richard Barry
2014-05-19 13:14:02 +00:00
parent 0bb794301a
commit b215310e63
3 changed files with 52 additions and 52 deletions
FreeRTOS
Demo/Common/Minimal
Source/portable/GCC/ARM_CA9

@ -410,7 +410,7 @@ void FreeRTOS_Tick_Handler( void )
updated. */
portCPU_IRQ_DISABLE();
portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
__asm( "dsb \n"
__asm volatile ( "dsb \n"
"isb \n" );
portCPU_IRQ_ENABLE();
@ -435,7 +435,7 @@ uint32_t ulInitialFPSCR = 0;
ulPortTaskHasFPUContext = pdTRUE;
/* Initialise the floating point status register. */
__asm( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) );
__asm volatile ( "FMXR FPSCR, %0" :: "r" (ulInitialFPSCR) );
}
/*-----------------------------------------------------------*/
@ -464,7 +464,7 @@ uint32_t ulReturn;
{
ulReturn = pdFALSE;
portICCPMR_PRIORITY_MASK_REGISTER = ( uint32_t ) ( configMAX_API_CALL_INTERRUPT_PRIORITY << portPRIORITY_SHIFT );
__asm( "dsb \n"
__asm volatile ( "dsb \n"
"isb \n" );
}
portCPU_IRQ_ENABLE();

@ -119,7 +119,7 @@ extern uint32_t ulPortYieldRequired; \
}
#define portYIELD_FROM_ISR( x ) portEND_SWITCHING_ISR( x )
#define portYIELD() __asm( "SWI 0" );
#define portYIELD() __asm volatile ( "SWI 0" );
/*-----------------------------------------------------------