mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
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102 lines
3.3 KiB
C
102 lines
3.3 KiB
C
// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "sdkconfig.h"
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#include "esp_attr.h"
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#include "spi_flash.h"
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#include "esp_log.h"
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#include "esp_system.h"
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#include "esp8266/eagle_soc.h"
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#include "esp8266/rom_functions.h"
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#include "esp_image_format.h"
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#define PERIPHS_SPI_FLASH_USRREG (0x60000200 + 0x1c)
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#define PERIPHS_SPI_FLASH_CTRL (0x60000200 + 0x08)
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#define PERIPHS_IO_MUX_CONF_U (0x60000800)
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#define SPI0_CLK_EQU_SYSCLK BIT8
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#define SPI_FLASH_CLK_EQU_SYSCLK BIT12
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static const char *TAG = "chip_boot";
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/*
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* @brief initialize the chip including flash I/O and chip cache according to
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* boot parameters which are stored at the flash
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*/
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void chip_boot(size_t start_addr, size_t map)
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{
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int ret;
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uint32_t freqdiv, flash_size;
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uint32_t freqbits;
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esp_image_header_t fhdr;
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uint32_t flash_map_table[FALSH_SIZE_MAP_MAX] = {
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1 * 1024 * 1024,
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2 * 1024 * 1024,
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4 * 1024 * 1024,
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8 * 1024 * 1024,
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16 * 1024 * 1024
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};
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uint32_t flash_map_table_size = sizeof(flash_map_table) / sizeof(flash_map_table[0]);
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extern esp_spi_flash_chip_t flashchip;
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extern void phy_get_bb_evm(void);
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extern void cache_init(uint8_t);
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extern void user_spi_flash_dio_to_qio_pre_init(void);
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phy_get_bb_evm();
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SET_PERI_REG_MASK(PERIPHS_SPI_FLASH_USRREG, BIT5);
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ret = spi_flash_read(start_addr, &fhdr, sizeof(esp_image_header_t));
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if (ret) {
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ESP_EARLY_LOGE(TAG, "SPI flash read result %d\n", ret);
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}
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if (3 > fhdr.spi_speed)
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freqdiv = fhdr.spi_speed + 2;
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else if (0x0F == fhdr.spi_speed)
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freqdiv = 1;
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else
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freqdiv = 2;
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if (fhdr.spi_size < flash_map_table_size) {
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flash_size = flash_map_table[fhdr.spi_size];
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ESP_EARLY_LOGD(TAG, "SPI flash size is %d\n", flash_size);
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} else {
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flash_size = 0;
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ESP_EARLY_LOGE(TAG, "SPI size error is %d\n", fhdr.spi_size);
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}
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flashchip.chip_size = flash_size;
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if (1 >= freqdiv) {
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freqbits = SPI_FLASH_CLK_EQU_SYSCLK;
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SET_PERI_REG_MASK(PERIPHS_SPI_FLASH_CTRL, SPI_FLASH_CLK_EQU_SYSCLK);
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SET_PERI_REG_MASK(PERIPHS_IO_MUX_CONF_U, SPI0_CLK_EQU_SYSCLK);
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} else {
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freqbits = ((freqdiv - 1) << 8) + ((freqdiv / 2 - 1) << 4) + (freqdiv - 1);
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CLEAR_PERI_REG_MASK(PERIPHS_SPI_FLASH_CTRL, SPI_FLASH_CLK_EQU_SYSCLK);
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CLEAR_PERI_REG_MASK(PERIPHS_IO_MUX_CONF_U, SPI0_CLK_EQU_SYSCLK);
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}
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SET_PERI_REG_BITS(PERIPHS_SPI_FLASH_CTRL, 0xfff, freqbits, 0);
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ESP_EARLY_LOGD(TAG, "SPI flash cache map is %d\n", map);
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cache_init(map);
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if (fhdr.spi_mode == ESP_IMAGE_SPI_MODE_QIO) {
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ESP_EARLY_LOGD(TAG, "SPI flash enable QIO mode\n");
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user_spi_flash_dio_to_qio_pre_init();
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}
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}
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