mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
synced 2025-05-21 17:16:29 +08:00
68e990c99f
Make it easy for other OS platform to use these code. If users want to add other OSes, they only should add 3 files: 1. "port.c": init task stack and switch task function 2. "osi.c": wrapper APIs to FreeRTOS from other OSes 3. "heap.c": wrapper APIs for other OSes' heap APIs
356 lines
9.4 KiB
C
356 lines
9.4 KiB
C
/*
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* FreeRTOS Kernel V10.0.1
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* Copyright (C) 2017 Amazon.com, Inc. or its affiliates. All Rights Reserved.
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* Additions Copyright 2018 Espressif Systems (Shanghai) PTE LTD
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*
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* Permission is hereby granted, free of charge, to any person obtaining a copy of
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* this software and associated documentation files (the "Software"), to deal in
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* the Software without restriction, including without limitation the rights to
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* use, copy, modify, merge, publish, distribute, sublicense, and/or sell copies of
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* the Software, and to permit persons to whom the Software is furnished to do so,
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* subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all
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* copies or substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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* http://www.FreeRTOS.org
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* http://aws.amazon.com/freertos
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*
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* 1 tab == 4 spaces!
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*/
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/* Scheduler includes. */
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#include <stdint.h>
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#include <xtensa/config/core.h>
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#include <xtensa/tie/xt_interrupt.h>
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#include <xtensa/tie/xt_timer.h>
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#include "freertos/FreeRTOS.h"
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#include "freertos/task.h"
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#include "freertos/queue.h"
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#include "freertos/xtensa_rtos.h"
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#include "esp_attr.h"
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#include "esp_libc.h"
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#include "esp8266/eagle_soc.h"
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#include "rom/ets_sys.h"
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#include "esp8266/rom_functions.h"
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#include "driver/soc.h"
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#define SET_STKREG(r,v) sp[(r) >> 2] = (uint32_t)(v)
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#define PORT_ASSERT(x) do { if (!(x)) {ets_printf("%s %u\n", "rtos_port", __LINE__); while(1){}; }} while (0)
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extern char NMIIrqIsOn;
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static int SWReq = 0;
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unsigned cpu_sr;
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/* Each task maintains its own interrupt status in the critical nesting
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variable. */
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static uint32_t uxCriticalNesting = 0;
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esp_tick_t g_cpu_ticks = 0;
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uint64_t g_os_ticks = 0;
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void vPortEnterCritical(void);
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void vPortExitCritical(void);
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void _xt_timer_int1(void);
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uint8_t *__cpu_init_stk(uint8_t *stack_top, void (*_entry)(void *), void *param, void (*_exit)(void))
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{
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uint32_t *sp, *tp, *stk = (uint32_t *)stack_top;
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/* Create interrupt stack frame aligned to 16 byte boundary */
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sp = (uint32_t *)(((INT32U)(stk + 1) - XT_CP_SIZE - XT_STK_FRMSZ) & ~0xf);
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/* Clear the entire frame (do not use memset() because we don't depend on C library) */
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for (tp = sp; tp <= stk; ++tp) {
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*tp = 0;
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}
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/* Explicitly initialize certain saved registers */
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SET_STKREG(XT_STK_PC, _entry); /* task entrypoint */
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SET_STKREG(XT_STK_A0, _exit); /* to terminate GDB backtrace */
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SET_STKREG(XT_STK_A1, (INT32U)sp + XT_STK_FRMSZ); /* physical top of stack frame */
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SET_STKREG(XT_STK_A2, param); /* parameters */
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SET_STKREG(XT_STK_EXIT, _xt_user_exit); /* user exception exit dispatcher */
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/* Set initial PS to int level 0, EXCM disabled ('rfe' will enable), user mode. */
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SET_STKREG(XT_STK_PS, PS_UM | PS_EXCM);
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return (uint8_t *)sp;
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}
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#ifndef DISABLE_FREERTOS
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/*
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* See header file for description.
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*/
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StackType_t *pxPortInitialiseStack(StackType_t *pxTopOfStack, pdTASK_CODE pxCode, void *pvParameters)
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{
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return (StackType_t *)__cpu_init_stk((uint8_t *)pxTopOfStack, pxCode, pvParameters, NULL);
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}
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#endif
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void IRAM_ATTR PendSV(int req)
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{
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if (req == 1) {
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vPortEnterCritical();
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SWReq = 1;
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xthal_set_intset(1 << ETS_SOFT_INUM);
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vPortExitCritical();
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} else if (req == 2) {
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xthal_set_intset(1 << ETS_SOFT_INUM);
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}
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}
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void TASK_SW_ATTR SoftIsrHdl(void* arg)
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{
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extern int MacIsrSigPostDefHdl(void);
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if (MacIsrSigPostDefHdl() || (SWReq == 1)) {
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_xt_timer_int1();
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SWReq = 0;
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}
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}
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void esp_increase_tick_cnt(const TickType_t ticks)
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{
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esp_irqflag_t flag;
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flag = soc_save_local_irq();
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g_cpu_ticks = soc_get_ticks();
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g_os_ticks += ticks;
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soc_restore_local_irq(flag);
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}
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void TASK_SW_ATTR xPortSysTickHandle(void)
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{
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g_cpu_ticks = soc_get_ticks();
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g_os_ticks++;
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if (xTaskIncrementTick() != pdFALSE) {
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vTaskSwitchContext();
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}
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}
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/*
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* See header file for description.
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*/
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portBASE_TYPE xPortStartScheduler(void)
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{
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/*
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* TAG 1.2.3 FreeRTOS call "portDISABLE_INTERRUPTS" at file tasks.c line 1973, this is not at old one.
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* This makes it to be a wrong value.
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*
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* So we should initialize global value "cpu_sr" with a right value.
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*
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* Todo: Remove this one when refactor startup function.
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*/
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cpu_sr = 0x20;
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/*******software isr*********/
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_xt_isr_attach(ETS_SOFT_INUM, SoftIsrHdl, NULL);
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_xt_isr_unmask(1 << ETS_SOFT_INUM);
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/* Initialize system tick timer interrupt and schedule the first tick. */
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_xt_tick_divisor_init();
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_xt_tick_timer_init();
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vTaskSwitchContext();
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/* Get ticks before RTOS starts */
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g_cpu_ticks = soc_get_ticks();
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/* Restore the context of the first task that is going to run. */
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_xt_enter_first_task();
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/* Should not get here as the tasks are now running! */
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return pdTRUE;
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}
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void vPortEndScheduler(void)
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{
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/* It is unlikely that the CM3 port will require this function as there
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is nothing to return to. */
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}
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/*-----------------------------------------------------------*/
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/*-----------------------------------------------------------*/
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static char ClosedLv1Isr = 0;
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void IRAM_ATTR vPortEnterCritical(void)
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{
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if (NMIIrqIsOn == 0) {
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if (ClosedLv1Isr != 1) {
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portDISABLE_INTERRUPTS();
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ClosedLv1Isr = 1;
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}
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uxCriticalNesting++;
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}
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}
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/*-----------------------------------------------------------*/
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void IRAM_ATTR vPortExitCritical(void)
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{
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if (NMIIrqIsOn == 0) {
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if (uxCriticalNesting > 0) {
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uxCriticalNesting--;
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if (uxCriticalNesting == 0) {
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if (ClosedLv1Isr == 1) {
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ClosedLv1Isr = 0;
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portENABLE_INTERRUPTS();
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}
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}
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} else {
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ets_printf(DRAM_STR("E:C:%u\n"), uxCriticalNesting);
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PORT_ASSERT((uxCriticalNesting > 0));
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}
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}
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}
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void show_critical_info(void)
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{
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ets_printf("ShowCritical:%u\n", uxCriticalNesting);
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ets_printf("SWReq:%u\n", SWReq);
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}
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void IRAM_ATTR vPortETSIntrLock(void)
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{
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ETS_INTR_LOCK();
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}
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void IRAM_ATTR vPortETSIntrUnlock(void)
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{
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ETS_INTR_UNLOCK();
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}
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/*
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* @brief check if CPU core interrupt is disable
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*/
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bool interrupt_is_disable(void)
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{
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uint32_t tmp;
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__asm__ __volatile__ (
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"rsr %0, PS\n"
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: "=a"(tmp) : : "memory");
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return tmp & 0xFUL ? true : false;
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}
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_xt_isr_entry isr[16];
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char _xt_isr_status = 0;
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void _xt_isr_attach(uint8_t i, _xt_isr func, void* arg)
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{
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isr[i].handler = func;
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isr[i].arg = arg;
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}
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uint16_t TASK_SW_ATTR _xt_isr_handler(uint16_t i)
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{
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uint8_t index;
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if (i & (1 << ETS_WDT_INUM)) {
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index = ETS_WDT_INUM;
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} else if (i & (1 << ETS_GPIO_INUM)) {
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index = ETS_GPIO_INUM;
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} else {
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index = __builtin_ffs(i) - 1;
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if (index == ETS_MAX_INUM) {
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i &= ~(1 << ETS_MAX_INUM);
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index = __builtin_ffs(i) - 1;
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}
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}
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_xt_clear_ints(1 << index);
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_xt_isr_status = 1;
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isr[index].handler(isr[index].arg);
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_xt_isr_status = 0;
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return i & ~(1 << index);
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}
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int xPortInIsrContext(void)
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{
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return _xt_isr_status != 0;
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}
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void __attribute__((weak, noreturn)) vApplicationStackOverflowHook(xTaskHandle xTask, const char *pcTaskName)
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{
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ets_printf("***ERROR*** A stack overflow in task %s has been detected.\r\n", pcTaskName);
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abort();
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}
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signed portBASE_TYPE xTaskGenericCreate(TaskFunction_t pxTaskCode,
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const signed char * const pcName,
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unsigned short usStackDepth,
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void *pvParameters,
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unsigned portBASE_TYPE uxPriority,
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TaskHandle_t *pxCreatedTask,
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StackType_t *puxStackBuffer,
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const MemoryRegion_t * const xRegions)
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{
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(void)puxStackBuffer;
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(void)xRegions;
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return xTaskCreate(pxTaskCode, (const char * const)pcName, usStackDepth,
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pvParameters, uxPriority, pxCreatedTask);
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}
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BaseType_t xQueueGenericReceive(QueueHandle_t xQueue, void * const pvBuffer,
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TickType_t xTicksToWait, const BaseType_t xJustPeeking)
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{
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configASSERT(xJustPeeking == 0);
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return xQueueReceive(xQueue, pvBuffer, xTicksToWait);
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}
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void esp_internal_idle_hook(void)
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{
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extern void pmIdleHook(void);
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extern void esp_task_wdt_reset(void);
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esp_task_wdt_reset();
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pmIdleHook();
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}
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#ifndef DISABLE_FREERTOS
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#if configUSE_IDLE_HOOK == 1
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void __attribute__((weak)) vApplicationIdleHook(void)
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{
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}
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#endif
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#if configUSE_TICK_HOOK == 1
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void __attribute__((weak)) vApplicationTickHook(void)
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{
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}
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#endif
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#endif
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uint32_t xPortGetTickRateHz(void)
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{
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return (uint32_t)configTICK_RATE_HZ;
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}
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