mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
synced 2025-07-17 19:13:52 +08:00
3ca6af5da6
1. Add libssc.a, simple serial console lib. 2. Add libspiffs.a, SPI file system. 3. Add libwps.a to support WPS. 4. Add libespconn.a, Espressif connection lib. 5. Add libespnow.a to support Espressif ESP-NOW. 6. Add libmesh.a, Espressif mesh. 7. Add libnopoll.a, websocket. 8. Add make_lib.sh in "third_party" folder. 9. Add modem-sleep & light-sleep supported. 10. Update libcirom.a to support float IO. 11. Update gen_misc.sh & gen_misc.bat. 12. Update header files, add comments in doxygen style. 13. Update libsmartconfig.a to version 2.5.2. 14. Update libssl.a. 15. Updates driver (PWM/UART/GPIO/SPI/Hardware timer). 16. Update open source codes of third_party. 17. Modify "ld" files, "dram0 len" should be 0x18000 in RTOS SDK. 18. Remove header files in extra_include, which are already in compile folder. 19. Other APIs sync from non-OS SDK, more details in documentation "20B-ESP8266__RTOS_SDK_API Reference". 20. Other optimization to make the SDK more stable.
308 lines
9.7 KiB
C
308 lines
9.7 KiB
C
/*
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* ESPRSSIF MIT License
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*
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* Copyright (c) 2015 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
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*
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* Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case,
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* it is free of charge, to any person obtaining a copy of this software and associated
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* documentation files (the "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the Software is furnished
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* to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __GPIO_H__
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#define __GPIO_H__
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#ifdef __cplusplus
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extern "C" {
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#endif
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#define GPIO_Pin_0 (BIT(0)) /* Pin 0 selected */
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#define GPIO_Pin_1 (BIT(1)) /* Pin 1 selected */
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#define GPIO_Pin_2 (BIT(2)) /* Pin 2 selected */
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#define GPIO_Pin_3 (BIT(3)) /* Pin 3 selected */
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#define GPIO_Pin_4 (BIT(4)) /* Pin 4 selected */
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#define GPIO_Pin_5 (BIT(5)) /* Pin 5 selected */
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#define GPIO_Pin_6 (BIT(6)) /* Pin 6 selected */
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#define GPIO_Pin_7 (BIT(7)) /* Pin 7 selected */
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#define GPIO_Pin_8 (BIT(8)) /* Pin 8 selected */
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#define GPIO_Pin_9 (BIT(9)) /* Pin 9 selected */
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#define GPIO_Pin_10 (BIT(10)) /* Pin 10 selected */
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#define GPIO_Pin_11 (BIT(11)) /* Pin 11 selected */
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#define GPIO_Pin_12 (BIT(12)) /* Pin 12 selected */
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#define GPIO_Pin_13 (BIT(13)) /* Pin 13 selected */
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#define GPIO_Pin_14 (BIT(14)) /* Pin 14 selected */
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#define GPIO_Pin_15 (BIT(15)) /* Pin 15 selected */
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#define GPIO_Pin_All (0xFFFF) /* All pins selected */
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#define GPIO_PIN_REG_0 PERIPHS_IO_MUX_GPIO0_U
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#define GPIO_PIN_REG_1 PERIPHS_IO_MUX_U0TXD_U
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#define GPIO_PIN_REG_2 PERIPHS_IO_MUX_GPIO2_U
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#define GPIO_PIN_REG_3 PERIPHS_IO_MUX_U0RXD_U
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#define GPIO_PIN_REG_4 PERIPHS_IO_MUX_GPIO4_U
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#define GPIO_PIN_REG_5 PERIPHS_IO_MUX_GPIO5_U
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#define GPIO_PIN_REG_6 PERIPHS_IO_MUX_SD_CLK_U
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#define GPIO_PIN_REG_7 PERIPHS_IO_MUX_SD_DATA0_U
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#define GPIO_PIN_REG_8 PERIPHS_IO_MUX_SD_DATA1_U
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#define GPIO_PIN_REG_9 PERIPHS_IO_MUX_SD_DATA2_U
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#define GPIO_PIN_REG_10 PERIPHS_IO_MUX_SD_DATA3_U
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#define GPIO_PIN_REG_11 PERIPHS_IO_MUX_SD_CMD_U
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#define GPIO_PIN_REG_12 PERIPHS_IO_MUX_MTDI_U
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#define GPIO_PIN_REG_13 PERIPHS_IO_MUX_MTCK_U
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#define GPIO_PIN_REG_14 PERIPHS_IO_MUX_MTMS_U
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#define GPIO_PIN_REG_15 PERIPHS_IO_MUX_MTDO_U
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#define GPIO_PIN_REG(i) \
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(i==0) ? GPIO_PIN_REG_0: \
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(i==1) ? GPIO_PIN_REG_1: \
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(i==2) ? GPIO_PIN_REG_2: \
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(i==3) ? GPIO_PIN_REG_3: \
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(i==4) ? GPIO_PIN_REG_4: \
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(i==5) ? GPIO_PIN_REG_5: \
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(i==6) ? GPIO_PIN_REG_6: \
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(i==7) ? GPIO_PIN_REG_7: \
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(i==8) ? GPIO_PIN_REG_8: \
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(i==9) ? GPIO_PIN_REG_9: \
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(i==10)? GPIO_PIN_REG_10: \
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(i==11)? GPIO_PIN_REG_11: \
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(i==12)? GPIO_PIN_REG_12: \
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(i==13)? GPIO_PIN_REG_13: \
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(i==14)? GPIO_PIN_REG_14: \
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GPIO_PIN_REG_15
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#define GPIO_PIN_ADDR(i) (GPIO_PIN0_ADDRESS + i*4)
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#define GPIO_ID_IS_PIN_REGISTER(reg_id) \
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((reg_id >= GPIO_ID_PIN0) && (reg_id <= GPIO_ID_PIN(GPIO_PIN_COUNT-1)))
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#define GPIO_REGID_TO_PINIDX(reg_id) ((reg_id) - GPIO_ID_PIN0)
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typedef enum {
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GPIO_PIN_INTR_DISABLE = 0, /**< disable GPIO interrupt */
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GPIO_PIN_INTR_POSEDGE = 1, /**< GPIO interrupt type : rising edge */
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GPIO_PIN_INTR_NEGEDGE = 2, /**< GPIO interrupt type : falling edge */
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GPIO_PIN_INTR_ANYEDGE = 3, /**< GPIO interrupt type : bothe rising and falling edge */
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GPIO_PIN_INTR_LOLEVEL = 4, /**< GPIO interrupt type : low level */
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GPIO_PIN_INTR_HILEVEL = 5 /**< GPIO interrupt type : high level */
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} GPIO_INT_TYPE;
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typedef enum {
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GPIO_Mode_Input = 0x0, /**< GPIO mode : Input */
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GPIO_Mode_Out_OD, /**< GPIO mode : Output_OD */
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GPIO_Mode_Output , /**< GPIO mode : Output */
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GPIO_Mode_Sigma_Delta , /**< GPIO mode : Sigma_Delta */
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} GPIOMode_TypeDef;
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typedef enum {
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GPIO_PullUp_DIS = 0x0, /**< disable GPIO pullup */
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GPIO_PullUp_EN = 0x1, /**< enable GPIO pullup */
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} GPIO_Pullup_IF;
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typedef struct {
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uint16 GPIO_Pin; /**< GPIO pin */
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GPIOMode_TypeDef GPIO_Mode; /**< GPIO mode */
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GPIO_Pullup_IF GPIO_Pullup; /**< GPIO pullup */
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GPIO_INT_TYPE GPIO_IntrType; /**< GPIO interrupt type */
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} GPIO_ConfigTypeDef;
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/** \defgroup Driver_APIs Driver APIs
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* @brief Driver APIs
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*/
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/** @addtogroup Driver_APIs
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* @{
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*/
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/** \defgroup GPIO_Driver_APIs GPIO Driver APIs
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* @brief GPIO APIs
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*/
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/** @addtogroup GPIO_Driver_APIs
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* @{
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*/
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/**
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* @brief Set GPIO pin output level.
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*
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* @param gpio_no : The GPIO sequence number.
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* @param bit_value : GPIO pin output level.
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*
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* @return null
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*/
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#define GPIO_OUTPUT_SET(gpio_no, bit_value) \
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gpio_output_conf(bit_value<<gpio_no, ((~bit_value)&0x01)<<gpio_no, 1<<gpio_no, 0)
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/**
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* @brief Set GPIO pin output level.
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*
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* @param gpio_bits : The GPIO bit number.
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* @param bit_value : GPIO pin output level.
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*
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* @return null
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*/
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#define GPIO_OUTPUT(gpio_bits, bit_value) \
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if(bit_value) gpio_output_conf(gpio_bits, 0, gpio_bits, 0);\
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else gpio_output_conf(0, gpio_bits, gpio_bits, 0)
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/**
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* @brief Disable GPIO pin output.
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*
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* @param gpio_no : The GPIO sequence number.
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*
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* @return null
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*/
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#define GPIO_DIS_OUTPUT(gpio_no) gpio_output_conf(0, 0, 0, 1<<gpio_no)
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/**
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* @brief Enable GPIO pin intput.
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*
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* @param gpio_bits : The GPIO bit number.
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*
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* @return null
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*/
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#define GPIO_AS_INPUT(gpio_bits) gpio_output_conf(0, 0, 0, gpio_bits)
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/**
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* @brief Enable GPIO pin output.
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*
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* @param gpio_bits : The GPIO bit number.
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*
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* @return null
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*/
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#define GPIO_AS_OUTPUT(gpio_bits) gpio_output_conf(0, 0, gpio_bits, 0)
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/**
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* @brief Sample the level of GPIO input.
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*
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* @param gpio_no : The GPIO sequence number.
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*
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* @return the level of GPIO input
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*/
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#define GPIO_INPUT_GET(gpio_no) ((gpio_input_get()>>gpio_no)&BIT0)
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/**
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* @brief Enable GPIO16 output.
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*
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* @param null
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*
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* @return null
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*/
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void gpio16_output_conf(void);
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/**
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* @brief Set GPIO16 output level.
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*
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* @param uint8 value : GPIO16 output level.
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*
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* @return null
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*/
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void gpio16_output_set(uint8 value);
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/**
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* @brief Enable GPIO pin intput.
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*
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* @param null
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*
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* @return null
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*/
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void gpio16_input_conf(void);
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/**
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* @brief Sample the value of GPIO16 input.
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*
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* @param null
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*
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* @return the level of GPIO16 input.
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*/
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uint8 gpio16_input_get(void);
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/**
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* @brief Configure Gpio pins out or input.
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*
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* @param uint32 set_mask : Set the output for the high bit, the
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* corresponding bit is 1, the output of high,
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* the corresponding bit is 0, do not change the state.
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* @param uint32 set_mask : Set the output for the high bit, the
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* corresponding bit is 1, the output of low,
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* the corresponding bit is 0, do not change the state.
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* @param uint32 enable_mask : Enable Output
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* @param uint32 disable_mask : Enable Input
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*
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* @return null
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*/
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void gpio_output_conf(uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32 disable_mask);
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/**
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* @brief Register an application-specific interrupt handler for GPIO pin interrupts.
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*
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* @param void *fn:interrupt handler for GPIO pin interrupts.
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* @param void *arg:interrupt handler's arg
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*
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* @return null
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*/
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void gpio_intr_handler_register(void *fn, void *arg);
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/**
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* @brief Configure GPIO wake up to light sleep,Only level way is effective.
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*
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* @param uint32 i : Gpio sequence number
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* @param GPIO_INT_TYPE intr_state : the level of wake up to light sleep
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*
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* @return null
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*/
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void gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state);
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/**
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* @brief Disable GPIO wake up to light sleep.
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*
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* @param null
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*
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* @return null
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*/
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void gpio_pin_wakeup_disable();
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/**
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* @brief Config interrupt types of GPIO pin.
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*
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* @param uint32 i : The GPIO sequence number.
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* @param GPIO_INT_TYPE intr_state : GPIO interrupt types.
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*
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* @return null
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*/
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void gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state);
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/**
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* @brief Sample the value of GPIO input pins and returns a bitmask.
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*
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* @param null
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*
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* @return bitmask of GPIO pins input
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*/
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uint32 gpio_input_get(void);
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/**
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* @}
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*/
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/**
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* @}
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*/
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#ifdef __cplusplus
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}
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#endif
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#endif
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