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https://github.com/espressif/ESP8266_RTOS_SDK.git
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301d857988
1. support "make size", "make size-files", "make size-components" and "make size-symbols" 2. add esp-idf style link file including "esp8266.ld" and "esp8266.project.ld.in" 3. add link advaced generation file to components of esp8266 and spi_flash
45 lines
1.5 KiB
Plaintext
45 lines
1.5 KiB
Plaintext
/* ESP8266 Linker Script Memory Layout
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This file describes the memory layout (memory blocks).
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esp8266.project.ld contains output sections to link compiler output
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into these memory blocks.
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***
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This linker script is passed through the C preprocessor to include
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configuration options.
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Please use preprocessor features sparingly! Restrict
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to simple macros with numeric values, and/or #if/#endif blocks.
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*/
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#include "sdkconfig.h"
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MEMORY
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{
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/* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
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of the various regions. */
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/* IRAM for cpu. The length is due to the cache mode which is able to be set half or full mode. */
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iram0_0_seg (RX) : org = 0x40100000, len = CONFIG_SOC_IRAM_SIZE
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/* Even though the segment name is iram, it is actually mapped to flash and mapped constant data */
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iram0_2_seg (RX) : org = 0x40200010 + APP_OFFSET,
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len = APP_SIZE - 0x10
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/*
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(0x18 offset above is a convenience for the app binary image generation. The .bin file which is flashed
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to the chip has a 0x10 byte file header. Setting this offset makes it simple to meet the flash cache.)
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*/
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/* Length of this section is 96KB */
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dram0_0_seg (RW) : org = 0x3FFE8000, len = 0x18000
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/* (See iram0_2_seg for meaning of 0x10 offset in the above.) */
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/* RTC memory. Persists over deep sleep */
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rtc_data_seg(RW) : org = 0x60001200, len = 0x200
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}
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