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feat(spiffs): Modify for ESP8266

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This commit is contained in:
dongheng
2019-03-15 14:53:47 +08:00
parent 9b2d10bdce
commit f6335d9e24
15 changed files with 107 additions and 67 deletions
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2
components/bootloader_support/src/flash_partitions.c
View File

@ -109,7 +109,7 @@ esp_err_t esp_partition_table_basic_verify(const esp_partition_info_t *partition
{
int md5_found = 0;
int num_parts;
uint32_t chip_size = flashchip.chip_size;
uint32_t chip_size = g_rom_flashchip.chip_size;
*num_partitions = 0;
for (num_parts = 0; num_parts < ESP_PARTITION_TABLE_MAX_ENTRIES; num_parts++) {

32
components/esp8266/include/esp8266/rom_functions.h
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@ -6,16 +6,16 @@
#define ROM_FLASH_BUF_DECLARE(__name, __size) uint8_t __name[__size] __attribute__((aligned(4)))
typedef struct esp_spi_flash_chip {
uint32_t deviceId;
uint32_t chip_size; // chip size in byte
uint32_t block_size;
uint32_t sector_size;
uint32_t page_size;
uint32_t status_mask;
} esp_spi_flash_chip_t;
typedef struct {
uint32_t device_id;
uint32_t chip_size; // chip size in bytes
uint32_t block_size;
uint32_t sector_size;
uint32_t page_size;
uint32_t status_mask;
} esp_rom_spiflash_chip_t;
extern esp_spi_flash_chip_t flashchip;
extern esp_rom_spiflash_chip_t g_rom_flashchip;
uint32_t Wait_SPI_Idle();
@ -27,13 +27,13 @@ void system_soft_wdt_feed();
void Cache_Read_Enable_New();
int SPI_page_program(esp_spi_flash_chip_t *chip, uint32_t dst_addr, void *pbuf, uint32_t len);
int SPI_read_data(esp_spi_flash_chip_t *chip, uint32_t dst_addr, void *pbuf, uint32_t len);
int SPI_write_enable(esp_spi_flash_chip_t *chip);
int SPI_sector_erase(esp_spi_flash_chip_t *chip, uint32_t sect_addr);
int SPI_write_status(esp_spi_flash_chip_t *chip, uint32_t status);
int SPI_read_status(esp_spi_flash_chip_t *chip, uint32_t *status);
int Enable_QMode(esp_spi_flash_chip_t *chip);
int SPI_page_program(esp_rom_spiflash_chip_t *chip, uint32_t dst_addr, void *pbuf, uint32_t len);
int SPI_read_data(esp_rom_spiflash_chip_t *chip, uint32_t dst_addr, void *pbuf, uint32_t len);
int SPI_write_enable(esp_rom_spiflash_chip_t *chip);
int SPI_sector_erase(esp_rom_spiflash_chip_t *chip, uint32_t sect_addr);
int SPI_write_status(esp_rom_spiflash_chip_t *chip, uint32_t status);
int SPI_read_status(esp_rom_spiflash_chip_t *chip, uint32_t *status);
int Enable_QMode(esp_rom_spiflash_chip_t *chip);
int SPIWrite(uint32_t addr, const uint8_t *src, uint32_t size);
int SPIRead(uint32_t addr, void *dst, uint32_t size);

13
components/esp8266/include/esp_libc.h
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@ -29,6 +29,7 @@
#include <stddef.h>
#include <stdio.h>
#include <stdarg.h>
#include "rom/ets_sys.h"
#ifndef BOOTLOADER_BUILD
#include "esp_heap_caps.h"
#endif
@ -60,18 +61,6 @@ int ets_putc(int c);
*/
int ets_vprintf(const char *fmt, va_list ap);
/**
* @brief Printf the strings to uart or other devices, similar with printf, simple than printf.
* Can not print float point data format, or longlong data format.
*
* @param const char *fmt : See printf.
*
* @param ... : See printf.
*
* @return int : the length printed to the output device.
*/
int ets_printf(const char *fmt, ...);
#ifndef os_printf
#define os_printf printf
#endif

12
components/esp8266/include/rom/ets_sys.h
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@ -109,6 +109,18 @@ void os_delay_us(uint16_t us);
*/
void ets_delay_us(uint32_t us);
/**
* @brief Printf the strings to uart or other devices, similar with printf, simple than printf.
* Can not print float point data format, or longlong data format.
*
* @param const char *fmt : See printf.
*
* @param ... : See printf.
*
* @return int : the length printed to the output device.
*/
int ets_printf(const char *fmt, ...);
/**
* @brief Register the print output function.
*

25
components/esp8266/include/rom/spi_flash.h Normal file
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@ -0,0 +1,25 @@
// Copyright 2010-2016 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#ifndef _ROM_SPI_FLASH_H_
#define _ROM_SPI_FLASH_H_
#include <stdint.h>
#include <stdbool.h>
#include "esp_attr.h"
#include "esp8266/rom_functions.h"
#endif /* _ROM_SPI_FLASH_H_ */

16
components/spi_flash/include/priv/esp_spi_flash_raw.h
View File

@ -48,21 +48,21 @@ typedef struct {
uint8_t dummy_bits;
} spi_cmd_t;
bool spi_user_cmd_raw(esp_spi_flash_chip_t *chip, spi_cmd_dir_t mode, spi_cmd_t *p_cmd);
bool spi_user_cmd_raw(esp_rom_spiflash_chip_t *chip, spi_cmd_dir_t mode, spi_cmd_t *p_cmd);
uint32_t spi_flash_get_id_raw(esp_spi_flash_chip_t *chip);
uint32_t spi_flash_get_id_raw(esp_rom_spiflash_chip_t *chip);
esp_err_t spi_flash_enable_qmode_raw(esp_spi_flash_chip_t *chip);
esp_err_t spi_flash_enable_qmode_raw(esp_rom_spiflash_chip_t *chip);
esp_err_t spi_flash_read_status_raw(esp_spi_flash_chip_t *chip, uint32_t *status);
esp_err_t spi_flash_read_status_raw(esp_rom_spiflash_chip_t *chip, uint32_t *status);
esp_err_t spi_flash_write_status_raw(esp_spi_flash_chip_t *chip, uint32_t status_value);
esp_err_t spi_flash_write_status_raw(esp_rom_spiflash_chip_t *chip, uint32_t status_value);
esp_err_t spi_flash_read_raw(esp_spi_flash_chip_t *chip, size_t src_addr, void *dest, size_t size);
esp_err_t spi_flash_read_raw(esp_rom_spiflash_chip_t *chip, size_t src_addr, void *dest, size_t size);
esp_err_t spi_flash_write_raw(esp_spi_flash_chip_t *chip, size_t dest_addr, const void *src, size_t size);
esp_err_t spi_flash_write_raw(esp_rom_spiflash_chip_t *chip, size_t dest_addr, const void *src, size_t size);
esp_err_t spi_flash_erase_sector_raw(esp_spi_flash_chip_t *chip, size_t sec, size_t sec_size);
esp_err_t spi_flash_erase_sector_raw(esp_rom_spiflash_chip_t *chip, size_t sec, size_t sec_size);
void spi_flash_switch_to_qio_raw(void);

2
components/spi_flash/port/port.c
View File

@ -69,7 +69,7 @@ static uint32_t s_v2_flash_bin_size;
static uint32_t s_v2_flash_size;
static sys_param_t s_sys_param;
static boot_param_t s_boot_param;
static esp_spi_flash_chip_t s_flash_chip = {
static esp_rom_spiflash_chip_t s_flash_chip = {
0x1640ef,
CONFIG_SPI_FLASH_SIZE,
64 * 1024,

32
components/spi_flash/src/spi_flash.c
View File

@ -64,7 +64,7 @@
extern void vPortEnterCritical(void);
extern void vPortExitCritical(void);
esp_spi_flash_chip_t flashchip = {
esp_rom_spiflash_chip_t g_rom_flashchip = {
0x1640ef,
CONFIG_SPI_FLASH_SIZE,
64 * 1024,
@ -89,7 +89,7 @@ bool spi_user_cmd(spi_cmd_dir_t mode, spi_cmd_t *p_cmd)
FLASH_INTR_LOCK(c_tmp);
FlashIsOnGoing = 1;
ret = spi_user_cmd_raw(&flashchip, mode, p_cmd);
ret = spi_user_cmd_raw(&g_rom_flashchip, mode, p_cmd);
FlashIsOnGoing = 0;
FLASH_INTR_UNLOCK(c_tmp);
@ -174,7 +174,7 @@ uint32_t spi_flash_get_id(void)
FlashIsOnGoing = 1;
rdid = spi_flash_get_id_raw(&flashchip);
rdid = spi_flash_get_id_raw(&g_rom_flashchip);
FlashIsOnGoing = 0;
@ -192,7 +192,7 @@ esp_err_t spi_flash_read_status(uint32_t *status)
FlashIsOnGoing = 1;
ret = spi_flash_read_status_raw(&flashchip, status);
ret = spi_flash_read_status_raw(&g_rom_flashchip, status);
FlashIsOnGoing = 0;
@ -209,7 +209,7 @@ esp_err_t spi_flash_write_status(uint32_t status_value)
FlashIsOnGoing = 1;
spi_flash_write_status_raw(&flashchip, status_value);
spi_flash_write_status_raw(&g_rom_flashchip, status_value);
FlashIsOnGoing = 0;
@ -436,7 +436,7 @@ void user_spi_flash_dio_to_qio_pre_init(void)
}
//ENBALE FLASH QIO 0X01H+0X00+0X02
} else {
if (spi_flash_enable_qmode_raw(&flashchip) == ESP_OK) {
if (spi_flash_enable_qmode_raw(&g_rom_flashchip) == ESP_OK) {
to_qio = true;
}
}
@ -452,7 +452,7 @@ esp_err_t spi_flash_erase_sector(size_t sec)
esp_err_t ret;
if (sec >= (flashchip.chip_size / flashchip.sector_size)) {
if (sec >= (g_rom_flashchip.chip_size / g_rom_flashchip.sector_size)) {
return ESP_ERR_FLASH_OP_FAIL;
}
@ -463,7 +463,7 @@ esp_err_t spi_flash_erase_sector(size_t sec)
FLASH_INTR_LOCK(c_tmp);
FlashIsOnGoing = 1;
ret = spi_flash_erase_sector_raw(&flashchip, sec, flashchip.sector_size);
ret = spi_flash_erase_sector_raw(&g_rom_flashchip, sec, g_rom_flashchip.sector_size);
FlashIsOnGoing = 0;
FLASH_INTR_UNLOCK(c_tmp);
@ -477,15 +477,15 @@ static esp_err_t spi_flash_program(uint32_t target, uint32_t *src_addr, size_t l
uint32_t pgm_len, pgm_num;
uint8_t i;
page_size = flashchip.page_size;
page_size = g_rom_flashchip.page_size;
pgm_len = page_size - (target % page_size);
if (len < pgm_len) {
if (ESP_OK != spi_flash_write_raw(&flashchip, target, src_addr, len)) {
if (ESP_OK != spi_flash_write_raw(&g_rom_flashchip, target, src_addr, len)) {
return ESP_ERR_FLASH_OP_FAIL;
}
} else {
if (ESP_OK != spi_flash_write_raw(&flashchip, target, src_addr, pgm_len)) {
if (ESP_OK != spi_flash_write_raw(&g_rom_flashchip, target, src_addr, pgm_len)) {
return ESP_ERR_FLASH_OP_FAIL;
}
@ -493,7 +493,7 @@ static esp_err_t spi_flash_program(uint32_t target, uint32_t *src_addr, size_t l
pgm_num = (len - pgm_len) / page_size;
for (i = 0; i < pgm_num; i++) {
if (ESP_OK != spi_flash_write_raw(&flashchip, target + pgm_len, src_addr + (pgm_len >> 2), page_size)) {
if (ESP_OK != spi_flash_write_raw(&g_rom_flashchip, target + pgm_len, src_addr + (pgm_len >> 2), page_size)) {
return ESP_ERR_FLASH_OP_FAIL;
}
@ -501,7 +501,7 @@ static esp_err_t spi_flash_program(uint32_t target, uint32_t *src_addr, size_t l
}
//remain parts to program
if (ESP_OK != spi_flash_write_raw(&flashchip, target + pgm_len, src_addr + (pgm_len >> 2), len - pgm_len)) {
if (ESP_OK != spi_flash_write_raw(&g_rom_flashchip, target + pgm_len, src_addr + (pgm_len >> 2), len - pgm_len)) {
return ESP_ERR_FLASH_OP_FAIL;
}
}
@ -556,7 +556,7 @@ esp_err_t spi_flash_write(size_t dest_addr, const void *src, size_t size)
return ESP_ERR_FLASH_OP_FAIL;
}
if ((dest_addr + size) > flashchip.chip_size) {
if ((dest_addr + size) > g_rom_flashchip.chip_size) {
return ESP_ERR_FLASH_OP_FAIL;
}
@ -619,7 +619,7 @@ static esp_err_t __spi_flash_read(size_t src_addr, void *dest, size_t size)
FLASH_INTR_LOCK(c_tmp);
FlashIsOnGoing = 1;
ret = spi_flash_read_raw(&flashchip, src_addr, dest, size);
ret = spi_flash_read_raw(&g_rom_flashchip, src_addr, dest, size);
FlashIsOnGoing = 0;
FLASH_INTR_UNLOCK(c_tmp);
@ -779,5 +779,5 @@ uintptr_t spi_flash_cache2phys(const void *cached)
size_t spi_flash_get_chip_size()
{
return flashchip.chip_size;
return g_rom_flashchip.chip_size;
}

16
components/spi_flash/src/spi_flash_raw.c
View File

@ -35,7 +35,7 @@ void Cache_Read_Enable_2()
}
void Cache_Read_Enable_New(void) __attribute__((alias("Cache_Read_Enable_2")));
uint32_t spi_flash_get_id_raw(esp_spi_flash_chip_t *chip)
uint32_t spi_flash_get_id_raw(esp_rom_spiflash_chip_t *chip)
{
uint32_t rdid = 0;
@ -54,7 +54,7 @@ uint32_t spi_flash_get_id_raw(esp_spi_flash_chip_t *chip)
return rdid;
}
esp_err_t spi_flash_read_status_raw(esp_spi_flash_chip_t *chip, uint32_t *status)
esp_err_t spi_flash_read_status_raw(esp_rom_spiflash_chip_t *chip, uint32_t *status)
{
esp_err_t ret;
@ -67,7 +67,7 @@ esp_err_t spi_flash_read_status_raw(esp_spi_flash_chip_t *chip, uint32_t *status
return ret;
}
esp_err_t spi_flash_write_status_raw(esp_spi_flash_chip_t *chip, uint32_t status_value)
esp_err_t spi_flash_write_status_raw(esp_rom_spiflash_chip_t *chip, uint32_t status_value)
{
Cache_Read_Disable_2();
@ -86,7 +86,7 @@ esp_err_t spi_flash_write_status_raw(esp_spi_flash_chip_t *chip, uint32_t status
return ESP_OK;
}
esp_err_t spi_flash_erase_sector_raw(esp_spi_flash_chip_t *chip, size_t sec, size_t sec_size)
esp_err_t spi_flash_erase_sector_raw(esp_rom_spiflash_chip_t *chip, size_t sec, size_t sec_size)
{
esp_err_t ret = ESP_OK;
@ -105,7 +105,7 @@ esp_err_t spi_flash_erase_sector_raw(esp_spi_flash_chip_t *chip, size_t sec, siz
return ret;
}
esp_err_t spi_flash_enable_qmode_raw(esp_spi_flash_chip_t *chip)
esp_err_t spi_flash_enable_qmode_raw(esp_rom_spiflash_chip_t *chip)
{
esp_err_t ret;
@ -120,7 +120,7 @@ esp_err_t spi_flash_enable_qmode_raw(esp_spi_flash_chip_t *chip)
return ret;
}
esp_err_t spi_flash_write_raw(esp_spi_flash_chip_t *chip, size_t dest_addr, const void *src, size_t size)
esp_err_t spi_flash_write_raw(esp_rom_spiflash_chip_t *chip, size_t dest_addr, const void *src, size_t size)
{
esp_err_t ret;
@ -133,7 +133,7 @@ esp_err_t spi_flash_write_raw(esp_spi_flash_chip_t *chip, size_t dest_addr, cons
return ret;
}
esp_err_t spi_flash_read_raw(esp_spi_flash_chip_t *chip, size_t src_addr, void *dest, size_t size)
esp_err_t spi_flash_read_raw(esp_rom_spiflash_chip_t *chip, size_t src_addr, void *dest, size_t size)
{
esp_err_t ret;
@ -146,7 +146,7 @@ esp_err_t spi_flash_read_raw(esp_spi_flash_chip_t *chip, size_t src_addr, void *
return ret;
}
bool spi_user_cmd_raw(esp_spi_flash_chip_t *chip, spi_cmd_dir_t mode, spi_cmd_t *p_cmd)
bool spi_user_cmd_raw(esp_rom_spiflash_chip_t *chip, spi_cmd_dir_t mode, spi_cmd_t *p_cmd)
{
int idx = 0;

2
components/spiffs/CMakeLists.txt
View File

@ -1,3 +1,4 @@
if(CONFIG_USING_SPIFFS)
set(COMPONENT_ADD_INCLUDEDIRS "include")
set(COMPONENT_PRIV_INCLUDEDIRS "." "spiffs/src")
set(COMPONENT_SRCS "esp_spiffs.c"
@ -7,6 +8,7 @@ set(COMPONENT_SRCS "esp_spiffs.c"
"spiffs/src/spiffs_gc.c"
"spiffs/src/spiffs_hydrogen.c"
"spiffs/src/spiffs_nucleus.c")
endif()
set(COMPONENT_REQUIRES spi_flash)
set(COMPONENT_PRIV_REQUIRES bootloader_support)

10
components/spiffs/Kconfig
View File

@ -1,4 +1,10 @@
menu "SPIFFS Configuration"
menuconfig USING_SPIFFS
bool "SPIFFS"
select USING_ESP_VFS
help
Select this option to enable support for the SPIFFS.
if USING_SPIFFS
config SPIFFS_MAX_PARTITIONS
int "Maximum Number of Partitions"
@ -158,4 +164,4 @@ config SPIFFS_TEST_VISUALISATION
endmenu
endmenu
endif

8
components/spiffs/component.mk
View File

@ -1,5 +1,9 @@
ifdef CONFIG_USING_SPIFFS
COMPONENT_ADD_INCLUDEDIRS := include
COMPONENT_PRIV_INCLUDEDIRS := . spiffs/src
COMPONENT_SRCDIRS := . spiffs/src
COMPONENT_SUBMODULES := spiffs
else
COMPONENT_ADD_INCLUDEDIRS :=
COMPONENT_PRIV_INCLUDEDIRS :=
COMPONENT_SRCDIRS :=
endif

2
components/spiffs/include/spiffs_config.h
View File

@ -205,7 +205,7 @@ _Static_assert(SPIFFS_OBJ_META_LEN + SPIFFS_OBJ_NAME_LEN + SPIFFS_PAGE_EXTRA_SIZ
#define SPIFFS_SINGLETON 0
// Enable this if your target needs aligned data for index tables
#define SPIFFS_ALIGNED_OBJECT_INDEX_TABLES 0
#define SPIFFS_ALIGNED_OBJECT_INDEX_TABLES 4
// Enable this if you want the HAL callbacks to be called with the spiffs struct
#define SPIFFS_HAL_CALLBACK_EXTRA 1

1
tools/unit-test-app/components/unity/test_utils.c
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@ -13,6 +13,7 @@
// limitations under the License.
#include <string.h>
#include <unistd.h>
#include "unity.h"
#include "test_utils.h"
#include "rom/ets_sys.h"

1
tools/unit-test-app/sdkconfig.defaults
View File

@ -5,3 +5,4 @@ CONFIG_PARTITION_TABLE_OFFSET=0x8000
CONFIG_TASK_WDT=
CONFIG_ENABLE_PTHREAD=y
CONFIG_USING_SPIFFS=y