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Merge branch 'feature/optimizing_hspi_example' into 'master'

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feature(spi): optimizing hspi example

See merge request sdk/ESP8266_RTOS_SDK!841
This commit is contained in:
Wu Jian Gang
2019-04-18 14:16:59 +08:00
parent 06e1dfeb52 2f3aa40c91
commit e896180a7f
6 changed files with 187 additions and 298 deletions
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5
components/esp8266/driver/gpio.c
View File

@ -338,7 +338,7 @@ esp_err_t gpio_config(const gpio_config_t *gpio_cfg)
return ESP_OK;
}
void gpio_intr_service(void *arg)
void IRAM_ATTR gpio_intr_service(void *arg)
{
//GPIO intr process
uint32_t gpio_num = 0;
@ -352,11 +352,10 @@ void gpio_intr_service(void *arg)
do {
if (gpio_num < GPIO_PIN_COUNT - 1) {
if (gpio_intr_status & BIT(gpio_num)) { //gpio0-gpio15
GPIO.status_w1tc = BIT(gpio_num);
if (gpio_isr_func[gpio_num].fn != NULL) {
gpio_isr_func[gpio_num].fn(gpio_isr_func[gpio_num].args);
}
GPIO.status_w1tc = BIT(gpio_num);
}
}
} while (++gpio_num < GPIO_PIN_COUNT - 1);

3
components/esp8266/driver/spi.c
View File

@ -210,7 +210,8 @@ esp_err_t spi_set_mode(spi_host_t host, spi_mode_t *mode)
SPI[host]->pin.slave_mode = true;
SPI[host]->slave.slave_mode = true;
SPI[host]->user.usr_miso_highpart = true;
SPI[host]->ctrl2.mosi_delay_num = 1;
// MOSI signals are delayed by APB_CLK(80MHz) mosi_delay_num cycles
SPI[host]->ctrl2.mosi_delay_num = 2;
SPI[host]->ctrl2.miso_delay_num = 0;
SPI[host]->slave.wr_rd_sta_en = 1;
SPI[host]->slave1.status_bitlen = 31;