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https://github.com/espressif/ESP8266_RTOS_SDK.git
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feat(structure): Re-structure some include
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79
components/esp8266/include/esp8266/ets_sys.h
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79
components/esp8266/include/esp8266/ets_sys.h
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/*
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* ESPRSSIF MIT License
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*
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* Copyright (c) 2015 <ESPRESSIF SYSTEMS (SHANGHAI) PTE LTD>
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*
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* Permission is hereby granted for use on ESPRESSIF SYSTEMS ESP8266 only, in which case,
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* it is free of charge, to any person obtaining a copy of this software and associated
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* documentation files (the "Software"), to deal in the Software without restriction, including
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* without limitation the rights to use, copy, modify, merge, publish, distribute, sublicense,
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* and/or sell copies of the Software, and to permit persons to whom the Software is furnished
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* to do so, subject to the following conditions:
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*
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* The above copyright notice and this permission notice shall be included in all copies or
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* substantial portions of the Software.
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*
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* THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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* IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY, FITNESS
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* FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR
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* COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
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* IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
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* CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
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*
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*/
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#ifndef __ETS_SYS_H__
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#define __ETS_SYS_H__
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/* interrupt related */
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#define ETS_SPI_INUM 2
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#define ETS_GPIO_INUM 4
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#define ETS_UART_INUM 5
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#define ETS_MAX_INUM 6
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#define ETS_SOFT_INUM 7
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#define ETS_WDT_INUM 8
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#define ETS_FRC_TIMER1_INUM 9
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extern char NMIIrqIsOn;
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extern uint32 WDEV_INTEREST_EVENT;
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#define INT_ENA_WDEV 0x3ff20c18
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#define WDEV_TSF0_REACH_INT (BIT(27))
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#define ETS_NMI_LOCK() \
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do { \
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char m = 10; \
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do { \
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REG_WRITE(INT_ENA_WDEV, 0); \
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m = 10; \
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for (; m > 0; m--) {} \
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REG_WRITE(INT_ENA_WDEV, WDEV_TSF0_REACH_INT); \
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} while(0); \
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} while (0)
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#define ETS_NMI_UNLOCK() \
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do { \
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REG_WRITE(INT_ENA_WDEV, WDEV_INTEREST_EVENT); \
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} while (0)
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#define ETS_INTR_LOCK() do { \
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if (NMIIrqIsOn == 0) { \
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vPortEnterCritical(); \
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char m = 10; \
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do { \
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REG_WRITE(INT_ENA_WDEV, 0); \
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m = 10; \
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for (; m > 0; m--) {} \
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REG_WRITE(INT_ENA_WDEV, WDEV_TSF0_REACH_INT); \
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} while(0); \
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} \
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} while(0)
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#define ETS_INTR_UNLOCK() do { \
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if (NMIIrqIsOn == 0) { \
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REG_WRITE(INT_ENA_WDEV, WDEV_INTEREST_EVENT); \
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vPortExitCritical(); \
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} \
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} while(0)
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#endif /* _ETS_SYS_H */
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