sync: from 61124bba

1. driver:
  1). Fix hw_timer issue, #96;
  2). Fix SPI output data error;
  3). Fix SPI read data bug;
  4). Fix driver lib compile issue;
  5). Fix uart flow control issue;

2. lwip:
  1). Enable lwip ETHARP_TRUS_IP_MAC;
  2). Modify dhcp/dhcps timer from 60 seconds to 1 second;

3. WiFi:
  1). Support CSA;
This commit is contained in:
Espressif Systems
2017-05-27 11:13:46 +08:00
parent fdd3346291
commit e1e17a12c3
18 changed files with 102 additions and 31 deletions

2
VERSION Normal file
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@ -0,0 +1,2 @@
lwip: 6ee4a9b3
driver: 7bee5263

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@ -49,15 +49,36 @@ typedef enum { // timer interrupt mode
static void (* user_hw_timer_cb)(void) = NULL; static void (* user_hw_timer_cb)(void) = NULL;
bool frc1_auto_load = false;
static void hw_timer_isr_cb(void *arg) static void hw_timer_isr_cb(void *arg)
{ {
if(frc1_auto_load == false ) {
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
DIVDED_BY_16 | TM_EDGE_INT);
}
if (user_hw_timer_cb != NULL) { if (user_hw_timer_cb != NULL) {
(*(user_hw_timer_cb))(); (*(user_hw_timer_cb))();
} }
} }
void hw_timer_arm(uint32 val) void hw_timer_disarm(void)
{ {
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,0);
}
void hw_timer_arm(uint32 val ,bool req)
{
frc1_auto_load = req;
if (frc1_auto_load == true) {
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
} else {
RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
}
RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(val)); RTC_REG_WRITE(FRC1_LOAD_ADDRESS, US_TO_RTC_TIMER_TICKS(val));
} }
@ -66,8 +87,9 @@ void hw_timer_set_func(void (* user_hw_timer_cb_set)(void))
user_hw_timer_cb = user_hw_timer_cb_set; user_hw_timer_cb = user_hw_timer_cb_set;
} }
void hw_timer_init(uint8 req) void hw_timer_init(void)
{ {
#if 0
if (req == 1) { if (req == 1) {
RTC_REG_WRITE(FRC1_CTRL_ADDRESS, RTC_REG_WRITE(FRC1_CTRL_ADDRESS,
FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
@ -76,6 +98,7 @@ void hw_timer_init(uint8 req)
DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT);
} }
#endif
_xt_isr_attach(ETS_FRC_TIMER1_INUM, hw_timer_isr_cb, NULL); _xt_isr_attach(ETS_FRC_TIMER1_INUM, hw_timer_isr_cb, NULL);
TM1_EDGE_INT_ENABLE(); TM1_EDGE_INT_ENABLE();
@ -108,8 +131,8 @@ void hw_test_timer_cb(void)
void user_init(void) void user_init(void)
{ {
hw_timer_init(1); hw_timer_init();
hw_timer_set_func(hw_test_timer_cb); hw_timer_set_func(hw_test_timer_cb,1);
hw_timer_arm(100); hw_timer_arm(100);
} }
#endif #endif

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@ -22,6 +22,7 @@
#include "spi_interface.h" #include "spi_interface.h"
#include "esp8266/eagle_soc.h" #include "esp8266/eagle_soc.h"
#include "esp8266/ets_sys.h" #include "esp8266/ets_sys.h"
#include "esp8266/pin_mux_register.h"
#include "esp_libc.h" #include "esp_libc.h"
//***************************************************************************** //*****************************************************************************
// //
@ -123,6 +124,10 @@ void ICACHE_FLASH_ATTR SPIInit(SpiNum spiNum, SpiAttr* pAttr)
// SPI Speed // SPI Speed
if (1 < (pAttr->speed)) { if (1 < (pAttr->speed)) {
CLEAR_PERI_REG_MASK(SPI_CLOCK(spiNum), SPI_CLK_EQU_SYSCLK); CLEAR_PERI_REG_MASK(SPI_CLOCK(spiNum), SPI_CLK_EQU_SYSCLK);
if (spiNum == SpiNum_HSPI) {
CLEAR_PERI_REG_MASK(PERIPHS_IO_MUX_CONF_U, SPI1_CLK_EQU_SYS_CLK);
}
WRITE_PERI_REG(SPI_CLOCK(spiNum), WRITE_PERI_REG(SPI_CLOCK(spiNum),
((pAttr->speed & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) | ((pAttr->speed & SPI_CLKCNT_N) << SPI_CLKCNT_N_S) |
((((pAttr->speed + 1) / 2 - 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) | ((((pAttr->speed + 1) / 2 - 1) & SPI_CLKCNT_H) << SPI_CLKCNT_H_S) |
@ -169,6 +174,8 @@ void ICACHE_FLASH_ATTR SPIInit(SpiNum spiNum, SpiAttr* pAttr)
//clear Daul or Quad lines transmission mode //clear Daul or Quad lines transmission mode
CLEAR_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_QIO_MODE | SPI_DIO_MODE | SPI_DOUT_MODE | SPI_QOUT_MODE); CLEAR_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_QIO_MODE | SPI_DIO_MODE | SPI_DOUT_MODE | SPI_QOUT_MODE);
SET_PERI_REG_MASK(SPI_CTRL(spiNum), SPI_FASTRD_MODE);
} }
/** /**
@ -258,6 +265,7 @@ int ICACHE_FLASH_ATTR SPIMasterSendData(SpiNum spiNum, SpiData* pInData)
SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, ((pInData->dataLen << 3) - 1), SPI_USR_MOSI_BITLEN_S); SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, ((pInData->dataLen << 3) - 1), SPI_USR_MOSI_BITLEN_S);
} else { } else {
CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI);
CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO);
SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN,
0, SPI_USR_MOSI_BITLEN_S); 0, SPI_USR_MOSI_BITLEN_S);
} }
@ -329,9 +337,15 @@ int ICACHE_FLASH_ATTR SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData)
SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MISO_BITLEN, SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MISO_BITLEN,
0, SPI_USR_MISO_BITLEN_S); 0, SPI_USR_MISO_BITLEN_S);
} }
//CLEAR FIFO DATA
int fifo_idx = 0;
do {
WRITE_PERI_REG(SPI_W0(spiNum) + (fifo_idx << 2), 0);
} while (++fifo_idx < (pOutData->dataLen / 4));
// Start send data // Start send data
SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR);
while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR);
// Read data out // Read data out
do { do {

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@ -329,7 +329,7 @@ UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef *pUARTIntrConf)
uint32 reg_val = 0; uint32 reg_val = 0;
UART_ClearIntrStatus(uart_no, UART_INTR_MASK); UART_ClearIntrStatus(uart_no, UART_INTR_MASK);
reg_val = READ_PERI_REG(UART_CONF1(uart_no)) & ~((UART_RX_FLOW_THRHD << UART_RX_FLOW_THRHD_S) | UART_RX_FLOW_EN) ; reg_val = READ_PERI_REG(UART_CONF1(uart_no)) & ((UART_RX_FLOW_THRHD << UART_RX_FLOW_THRHD_S) | UART_RX_FLOW_EN) ;
reg_val |= ((pUARTIntrConf->UART_IntrEnMask & UART_RXFIFO_TOUT_INT_ENA) ? reg_val |= ((pUARTIntrConf->UART_IntrEnMask & UART_RXFIFO_TOUT_INT_ENA) ?
((((pUARTIntrConf->UART_RX_TimeOutIntrThresh)&UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S) | UART_RX_TOUT_EN) : 0); ((((pUARTIntrConf->UART_RX_TimeOutIntrThresh)&UART_RX_TOUT_THRHD) << UART_RX_TOUT_THRHD_S) | UART_RX_TOUT_EN) : 0);

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@ -28,7 +28,7 @@
#ifdef __cplusplus #ifdef __cplusplus
extern "C" { extern "C" {
#endif #endif
#include "esp8266/gpio_register.h"
#define GPIO_Pin_0 (BIT(0)) /* Pin 0 selected */ #define GPIO_Pin_0 (BIT(0)) /* Pin 0 selected */
#define GPIO_Pin_1 (BIT(1)) /* Pin 1 selected */ #define GPIO_Pin_1 (BIT(1)) /* Pin 1 selected */
#define GPIO_Pin_2 (BIT(2)) /* Pin 2 selected */ #define GPIO_Pin_2 (BIT(2)) /* Pin 2 selected */
@ -190,7 +190,7 @@ typedef struct {
* *
* @return the level of GPIO input * @return the level of GPIO input
*/ */
#define GPIO_INPUT_GET(gpio_no) ((gpio_input_get()>>gpio_no)&BIT0) #define GPIO_INPUT_GET(gpio_no) ((gpio_input_get()>>gpio_no)&BIT(0))
/** /**
* @brief Enable GPIO16 output. * @brief Enable GPIO16 output.

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@ -44,11 +44,11 @@ extern "C" {
/** /**
* @brief Initialize the hardware ISR timer. * @brief Initialize the hardware ISR timer.
* *
* @param uint8 req : 0, not autoload; 1, autoload mode. * @param null
* *
* @return null * @return null
*/ */
void hw_timer_init(uint8 req); void hw_timer_init(void);
/** /**
* @brief Set a trigger timer delay to enable this timer. * @brief Set a trigger timer delay to enable this timer.
@ -57,9 +57,20 @@ void hw_timer_init(uint8 req);
* - In autoload mode, range : 50 ~ 0x7fffff * - In autoload mode, range : 50 ~ 0x7fffff
* - In non-autoload mode, range : 10 ~ 0x7fffff * - In non-autoload mode, range : 10 ~ 0x7fffff
* *
* @param uint8 req : 0, not autoload; 1, autoload mode.
*
* @return null * @return null
*/ */
void hw_timer_arm(uint32 val); void hw_timer_arm(uint32 val, bool req);
/**
* @brief disable this timer.
*
* @param null
*
* @return null
*/
void hw_timer_disarm(void);
/** /**
* @brief Set timer callback function. * @brief Set timer callback function.

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@ -1,11 +1,23 @@
#!/bin/bash -x #!/bin/bash
set -e
echo "make_lib.sh version 20160307" export SDK_PATH=$(dirname $(pwd))
echo "make_lib.sh version 20150924"
echo "" echo ""
if [ $SDK_PATH ]; then
echo "SDK_PATH:"
echo "$SDK_PATH"
echo ""
else
echo "ERROR: Please export SDK_PATH in make_lib.sh firstly, exit!!!"
exit
fi
cd $1 cd $1
make clean make clean
make COMPILE=gcc make
cp .output/eagle/debug/lib/lib$1.a ../../lib/lib$1.a cp .output/eagle/debug/lib/lib$1.a $SDK_PATH/lib/lib$1.a
xtensa-lx106-elf-strip --strip-unneeded ../../lib/lib$1.a xtensa-lx106-elf-strip --strip-unneeded $SDK_PATH/lib/lib$1.a
cd .. cd ..

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@ -24,7 +24,7 @@
#ifndef _PIN_MUX_H_ #ifndef _PIN_MUX_H_
#define _PIN_MUX_H_ #define _PIN_MUX_H_
#include "eagle_soc.h"
#define PERIPHS_IO_MUX 0x60000800 #define PERIPHS_IO_MUX 0x60000800
#define PERIPHS_IO_MUX_FUNC 0x13 #define PERIPHS_IO_MUX_FUNC 0x13

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@ -16,7 +16,7 @@ extern "C" {
#endif #endif
/** period (in seconds) of the application calling dhcp_coarse_tmr() */ /** period (in seconds) of the application calling dhcp_coarse_tmr() */
#define DHCP_COARSE_TIMER_SECS 60 #define DHCP_COARSE_TIMER_SECS 1
/** period (in milliseconds) of the application calling dhcp_coarse_tmr() */ /** period (in milliseconds) of the application calling dhcp_coarse_tmr() */
#define DHCP_COARSE_TIMER_MSECS (DHCP_COARSE_TIMER_SECS * 1000UL) #define DHCP_COARSE_TIMER_MSECS (DHCP_COARSE_TIMER_SECS * 1000UL)
/** period (in milliseconds) of the application calling dhcp_fine_tmr() */ /** period (in milliseconds) of the application calling dhcp_fine_tmr() */
@ -46,9 +46,9 @@ struct dhcp
struct pbuf *p_out; /* pbuf of outcoming msg */ struct pbuf *p_out; /* pbuf of outcoming msg */
struct dhcp_msg *msg_out; /* outgoing msg */ struct dhcp_msg *msg_out; /* outgoing msg */
u16_t options_out_len; /* outgoing msg options length */ u16_t options_out_len; /* outgoing msg options length */
u16_t request_timeout; /* #ticks with period DHCP_FINE_TIMER_SECS for request timeout */ u32_t request_timeout; /* #ticks with period DHCP_FINE_TIMER_SECS for request timeout */
u16_t t1_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */ u32_t t1_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for renewal time */
u16_t t2_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */ u32_t t2_timeout; /* #ticks with period DHCP_COARSE_TIMER_SECS for rebind time */
ip_addr_t server_ip_addr; /* dhcp server address that offered this lease */ ip_addr_t server_ip_addr; /* dhcp server address that offered this lease */
ip_addr_t offered_ip_addr; ip_addr_t offered_ip_addr;
ip_addr_t offered_sn_mask; ip_addr_t offered_sn_mask;

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@ -48,6 +48,7 @@ typedef struct _list_node{
}list_node; }list_node;
extern u32_t dhcps_lease_time; extern u32_t dhcps_lease_time;
#define DHCPS_COARSE_TIMER_SECS 1
#define DHCPS_LEASE_TIMER dhcps_lease_time //0x05A0 #define DHCPS_LEASE_TIMER dhcps_lease_time //0x05A0
#define DHCPS_MAX_LEASE 0x64 #define DHCPS_MAX_LEASE 0x64
#define BOOTP_BROADCAST 0x8000 #define BOOTP_BROADCAST 0x8000

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@ -163,6 +163,19 @@
*/ */
#define IP_REASS_MAX_PBUFS 10 #define IP_REASS_MAX_PBUFS 10
/**
* ETHARP_TRUST_IP_MAC==1: Incoming IP packets cause the ARP table to be
* updated with the source MAC and IP addresses supplied in the packet.
* You may want to disable this if you do not trust LAN peers to have the
* correct addresses, or as a limited approach to attempt to handle
* spoofing. If disabled, lwIP will need to make a new ARP request if
* the peer is not already in the ARP table, adding a little latency.
* The peer *is* in the ARP table if it requested our address before.
* Also notice that this slows down input processing of every IP packet!
*/
#define ETHARP_TRUST_IP_MAC 1
/* /*
---------------------------------- ----------------------------------
---------- ICMP options ---------- ---------- ICMP options ----------

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@ -1058,12 +1058,9 @@ dhcp_bind(struct netif *netif)
/* set renewal period timer */ /* set renewal period timer */
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew)); LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t1 renewal timer %"U32_F" secs\n", dhcp->offered_t1_renew));
timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; timeout = (dhcp->offered_t1_renew + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
if(timeout > 0xffff) {
timeout = 0xffff;
}
dhcp->t1_timeout = (u16_t)timeout; dhcp->t1_timeout = (u16_t)timeout;
if (dhcp->t1_timeout == 0) { if (dhcp->t1_timeout == 0) {
dhcp->t1_timeout = 1; dhcp->t1_timeout = 60;
} }
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew*1000)); LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t1_renew*1000));
} }
@ -1071,12 +1068,9 @@ dhcp_bind(struct netif *netif)
if (dhcp->offered_t2_rebind != 0xffffffffUL) { if (dhcp->offered_t2_rebind != 0xffffffffUL) {
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind)); LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE, ("dhcp_bind(): t2 rebind timer %"U32_F" secs\n", dhcp->offered_t2_rebind));
timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS; timeout = (dhcp->offered_t2_rebind + DHCP_COARSE_TIMER_SECS / 2) / DHCP_COARSE_TIMER_SECS;
if(timeout > 0xffff) {
timeout = 0xffff;
}
dhcp->t2_timeout = (u16_t)timeout; dhcp->t2_timeout = (u16_t)timeout;
if (dhcp->t2_timeout == 0) { if (dhcp->t2_timeout == 0) {
dhcp->t2_timeout = 1; dhcp->t2_timeout = (dhcp->t1_timeout>>2)*7;
} }
LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind*1000)); LWIP_DEBUGF(DHCP_DEBUG | LWIP_DBG_TRACE | LWIP_DBG_STATE, ("dhcp_bind(): set request timeout %"U32_F" msecs\n", dhcp->offered_t2_rebind*1000));
} }

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@ -576,6 +576,7 @@ static u8_t parse_options(u8_t *optptr, s16_t len)
/////////////////////////////////////////////////////////////////////////////////// ///////////////////////////////////////////////////////////////////////////////////
static s16_t parse_msg(struct dhcps_msg *m, u16_t len) static s16_t parse_msg(struct dhcps_msg *m, u16_t len)
{ {
u32_t lease_timer = (dhcps_lease_time * 60)/DHCPS_COARSE_TIMER_SECS;
if(memcmp((char *)m->options, if(memcmp((char *)m->options,
&magic_cookie, &magic_cookie,
sizeof(magic_cookie)) == 0){ sizeof(magic_cookie)) == 0){
@ -632,7 +633,7 @@ static s16_t parse_msg(struct dhcps_msg *m, u16_t len)
renew = true; renew = true;
} }
client_address.addr = pdhcps_pool->ip.addr; client_address.addr = pdhcps_pool->ip.addr;
pdhcps_pool->lease_timer = DHCPS_LEASE_TIMER; pdhcps_pool->lease_timer = lease_timer;
pnode = pback_node; pnode = pback_node;
goto POOL_CHECK; goto POOL_CHECK;
} else if (pdhcps_pool->ip.addr == client_address_plus.addr){ } else if (pdhcps_pool->ip.addr == client_address_plus.addr){
@ -669,7 +670,7 @@ static s16_t parse_msg(struct dhcps_msg *m, u16_t len)
pdhcps_pool = (struct dhcps_pool *)os_zalloc(sizeof(struct dhcps_pool)); pdhcps_pool = (struct dhcps_pool *)os_zalloc(sizeof(struct dhcps_pool));
pdhcps_pool->ip.addr = client_address.addr; pdhcps_pool->ip.addr = client_address.addr;
memcpy(pdhcps_pool->mac, m->chaddr, sizeof(pdhcps_pool->mac)); memcpy(pdhcps_pool->mac, m->chaddr, sizeof(pdhcps_pool->mac));
pdhcps_pool->lease_timer = DHCPS_LEASE_TIMER; pdhcps_pool->lease_timer = lease_timer;
pnode = (list_node *)os_zalloc(sizeof(list_node )); pnode = (list_node *)os_zalloc(sizeof(list_node ));
pnode->pnode = pdhcps_pool; pnode->pnode = pdhcps_pool;
pnode->pnext = NULL; pnode->pnext = NULL;