mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
synced 2025-07-15 08:32:42 +08:00
Merge branch 'feature/refactor_i2c_driver' into 'master'
refactor(i2c): Refactor i2c driver for esp8266 idf See merge request sdk/ESP8266_RTOS_SDK!247
This commit is contained in:
Wu Jian Gang
618
components/esp8266/driver/i2c.c
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618
components/esp8266/driver/i2c.c
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@ -0,0 +1,618 @@
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// Copyright 2018-2025 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include <stdint.h>
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#include <stdlib.h>
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#include <string.h>
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#include "esp_err.h"
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#include "esp_log.h"
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#include "esp_heap_caps.h"
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#include "driver/i2c.h"
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#include "driver/gpio.h"
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// Temporary use the FreeRTOS critical function
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#include "FreeRTOS.h"
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#define ENTER_CRITICAL() portENTER_CRITICAL()
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#define EXIT_CRITICAL() portEXIT_CRITICAL()
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static const char *I2C_TAG = "i2c";
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#define I2C_CHECK(a, str, ret) if(!(a)) { \
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ESP_LOGE(I2C_TAG,"%s:%d (%s):%s", __FILE__, __LINE__, __FUNCTION__, str); \
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return (ret); \
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}
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#define I2C_DRIVER_ERR_STR "i2c driver install error"
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#define I2C_DRIVER_MALLOC_ERR_STR "i2c driver malloc error"
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#define I2C_NUM_ERROR_STR "i2c number error"
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#define I2C_TIMEING_VAL_ERR_STR "i2c timing value error"
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#define I2C_ADDR_ERROR_STR "i2c null address error"
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#define I2C_DRIVER_NOT_INSTALL_ERR_STR "i2c driver not installed"
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#define I2C_MASTER_MODE_ERR_STR "Only allowed in master mode"
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#define I2C_CMD_MALLOC_ERR_STR "i2c command link malloc error"
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#define I2C_TRANS_MODE_ERR_STR "i2c trans mode error"
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#define I2C_MODE_ERR_STR "i2c mode error"
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#define I2C_SDA_IO_ERR_STR "sda gpio number error"
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#define I2C_SCL_IO_ERR_STR "scl gpio number error"
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#define I2C_CMD_LINK_INIT_ERR_STR "i2c command link error"
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#define I2C_GPIO_PULLUP_ERR_STR "this i2c pin does not support internal pull-up"
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#define I2C_ACK_TYPE_ERR_STR "i2c ack type error"
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#define I2C_DATA_LEN_ERR_STR "i2c data read length error"
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#define I2C_IO_INIT_LEVEL (1)
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#define I2C_CMD_ALIVE_INTERVAL_TICK (1000 / portTICK_PERIOD_MS)
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#define I2C_ACKERR_CNT_MAX (10)
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#define i2c_master_wait os_delay_us
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typedef struct {
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uint8_t byte_num; /*!< cmd byte number */
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struct {
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uint8_t en: 1; /*!< ack check enable */
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uint8_t exp: 1; /*!< expected ack level to get */
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uint8_t val: 1; /*!< ack value to send */
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} ack;
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uint8_t *data; /*!< data address */
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uint8_t byte_cmd; /*!< to save cmd for one byte command mode */
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i2c_opmode_t op_code; /*!< cmd type */
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} i2c_cmd_t;
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typedef struct i2c_cmd_link {
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i2c_cmd_t cmd; /*!< command in current cmd link */
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struct i2c_cmd_link *next; /*!< next cmd link */
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} i2c_cmd_link_t;
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typedef struct {
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i2c_cmd_link_t *head; /*!< head of the command link */
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i2c_cmd_link_t *cur; /*!< last node of the command link */
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i2c_cmd_link_t *free; /*!< the first node to free of the command link */
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} i2c_cmd_desc_t;
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typedef enum {
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I2C_STATUS_READ, /*!< read status for current master command */
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I2C_STATUS_WRITE, /*!< write status for current master command */
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I2C_STATUS_IDLE, /*!< idle status for current master command */
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I2C_STATUS_ACK_ERROR, /*!< ack error status for current master command */
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I2C_STATUS_DONE, /*!< I2C command done */
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I2C_STATUS_TIMEOUT, /*!< I2C bus status error, and operation timeout */
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} i2c_status_t;
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typedef struct {
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i2c_port_t i2c_num; /*!< I2C port number */
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i2c_mode_t mode; /*!< I2C mode, master */
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int status; /*!< record current command status, for master mode */
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i2c_cmd_desc_t cmd_link; /*!< I2C command link */
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} i2c_obj_t;
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typedef union {
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struct {
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uint8_t scl: 1;
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uint8_t sda: 1;
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};
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uint8_t val;
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} i2c_last_state_t;
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static i2c_obj_t *p_i2c_obj[I2C_NUM_MAX] = {0};
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static i2c_config_t *i2c_config[I2C_NUM_MAX] = {NULL};
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static i2c_last_state_t *i2c_last_state[I2C_NUM_MAX] = {NULL};
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static void i2c_master_set_dc(i2c_port_t i2c_num, uint8_t sda, uint8_t scl)
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{
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i2c_last_state[i2c_num]->val = ((sda & 0x1) << 1) | (scl & 0x1);
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gpio_set_level(i2c_config[i2c_num]->sda_io_num, i2c_last_state[i2c_num]->sda);
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gpio_set_level(i2c_config[i2c_num]->scl_io_num, i2c_last_state[i2c_num]->scl);
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}
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static uint8_t i2c_master_get_dc(i2c_port_t i2c_num)
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{
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uint8_t sda_out;
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sda_out = gpio_get_level(i2c_config[i2c_num]->sda_io_num);
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return sda_out;
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}
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/*
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For i2c master mode, we don't need to use a buffer for the data, the APIs will execute the master commands
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and return after all of the commands have been sent out or when error occurs. So when we send master commands,
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we should free or modify the source data only after the i2c_master_cmd_begin function returns.
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*/
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esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode)
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{
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I2C_CHECK((i2c_num >= 0) && (i2c_num < I2C_NUM_MAX), I2C_NUM_ERROR_STR, ESP_ERR_INVALID_ARG);
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I2C_CHECK(mode < I2C_MODE_MAX, I2C_MODE_ERR_STR, ESP_ERR_INVALID_ARG);
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if (p_i2c_obj[i2c_num] == NULL) {
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p_i2c_obj[i2c_num] = (i2c_obj_t *) heap_caps_calloc(1, sizeof(i2c_obj_t), MALLOC_CAP_8BIT);
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if (p_i2c_obj[i2c_num] == NULL) {
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ESP_LOGE(I2C_TAG, I2C_DRIVER_MALLOC_ERR_STR);
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return ESP_FAIL;
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}
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i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
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p_i2c->i2c_num = i2c_num;
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p_i2c->mode = mode;
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p_i2c->status = I2C_STATUS_IDLE;
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p_i2c->cmd_link.cur = NULL;
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p_i2c->cmd_link.head = NULL;
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p_i2c->cmd_link.free = NULL;
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} else {
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ESP_LOGE(I2C_TAG, I2C_DRIVER_ERR_STR);
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return ESP_FAIL;
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}
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if (i2c_config[i2c_num] == NULL) {
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i2c_config[i2c_num] = (i2c_config_t *) heap_caps_calloc(1, sizeof(i2c_config_t), MALLOC_CAP_8BIT);
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if (i2c_config[i2c_num] == NULL) {
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ESP_LOGE(I2C_TAG, I2C_DRIVER_MALLOC_ERR_STR);
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heap_caps_free(p_i2c_obj[i2c_num]);
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p_i2c_obj[i2c_num] = NULL;
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return ESP_FAIL;
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}
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memset(i2c_config[i2c_num], 0, sizeof(i2c_config_t));
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} else {
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ESP_LOGE(I2C_TAG, I2C_DRIVER_ERR_STR);
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return ESP_FAIL;
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}
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if (i2c_last_state[i2c_num] == NULL) {
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i2c_last_state[i2c_num] = (i2c_last_state_t *) heap_caps_calloc(1, sizeof(i2c_last_state_t), MALLOC_CAP_8BIT);
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if (i2c_last_state[i2c_num] == NULL) {
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ESP_LOGE(I2C_TAG, I2C_DRIVER_MALLOC_ERR_STR);
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heap_caps_free(p_i2c_obj[i2c_num]);
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p_i2c_obj[i2c_num] = NULL;
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heap_caps_free(i2c_config[i2c_num]);
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i2c_config[i2c_num] = NULL;
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return ESP_FAIL;
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}
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memset(i2c_last_state[i2c_num], 0, sizeof(i2c_last_state_t));
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} else {
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ESP_LOGE(I2C_TAG, I2C_DRIVER_ERR_STR);
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return ESP_FAIL;
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}
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return ESP_OK;
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}
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esp_err_t i2c_driver_delete(i2c_port_t i2c_num)
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{
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I2C_CHECK((i2c_num >= 0) && (i2c_num < I2C_NUM_MAX), I2C_NUM_ERROR_STR, ESP_ERR_INVALID_ARG);
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I2C_CHECK(i2c_last_state[i2c_num] != NULL, I2C_DRIVER_ERR_STR, ESP_FAIL);
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I2C_CHECK(i2c_config[i2c_num] != NULL, I2C_DRIVER_ERR_STR, ESP_FAIL);
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I2C_CHECK(p_i2c_obj[i2c_num] != NULL, I2C_DRIVER_ERR_STR, ESP_FAIL);
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heap_caps_free(i2c_last_state[i2c_num]);
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i2c_last_state[i2c_num] = NULL;
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heap_caps_free(i2c_config[i2c_num]);
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i2c_config[i2c_num] = NULL;
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heap_caps_free(p_i2c_obj[i2c_num]);
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p_i2c_obj[i2c_num] = NULL;
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return ESP_OK;
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}
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esp_err_t i2c_set_pin(i2c_port_t i2c_num, int sda_io_num, int scl_io_num, gpio_pullup_t sda_pullup_en, gpio_pullup_t scl_pullup_en, i2c_mode_t mode)
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{
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I2C_CHECK((i2c_num >= 0) && (i2c_num < I2C_NUM_MAX), I2C_NUM_ERROR_STR, ESP_ERR_INVALID_ARG);
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I2C_CHECK(mode < I2C_MODE_MAX, I2C_MODE_ERR_STR, ESP_ERR_INVALID_ARG);
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gpio_config_t io_conf;
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if (sda_io_num >= 0) {
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// disable interrupt
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io_conf.intr_type = GPIO_INTR_DISABLE;
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// set as output mode
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io_conf.mode = GPIO_MODE_OUTPUT_OD;
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// bit mask of the pins that you want to set
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io_conf.pin_bit_mask = (1ULL << sda_io_num);
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// disable pull-down mode
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io_conf.pull_down_en = 0;
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// disable pull-up mode
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io_conf.pull_up_en = sda_pullup_en;
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// configure GPIO with the given settings
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ESP_ERROR_CHECK(gpio_config(&io_conf));
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ESP_ERROR_CHECK(gpio_set_level(sda_io_num, 1));
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}
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if (scl_io_num >= 0) {
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// disable interrupt
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io_conf.intr_type = GPIO_INTR_DISABLE;
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// set as output mode
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io_conf.mode = GPIO_MODE_OUTPUT_OD;
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// bit mask of the pins that you want to set
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io_conf.pin_bit_mask = (1ULL << scl_io_num);
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// disable pull-down mode
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io_conf.pull_down_en = 0;
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// disable pull-up mode
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io_conf.pull_up_en = scl_pullup_en;
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// configure GPIO with the given settings
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ESP_ERROR_CHECK(gpio_config(&io_conf));
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ESP_ERROR_CHECK(gpio_set_level(scl_io_num, 1));
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}
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return ESP_OK;
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}
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esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf)
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{
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I2C_CHECK((i2c_num >= 0) && (i2c_num < I2C_NUM_MAX), I2C_NUM_ERROR_STR, ESP_ERR_INVALID_ARG);
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I2C_CHECK(i2c_conf != NULL, I2C_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
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I2C_CHECK(i2c_conf->mode < I2C_MODE_MAX, I2C_MODE_ERR_STR, ESP_ERR_INVALID_ARG);
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esp_err_t ret = i2c_set_pin(i2c_num, i2c_conf->sda_io_num, i2c_conf->scl_io_num,
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i2c_conf->sda_pullup_en, i2c_conf->scl_pullup_en, i2c_conf->mode);
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if (ret != ESP_OK) {
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return ret;
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}
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memcpy((i2c_config_t *)(i2c_config[i2c_num]), (i2c_config_t *)i2c_conf, sizeof(i2c_config_t));
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return ESP_OK;
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}
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i2c_cmd_handle_t i2c_cmd_link_create()
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{
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i2c_cmd_desc_t *cmd_desc = (i2c_cmd_desc_t *) heap_caps_calloc(1, sizeof(i2c_cmd_desc_t), MALLOC_CAP_8BIT);
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return (i2c_cmd_handle_t) cmd_desc;
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}
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void i2c_cmd_link_delete(i2c_cmd_handle_t cmd_handle)
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{
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if (cmd_handle == NULL) {
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return;
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}
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i2c_cmd_desc_t *cmd = (i2c_cmd_desc_t *) cmd_handle;
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while (cmd->free) {
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i2c_cmd_link_t *ptmp = cmd->free;
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cmd->free = cmd->free->next;
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heap_caps_free(ptmp);
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}
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cmd->cur = NULL;
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cmd->free = NULL;
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cmd->head = NULL;
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heap_caps_free(cmd_handle);
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return;
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}
|
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static esp_err_t i2c_cmd_link_append(i2c_cmd_handle_t cmd_handle, i2c_cmd_t *cmd)
|
||||
{
|
||||
i2c_cmd_desc_t *cmd_desc = (i2c_cmd_desc_t *) cmd_handle;
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||||
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if (cmd_desc->head == NULL) {
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cmd_desc->head = (i2c_cmd_link_t *) heap_caps_calloc(1, sizeof(i2c_cmd_link_t), MALLOC_CAP_8BIT);
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||||
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||||
if (cmd_desc->head == NULL) {
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ESP_LOGE(I2C_TAG, I2C_CMD_MALLOC_ERR_STR);
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||||
goto err;
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}
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||||
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||||
cmd_desc->cur = cmd_desc->head;
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cmd_desc->free = cmd_desc->head;
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} else {
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||||
cmd_desc->cur->next = (i2c_cmd_link_t *) heap_caps_calloc(1, sizeof(i2c_cmd_link_t), MALLOC_CAP_8BIT);
|
||||
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||||
if (cmd_desc->cur->next == NULL) {
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ESP_LOGE(I2C_TAG, I2C_CMD_MALLOC_ERR_STR);
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||||
goto err;
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||||
}
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||||
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||||
cmd_desc->cur = cmd_desc->cur->next;
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||||
}
|
||||
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||||
memcpy((uint8_t *) &cmd_desc->cur->cmd, (uint8_t *) cmd, sizeof(i2c_cmd_t));
|
||||
cmd_desc->cur->next = NULL;
|
||||
return ESP_OK;
|
||||
|
||||
err:
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
esp_err_t i2c_master_start(i2c_cmd_handle_t cmd_handle)
|
||||
{
|
||||
I2C_CHECK(cmd_handle != NULL, I2C_CMD_LINK_INIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
i2c_cmd_t cmd;
|
||||
cmd.ack.en = 0;
|
||||
cmd.ack.exp = 0;
|
||||
cmd.ack.val = 0;
|
||||
cmd.byte_num = 0;
|
||||
cmd.data = NULL;
|
||||
cmd.op_code = I2C_CMD_RESTART;
|
||||
return i2c_cmd_link_append(cmd_handle, &cmd);
|
||||
}
|
||||
|
||||
esp_err_t i2c_master_stop(i2c_cmd_handle_t cmd_handle)
|
||||
{
|
||||
I2C_CHECK(cmd_handle != NULL, I2C_CMD_LINK_INIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
i2c_cmd_t cmd;
|
||||
cmd.ack.en = 0;
|
||||
cmd.ack.exp = 0;
|
||||
cmd.ack.val = 0;
|
||||
cmd.byte_num = 0;
|
||||
cmd.data = NULL;
|
||||
cmd.op_code = I2C_CMD_STOP;
|
||||
return i2c_cmd_link_append(cmd_handle, &cmd);
|
||||
}
|
||||
|
||||
esp_err_t i2c_master_write_byte(i2c_cmd_handle_t cmd_handle, uint8_t data, bool ack_en)
|
||||
{
|
||||
I2C_CHECK(cmd_handle != NULL, I2C_CMD_LINK_INIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
i2c_cmd_t cmd;
|
||||
cmd.ack.en = ack_en;
|
||||
cmd.ack.exp = 0;
|
||||
cmd.ack.val = 0;
|
||||
cmd.byte_num = 1;
|
||||
cmd.op_code = I2C_CMD_WRITE;
|
||||
cmd.data = NULL;
|
||||
cmd.byte_cmd = data;
|
||||
return i2c_cmd_link_append(cmd_handle, &cmd);
|
||||
}
|
||||
|
||||
esp_err_t i2c_master_write(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t data_len, bool ack_en)
|
||||
{
|
||||
I2C_CHECK((data != NULL), I2C_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
|
||||
I2C_CHECK(cmd_handle != NULL, I2C_CMD_LINK_INIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
|
||||
uint8_t len_tmp;
|
||||
int data_offset = 0;
|
||||
esp_err_t ret;
|
||||
|
||||
while (data_len > 0) {
|
||||
len_tmp = data_len > 0xff ? 0xff : data_len;
|
||||
data_len -= len_tmp;
|
||||
i2c_cmd_t cmd;
|
||||
cmd.ack.en = ack_en;
|
||||
cmd.ack.exp = 0;
|
||||
cmd.ack.val = 0;
|
||||
cmd.byte_num = len_tmp;
|
||||
cmd.op_code = I2C_CMD_WRITE;
|
||||
cmd.data = data + data_offset;
|
||||
ret = i2c_cmd_link_append(cmd_handle, &cmd);
|
||||
data_offset += len_tmp;
|
||||
|
||||
if (ret != ESP_OK) {
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
static esp_err_t i2c_master_read_static(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t data_len, i2c_ack_type_t ack)
|
||||
{
|
||||
int len_tmp;
|
||||
int data_offset = 0;
|
||||
esp_err_t ret;
|
||||
|
||||
while (data_len > 0) {
|
||||
len_tmp = data_len > 0xff ? 0xff : data_len;
|
||||
data_len -= len_tmp;
|
||||
i2c_cmd_t cmd;
|
||||
cmd.ack.en = 0;
|
||||
cmd.ack.exp = 0;
|
||||
cmd.ack.val = ack & 0x1;
|
||||
cmd.byte_num = len_tmp;
|
||||
cmd.op_code = I2C_CMD_READ;
|
||||
cmd.data = data + data_offset;
|
||||
ret = i2c_cmd_link_append(cmd_handle, &cmd);
|
||||
data_offset += len_tmp;
|
||||
|
||||
if (ret != ESP_OK) {
|
||||
return ret;
|
||||
}
|
||||
}
|
||||
|
||||
return ESP_OK;
|
||||
}
|
||||
|
||||
esp_err_t i2c_master_read_byte(i2c_cmd_handle_t cmd_handle, uint8_t *data, i2c_ack_type_t ack)
|
||||
{
|
||||
I2C_CHECK((data != NULL), I2C_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
|
||||
I2C_CHECK(cmd_handle != NULL, I2C_CMD_LINK_INIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
I2C_CHECK(ack < I2C_MASTER_ACK_MAX, I2C_ACK_TYPE_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
|
||||
i2c_cmd_t cmd;
|
||||
cmd.ack.en = 0;
|
||||
cmd.ack.exp = 0;
|
||||
cmd.ack.val = ((ack == I2C_MASTER_LAST_NACK) ? I2C_MASTER_NACK : (ack & 0x1));
|
||||
cmd.byte_num = 1;
|
||||
cmd.op_code = I2C_CMD_READ;
|
||||
cmd.data = data;
|
||||
return i2c_cmd_link_append(cmd_handle, &cmd);
|
||||
}
|
||||
|
||||
esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t data_len, i2c_ack_type_t ack)
|
||||
{
|
||||
I2C_CHECK((data != NULL), I2C_ADDR_ERROR_STR, ESP_ERR_INVALID_ARG);
|
||||
I2C_CHECK(cmd_handle != NULL, I2C_CMD_LINK_INIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
I2C_CHECK(ack < I2C_MASTER_ACK_MAX, I2C_ACK_TYPE_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
I2C_CHECK(data_len > 0, I2C_DATA_LEN_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
|
||||
if (ack != I2C_MASTER_LAST_NACK) {
|
||||
return i2c_master_read_static(cmd_handle, data, data_len, ack);
|
||||
} else {
|
||||
if (data_len == 1) {
|
||||
return i2c_master_read_byte(cmd_handle, data, I2C_MASTER_NACK);
|
||||
} else {
|
||||
esp_err_t ret;
|
||||
|
||||
// first read (data_len - 1) byte data with ACK,than read the end byte with NACK.
|
||||
if ((ret = i2c_master_read_static(cmd_handle, data, data_len - 1, I2C_MASTER_ACK)) != ESP_OK) {
|
||||
return ret;
|
||||
}
|
||||
|
||||
return i2c_master_read_byte(cmd_handle, data + data_len - 1, I2C_MASTER_NACK);
|
||||
}
|
||||
}
|
||||
}
|
||||
|
||||
static void i2c_master_cmd_begin_static(i2c_port_t i2c_num)
|
||||
{
|
||||
i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
|
||||
i2c_cmd_t *cmd;
|
||||
uint8_t dat;
|
||||
uint8_t len;
|
||||
int8_t i, k;
|
||||
uint8_t retVal;
|
||||
|
||||
// This should never happen
|
||||
if (p_i2c->mode != I2C_MODE_MASTER) {
|
||||
return;
|
||||
}
|
||||
|
||||
while (p_i2c->cmd_link.head) {
|
||||
cmd = &p_i2c->cmd_link.head->cmd;
|
||||
|
||||
switch (cmd->op_code) {
|
||||
case (I2C_CMD_RESTART): {
|
||||
i2c_master_set_dc(i2c_num, 1, i2c_last_state[i2c_num]->scl);
|
||||
i2c_master_set_dc(i2c_num, 1, 1);
|
||||
i2c_master_wait(1); // sda 1, scl 1
|
||||
i2c_master_set_dc(i2c_num, 0, 1);
|
||||
i2c_master_wait(1); // sda 0, scl 1
|
||||
}
|
||||
break;
|
||||
|
||||
case (I2C_CMD_WRITE): {
|
||||
p_i2c->status = I2C_STATUS_WRITE;
|
||||
|
||||
for (len = 0; len < cmd->byte_num; len++) {
|
||||
dat = 0;
|
||||
retVal = 0;
|
||||
i2c_master_set_dc(i2c_num, i2c_last_state[i2c_num]->sda, 0);
|
||||
|
||||
for (i = 7; i >= 0; i--) {
|
||||
if (cmd->byte_num == 1) {
|
||||
dat = (cmd->byte_cmd) >> i;
|
||||
} else {
|
||||
dat = ((uint8_t) * (cmd->data + len)) >> i;
|
||||
}
|
||||
|
||||
i2c_master_set_dc(i2c_num, dat, 0);
|
||||
i2c_master_wait(1);
|
||||
i2c_master_set_dc(i2c_num, dat, 1);
|
||||
i2c_master_wait(2);
|
||||
|
||||
if (i == 0) {
|
||||
i2c_master_wait(1); // wait slaver ack
|
||||
}
|
||||
|
||||
i2c_master_set_dc(i2c_num, dat, 0);
|
||||
}
|
||||
|
||||
i2c_master_set_dc(i2c_num, i2c_last_state[i2c_num]->sda, 0);
|
||||
i2c_master_set_dc(i2c_num, 1, 0);
|
||||
i2c_master_set_dc(i2c_num, 1, 1);
|
||||
i2c_master_wait(1);
|
||||
retVal = i2c_master_get_dc(i2c_num);
|
||||
i2c_master_wait(1);
|
||||
i2c_master_set_dc(i2c_num, 1, 0);
|
||||
|
||||
if (cmd->ack.en == 1) {
|
||||
if ((retVal & 0x01) != cmd->ack.exp) {
|
||||
p_i2c->status = I2C_STATUS_ACK_ERROR;
|
||||
return ;
|
||||
}
|
||||
}
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case (I2C_CMD_READ): {
|
||||
p_i2c->status = I2C_STATUS_READ;
|
||||
|
||||
for (len = 0; len < cmd->byte_num; len++) {
|
||||
retVal = 0;
|
||||
i2c_master_set_dc(i2c_num, i2c_last_state[i2c_num]->sda, 0);
|
||||
|
||||
for (i = 0; i < 8; i++) {
|
||||
i2c_master_set_dc(i2c_num, 1, 0);
|
||||
i2c_master_wait(2);
|
||||
i2c_master_set_dc(i2c_num, 1, 1);
|
||||
i2c_master_wait(1); // sda 1, scl 1
|
||||
k = i2c_master_get_dc(i2c_num);
|
||||
i2c_master_wait(1);
|
||||
|
||||
if (i == 7) {
|
||||
i2c_master_wait(1);
|
||||
}
|
||||
|
||||
k <<= (7 - i);
|
||||
retVal |= k;
|
||||
}
|
||||
|
||||
i2c_master_set_dc(i2c_num, 1, 0);
|
||||
memcpy((uint8_t *)(cmd->data + len), (uint8_t *)&retVal, 1);
|
||||
i2c_master_set_dc(i2c_num, i2c_last_state[i2c_num]->sda, 0);
|
||||
i2c_master_set_dc(i2c_num, cmd->ack.val, 0);
|
||||
i2c_master_set_dc(i2c_num, cmd->ack.val, 1);
|
||||
i2c_master_wait(4); // sda level, scl 1
|
||||
i2c_master_set_dc(i2c_num, cmd->ack.val, 0);
|
||||
i2c_master_set_dc(i2c_num, 1, 0);
|
||||
i2c_master_wait(1);
|
||||
}
|
||||
}
|
||||
break;
|
||||
|
||||
case (I2C_CMD_STOP): {
|
||||
i2c_master_wait(1);
|
||||
i2c_master_set_dc(i2c_num, 0, i2c_last_state[i2c_num]->scl);
|
||||
i2c_master_set_dc(i2c_num, 0, 1);
|
||||
i2c_master_wait(2); // sda 0, scl 1
|
||||
i2c_master_set_dc(i2c_num, 1, 1);
|
||||
i2c_master_wait(2); // sda 1, scl 1
|
||||
}
|
||||
break;
|
||||
}
|
||||
|
||||
p_i2c->cmd_link.head = p_i2c->cmd_link.head->next;
|
||||
}
|
||||
|
||||
p_i2c->status = I2C_STATUS_DONE;
|
||||
return;
|
||||
}
|
||||
|
||||
esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, TickType_t ticks_to_wait)
|
||||
{
|
||||
I2C_CHECK((i2c_num >= 0) && (i2c_num < I2C_NUM_MAX), I2C_NUM_ERROR_STR, ESP_ERR_INVALID_ARG);
|
||||
I2C_CHECK(p_i2c_obj[i2c_num] != NULL, I2C_DRIVER_NOT_INSTALL_ERR_STR, ESP_ERR_INVALID_STATE);
|
||||
I2C_CHECK(p_i2c_obj[i2c_num]->mode == I2C_MODE_MASTER, I2C_MASTER_MODE_ERR_STR, ESP_ERR_INVALID_STATE);
|
||||
I2C_CHECK(cmd_handle != NULL, I2C_CMD_LINK_INIT_ERR_STR, ESP_ERR_INVALID_ARG);
|
||||
|
||||
i2c_obj_t *p_i2c = p_i2c_obj[i2c_num];
|
||||
i2c_cmd_desc_t *cmd = (i2c_cmd_desc_t *) cmd_handle;
|
||||
p_i2c->cmd_link.free = cmd->free;
|
||||
p_i2c->cmd_link.cur = cmd->cur;
|
||||
p_i2c->cmd_link.head = cmd->head;
|
||||
p_i2c->status = I2C_STATUS_IDLE;
|
||||
ENTER_CRITICAL();
|
||||
// start send commands, at most 32 bytes one time, isr handler will process the remaining commands.
|
||||
i2c_master_cmd_begin_static(i2c_num);
|
||||
EXIT_CRITICAL();
|
||||
|
||||
// TODO: Timeout check
|
||||
if (p_i2c->status == I2C_STATUS_DONE) {
|
||||
return ESP_OK;
|
||||
} else {
|
||||
return ESP_FAIL;
|
||||
}
|
||||
|
||||
}
|
||||
268
components/esp8266/include/driver/i2c.h
Normal file
268
components/esp8266/include/driver/i2c.h
Normal file
@ -0,0 +1,268 @@
|
||||
// Copyright 2018-2025 Espressif Systems (Shanghai) PTE LTD
|
||||
//
|
||||
// Licensed under the Apache License, Version 2.0 (the "License");
|
||||
// you may not use this file except in compliance with the License.
|
||||
// You may obtain a copy of the License at
|
||||
//
|
||||
// http://www.apache.org/licenses/LICENSE-2.0
|
||||
//
|
||||
// Unless required by applicable law or agreed to in writing, software
|
||||
// distributed under the License is distributed on an "AS IS" BASIS,
|
||||
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
// See the License for the specific language governing permissions and
|
||||
// limitations under the License.
|
||||
|
||||
#pragma once
|
||||
|
||||
#include <stdint.h>
|
||||
|
||||
#include "FreeRTOS.h"
|
||||
|
||||
#include "esp_err.h"
|
||||
|
||||
#include "gpio.h"
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C" {
|
||||
#endif
|
||||
|
||||
typedef enum {
|
||||
I2C_MODE_MASTER, /*!< I2C master mode */
|
||||
I2C_MODE_MAX,
|
||||
} i2c_mode_t;
|
||||
|
||||
typedef enum {
|
||||
I2C_MASTER_WRITE = 0, /*!< I2C write data */
|
||||
I2C_MASTER_READ, /*!< I2C read data */
|
||||
} i2c_rw_t;
|
||||
|
||||
typedef enum {
|
||||
I2C_CMD_RESTART = 0, /*!< I2C restart command */
|
||||
I2C_CMD_WRITE, /*!< I2C write command */
|
||||
I2C_CMD_READ, /*!< I2C read command */
|
||||
I2C_CMD_STOP, /*!< I2C stop command */
|
||||
} i2c_opmode_t;
|
||||
|
||||
typedef enum {
|
||||
I2C_NUM_0 = 0, /*!< I2C port 0 */
|
||||
I2C_NUM_MAX
|
||||
} i2c_port_t;
|
||||
|
||||
typedef enum {
|
||||
I2C_MASTER_ACK = 0x0, /*!< I2C ack for each byte read */
|
||||
I2C_MASTER_NACK = 0x1, /*!< I2C nack for each byte read */
|
||||
I2C_MASTER_LAST_NACK = 0x2, /*!< I2C nack for the last byte*/
|
||||
I2C_MASTER_ACK_MAX,
|
||||
} i2c_ack_type_t;
|
||||
|
||||
/**
|
||||
* @brief I2C initialization parameters
|
||||
*/
|
||||
typedef struct {
|
||||
i2c_mode_t mode; /*!< I2C mode */
|
||||
gpio_num_t sda_io_num; /*!< GPIO number for I2C sda signal */
|
||||
gpio_pullup_t sda_pullup_en; /*!< Internal GPIO pull mode for I2C sda signal*/
|
||||
gpio_num_t scl_io_num; /*!< GPIO number for I2C scl signal */
|
||||
gpio_pullup_t scl_pullup_en; /*!< Internal GPIO pull mode for I2C scl signal*/
|
||||
} i2c_config_t;
|
||||
|
||||
typedef void *i2c_cmd_handle_t; /*!< I2C command handle */
|
||||
|
||||
/**
|
||||
* @brief I2C driver install
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param mode I2C mode( master or slave )
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Driver install error
|
||||
*/
|
||||
esp_err_t i2c_driver_install(i2c_port_t i2c_num, i2c_mode_t mode);
|
||||
|
||||
/**
|
||||
* @brief I2C driver delete
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_driver_delete(i2c_port_t i2c_num);
|
||||
|
||||
/**
|
||||
* @brief I2C parameter initialization
|
||||
*
|
||||
* @note It must be used after calling i2c_driver_install
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param i2c_conf pointer to I2C parameter settings
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_param_config(i2c_port_t i2c_num, const i2c_config_t *i2c_conf);
|
||||
|
||||
/**
|
||||
* @brief Configure GPIO signal for I2C sck and sda
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param sda_io_num GPIO number for I2C sda signal
|
||||
* @param scl_io_num GPIO number for I2C scl signal
|
||||
* @param sda_pullup_en Whether to enable the internal pullup for sda pin
|
||||
* @param scl_pullup_en Whether to enable the internal pullup for scl pin
|
||||
* @param mode I2C mode
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_set_pin(i2c_port_t i2c_num, int sda_io_num, int scl_io_num,
|
||||
gpio_pullup_t sda_pullup_en, gpio_pullup_t scl_pullup_en, i2c_mode_t mode);
|
||||
|
||||
/**
|
||||
* @brief Create and init I2C command link
|
||||
* @note
|
||||
* Before we build I2C command link, we need to call i2c_cmd_link_create() to create
|
||||
* a command link.
|
||||
* After we finish sending the commands, we need to call i2c_cmd_link_delete() to
|
||||
* release and return the resources.
|
||||
*
|
||||
* @return i2c command link handler
|
||||
*/
|
||||
i2c_cmd_handle_t i2c_cmd_link_create();
|
||||
|
||||
/**
|
||||
* @brief Free I2C command link
|
||||
* @note
|
||||
* Before we build I2C command link, we need to call i2c_cmd_link_create() to create
|
||||
* a command link.
|
||||
* After we finish sending the commands, we need to call i2c_cmd_link_delete() to
|
||||
* release and return the resources.
|
||||
*
|
||||
* @param cmd_handle I2C command handle
|
||||
*/
|
||||
void i2c_cmd_link_delete(i2c_cmd_handle_t cmd_handle);
|
||||
|
||||
/**
|
||||
* @brief Queue command for I2C master to generate a start signal
|
||||
* @note
|
||||
* Only call this function in I2C master mode
|
||||
* Call i2c_master_cmd_begin() to send all queued commands
|
||||
*
|
||||
* @param cmd_handle I2C cmd link
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_master_start(i2c_cmd_handle_t cmd_handle);
|
||||
|
||||
/**
|
||||
* @brief Queue command for I2C master to write one byte to I2C bus
|
||||
* @note
|
||||
* Only call this function in I2C master mode
|
||||
* Call i2c_master_cmd_begin() to send all queued commands
|
||||
*
|
||||
* @param cmd_handle I2C cmd link
|
||||
* @param data I2C one byte command to write to bus
|
||||
* @param ack_en enable ack check for master
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_master_write_byte(i2c_cmd_handle_t cmd_handle, uint8_t data, bool ack_en);
|
||||
|
||||
/**
|
||||
* @brief Queue command for I2C master to write buffer to I2C bus
|
||||
* @note
|
||||
* Only call this function in I2C master mode
|
||||
* Call i2c_master_cmd_begin() to send all queued commands
|
||||
*
|
||||
* @param cmd_handle I2C cmd link
|
||||
* @param data data to send
|
||||
* @param data_len data length
|
||||
* @param ack_en enable ack check for master
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_master_write(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t data_len, bool ack_en);
|
||||
|
||||
/**
|
||||
* @brief Queue command for I2C master to read one byte from I2C bus
|
||||
* @note
|
||||
* Only call this function in I2C master mode
|
||||
* Call i2c_master_cmd_begin() to send all queued commands
|
||||
*
|
||||
* @param cmd_handle I2C cmd link
|
||||
* @param data pointer accept the data byte
|
||||
* @param ack ack value for read command
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_master_read_byte(i2c_cmd_handle_t cmd_handle, uint8_t *data, i2c_ack_type_t ack);
|
||||
|
||||
/**
|
||||
* @brief Queue command for I2C master to read data from I2C bus
|
||||
* @note
|
||||
* Only call this function in I2C master mode
|
||||
* Call i2c_master_cmd_begin() to send all queued commands
|
||||
*
|
||||
* @param cmd_handle I2C cmd link
|
||||
* @param data data buffer to accept the data from bus
|
||||
* @param data_len read data length
|
||||
* @param ack ack value for read command
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_master_read(i2c_cmd_handle_t cmd_handle, uint8_t *data, size_t data_len, i2c_ack_type_t ack);
|
||||
|
||||
/**
|
||||
* @brief Queue command for I2C master to generate a stop signal
|
||||
* @note
|
||||
* Only call this function in I2C master mode
|
||||
* Call i2c_master_cmd_begin() to send all queued commands
|
||||
*
|
||||
* @param cmd_handle I2C cmd link
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
*/
|
||||
esp_err_t i2c_master_stop(i2c_cmd_handle_t cmd_handle);
|
||||
|
||||
/**
|
||||
* @brief I2C master send queued commands.
|
||||
* This function will trigger sending all queued commands.
|
||||
* The task will be blocked until all the commands have been sent out.
|
||||
* The I2C APIs are not thread-safe, if you want to use one I2C port in different tasks,
|
||||
* you need to take care of the multi-thread issue.
|
||||
* @note
|
||||
* Only call this function in I2C master mode
|
||||
*
|
||||
* @param i2c_num I2C port number
|
||||
* @param cmd_handle I2C command handler
|
||||
* @param ticks_to_wait maximum wait ticks.
|
||||
*
|
||||
* @return
|
||||
* - ESP_OK Success
|
||||
* - ESP_ERR_INVALID_ARG Parameter error
|
||||
* - ESP_FAIL Sending command error, slave doesn't ACK the transfer.
|
||||
* - ESP_ERR_INVALID_STATE I2C driver not installed or not in master mode.
|
||||
* - ESP_ERR_TIMEOUT Operation timeout because the bus is busy.
|
||||
*/
|
||||
esp_err_t i2c_master_cmd_begin(i2c_port_t i2c_num, i2c_cmd_handle_t cmd_handle, TickType_t ticks_to_wait);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
Reference in New Issue
Block a user