feat(esp8266): Add configuration link function

Select to link "FreeRTOS", "LWIP", "libcore.a" and "TCPIP adapter" global data to IRAM.
This commit is contained in:
Dong Heng
2018-09-12 13:15:47 +08:00
parent 4229f4def9
commit c389ca3fb8
7 changed files with 67 additions and 5 deletions

View File

@ -1,6 +1,8 @@
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
#include "sdkconfig.h"
PHDRS
{
dport0_0_phdr PT_LOAD;
@ -108,6 +110,25 @@ SECTIONS
*(.fini.literal)
*(.fini)
*(.gnu.version)
#ifdef CONFIG_LWIP_GLOBAL_DATA_LINK_IRAM
*liblwip.a:(.bss .data .bss.* .data.* COMMON)
#endif
#ifdef CONFIG_TCPIP_ADAPTER_GLOBAL_DATA_LINK_IRAM
*libtcpip_adapter.a:(.bss .data .bss.* .data.* COMMON)
#endif
#ifdef CONFIG_ESP8266_CORE_GLOBAL_DATA_LINK_IRAM
*libcore.a:(.bss .data .bss.* .data.* COMMON)
#endif
#ifdef CONFIG_FREERTOS_GLOBAL_DATA_LINK_IRAM
*libfreertos.a:tasks.o(.bss .data .bss.* .data.* COMMON)
*libfreertos.a:timers.o(.bss .data .bss.* .data.* COMMON)
*libfreertos.a:freertos_hooks.o(.bss .data .bss.* .data.* COMMON)
#endif
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr

View File

@ -20,11 +20,11 @@ MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
/* All .data/.bss/heap are in this segment. 1024 bytes is for system start and interrupt*/
dram0_0_seg : org = 0x3FFE8000, len = 0x18000 - 1024
/* All .data/.bss/heap are in this segment. */
dram0_0_seg : org = 0x3FFE8000, len = 0x18000
/* Functions which are critical should be put in this segment. */
iram1_0_seg : org = 0x40100000, len = 0x8000
iram1_0_seg : org = 0x40100000, len = CONFIG_SOC_IRAM_SIZE
/* It is actually mapped to flash. */
irom0_0_seg : org = 0x40200010 + CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET, len = 0x100000 - 0x10 - CONFIG_PARTITION_TABLE_CUSTOM_APP_BIN_OFFSET