mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
synced 2025-05-22 01:27:11 +08:00
Revert "Merge branch 'feature/add_global_isr_switch' into 'master'"
This reverts merge request !914
This commit is contained in:
@ -123,8 +123,6 @@
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#define TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
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#define TM1_EDGE_INT_DISABLE() CLEAR_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)
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//}}
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//}}
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#define INT_ENA_WDEV 0x3ff20c18
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#define WDEV_TSF0_REACH_INT (BIT(27))
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//Watch dog reg {{
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//Watch dog reg {{
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#define PERIPHS_WDT_BASEADDR 0x60000900
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#define PERIPHS_WDT_BASEADDR 0x60000900
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@ -53,9 +53,39 @@ typedef enum {
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CANCEL,
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CANCEL,
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} STATUS;
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} STATUS;
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void vPortETSIntrLock(void);
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extern char NMIIrqIsOn;
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extern uint32_t WDEV_INTEREST_EVENT;
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void vPortETSIntrUnlock(void);
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#define INT_ENA_WDEV 0x3ff20c18
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#define WDEV_TSF0_REACH_INT (BIT(27))
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#define ETS_NMI_LOCK() \
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do { \
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do { \
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REG_WRITE(INT_ENA_WDEV, WDEV_TSF0_REACH_INT); \
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} while(REG_READ(INT_ENA_WDEV) != WDEV_TSF0_REACH_INT); \
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} while (0)
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#define ETS_NMI_UNLOCK() \
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do { \
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REG_WRITE(INT_ENA_WDEV, WDEV_INTEREST_EVENT); \
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} while (0)
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#define ETS_INTR_LOCK() do { \
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if (NMIIrqIsOn == 0) { \
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vPortEnterCritical(); \
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do { \
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REG_WRITE(INT_ENA_WDEV, WDEV_TSF0_REACH_INT); \
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} while(REG_READ(INT_ENA_WDEV) != WDEV_TSF0_REACH_INT); \
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} \
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} while(0)
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#define ETS_INTR_UNLOCK() do { \
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if (NMIIrqIsOn == 0) { \
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REG_WRITE(INT_ENA_WDEV, WDEV_INTEREST_EVENT); \
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vPortExitCritical(); \
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} \
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} while(0)
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#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
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#define MAC2STR(a) (a)[0], (a)[1], (a)[2], (a)[3], (a)[4], (a)[5]
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#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
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#define MACSTR "%02x:%02x:%02x:%02x:%02x:%02x"
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@ -1,7 +1,7 @@
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gwen:
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gwen:
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core: 381d974
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core: 33a48e5
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net80211: 381d974
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net80211: 71f5b94
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pp: 381d974
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pp: c32a629
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wpa: 33a48e5
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wpa: 33a48e5
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espnow: da96924
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espnow: da96924
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wps: da96924
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wps: da96924
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@ -50,7 +50,7 @@
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#define SET_STKREG(r,v) sp[(r) >> 2] = (uint32_t)(v)
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#define SET_STKREG(r,v) sp[(r) >> 2] = (uint32_t)(v)
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#define PORT_ASSERT(x) do { if (!(x)) {ets_printf("%s %u\n", "rtos_port", __LINE__); while(1){}; }} while (0)
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#define PORT_ASSERT(x) do { if (!(x)) {ets_printf("%s %u\n", "rtos_port", __LINE__); while(1){}; }} while (0)
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extern uint8_t NMIIrqIsOn;
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extern char NMIIrqIsOn;
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static int SWReq = 0;
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static int SWReq = 0;
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uint32_t cpu_sr;
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uint32_t cpu_sr;
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@ -250,22 +250,12 @@ void show_critical_info(void)
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void IRAM_ATTR vPortETSIntrLock(void)
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void IRAM_ATTR vPortETSIntrLock(void)
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{
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{
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if (NMIIrqIsOn == 0) {
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ETS_INTR_LOCK();
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vPortEnterCritical();
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do {
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REG_WRITE(INT_ENA_WDEV, WDEV_TSF0_REACH_INT);
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} while(REG_READ(INT_ENA_WDEV) != WDEV_TSF0_REACH_INT);
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}
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}
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}
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void IRAM_ATTR vPortETSIntrUnlock(void)
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void IRAM_ATTR vPortETSIntrUnlock(void)
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{
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{
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if (NMIIrqIsOn == 0) {
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ETS_INTR_UNLOCK();
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extern uint32_t WDEV_INTEREST_EVENT;
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REG_WRITE(INT_ENA_WDEV, WDEV_INTEREST_EVENT);
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vPortExitCritical();
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}
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}
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}
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/*
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/*
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