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fix(xtensa): Fix NMI reenter when multi enable MAC interrupt

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This commit is contained in:
Dong Heng
2020-07-08 14:38:15 +08:00
parent c8109d3e1f
commit a3be9fd9aa
2 changed files with 13 additions and 0 deletions
components
esp8266/include/esp8266
eagle_soc.h
freertos/port/esp8266
port.c

1
components/esp8266/include/esp8266/eagle_soc.h

@ -131,6 +131,7 @@
//}} //}}
//Interrupt remap control registers define{{ //Interrupt remap control registers define{{
#define NMI_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR)
#define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR + 0x04) #define EDGE_INT_ENABLE_REG (PERIPHS_DPORT_BASEADDR + 0x04)
#define WDT_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT0) #define WDT_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT0)
#define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1) #define TM1_EDGE_INT_ENABLE() SET_PERI_REG_MASK(EDGE_INT_ENABLE_REG, BIT1)

12
components/freertos/port/esp8266/port.c

@ -285,24 +285,36 @@ void esp_dport_close_nmi(void)
void IRAM_ATTR vPortETSIntrLock(void) void IRAM_ATTR vPortETSIntrLock(void)
{ {
if (NMIIrqIsOn == 0) { if (NMIIrqIsOn == 0) {
uint32_t regval = REG_READ(NMI_INT_ENABLE_REG);
REG_WRITE(NMI_INT_ENABLE_REG, 0);
vPortEnterCritical(); vPortEnterCritical();
if (!ESP_NMI_IS_CLOSED()) { if (!ESP_NMI_IS_CLOSED()) {
do { do {
REG_WRITE(INT_ENA_WDEV, WDEV_TSF0_REACH_INT); REG_WRITE(INT_ENA_WDEV, WDEV_TSF0_REACH_INT);
} while(REG_READ(INT_ENA_WDEV) != WDEV_TSF0_REACH_INT); } while(REG_READ(INT_ENA_WDEV) != WDEV_TSF0_REACH_INT);
} }
REG_WRITE(NMI_INT_ENABLE_REG, regval);
} }
} }
void IRAM_ATTR vPortETSIntrUnlock(void) void IRAM_ATTR vPortETSIntrUnlock(void)
{ {
if (NMIIrqIsOn == 0) { if (NMIIrqIsOn == 0) {
uint32_t regval = REG_READ(NMI_INT_ENABLE_REG);
REG_WRITE(NMI_INT_ENABLE_REG, 0);
if (!ESP_NMI_IS_CLOSED()) { if (!ESP_NMI_IS_CLOSED()) {
extern uint32_t WDEV_INTEREST_EVENT; extern uint32_t WDEV_INTEREST_EVENT;
REG_WRITE(INT_ENA_WDEV, WDEV_INTEREST_EVENT); REG_WRITE(INT_ENA_WDEV, WDEV_INTEREST_EVENT);
} }
vPortExitCritical(); vPortExitCritical();
REG_WRITE(NMI_INT_ENABLE_REG, regval);
} }
} }