diff --git a/components/esp8266/driver/gpio.c b/components/esp8266/driver/gpio.c index e5c0abbf..c2eeeb88 100644 --- a/components/esp8266/driver/gpio.c +++ b/components/esp8266/driver/gpio.c @@ -17,7 +17,7 @@ #include "gpio.h" -void gpio_config(GPIO_ConfigTypeDef *pGPIOConfig) +void gpio_config(GPIO_ConfigTypeDef* pGPIOConfig) { uint16 gpio_pin_mask = pGPIOConfig->GPIO_Pin; uint32 io_reg; @@ -111,7 +111,7 @@ uint32 gpio_input_get(void) * application-specific handler may wish to use gpio_intr_pending * to check for any additional pending interrupts before it returns. */ -void gpio_intr_handler_register(void *fn, void *arg) +void gpio_intr_handler_register(void* fn, void* arg) { _xt_isr_attach(ETS_GPIO_INUM, fn, arg); } diff --git a/components/esp8266/driver/hw_timer.c b/components/esp8266/driver/hw_timer.c index e3e6bef2..d881178a 100644 --- a/components/esp8266/driver/hw_timer.c +++ b/components/esp8266/driver/hw_timer.c @@ -20,7 +20,7 @@ (((t) > 0x35A) ? \ (((t) >> 2) * ((APB_CLK_FREQ >> 4) / 250000) + ((t)&0x3) * ((APB_CLK_FREQ >> 4) / 1000000)) : \ (((t) *(APB_CLK_FREQ>>4)) / 1000000)) : \ - 0) + 0) #define FRC1_ENABLE_TIMER BIT7 #define FRC1_AUTO_LOAD BIT6 @@ -42,9 +42,9 @@ static void (* user_hw_timer_cb)(void) = NULL; bool frc1_auto_load = false; -static void hw_timer_isr_cb(void *arg) +static void hw_timer_isr_cb(void* arg) { - if(frc1_auto_load == false ) { + if (frc1_auto_load == false) { RTC_REG_WRITE(FRC1_CTRL_ADDRESS, DIVDED_BY_16 | TM_EDGE_INT); } @@ -56,12 +56,13 @@ static void hw_timer_isr_cb(void *arg) void hw_timer_disarm(void) { - RTC_REG_WRITE(FRC1_CTRL_ADDRESS,0); + RTC_REG_WRITE(FRC1_CTRL_ADDRESS, 0); } -void hw_timer_arm(uint32 val ,bool req) +void hw_timer_arm(uint32 val, bool req) { frc1_auto_load = req; + if (frc1_auto_load == true) { RTC_REG_WRITE(FRC1_CTRL_ADDRESS, FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); @@ -81,6 +82,7 @@ void hw_timer_set_func(void (* user_hw_timer_cb_set)(void)) void hw_timer_init(void) { #if 0 + if (req == 1) { RTC_REG_WRITE(FRC1_CTRL_ADDRESS, FRC1_AUTO_LOAD | DIVDED_BY_16 | FRC1_ENABLE_TIMER | TM_EDGE_INT); @@ -123,7 +125,7 @@ void hw_test_timer_cb(void) void user_init(void) { hw_timer_init(); - hw_timer_set_func(hw_test_timer_cb,1); + hw_timer_set_func(hw_test_timer_cb, 1); hw_timer_arm(100); } #endif diff --git a/components/esp8266/driver/i2c_master.c b/components/esp8266/driver/i2c_master.c index 68c40d3d..8db8e693 100644 --- a/components/esp8266/driver/i2c_master.c +++ b/components/esp8266/driver/i2c_master.c @@ -34,11 +34,12 @@ LOCAL uint8 m_nLastSCL; LOCAL void ICACHE_FLASH_ATTR i2c_master_setDC(uint8 SDA, uint8 SCL) { - SDA &= 0x01; - SCL &= 0x01; + SDA &= 0x01; + SCL &= 0x01; m_nLastSDA = SDA; m_nLastSCL = SCL; ETS_INTR_LOCK(); + if ((0 == SDA) && (0 == SCL)) { I2C_MASTER_SDA_LOW_SCL_LOW(); } else if ((0 == SDA) && (1 == SCL)) { @@ -48,6 +49,7 @@ i2c_master_setDC(uint8 SDA, uint8 SCL) } else { I2C_MASTER_SDA_HIGH_SCL_HIGH(); } + ETS_INTR_UNLOCK(); } @@ -91,9 +93,9 @@ i2c_master_init(void) // set data_cnt to max value for (i = 0; i < 28; i++) { i2c_master_setDC(1, 0); - i2c_master_wait(5); // sda 1, scl 0 + i2c_master_wait(5); // sda 1, scl 0 i2c_master_setDC(1, 1); - i2c_master_wait(5); // sda 1, scl 1 + i2c_master_wait(5); // sda 1, scl 1 } // reset all @@ -142,9 +144,9 @@ i2c_master_start(void) i2c_master_setDC(1, m_nLastSCL); i2c_master_wait(5); i2c_master_setDC(1, 1); - i2c_master_wait(5); // sda 1, scl 1 + i2c_master_wait(5); // sda 1, scl 1 i2c_master_setDC(0, 1); - i2c_master_wait(5); // sda 0, scl 1 + i2c_master_wait(5); // sda 0, scl 1 } /****************************************************************************** @@ -159,11 +161,11 @@ i2c_master_stop(void) i2c_master_wait(5); i2c_master_setDC(0, m_nLastSCL); - i2c_master_wait(5); // sda 0 + i2c_master_wait(5); // sda 0 i2c_master_setDC(0, 1); - i2c_master_wait(5); // sda 0, scl 1 + i2c_master_wait(5); // sda 0, scl 1 i2c_master_setDC(1, 1); - i2c_master_wait(5); // sda 1, scl 1 + i2c_master_wait(5); // sda 1, scl 1 } /****************************************************************************** @@ -178,11 +180,11 @@ i2c_master_setAck(uint8 level) i2c_master_setDC(m_nLastSDA, 0); i2c_master_wait(5); i2c_master_setDC(level, 0); - i2c_master_wait(5); // sda level, scl 0 + i2c_master_wait(5); // sda level, scl 0 i2c_master_setDC(level, 1); - i2c_master_wait(8); // sda level, scl 1 + i2c_master_wait(8); // sda level, scl 1 i2c_master_setDC(level, 0); - i2c_master_wait(5); // sda level, scl 0 + i2c_master_wait(5); // sda level, scl 0 i2c_master_setDC(1, 0); i2c_master_wait(5); } @@ -221,9 +223,9 @@ i2c_master_getAck(void) bool ICACHE_FLASH_ATTR i2c_master_checkAck(void) { - if(i2c_master_getAck()){ + if (i2c_master_getAck()) { return FALSE; - }else{ + } else { return TRUE; } } @@ -239,6 +241,7 @@ i2c_master_send_ack(void) { i2c_master_setAck(0x0); } + /****************************************************************************** * FunctionName : i2c_master_send_nack * Description : response nack @@ -265,14 +268,14 @@ i2c_master_readByte(void) i2c_master_wait(5); i2c_master_setDC(m_nLastSDA, 0); - i2c_master_wait(5); // sda 1, scl 0 + i2c_master_wait(5); // sda 1, scl 0 for (i = 0; i < 8; i++) { i2c_master_wait(5); i2c_master_setDC(1, 0); - i2c_master_wait(5); // sda 1, scl 0 + i2c_master_wait(5); // sda 1, scl 0 i2c_master_setDC(1, 1); - i2c_master_wait(5); // sda 1, scl 1 + i2c_master_wait(5); // sda 1, scl 1 k = i2c_master_getDC(); i2c_master_wait(5); @@ -286,7 +289,7 @@ i2c_master_readByte(void) } i2c_master_setDC(1, 0); - i2c_master_wait(5); // sda 1, scl 0 + i2c_master_wait(5); // sda 1, scl 0 return retVal; } diff --git a/components/esp8266/driver/spi_interface.c b/components/esp8266/driver/spi_interface.c index 867c9cb6..29eb9536 100644 --- a/components/esp8266/driver/spi_interface.c +++ b/components/esp8266/driver/spi_interface.c @@ -36,7 +36,7 @@ extern "C" // Show the spi registers. #define SHOWDEBUG -void __ShowRegValue(const char * func, uint32_t line) +void __ShowRegValue(const char* func, uint32_t line) { #ifndef SHOWDEBUG int i; @@ -61,6 +61,7 @@ void __ShowRegValue(const char * func, uint32_t line) printf(" ADDR[0x%08x],Value[0x%08x]\r\n", regAddr, READ_PERI_REG(regAddr)); regAddr += 4; } + #endif } @@ -74,29 +75,33 @@ void __ShowRegValue(const char * func, uint32_t line) void ICACHE_FLASH_ATTR SPIInit(SpiNum spiNum, SpiAttr* pAttr) { if ((spiNum > SpiNum_HSPI) - || (NULL == pAttr)) { + || (NULL == pAttr)) { return; } + // SPI_CPOL & SPI_CPHA switch (pAttr->subMode) { - case SpiSubMode_1: - CLEAR_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); // CHPA_FALLING_EDGE_SAMPLE - break; - case SpiSubMode_2: - SET_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); // CHPA_FALLING_EDGE_SAMPLE - break; - case SpiSubMode_3: - SET_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); - break; - case SpiSubMode_0: - default: - CLEAR_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); - // To do nothing - break; + case SpiSubMode_1: + CLEAR_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); // CHPA_FALLING_EDGE_SAMPLE + break; + + case SpiSubMode_2: + SET_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); // CHPA_FALLING_EDGE_SAMPLE + break; + + case SpiSubMode_3: + SET_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); + break; + + case SpiSubMode_0: + default: + CLEAR_PERI_REG_MASK(SPI_PIN(spiNum), SPI_IDLE_EDGE); + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_CK_OUT_EDGE); + // To do nothing + break; } // SPI bit order @@ -119,10 +124,12 @@ void ICACHE_FLASH_ATTR SPIInit(SpiNum spiNum, SpiAttr* pAttr) // SPI mode type CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), SPI_SLAVE_MODE); // SPI Send buffer - CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO_HIGHPART );// By default slave send buffer C0-C7 + CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO_HIGHPART); // By default slave send buffer C0-C7 + // SPI Speed if (1 < (pAttr->speed)) { CLEAR_PERI_REG_MASK(SPI_CLOCK(spiNum), SPI_CLK_EQU_SYSCLK); + if (spiNum == SpiNum_HSPI) { CLEAR_PERI_REG_MASK(PERIPHS_IO_MUX_CONF_U, SPI1_CLK_EQU_SYS_CLK); } @@ -134,8 +141,9 @@ void ICACHE_FLASH_ATTR SPIInit(SpiNum spiNum, SpiAttr* pAttr) } else { WRITE_PERI_REG(SPI_CLOCK(spiNum), SPI_CLK_EQU_SYSCLK); // 80Mhz speed } + // By default format:CMD+ADDR+DATA - SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CS_SETUP | SPI_CS_HOLD | SPI_USR_MOSI ); + SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_CS_SETUP | SPI_CS_HOLD | SPI_USR_MOSI); //delay num SET_PERI_REG_MASK(SPI_CTRL2(spiNum), ((0x1 & SPI_MISO_DELAY_NUM) << SPI_MISO_DELAY_NUM_S)); @@ -186,6 +194,7 @@ void ICACHE_FLASH_ATTR SPIMasterCfgAddr(SpiNum spiNum, uint32_t addr) if (spiNum > SpiNum_HSPI) { return; } + // Set address WRITE_PERI_REG(SPI_ADDR(spiNum), addr); } @@ -199,6 +208,7 @@ void ICACHE_FLASH_ATTR SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd) if (spiNum > SpiNum_HSPI) { return; } + // SPI_USER2 bit28-31 is cmd length,cmd bit length is value(0-15)+1, // bit15-0 is cmd value. SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_VALUE, cmd, SPI_USR_COMMAND_VALUE_S); @@ -211,13 +221,17 @@ void ICACHE_FLASH_ATTR SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd) int ICACHE_FLASH_ATTR SPIMasterSendData(SpiNum spiNum, SpiData* pInData) { char idx = 0; + if ((spiNum > SpiNum_HSPI) - || (NULL == pInData) - || (64 < pInData->dataLen)) { + || (NULL == pInData) + || (64 < pInData->dataLen)) { return -1; } - uint32_t *value = pInData->data; + + uint32_t* value = pInData->data; + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + // Set command by user. if (pInData->cmdLen != 0) { // Max command length 16 bits. @@ -232,6 +246,7 @@ int ICACHE_FLASH_ATTR SPIMasterSendData(SpiNum spiNum, SpiData* pInData) SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, 0, SPI_USR_COMMAND_BITLEN_S); } + // Set Address by user. if (pInData->addrLen == 0) { CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); @@ -241,6 +256,7 @@ int ICACHE_FLASH_ATTR SPIMasterSendData(SpiNum spiNum, SpiData* pInData) if (NULL == pInData->addr) { return -1; } + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, ((pInData->addrLen << 3) - 1), SPI_USR_ADDR_BITLEN_S); // Enable address @@ -248,18 +264,22 @@ int ICACHE_FLASH_ATTR SPIMasterSendData(SpiNum spiNum, SpiData* pInData) // Load address SPIMasterCfgAddr(spiNum, *pInData->addr); } + // Set data by user. if (pInData->dataLen != 0) { if (NULL == value) { return -1; } + // Enable MOSI SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); + // Load send buffer do { WRITE_PERI_REG((SPI_W0(spiNum) + (idx << 2)), *value++); } while (++idx < (pInData->dataLen / 4)); + // Set data send buffer length.Max data length 64 bytes. SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, ((pInData->dataLen << 3) - 1), SPI_USR_MOSI_BITLEN_S); } else { @@ -268,6 +288,7 @@ int ICACHE_FLASH_ATTR SPIMasterSendData(SpiNum spiNum, SpiData* pInData) SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_MOSI_BITLEN, 0, SPI_USR_MOSI_BITLEN_S); } + // Start send data SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); @@ -282,13 +303,16 @@ int ICACHE_FLASH_ATTR SPIMasterSendData(SpiNum spiNum, SpiData* pInData) int ICACHE_FLASH_ATTR SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData) { char idx = 0; + if ((spiNum > SpiNum_HSPI) - || (NULL == pOutData)) { + || (NULL == pOutData)) { return -1; } - uint32_t *value = pOutData->data; + uint32_t* value = pOutData->data; + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + // Set command by user. if (pOutData->cmdLen != 0) { // Max command length 16 bits. @@ -303,6 +327,7 @@ int ICACHE_FLASH_ATTR SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData) SET_PERI_REG_BITS(SPI_USER2(spiNum), SPI_USR_COMMAND_BITLEN, 0, SPI_USR_COMMAND_BITLEN_S); } + // Set Address by user. if (pOutData->addrLen == 0) { CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_ADDR); @@ -312,6 +337,7 @@ int ICACHE_FLASH_ATTR SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData) if (NULL == pOutData->addr) { return -1; } + SET_PERI_REG_BITS(SPI_USER1(spiNum), SPI_USR_ADDR_BITLEN, ((pOutData->addrLen << 3) - 1), SPI_USR_ADDR_BITLEN_S); // Enable address @@ -319,11 +345,13 @@ int ICACHE_FLASH_ATTR SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData) // Load address SPIMasterCfgAddr(spiNum, *pOutData->addr); } + // Set data by user. if (pOutData->dataLen != 0) { if (NULL == value) { return -1; } + // Clear MOSI enable CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); // Enable MOSI @@ -339,13 +367,16 @@ int ICACHE_FLASH_ATTR SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData) //CLEAR FIFO DATA int fifo_idx = 0; + do { WRITE_PERI_REG(SPI_W0(spiNum) + (fifo_idx << 2), 0); } while (++fifo_idx < (pOutData->dataLen / 4)); // Start send data SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + // Read data out do { *pOutData->data++ = READ_PERI_REG(SPI_W0(spiNum) + (idx << 2)); @@ -359,15 +390,18 @@ int ICACHE_FLASH_ATTR SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData) * @brief Load data to send buffer by slave mode. * */ -int ICACHE_FLASH_ATTR SPISlaveSendData(SpiNum spiNum, uint32_t *pInData, uint8_t outLen) +int ICACHE_FLASH_ATTR SPISlaveSendData(SpiNum spiNum, uint32_t* pInData, uint8_t outLen) { if (NULL == pInData) { return -1; } + char i; + for (i = 0; i < outLen; ++i) { WRITE_PERI_REG((SPI_W8(spiNum) + (i << 2)), *pInData++); } + return 0; } @@ -388,8 +422,8 @@ int ICACHE_FLASH_ATTR SPISlaveRecvData(SpiNum spiNum, void(*isrFunc)(void*)) // Maybe enable slave transmission liston SET_PERI_REG_MASK(SPI_CMD(spiNum), SPI_USR); // - _xt_isr_attach(ETS_SPI_INUM, isrFunc, NULL); - // ETS_SPI_INTR_ATTACH(isrFunc, NULL); + _xt_isr_attach(ETS_SPI_INUM, isrFunc, NULL); + // ETS_SPI_INTR_ATTACH(isrFunc, NULL); // Enable isr ETS_SPI_INTR_ENABLE(); @@ -408,7 +442,9 @@ void ICACHE_FLASH_ATTR SPIMasterSendStatus(SpiNum spiNum, uint8_t data) if (spiNum > SpiNum_HSPI) { return; } + while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + // Enable MOSI SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI); CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO | SPI_USR_DUMMY | SPI_USR_ADDR); @@ -439,6 +475,7 @@ int ICACHE_FLASH_ATTR SPIMasterRecvStatus(SpiNum spiNum) } while (READ_PERI_REG(SPI_CMD(spiNum))&SPI_USR); + // Enable MISO SET_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MISO); CLEAR_PERI_REG_MASK(SPI_USER(spiNum), SPI_USR_MOSI | SPI_USR_DUMMY | SPI_USR_ADDR); @@ -471,6 +508,7 @@ void ICACHE_FLASH_ATTR SPICsPinSelect(SpiNum spiNum, SpiPinCS pinCs) if (spiNum > SpiNum_HSPI) { return; } + // clear select SET_PERI_REG_BITS(SPI_PIN(spiNum), 3, 0, 0); SET_PERI_REG_MASK(SPI_PIN(spiNum), pinCs); @@ -485,6 +523,7 @@ void ICACHE_FLASH_ATTR SPIIntEnable(SpiNum spiNum, SpiIntSrc intSrc) if (spiNum > SpiNum_HSPI) { return; } + SET_PERI_REG_MASK(SPI_SLAVE(spiNum), intSrc); } @@ -497,6 +536,7 @@ void ICACHE_FLASH_ATTR SPIIntDisable(SpiNum spiNum, SpiIntSrc intSrc) if (spiNum > SpiNum_HSPI) { return; } + CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), intSrc); } @@ -509,6 +549,7 @@ void ICACHE_FLASH_ATTR SPIIntClear(SpiNum spiNum) if (spiNum > SpiNum_HSPI) { return; } + CLEAR_PERI_REG_MASK(SPI_SLAVE(spiNum), SpiIntSrc_TransDoneEn | SpiIntSrc_WrStaDoneEn | SpiIntSrc_RdStaDoneEn diff --git a/components/esp8266/driver/uart.c b/components/esp8266/driver/uart.c index 32e17302..40fc8017 100644 --- a/components/esp8266/driver/uart.c +++ b/components/esp8266/driver/uart.c @@ -34,8 +34,7 @@ typedef struct _os_event_ { xTaskHandle xUartTaskHandle; xQueueHandle xQueueUart; -LOCAL STATUS -uart_tx_one_char(uint8 uart, uint8 TxChar) +LOCAL STATUS uart_tx_one_char(uint8 uart, uint8 TxChar) { while (true) { uint32 fifo_cnt = READ_PERI_REG(UART_STATUS(uart)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S); @@ -45,12 +44,11 @@ uart_tx_one_char(uint8 uart, uint8 TxChar) } } - WRITE_PERI_REG(UART_FIFO(uart) , TxChar); + WRITE_PERI_REG(UART_FIFO(uart), TxChar); return OK; } -LOCAL void -uart1_write_char(char c) +LOCAL void uart1_write_char(char c) { if (c == '\n') { uart_tx_one_char(UART1, '\r'); @@ -61,8 +59,7 @@ uart1_write_char(char c) } } -LOCAL void -uart0_write_char(char c) +LOCAL void uart0_write_char(char c) { if (c == '\n') { uart_tx_one_char(UART0, '\r'); @@ -74,8 +71,7 @@ uart0_write_char(char c) } #if 0 -LOCAL void -uart_rx_intr_handler_ssc(void *arg) +LOCAL void uart_rx_intr_handler_ssc(void *arg) { /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents * uart1 and uart0 respectively @@ -97,12 +93,11 @@ uart_rx_intr_handler_ssc(void *arg) e.event = UART_EVENT_RX_CHAR; e.param = RcvChar; - xQueueSendFromISR(xQueueUart, (void *)&e, &xHigherPriorityTaskWoken); + xQueueSendFromISR(xQueueUart, (void*)&e, &xHigherPriorityTaskWoken); portEND_SWITCHING_ISR(xHigherPriorityTaskWoken); } -LOCAL void -uart_config(uint8 uart_no, UartDevice *uart) +LOCAL void uart_config(uint8 uart_no, UartDevice *uart) { if (uart_no == UART1) { PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); @@ -141,13 +136,12 @@ uart_config(uint8 uart_no, UartDevice *uart) #endif #if 0 -LOCAL void -uart_task(void *pvParameters) +LOCAL void uart_task(void *pvParameters) { os_event_t e; for (;;) { - if (xQueueReceive(xQueueUart, (void *)&e, (portTickType)portMAX_DELAY)) { + if (xQueueReceive(xQueueUart, (void*)&e, (portTickType)portMAX_DELAY)) { switch (e.event) { case UART_EVENT_RX_CHAR: printf("%c", e.param); @@ -162,8 +156,7 @@ uart_task(void *pvParameters) vTaskDelete(NULL); } -void -uart_init(void) +void uart_init(void) { while (READ_PERI_REG(UART_STATUS(0)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S)); @@ -187,33 +180,29 @@ uart_init(void) xQueueUart = xQueueCreate(32, sizeof(os_event_t)); - xTaskCreate(uart_task, (uint8 const *)"uTask", 512, NULL, tskIDLE_PRIORITY + 2, &xUartTaskHandle); + xTaskCreate(uart_task, (uint8 const*)"uTask", 512, NULL, tskIDLE_PRIORITY + 2, &xUartTaskHandle); } #endif //================================================================= -void -UART_SetWordLength(UART_Port uart_no, UART_WordLength len) +void UART_SetWordLength(UART_Port uart_no, UART_WordLength len) { SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_BIT_NUM, len, UART_BIT_NUM_S); } -void -UART_SetStopBits(UART_Port uart_no, UART_StopBits bit_num) +void UART_SetStopBits(UART_Port uart_no, UART_StopBits bit_num) { SET_PERI_REG_BITS(UART_CONF0(uart_no), UART_STOP_BIT_NUM, bit_num, UART_STOP_BIT_NUM_S); } -void -UART_SetLineInverse(UART_Port uart_no, UART_LineLevelInverse inverse_mask) +void UART_SetLineInverse(UART_Port uart_no, UART_LineLevelInverse inverse_mask) { CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_LINE_INV_MASK); SET_PERI_REG_MASK(UART_CONF0(uart_no), inverse_mask); } -void -UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode) +void UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode) { CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_PARITY | UART_PARITY_EN); @@ -223,15 +212,13 @@ UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode) } } -void -UART_SetBaudrate(UART_Port uart_no, uint32 baud_rate) +void UART_SetBaudrate(UART_Port uart_no, uint32 baud_rate) { uart_div_modify(uart_no, UART_CLK_FREQ / baud_rate); } //only when USART_HardwareFlowControl_RTS is set , will the rx_thresh value be set. -void -UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8 rx_thresh) +void UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8 rx_thresh) { if (flow_ctrl & USART_HardwareFlowControl_RTS) { PIN_FUNC_SELECT(PERIPHS_IO_MUX_MTDO_U, FUNC_U0RTS); @@ -249,39 +236,33 @@ UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8 rx_thresh) } } -void -UART_WaitTxFifoEmpty(UART_Port uart_no) //do not use if tx flow control enabled +void UART_WaitTxFifoEmpty(UART_Port uart_no) //do not use if tx flow control enabled { while (READ_PERI_REG(UART_STATUS(uart_no)) & (UART_TXFIFO_CNT << UART_TXFIFO_CNT_S)); } -void -UART_ResetFifo(UART_Port uart_no) +void UART_ResetFifo(UART_Port uart_no) { SET_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); CLEAR_PERI_REG_MASK(UART_CONF0(uart_no), UART_RXFIFO_RST | UART_TXFIFO_RST); } -void -UART_ClearIntrStatus(UART_Port uart_no, uint32 clr_mask) +void UART_ClearIntrStatus(UART_Port uart_no, uint32 clr_mask) { WRITE_PERI_REG(UART_INT_CLR(uart_no), clr_mask); } -void -UART_SetIntrEna(UART_Port uart_no, uint32 ena_mask) +void UART_SetIntrEna(UART_Port uart_no, uint32 ena_mask) { SET_PERI_REG_MASK(UART_INT_ENA(uart_no), ena_mask); } -void -UART_intr_handler_register(void *fn, void *arg) +void UART_intr_handler_register(void* fn, void* arg) { _xt_isr_attach(ETS_UART_INUM, fn, arg); } -void -UART_SetPrintPort(UART_Port uart_no) +void UART_SetPrintPort(UART_Port uart_no) { if (uart_no == 1) { os_install_putc1(uart1_write_char); @@ -290,8 +271,7 @@ UART_SetPrintPort(UART_Port uart_no) } } -void -UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef *pUARTConfig) +void UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef* pUARTConfig) { if (uart_no == UART1) { PIN_FUNC_SELECT(PERIPHS_IO_MUX_GPIO2_U, FUNC_U1TXD_BK); @@ -314,8 +294,7 @@ UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef *pUARTConfig) UART_ResetFifo(uart_no); } -void -UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef *pUARTIntrConf) +void UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef* pUARTIntrConf) { uint32 reg_val = 0; @@ -336,8 +315,7 @@ UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef *pUARTIntrConf) SET_PERI_REG_MASK(UART_INT_ENA(uart_no), pUARTIntrConf->UART_IntrEnMask); } -LOCAL void -uart0_rx_intr_handler(void *para) +LOCAL void uart0_rx_intr_handler(void* para) { /* uart0 and uart1 intr combine togther, when interrupt occur, see reg 0x3ff20020, bit2, bit0 represents * uart1 and uart0 respectively @@ -386,8 +364,7 @@ uart0_rx_intr_handler(void *para) } } -void -uart_init_new(void) +void uart_init_new(void) { UART_WaitTxFifoEmpty(UART0); UART_WaitTxFifoEmpty(UART1); @@ -420,5 +397,4 @@ uart_init_new(void) UART_SetBaudrate(UART0,74880); UART_SetFlowCtrl(UART0,USART_HardwareFlowControl_None,0); */ - } diff --git a/components/esp8266/include/driver/gpio.h b/components/esp8266/include/driver/gpio.h index 98eded96..67d1f3a0 100644 --- a/components/esp8266/include/driver/gpio.h +++ b/components/esp8266/include/driver/gpio.h @@ -18,6 +18,7 @@ #ifdef __cplusplus extern "C" { #endif + #include "esp8266/gpio_register.h" #define ETS_GPIO_INTR_ENABLE() _xt_isr_unmask(1 << ETS_GPIO_INUM) @@ -95,8 +96,8 @@ typedef enum { typedef enum { GPIO_Mode_Input = 0x0, /**< GPIO mode : Input */ GPIO_Mode_Out_OD, /**< GPIO mode : Output_OD */ - GPIO_Mode_Output , /**< GPIO mode : Output */ - GPIO_Mode_Sigma_Delta , /**< GPIO mode : Sigma_Delta */ + GPIO_Mode_Output, /**< GPIO mode : Output */ + GPIO_Mode_Sigma_Delta, /**< GPIO mode : Sigma_Delta */ } GPIOMode_TypeDef; typedef enum { @@ -127,104 +128,104 @@ typedef struct { * @{ */ -/** +/** * @brief Set GPIO pin output level. - * + * * @param gpio_no : The GPIO sequence number. - * @param bit_value : GPIO pin output level. - * + * @param bit_value : GPIO pin output level. + * * @return null */ #define GPIO_OUTPUT_SET(gpio_no, bit_value) \ gpio_output_conf(bit_value<>gpio_no)&BIT(0)) -/** +/** * @brief Enable GPIO16 output. - * + * * @param null - * + * * @return null */ void gpio16_output_conf(void); -/** +/** * @brief Set GPIO16 output level. - * + * * @param uint8 value : GPIO16 output level. - * + * * @return null */ void gpio16_output_set(uint8 value); -/** +/** * @brief Enable GPIO pin intput. - * + * * @param null - * + * * @return null */ void gpio16_input_conf(void); -/** +/** * @brief Sample the value of GPIO16 input. - * + * * @param null - * + * * @return the level of GPIO16 input. */ uint8 gpio16_input_get(void); -/** +/** * @brief Configure Gpio pins out or input. - * + * * @param uint32 set_mask : Set the output for the high bit, the * corresponding bit is 1, the output of high, * the corresponding bit is 0, do not change the state. @@ -238,51 +239,51 @@ uint8 gpio16_input_get(void); */ void gpio_output_conf(uint32 set_mask, uint32 clear_mask, uint32 enable_mask, uint32 disable_mask); -/** +/** * @brief Register an application-specific interrupt handler for GPIO pin interrupts. - * + * * @param void *fn:interrupt handler for GPIO pin interrupts. * @param void *arg:interrupt handler's arg - * + * * @return null */ -void gpio_intr_handler_register(void *fn, void *arg); +void gpio_intr_handler_register(void* fn, void* arg); -/** +/** * @brief Configure GPIO wake up to light sleep,Only level way is effective. - * + * * @param uint32 i : Gpio sequence number * @param GPIO_INT_TYPE intr_state : the level of wake up to light sleep - * + * * @return null */ void gpio_pin_wakeup_enable(uint32 i, GPIO_INT_TYPE intr_state); -/** +/** * @brief Disable GPIO wake up to light sleep. - * + * * @param null - * + * * @return null */ void gpio_pin_wakeup_disable(); -/** +/** * @brief Config interrupt types of GPIO pin. - * + * * @param uint32 i : The GPIO sequence number. * @param GPIO_INT_TYPE intr_state : GPIO interrupt types. - * + * * @return null */ void gpio_pin_intr_state_set(uint32 i, GPIO_INT_TYPE intr_state); -/** +/** * @brief Sample the value of GPIO input pins and returns a bitmask. - * + * * @param null - * - * @return bitmask of GPIO pins input + * + * @return bitmask of GPIO pins input */ uint32 gpio_input_get(void); diff --git a/components/esp8266/include/driver/hw_timer.h b/components/esp8266/include/driver/hw_timer.h index 25a7ac6b..18ef882e 100644 --- a/components/esp8266/include/driver/hw_timer.h +++ b/components/esp8266/include/driver/hw_timer.h @@ -43,12 +43,12 @@ void hw_timer_init(void); /** * @brief Set a trigger timer delay to enable this timer. * - * @param uint32 val : Timing + * @param uint32 val : Timing * - In autoload mode, range : 50 ~ 0x7fffff * - In non-autoload mode, range : 10 ~ 0x7fffff * * @param uint8 req : 0, not autoload; 1, autoload mode. - * + * * @return null */ void hw_timer_arm(uint32 val, bool req); @@ -57,7 +57,7 @@ void hw_timer_arm(uint32 val, bool req); * @brief disable this timer. * * @param null - * + * * @return null */ void hw_timer_disarm(void); @@ -67,7 +67,7 @@ void hw_timer_disarm(void); * * For enabled timer, timer callback has to be set. * - * @param uint32 val : Timing + * @param uint32 val : Timing * - In autoload mode, range : 50 ~ 0x7fffff * - In non-autoload mode, range : 10 ~ 0x7fffff * diff --git a/components/esp8266/include/driver/i2c_master.h b/components/esp8266/include/driver/i2c_master.h index 4bf83a94..0661586d 100644 --- a/components/esp8266/include/driver/i2c_master.h +++ b/components/esp8266/include/driver/i2c_master.h @@ -16,6 +16,7 @@ #define __I2C_MASTER_H__ #include "esp8266/pin_mux_register.h" + #define I2C_MASTER_SDA_MUX PERIPHS_IO_MUX_GPIO2_U #define I2C_MASTER_SCL_MUX PERIPHS_IO_MUX_GPIO4_U #define I2C_MASTER_SDA_GPIO 2 @@ -70,20 +71,20 @@ * @{ */ -/** +/** * @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode. - * + * * @param null - * + * * @return null */ void i2c_master_gpio_init(void); -/** +/** * @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode. - * + * * @param initilize I2C bus to enable i2c operations. - * + * * @return null */ void i2c_master_init(void); @@ -91,83 +92,83 @@ void i2c_master_init(void); #define i2c_master_wait os_delay_us -/** +/** * @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode. - * + * * @param set i2c to stop sending state. - * + * * @return null */ void i2c_master_stop(void); -/** +/** * @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode. - * + * * @param set i2c to start sending state. - * + * * @return null */ void i2c_master_start(void); -/** +/** * @brief i2c_master_gpio_init,config SDA and SCL gpio to open-drain output mode. - * + * * @param set ack to i2c bus as level value. - * + * * @return null */ void i2c_master_setAck(uint8 level); -/** +/** * @brief confirm if peer send ack. - * + * * @param null - * + * * @return null */ uint8 i2c_master_getAck(void); -/** +/** * @brief read Byte from i2c bus. - * + * * @param null - * + * * @return the byte which read from i2c bus. */ uint8 i2c_master_readByte(void); -/** +/** * @brief write wrdata value(one byte) into i2c. - * + * * @param uint8 wrdata:write value - * + * * @return null */ void i2c_master_writeByte(uint8 wrdata); -/** +/** * @brief i2c_master_checkAck. - * + * * @param null - * + * * @return the result of check ack */ bool i2c_master_checkAck(void); -/** +/** * @brief i2c master send Ack. - * + * * @param null - * + * * @return null */ void i2c_master_send_ack(void); -/** +/** * @brief i2c master send Nack. - * + * * @param null - * + * * @return null */ void i2c_master_send_nack(void); diff --git a/components/esp8266/include/driver/spi_interface.h b/components/esp8266/include/driver/spi_interface.h index ffbb4f4f..3e224f5b 100644 --- a/components/esp8266/include/driver/spi_interface.h +++ b/components/esp8266/include/driver/spi_interface.h @@ -47,8 +47,7 @@ extern "C" * @brief Support HSPI and SPI module. * */ -typedef enum -{ +typedef enum { SpiNum_SPI = 0, SpiNum_HSPI = 1, } SpiNum; @@ -57,8 +56,7 @@ typedef enum * @brief The SPI module can work in either master or slave mode. * */ -typedef enum -{ +typedef enum { SpiMode_Master = 0, SpiMode_Slave = 1, } SpiMode; @@ -73,8 +71,7 @@ typedef enum * 1 0 2 * 1 1 3 */ -typedef enum -{ +typedef enum { SpiSubMode_0 = 0, SpiSubMode_1 = 1, SpiSubMode_2 = 2, @@ -87,8 +84,7 @@ typedef enum * @attention Max speed 80MHz * */ -typedef enum -{ +typedef enum { SpiSpeed_2MHz = 40 - 1, SpiSpeed_5MHz = 16 - 1, SpiSpeed_10MHz = 8 - 1, @@ -100,15 +96,13 @@ typedef enum * @brief The SPI mode working speed. * */ -typedef enum -{ +typedef enum { SpiBitOrder_MSBFirst = 0, SpiBitOrder_LSBFirst = 1, } SpiBitOrder; // @brief SPI interrupt soource defined. -typedef enum -{ +typedef enum { SpiIntSrc_TransDoneEn = SPI_TRANS_DONE_EN, SpiIntSrc_WrStaDoneEn = SPI_SLV_WR_STA_DONE_EN, SpiIntSrc_RdStaDoneEn = SPI_SLV_RD_STA_DONE_EN, @@ -117,8 +111,7 @@ typedef enum } SpiIntSrc; // @brief SPI CS pin. -typedef enum -{ +typedef enum { SpiPinCS_0 = 0, SpiPinCS_1 = 1, SpiPinCS_2 = 2, @@ -127,8 +120,7 @@ typedef enum /** * @brief SPI attribute */ -typedef struct -{ +typedef struct { SpiMode mode; ///< Master or slave mode SpiSubMode subMode; ///< SPI SPI_CPOL SPI_CPHA mode SpiSpeed speed; ///< SPI Clock @@ -138,13 +130,12 @@ typedef struct /** * @brief SPI attribute */ -typedef struct -{ +typedef struct { uint16_t cmd; ///< Command value uint8_t cmdLen; ///< Command byte length - uint32_t *addr; ///< Point to address value + uint32_t* addr; ///< Point to address value uint8_t addrLen; ///< Address byte length - uint32_t *data; ///< Point to data buffer + uint32_t* data; ///< Point to data buffer uint8_t dataLen; ///< Data byte length. } SpiData; @@ -154,7 +145,7 @@ typedef struct * @brief Print debug information. * */ -void __ShowRegValue(const char * func, uint32_t line); +void __ShowRegValue(const char* func, uint32_t line); /** * @brief Initialize SPI module. @@ -202,7 +193,7 @@ void SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd); * * @return int, -1:indicates failure,others indicates success. */ - int SPIMasterSendData(SpiNum spiNum, SpiData* pInData); +int SPIMasterSendData(SpiNum spiNum, SpiData* pInData); /** * @brief Receive data from slave by master. @@ -215,7 +206,7 @@ void SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd); * @return int, -1:indicates failure,others indicates success. * */ - int SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData); +int SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData); /** * @brief Load data to slave send buffer. @@ -229,7 +220,7 @@ void SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd); * * @return int, -1:indicates failure,others indicates success. */ -int SPISlaveSendData(SpiNum spiNum, uint32_t *pInData, uint8_t outLen); +int SPISlaveSendData(SpiNum spiNum, uint32_t* pInData, uint8_t outLen); /** * @brief Receive data by slave. diff --git a/components/esp8266/include/driver/spi_register.h b/components/esp8266/include/driver/spi_register.h index ab3c81a3..c1cae98f 100644 --- a/components/esp8266/include/driver/spi_register.h +++ b/components/esp8266/include/driver/spi_register.h @@ -44,9 +44,9 @@ #define SPI_FASTRD_MODE (BIT(13)) #define SPI_CTRL1(i) (REG_SPI_BASE(i) + 0xc) -#define SPI_CS_HOLD_DELAY 0xf +#define SPI_CS_HOLD_DELAY 0xf #define SPI_CS_HOLD_DELAY_S 28 -#define SPI_CS_HOLD_DELAY_RES 0xfff +#define SPI_CS_HOLD_DELAY_RES 0xfff #define SPI_CS_HOLD_DELAY_RES_S 16 @@ -187,26 +187,26 @@ #define SPI_SLV_RDBUF_CMD_VALUE 0x000000FF #define SPI_SLV_RDBUF_CMD_VALUE_S 0 -#define SPI_W0(i) (REG_SPI_BASE(i) +0x40) -#define SPI_W1(i) (REG_SPI_BASE(i) +0x44) -#define SPI_W2(i) (REG_SPI_BASE(i) +0x48) -#define SPI_W3(i) (REG_SPI_BASE(i) +0x4C) -#define SPI_W4(i) (REG_SPI_BASE(i) +0x50) -#define SPI_W5(i) (REG_SPI_BASE(i) +0x54) -#define SPI_W6(i) (REG_SPI_BASE(i) +0x58) -#define SPI_W7(i) (REG_SPI_BASE(i) +0x5C) -#define SPI_W8(i) (REG_SPI_BASE(i) +0x60) -#define SPI_W9(i) (REG_SPI_BASE(i) +0x64) -#define SPI_W10(i) (REG_SPI_BASE(i) +0x68) -#define SPI_W11(i) (REG_SPI_BASE(i) +0x6C) -#define SPI_W12(i) (REG_SPI_BASE(i) +0x70) -#define SPI_W13(i) (REG_SPI_BASE(i) +0x74) -#define SPI_W14(i) (REG_SPI_BASE(i) +0x78) -#define SPI_W15(i) (REG_SPI_BASE(i) +0x7C) +#define SPI_W0(i) (REG_SPI_BASE(i) +0x40) +#define SPI_W1(i) (REG_SPI_BASE(i) +0x44) +#define SPI_W2(i) (REG_SPI_BASE(i) +0x48) +#define SPI_W3(i) (REG_SPI_BASE(i) +0x4C) +#define SPI_W4(i) (REG_SPI_BASE(i) +0x50) +#define SPI_W5(i) (REG_SPI_BASE(i) +0x54) +#define SPI_W6(i) (REG_SPI_BASE(i) +0x58) +#define SPI_W7(i) (REG_SPI_BASE(i) +0x5C) +#define SPI_W8(i) (REG_SPI_BASE(i) +0x60) +#define SPI_W9(i) (REG_SPI_BASE(i) +0x64) +#define SPI_W10(i) (REG_SPI_BASE(i) +0x68) +#define SPI_W11(i) (REG_SPI_BASE(i) +0x6C) +#define SPI_W12(i) (REG_SPI_BASE(i) +0x70) +#define SPI_W13(i) (REG_SPI_BASE(i) +0x74) +#define SPI_W14(i) (REG_SPI_BASE(i) +0x78) +#define SPI_W15(i) (REG_SPI_BASE(i) +0x7C) -#define SPI_EXT2(i) (REG_SPI_BASE(i) + 0xF8) +#define SPI_EXT2(i) (REG_SPI_BASE(i) + 0xF8) -#define SPI_EXT3(i) (REG_SPI_BASE(i) + 0xFC) +#define SPI_EXT3(i) (REG_SPI_BASE(i) + 0xFC) #define SPI_INT_HOLD_ENA 0x00000003 #define SPI_INT_HOLD_ENA_S 0 #endif // SPI_REGISTER_H_INCLUDED diff --git a/components/esp8266/include/driver/uart.h b/components/esp8266/include/driver/uart.h index 955e9991..b16d32b0 100644 --- a/components/esp8266/include/driver/uart.h +++ b/components/esp8266/include/driver/uart.h @@ -122,149 +122,149 @@ typedef struct { * @{ */ -/** +/** * @brief Wait uart tx fifo empty, do not use it if tx flow control enabled. - * + * * @param UART_Port uart_no:UART0 or UART1 - * + * * @return null */ void UART_WaitTxFifoEmpty(UART_Port uart_no); //do not use if tx flow control enabled -/** +/** * @brief Clear uart tx fifo and rx fifo. - * + * * @param UART_Port uart_no : UART0 or UART1 - * + * * @return null */ void UART_ResetFifo(UART_Port uart_no); -/** +/** * @brief Clear uart interrupt flags. - * + * * @param UART_Port uart_no : UART0 or UART1 * @param uint32 clr_mask : To clear the interrupt bits - * + * * @return null */ void UART_ClearIntrStatus(UART_Port uart_no, uint32 clr_mask); -/** +/** * @brief Enable uart interrupts . - * + * * @param UART_Port uart_no : UART0 or UART1 * @param uint32 ena_mask : To enable the interrupt bits - * + * * @return null */ void UART_SetIntrEna(UART_Port uart_no, uint32 ena_mask); -/** +/** * @brief Register an application-specific interrupt handler for Uarts interrupts. - * + * * @param void *fn : interrupt handler for Uart interrupts. * @param void *arg : interrupt handler's arg. - * + * * @return null */ -void UART_intr_handler_register(void *fn, void *arg); +void UART_intr_handler_register(void* fn, void* arg); -/** +/** * @brief Config from which serial output printf function. - * + * * @param UART_Port uart_no : UART0 or UART1 - * + * * @return null */ void UART_SetPrintPort(UART_Port uart_no); -/** +/** * @brief Config Common parameters of serial ports. - * + * * @param UART_Port uart_no : UART0 or UART1 * @param UART_ConfigTypeDef *pUARTConfig : parameters structure - * + * * @return null */ -void UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef *pUARTConfig); +void UART_ParamConfig(UART_Port uart_no, UART_ConfigTypeDef* pUARTConfig); -/** +/** * @brief Config types of uarts. - * + * * @param UART_Port uart_no : UART0 or UART1 * @param UART_IntrConfTypeDef *pUARTIntrConf : parameters structure - * + * * @return null */ -void UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef *pUARTIntrConf); +void UART_IntrConfig(UART_Port uart_no, UART_IntrConfTypeDef* pUARTIntrConf); -/** +/** * @brief Config the length of the uart communication data bits. - * + * * @param UART_Port uart_no : UART0 or UART1 * @param UART_WordLength len : the length of the uart communication data bits - * + * * @return null */ void UART_SetWordLength(UART_Port uart_no, UART_WordLength len); -/** +/** * @brief Config the length of the uart communication stop bits. - * + * * @param UART_Port uart_no : UART0 or UART1 * @param UART_StopBits bit_num : the length uart communication stop bits - * + * * @return null */ void UART_SetStopBits(UART_Port uart_no, UART_StopBits bit_num); -/** +/** * @brief Configure whether to open the parity. - * + * * @param UART_Port uart_no : UART0 or UART1 * @param UART_ParityMode Parity_mode : the enum of uart parity configuration - * + * * @return null */ void UART_SetParity(UART_Port uart_no, UART_ParityMode Parity_mode) ; -/** +/** * @brief Configure the Baud rate. - * + * * @param UART_Port uart_no : UART0 or UART1 * @param uint32 baud_rate : the Baud rate - * + * * @return null */ void UART_SetBaudrate(UART_Port uart_no, uint32 baud_rate); -/** +/** * @brief Configure Hardware flow control. - * + * * @param UART_Port uart_no : UART0 or UART1 * @param UART_HwFlowCtrl flow_ctrl : Hardware flow control mode * @param uint8 rx_thresh : threshold of Hardware flow control - * + * * @return null */ void UART_SetFlowCtrl(UART_Port uart_no, UART_HwFlowCtrl flow_ctrl, uint8 rx_thresh); -/** +/** * @brief Configure trigging signal of uarts. - * + * * @param UART_Port uart_no : UART0 or UART1 * @param UART_LineLevelInverse inverse_mask : Choose need to flip the IO - * + * * @return null */ void UART_SetLineInverse(UART_Port uart_no, UART_LineLevelInverse inverse_mask) ; -/** +/** * @brief An example illustrates how to configure the serial port. - * + * * @param null - * + * * @return null */ void uart_init_new(void);