mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
synced 2025-06-09 23:51:23 +08:00
feat: Modify file mode
This commit is contained in:
654
driver_lib/include/spi_interface.h
Executable file → Normal file
654
driver_lib/include/spi_interface.h
Executable file → Normal file
@ -1,328 +1,328 @@
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/**
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* spi_interface.h
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*
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* Defines and Macros for the SPI.
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||||
*
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||||
* Copyright @ 2015 Espressif System Co., Ltd.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are NOT permitted except as agreed by
|
||||
* Espressif System Co., Ltd.
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
*/
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||||
/**
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* @file spi_interface.h
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* @brief Defines and Macros for the SPI.
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*/
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#ifndef __SPI_INTERFACE_H__
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#define __SPI_INTERFACE_H__
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#include "spi_register.h"
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#include "c_types.h"
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//*****************************************************************************
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//
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// Make sure all of the definitions in this header have a C binding.
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||||
//
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//*****************************************************************************
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#ifdef __cplusplus
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extern "C"
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{
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#endif
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/**
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* @brief Defines slave commands. Default value based on slave ESP8266.
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*/
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#define MASTER_WRITE_DATA_TO_SLAVE_CMD 2
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#define MASTER_READ_DATA_FROM_SLAVE_CMD 3
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#define MASTER_WRITE_STATUS_TO_SLAVE_CMD 1
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#define MASTER_READ_STATUS_FROM_SLAVE_CMD 4
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/**
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* @brief Support HSPI and SPI module.
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*
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*/
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typedef enum
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{
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SpiNum_SPI = 0,
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SpiNum_HSPI = 1,
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} SpiNum;
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/**
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* @brief The SPI module can work in either master or slave mode.
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*
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*/
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typedef enum
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{
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SpiMode_Master = 0,
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SpiMode_Slave = 1,
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} SpiMode;
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/**
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* @brief SPI sub mode
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*
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* Support 4 sub modes based on SPI clock polarity and phase.
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* SPI_CPOL SPI_CPHA SubMode
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* 0 0 0
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* 0 1 1
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* 1 0 2
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* 1 1 3
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*/
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typedef enum
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{
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SpiSubMode_0 = 0,
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SpiSubMode_1 = 1,
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SpiSubMode_2 = 2,
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SpiSubMode_3 = 3,
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} SpiSubMode;
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/**
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* @brief The SPI module working speed.
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*
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* @attention Max speed 80MHz
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*
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*/
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typedef enum
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{
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SpiSpeed_2MHz = 40 - 1,
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SpiSpeed_5MHz = 16 - 1,
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SpiSpeed_10MHz = 8 - 1,
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SpiSpeed_16MHz = 5 - 1,
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SpiSpeed_20MHz = 4 - 1,
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} SpiSpeed;
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/**
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* @brief The SPI mode working speed.
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*
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*/
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typedef enum
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{
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SpiBitOrder_MSBFirst = 0,
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SpiBitOrder_LSBFirst = 1,
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} SpiBitOrder;
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// @brief SPI interrupt soource defined.
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typedef enum
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{
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SpiIntSrc_TransDoneEn = SPI_TRANS_DONE_EN,
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SpiIntSrc_WrStaDoneEn = SPI_SLV_WR_STA_DONE_EN,
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SpiIntSrc_RdStaDoneEn = SPI_SLV_RD_STA_DONE_EN,
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SpiIntSrc_WrBufDoneEn = SPI_SLV_WR_BUF_DONE_EN,
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SpiIntSrc_RdBufDoneEn = SPI_SLV_RD_BUF_DONE_EN,
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} SpiIntSrc;
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// @brief SPI CS pin.
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typedef enum
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{
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SpiPinCS_0 = 0,
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SpiPinCS_1 = 1,
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SpiPinCS_2 = 2,
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} SpiPinCS;
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#pragma pack (1)
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/**
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* @brief SPI attribute
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*/
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typedef struct
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{
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SpiMode mode; ///< Master or slave mode
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SpiSubMode subMode; ///< SPI SPI_CPOL SPI_CPHA mode
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SpiSpeed speed; ///< SPI Clock
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SpiBitOrder bitOrder; ///< SPI bit order
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} SpiAttr;
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/**
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* @brief SPI attribute
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*/
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typedef struct
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{
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uint16_t cmd; ///< Command value
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uint8_t cmdLen; ///< Command byte length
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uint32_t *addr; ///< Point to address value
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uint8_t addrLen; ///< Address byte length
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uint32_t *data; ///< Point to data buffer
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uint8_t dataLen; ///< Data byte length.
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} SpiData;
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#pragma upack (1)
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#define SHOWREG() __ShowRegValue(__func__, __LINE__);
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/**
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* @brief Print debug information.
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*
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*/
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void __ShowRegValue(const char * func, uint32_t line);
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/**
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* @brief Initialize SPI module.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] pAttr
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* Pointer to a struct SpiAttr that indicates SPI working attribution.
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*
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* @return void.
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*/
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void SPIInit(SpiNum spiNum, SpiAttr* pAttr);
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/**
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* @brief Set slave address value by master.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] addr
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* Slave address to be set.
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*
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* @return void.
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*/
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void SPIMasterCfgAddr(SpiNum spiNum, uint32_t addr);
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/**
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* @brief Set command value by master.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] cmd
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* Command will be send to slave.
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*
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* @return void.
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*/
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void SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd);
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/**
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* @brief Send data to slave from master.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] pInData
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* Pointer to a strcuture that will be send.
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*
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* @return int, -1:indicates failure,others indicates success.
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*/
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int SPIMasterSendData(SpiNum spiNum, SpiData* pInData);
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/**
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* @brief Receive data from slave by master.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] pOutData
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* Point to data buffer.
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*
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* @return int, -1:indicates failure,others indicates success.
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*
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*/
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int SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData);
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/**
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* @brief Load data to slave send buffer.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] pInData
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* Point to data buffer.
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* @param [in] outLen
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* The number of bytes to be set.
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*
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* @return int, -1:indicates failure,others indicates success.
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*/
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int SPISlaveSendData(SpiNum spiNum, uint32_t *pInData, uint8_t outLen);
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/**
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* @brief Receive data by slave.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] isrFunc
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* isrFunc is a pointer to the function to be called when the SPI interrupt occurs.
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*
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* @return int, -1:indicates failure,others indicates success.
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*/
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int SPISlaveRecvData(SpiNum spiNum, void(*isrFunc)(void*));
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/**
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* @brief Set slave status by master.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] data
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* Data will be write to slave SPI_WR_STATUS.
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*
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* @return void.
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*
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* @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS.
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*/
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void SPIMasterSendStatus(SpiNum spiNum, uint8_t data);
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/**
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* @brief Get salve status by master.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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*
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* @return int, -1: indicates failure; other value in slave status.
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*
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* @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS.
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*/
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int SPIMasterRecvStatus(SpiNum spiNum);
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/**
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* @brief Select SPI CS pin.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] pinCs
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* Indicates which SPI pin to choose.
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*
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* @return void.
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*/
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void SPICsPinSelect(SpiNum spiNum, SpiPinCS pinCs);
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/**
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* @brief Enable SPI module interrupt source.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] intSrc
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* Indicates which interrupt source to enable.
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*
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* @return void.
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||||
*/
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void SPIIntEnable(SpiNum spiNum, SpiIntSrc intSrc);
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/**
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* @brief Disable SPI module interrupt source.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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* @param [in] intSrc
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* Indicates which interrupt source to disable.
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*
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* @return void.
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||||
*/
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void SPIIntDisable(SpiNum spiNum, SpiIntSrc intSrc);
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/**
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* @brief Clear all of spi interrupt.
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*
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* @param [in] spiNum
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* Indicates which submode to be used, SPI or HSPI.
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*
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* @return void.
|
||||
*/
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void SPIIntClear(SpiNum spiNum);
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#ifdef __cplusplus
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||||
}
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#endif
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|
||||
/**
|
||||
* spi_interface.h
|
||||
*
|
||||
* Defines and Macros for the SPI.
|
||||
*
|
||||
* Copyright @ 2015 Espressif System Co., Ltd.
|
||||
* All Rights Reserved.
|
||||
*
|
||||
* Redistribution and use in source and binary forms, with or without
|
||||
* modification, are NOT permitted except as agreed by
|
||||
* Espressif System Co., Ltd.
|
||||
*
|
||||
* Unless required by applicable law or agreed to in writing, software
|
||||
* distributed under the License is distributed on an "AS IS" BASIS,
|
||||
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
|
||||
*/
|
||||
/**
|
||||
* @file spi_interface.h
|
||||
* @brief Defines and Macros for the SPI.
|
||||
*/
|
||||
#ifndef __SPI_INTERFACE_H__
|
||||
#define __SPI_INTERFACE_H__
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||||
|
||||
#include "spi_register.h"
|
||||
#include "c_types.h"
|
||||
|
||||
//*****************************************************************************
|
||||
//
|
||||
// Make sure all of the definitions in this header have a C binding.
|
||||
//
|
||||
//*****************************************************************************
|
||||
|
||||
#ifdef __cplusplus
|
||||
extern "C"
|
||||
{
|
||||
#endif
|
||||
|
||||
|
||||
/**
|
||||
* @brief Defines slave commands. Default value based on slave ESP8266.
|
||||
*/
|
||||
#define MASTER_WRITE_DATA_TO_SLAVE_CMD 2
|
||||
#define MASTER_READ_DATA_FROM_SLAVE_CMD 3
|
||||
|
||||
#define MASTER_WRITE_STATUS_TO_SLAVE_CMD 1
|
||||
#define MASTER_READ_STATUS_FROM_SLAVE_CMD 4
|
||||
|
||||
/**
|
||||
* @brief Support HSPI and SPI module.
|
||||
*
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
SpiNum_SPI = 0,
|
||||
SpiNum_HSPI = 1,
|
||||
} SpiNum;
|
||||
|
||||
/**
|
||||
* @brief The SPI module can work in either master or slave mode.
|
||||
*
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
SpiMode_Master = 0,
|
||||
SpiMode_Slave = 1,
|
||||
} SpiMode;
|
||||
|
||||
/**
|
||||
* @brief SPI sub mode
|
||||
*
|
||||
* Support 4 sub modes based on SPI clock polarity and phase.
|
||||
* SPI_CPOL SPI_CPHA SubMode
|
||||
* 0 0 0
|
||||
* 0 1 1
|
||||
* 1 0 2
|
||||
* 1 1 3
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
SpiSubMode_0 = 0,
|
||||
SpiSubMode_1 = 1,
|
||||
SpiSubMode_2 = 2,
|
||||
SpiSubMode_3 = 3,
|
||||
} SpiSubMode;
|
||||
|
||||
/**
|
||||
* @brief The SPI module working speed.
|
||||
*
|
||||
* @attention Max speed 80MHz
|
||||
*
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
SpiSpeed_2MHz = 40 - 1,
|
||||
SpiSpeed_5MHz = 16 - 1,
|
||||
SpiSpeed_10MHz = 8 - 1,
|
||||
SpiSpeed_16MHz = 5 - 1,
|
||||
SpiSpeed_20MHz = 4 - 1,
|
||||
} SpiSpeed;
|
||||
|
||||
/**
|
||||
* @brief The SPI mode working speed.
|
||||
*
|
||||
*/
|
||||
typedef enum
|
||||
{
|
||||
SpiBitOrder_MSBFirst = 0,
|
||||
SpiBitOrder_LSBFirst = 1,
|
||||
} SpiBitOrder;
|
||||
|
||||
// @brief SPI interrupt soource defined.
|
||||
typedef enum
|
||||
{
|
||||
SpiIntSrc_TransDoneEn = SPI_TRANS_DONE_EN,
|
||||
SpiIntSrc_WrStaDoneEn = SPI_SLV_WR_STA_DONE_EN,
|
||||
SpiIntSrc_RdStaDoneEn = SPI_SLV_RD_STA_DONE_EN,
|
||||
SpiIntSrc_WrBufDoneEn = SPI_SLV_WR_BUF_DONE_EN,
|
||||
SpiIntSrc_RdBufDoneEn = SPI_SLV_RD_BUF_DONE_EN,
|
||||
} SpiIntSrc;
|
||||
|
||||
// @brief SPI CS pin.
|
||||
typedef enum
|
||||
{
|
||||
SpiPinCS_0 = 0,
|
||||
SpiPinCS_1 = 1,
|
||||
SpiPinCS_2 = 2,
|
||||
} SpiPinCS;
|
||||
|
||||
#pragma pack (1)
|
||||
|
||||
/**
|
||||
* @brief SPI attribute
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
SpiMode mode; ///< Master or slave mode
|
||||
SpiSubMode subMode; ///< SPI SPI_CPOL SPI_CPHA mode
|
||||
SpiSpeed speed; ///< SPI Clock
|
||||
SpiBitOrder bitOrder; ///< SPI bit order
|
||||
} SpiAttr;
|
||||
|
||||
/**
|
||||
* @brief SPI attribute
|
||||
*/
|
||||
typedef struct
|
||||
{
|
||||
uint16_t cmd; ///< Command value
|
||||
uint8_t cmdLen; ///< Command byte length
|
||||
uint32_t *addr; ///< Point to address value
|
||||
uint8_t addrLen; ///< Address byte length
|
||||
uint32_t *data; ///< Point to data buffer
|
||||
uint8_t dataLen; ///< Data byte length.
|
||||
} SpiData;
|
||||
|
||||
#pragma upack (1)
|
||||
|
||||
#define SHOWREG() __ShowRegValue(__func__, __LINE__);
|
||||
|
||||
/**
|
||||
* @brief Print debug information.
|
||||
*
|
||||
*/
|
||||
void __ShowRegValue(const char * func, uint32_t line);
|
||||
|
||||
/**
|
||||
* @brief Initialize SPI module.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pAttr
|
||||
* Pointer to a struct SpiAttr that indicates SPI working attribution.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIInit(SpiNum spiNum, SpiAttr* pAttr);
|
||||
|
||||
/**
|
||||
* @brief Set slave address value by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] addr
|
||||
* Slave address to be set.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIMasterCfgAddr(SpiNum spiNum, uint32_t addr);
|
||||
|
||||
/**
|
||||
* @brief Set command value by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] cmd
|
||||
* Command will be send to slave.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIMasterCfgCmd(SpiNum spiNum, uint32_t cmd);
|
||||
|
||||
/**
|
||||
* @brief Send data to slave from master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pInData
|
||||
* Pointer to a strcuture that will be send.
|
||||
*
|
||||
* @return int, -1:indicates failure,others indicates success.
|
||||
*/
|
||||
int SPIMasterSendData(SpiNum spiNum, SpiData* pInData);
|
||||
|
||||
/**
|
||||
* @brief Receive data from slave by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pOutData
|
||||
* Point to data buffer.
|
||||
*
|
||||
* @return int, -1:indicates failure,others indicates success.
|
||||
*
|
||||
*/
|
||||
int SPIMasterRecvData(SpiNum spiNum, SpiData* pOutData);
|
||||
|
||||
/**
|
||||
* @brief Load data to slave send buffer.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pInData
|
||||
* Point to data buffer.
|
||||
* @param [in] outLen
|
||||
* The number of bytes to be set.
|
||||
*
|
||||
* @return int, -1:indicates failure,others indicates success.
|
||||
*/
|
||||
int SPISlaveSendData(SpiNum spiNum, uint32_t *pInData, uint8_t outLen);
|
||||
|
||||
/**
|
||||
* @brief Receive data by slave.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] isrFunc
|
||||
* isrFunc is a pointer to the function to be called when the SPI interrupt occurs.
|
||||
*
|
||||
* @return int, -1:indicates failure,others indicates success.
|
||||
*/
|
||||
int SPISlaveRecvData(SpiNum spiNum, void(*isrFunc)(void*));
|
||||
|
||||
/**
|
||||
* @brief Set slave status by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] data
|
||||
* Data will be write to slave SPI_WR_STATUS.
|
||||
*
|
||||
* @return void.
|
||||
*
|
||||
* @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS.
|
||||
*/
|
||||
void SPIMasterSendStatus(SpiNum spiNum, uint8_t data);
|
||||
|
||||
/**
|
||||
* @brief Get salve status by master.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
*
|
||||
* @return int, -1: indicates failure; other value in slave status.
|
||||
*
|
||||
* @attention Just for ESP8266(slave) register of RD_STATUS or WR_STATUS.
|
||||
*/
|
||||
int SPIMasterRecvStatus(SpiNum spiNum);
|
||||
|
||||
/**
|
||||
* @brief Select SPI CS pin.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] pinCs
|
||||
* Indicates which SPI pin to choose.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPICsPinSelect(SpiNum spiNum, SpiPinCS pinCs);
|
||||
|
||||
/**
|
||||
* @brief Enable SPI module interrupt source.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] intSrc
|
||||
* Indicates which interrupt source to enable.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIIntEnable(SpiNum spiNum, SpiIntSrc intSrc);
|
||||
|
||||
/**
|
||||
* @brief Disable SPI module interrupt source.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
* @param [in] intSrc
|
||||
* Indicates which interrupt source to disable.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIIntDisable(SpiNum spiNum, SpiIntSrc intSrc);
|
||||
|
||||
/**
|
||||
* @brief Clear all of spi interrupt.
|
||||
*
|
||||
* @param [in] spiNum
|
||||
* Indicates which submode to be used, SPI or HSPI.
|
||||
*
|
||||
* @return void.
|
||||
*/
|
||||
void SPIIntClear(SpiNum spiNum);
|
||||
|
||||
#ifdef __cplusplus
|
||||
}
|
||||
#endif
|
||||
|
||||
#endif // __SPI_INTERFACE_H__
|
Reference in New Issue
Block a user