espressif/ESP8266_RTOS_SDK
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feat(freertos): Simplify xtensa platform code

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All normal ISRs are called by "_xt_isr_handler".
This commit is contained in:
dongheng
2019-03-27 16:28:22 +08:00
parent b05cf79870
commit 913188fdf3
10 changed files with 125 additions and 265 deletions
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65
components/esp8266/include/driver/soc.h
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@ -20,6 +20,7 @@
extern "C" {
#endif
#define ETS_INT_MASK 0x00003FFF
#define ESP_TICKS_MAX UINT32_MAX
typedef uint32_t esp_tick_t;
@ -63,6 +64,70 @@ static inline void soc_restore_local_irq(esp_irqflag_t flag)
);
}
static inline void soc_set_ccompare(uint32_t ticks)
{
__asm__ __volatile__(
"wsr %0, ccompare0\n"
:
: "a"(ticks)
: "memory"
);
}
static inline uint32_t soc_get_ccompare(void)
{
uint32_t ticks;
__asm__ __volatile__(
"rsr %0, ccompare0\n"
: "=a"(ticks)
:
: "memory"
);
return ticks;
}
static inline uint32_t soc_get_ccount(void)
{
uint32_t ticks;
__asm__ __volatile__(
"rsr %0, ccount\n"
: "=a"(ticks)
:
: "memory"
);
return ticks;
}
static inline void soc_clear_int_mask(uint32_t mask)
{
__asm__ __volatile__(
"wsr %0, intclear\n"
:
: "a"(mask)
: "memory"
);
}
static inline uint32_t soc_get_int_mask(void)
{
uint32_t mask, enable;
__asm__ __volatile__(
"rsr %0, interrupt\n"
"rsr %1, intenable\n"
"rsync\n"
: "=a"(mask), "=a"(enable)
:
: "memory"
);
return mask & enable & ETS_INT_MASK;
}
#ifdef __cplusplus
}
#endif