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refactor(gpio): Refactor gpio driver for esp8266 idf

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This commit is contained in:
Xu Chun Guang
2018-06-10 22:39:40 +08:00
committed by XiongYu
parent 7c46284f50
commit 8fdffe47ad
12 changed files with 1022 additions and 337 deletions
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6
components/esp8266/include/esp8266/eagle_soc.h
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@ -27,6 +27,12 @@
#include <stdint.h>
/* IO definitions (access restrictions to peripheral registers) */
#define __RO__ volatile const /*!< Defines 'read only' permissions */
#define __WO__ volatile /*!< Defines 'write only' permissions */
#define __RW__ volatile /*!< Defines 'read / write' permissions */
//Register Bits{{
#define BIT31 0x80000000
#define BIT30 0x40000000

1
components/esp8266/include/esp8266/gpio_register.h
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@ -83,7 +83,6 @@
#define GPIO_ID_PIN(n) (GPIO_ID_PIN0+(n))
#define GPIO_LAST_REGISTER_ID GPIO_ID_PIN(15)
#define GPIO_ID_NONE 0xffffffff
#define GPIO_PIN_COUNT 16
#define GPIO_PIN_CONFIG_MSB 12
#define GPIO_PIN_CONFIG_LSB 11

93
components/esp8266/include/esp8266/gpio_struct.h Normal file
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@ -0,0 +1,93 @@
/*
* Copyright 2018 Espressif Systems (Shanghai) PTE LTD
*
* Licensed under the Apache License, Version 2.0 (the "License");
* you may not use this file except in compliance with the License.
* You may obtain a copy of the License at
*
* http://www.apache.org/licenses/LICENSE-2.0
*
* Unless required by applicable law or agreed to in writing, software
* distributed under the License is distributed on an "AS IS" BASIS,
* WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
* See the License for the specific language governing permissions and
* limitations under the License.
*
*/
#ifndef _GPIO_STRUCT_H_
#define _GPIO_STRUCT_H_
#include <stdint.h>
#include "esp8266/eagle_soc.h"
#ifdef __cplusplus
extern "C" {
#endif
/* ESP8266 GPIO Register Definitions */
typedef union {
__RW__ struct {
uint32_t sleep_oe: 1;
uint32_t sleep_sel: 1;
uint32_t reserved1: 1;
uint32_t sleep_pullup: 1;
uint32_t func_low_bit: 2;
uint32_t reserved2: 1;
uint32_t pullup: 1;
uint32_t func_high_bit: 1;
};
__RW__ struct {
uint32_t func_low_bit: 2;
uint32_t reserved1: 1;
uint32_t pulldown: 1;
uint32_t reserved2: 1;
uint32_t sleep_pulldown: 1;
uint32_t func_high_bit: 1;
} rtc_pin;
__RW__ uint32_t val;
} gpio_pin_reg_t;
typedef struct {
__RO__ uint32_t out;
__WO__ uint32_t out_w1ts;
__WO__ uint32_t out_w1tc;
__RO__ uint32_t enable;
__WO__ uint32_t enable_w1ts;
__WO__ uint32_t enable_w1tc;
__RO__ uint32_t in;
__RO__ uint32_t status;
__WO__ uint32_t status_w1ts;
__WO__ uint32_t status_w1tc;
__RW__ union {
struct {
uint32_t source: 1;
uint32_t reserved1: 1;
uint32_t driver: 1;
uint32_t reserved2: 4;
uint32_t int_type: 3;
uint32_t wakeup_enable: 1;
uint32_t reserved3: 21;
};
uint32_t val;
} pin[16];
__RW__ uint32_t sigma_delta;
__RW__ uint32_t rtc_calib_sync;
__RW__ uint32_t rtc_calib_value;
} gpio_struct_t;
extern volatile gpio_struct_t GPIO;
#ifdef __cplusplus
}
#endif /* end of __cplusplus */
#endif /* _GPIO_STRUCT_H_ */