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Merge branch 'bugfix/remove_i2s_bbpll_clk_enable_v3.3' into 'release/v3.3'

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bugfix(i2s): remove_i2s_bbpll_clk_enable(backport v3.3)

See merge request sdk/ESP8266_RTOS_SDK!1425
This commit is contained in:
Dong Heng
2020-06-16 14:13:34 +08:00
parent 52419ece90 85759ce62f
commit 8189b9a4b6
2 changed files with 2 additions and 29 deletions
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27
components/esp8266/driver/i2s.c
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@ -48,30 +48,6 @@ static const char *I2S_TAG = "i2s";
#define dma_intr_disable() _xt_isr_mask(1 << ETS_SLC_INUM) #define dma_intr_disable() _xt_isr_mask(1 << ETS_SLC_INUM)
#define dma_intr_register(a, b) _xt_isr_attach(ETS_SLC_INUM, (a), (b)) #define dma_intr_register(a, b) _xt_isr_attach(ETS_SLC_INUM, (a), (b))
// Define them here if we can't find them.
#ifndef i2c_bbpll
#define i2c_bbpll 0x67
#define i2c_bbpll_en_audio_clock_out 4
#define i2c_bbpll_en_audio_clock_out_msb 7
#define i2c_bbpll_en_audio_clock_out_lsb 7
#define i2c_bbpll_hostid 4
/* ROM functions which read/write internal control bus */
uint8_t rom_i2c_readReg(uint8_t block, uint8_t host_id, uint8_t reg_add);
uint8_t rom_i2c_readReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb);
void rom_i2c_writeReg(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t data);
void rom_i2c_writeReg_Mask(uint8_t block, uint8_t host_id, uint8_t reg_add, uint8_t msb, uint8_t lsb, uint8_t data);
#define i2c_writeReg_Mask(block, host_id, reg_add, Msb, Lsb, indata) rom_i2c_writeReg_Mask(block, host_id, reg_add, Msb, Lsb, indata)
#define i2c_readReg_Mask(block, host_id, reg_add, Msb, Lsb) rom_i2c_readReg_Mask(block, host_id, reg_add, Msb, Lsb)
#define i2c_writeReg_Mask_def(block, reg_add, indata) \
i2c_writeReg_Mask(block, block##_hostid, reg_add, reg_add##_msb, reg_add##_lsb, indata)
#define i2c_readReg_Mask_def(block, reg_add) \
i2c_readReg_Mask(block, block##_hostid, reg_add, reg_add##_msb, reg_add##_lsb)
#endif
#define I2S_CLK_ENABLE() i2c_writeReg_Mask_def(i2c_bbpll, i2c_bbpll_en_audio_clock_out, 1)
#define I2S_CLK_DISABLE() i2c_writeReg_Mask_def(i2c_bbpll, i2c_bbpll_en_audio_clock_out, 0)
#define I2S_MAX_BUFFER_SIZE (4 * 1024 * 1024) // the maximum RAM can be allocated #define I2S_MAX_BUFFER_SIZE (4 * 1024 * 1024) // the maximum RAM can be allocated
#define I2S_BASE_CLK (2 * APB_CLK_FREQ) #define I2S_BASE_CLK (2 * APB_CLK_FREQ)
#define I2S_ENTER_CRITICAL() portENTER_CRITICAL() #define I2S_ENTER_CRITICAL() portENTER_CRITICAL()
@ -864,8 +840,6 @@ esp_err_t i2s_driver_uninstall(i2s_port_t i2s_num)
heap_caps_free(p_i2s_obj[i2s_num]); heap_caps_free(p_i2s_obj[i2s_num]);
p_i2s_obj[i2s_num] = NULL; p_i2s_obj[i2s_num] = NULL;
I2S_CLK_DISABLE();
return ESP_OK; return ESP_OK;
} }
@ -894,7 +868,6 @@ esp_err_t i2s_driver_install(i2s_port_t i2s_num, const i2s_config_t *i2s_config,
//initial interrupt //initial interrupt
dma_intr_register(i2s_intr_handler_default, p_i2s_obj[i2s_num]); dma_intr_register(i2s_intr_handler_default, p_i2s_obj[i2s_num]);
I2S_CLK_ENABLE();
i2s_stop(i2s_num); i2s_stop(i2s_num);
err = i2s_param_config(i2s_num, i2s_config); err = i2s_param_config(i2s_num, i2s_config);

4
components/esp8266/include/esp8266/i2s_register.h
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@ -12,8 +12,8 @@
// See the License for the specific language governing permissions and // See the License for the specific language governing permissions and
// limitations under the License. // limitations under the License.
#ifndef _SLC_REGISTER_H_ #ifndef _I2S_REGISTER_H_
#define _SLC_REGISTER_H_ #define _I2S_REGISTER_H_
#include "eagle_soc.h" #include "eagle_soc.h"