Merge branch 'feature/support_make_size_family_cmd' into 'master'

esp8266: supports "make size" and its family function

See merge request sdk/ESP8266_RTOS_SDK!1033
This commit is contained in:
Dong Heng
2019-08-08 09:51:47 +08:00
36 changed files with 8565 additions and 323 deletions

View File

@ -47,11 +47,13 @@ else()
set(include_dirs "include" "include/driver")
set(priv_requires "wpa_supplicant" "log" "spi_flash" "tcpip_adapter" "esp_ringbuf" "bootloader_support" "nvs_flash" "util")
set(fragments linker.lf ld/esp8266_fragments.lf)
idf_component_register(SRCS "${srcs}"
INCLUDE_DIRS "${include_dirs}"
REQUIRES "${requires}"
PRIV_REQUIRES "${priv_requires}"
LDFRAGMENTS "${fragments}"
REQUIRED_IDF_TARGETS esp8266)
target_link_libraries(${COMPONENT_LIB} PUBLIC "-L ${CMAKE_CURRENT_SOURCE_DIR}/lib" "-lstdc++")
@ -73,7 +75,9 @@ else()
endforeach()
endif()
target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_BINARY_DIR}/esp8266_out.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_BINARY_DIR}/esp8266_common_out.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "${CMAKE_CURRENT_LIST_DIR}/ld/esp8266.project.ld.in"
PROCESS "${CMAKE_CURRENT_BINARY_DIR}/ld/esp8266.project.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp8266.rom.ld")
target_linker_script(${COMPONENT_LIB} INTERFACE "ld/esp8266.peripherals.ld")
@ -93,13 +97,7 @@ else()
MAIN_DEPENDENCY ${LD_DIR}/esp8266.ld ${SDKCONFIG_H}
COMMENT "Generating memory map linker script..."
VERBATIM)
add_custom_command(
OUTPUT esp8266_common_out.ld
COMMAND "${CMAKE_C_COMPILER}" -C -P -x c -E -o esp8266_common_out.ld -I ${CONFIG_DIR} ${LD_DIR}/esp8266.common.ld
MAIN_DEPENDENCY ${LD_DIR}/esp8266.common.ld ${SDKCONFIG_H}
COMMENT "Generating section linker script..."
VERBATIM)
add_custom_target(esp8266_linker_script DEPENDS "${CMAKE_CURRENT_BINARY_DIR}/esp8266_out.ld" "${CMAKE_CURRENT_BINARY_DIR}/esp8266_common_out.ld")
add_custom_target(esp8266_linker_script DEPENDS "${CMAKE_CURRENT_BINARY_DIR}/esp8266_out.ld")
add_dependencies(${COMPONENT_LIB} esp8266_linker_script)
if(CONFIG_ESP8266_PHY_INIT_DATA_IN_PARTITION)

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@ -64,6 +64,13 @@ endif # CONFIG_ESP_PHY_INIT_DATA_IN_PARTITION
endif
LINKER_SCRIPT_TEMPLATE := $(COMPONENT_PATH)/ld/esp8266.project.ld.in
LINKER_SCRIPT_OUTPUT_DIR := $(abspath $(BUILD_DIR_BASE)/esp8266)
# Target to generate linker script generator from fragments presented by each of
# the components
$(eval $(call ldgen_process_template,$(LINKER_SCRIPT_TEMPLATE),$(LINKER_SCRIPT_OUTPUT_DIR)/esp8266.project.ld))
# global CFLAGS for ESP8266
CFLAGS += -DICACHE_FLASH

View File

@ -25,11 +25,13 @@ endif
#specifies its own scripts.
LINKER_SCRIPTS += esp8266.rom.ld esp8266.peripherals.ld
COMPONENT_ADD_LDFRAGMENTS += ld/esp8266_fragments.lf linker.lf
COMPONENT_ADD_LDFLAGS += -L$(COMPONENT_PATH)/lib \
$(addprefix -l,$(LIBS)) \
-L $(COMPONENT_PATH)/ld \
-T esp8266_out.ld \
-T esp8266_common_out.ld \
-T $(COMPONENT_BUILD_DIR)/esp8266.project.ld \
-Wl,--no-check-sections \
-u call_user_start \
$(addprefix -T ,$(LINKER_SCRIPTS))
@ -38,20 +40,18 @@ ALL_LIB_FILES := $(patsubst %,$(COMPONENT_PATH)/lib/lib%.a,$(LIBS))
# final linking of project ELF depends on all binary libraries, and
# all linker scripts
COMPONENT_ADD_LINKER_DEPS := $(ALL_LIB_FILES) $(addprefix ld/,$(LINKER_SCRIPTS))
COMPONENT_ADD_LINKER_DEPS := $(ALL_LIB_FILES) $(addprefix ld/, $(filter-out $(COMPONENT_BUILD_DIR)/esp8266.project.ld, $(LINKER_SCRIPTS))) \
$(COMPONENT_BUILD_DIR)/esp8266.project.ld
# Preprocess esp8266.ld linker script into esp8266_out.ld
#
# The library doesn't really depend on esp8266_out.ld, but it
# saves us from having to add the target to a Makefile.projbuild
$(COMPONENT_LIBRARY): esp8266_out.ld esp8266_common_out.ld
$(COMPONENT_LIBRARY): esp8266_out.ld
esp8266_out.ld: $(COMPONENT_PATH)/ld/esp8266.ld ../include/sdkconfig.h
$(CC) $(CFLAGS) -I ../include -C -P -x c -E $< -o $@
esp8266_common_out.ld: $(COMPONENT_PATH)/ld/esp8266.common.ld ../include/sdkconfig.h
$(CC) -I ../include -C -P -x c -E $< -o $@
COMPONENT_EXTRA_CLEAN := esp8266_out.ld
COMPONENT_EXTRA_CLEAN := esp8266_out.ld $(COMPONENT_BUILD_DIR)/esp8266.project.ld
endif

View File

@ -181,7 +181,7 @@
#define IRAM_SIZE (48 * 1024)
#define FLASH_BASE (0x40200000)
#define FLASH_SIZE (1 * 1024 * 1024)
#define FLASH_SIZE (2 * 1024 * 1024)
#define RTC_SYS_BASE (0x60001000)
#define RTC_SYS_SIZE (0x200)

View File

@ -1,258 +0,0 @@
/* This linker script generated from xt-genldscripts.tpp for LSP . */
/* Linker Script for ld -N */
#include "sdkconfig.h"
PHDRS
{
dport0_0_phdr PT_LOAD;
dram0_0_phdr PT_LOAD;
dram0_0_bss_phdr PT_LOAD;
iram1_0_phdr PT_LOAD;
irom0_0_phdr PT_LOAD;
}
/* Default entry point: */
ENTRY(call_user_start)
EXTERN(_DebugExceptionVector)
EXTERN(_DoubleExceptionVector)
EXTERN(_KernelExceptionVector)
EXTERN(_NMIExceptionVector)
EXTERN(_UserExceptionVector)
PROVIDE(_memmap_vecbase_reset = 0x40000000);
/* Various memory-map dependent cache attribute settings: */
_memmap_cacheattr_wb_base = 0x00000110;
_memmap_cacheattr_wt_base = 0x00000110;
_memmap_cacheattr_bp_base = 0x00000220;
_memmap_cacheattr_unused_mask = 0xFFFFF00F;
_memmap_cacheattr_wb_trapnull = 0x2222211F;
_memmap_cacheattr_wba_trapnull = 0x2222211F;
_memmap_cacheattr_wbna_trapnull = 0x2222211F;
_memmap_cacheattr_wt_trapnull = 0x2222211F;
_memmap_cacheattr_bp_trapnull = 0x2222222F;
_memmap_cacheattr_wb_strict = 0xFFFFF11F;
_memmap_cacheattr_wt_strict = 0xFFFFF11F;
_memmap_cacheattr_bp_strict = 0xFFFFF22F;
_memmap_cacheattr_wb_allvalid = 0x22222112;
_memmap_cacheattr_wt_allvalid = 0x22222112;
_memmap_cacheattr_bp_allvalid = 0x22222222;
PROVIDE(_memmap_cacheattr_reset = _memmap_cacheattr_wb_trapnull);
SECTIONS
{
.dport0.rodata : ALIGN(4)
{
_dport0_rodata_start = ABSOLUTE(.);
*(.dport0.rodata)
*(.dport.rodata)
_dport0_rodata_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.literal : ALIGN(4)
{
_dport0_literal_start = ABSOLUTE(.);
*(.dport0.literal)
*(.dport.literal)
_dport0_literal_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
.dport0.data : ALIGN(4)
{
_dport0_data_start = ABSOLUTE(.);
*(.dport0.data)
*(.dport.data)
_dport0_data_end = ABSOLUTE(.);
} >dport0_0_seg :dport0_0_phdr
/* RTC memory holds user's data/rodata */
.rtc.data :
{
_rtc_data_start = ABSOLUTE(.);
*(.rtc.data .rtc.data.*)
*(.rtc.rodata .rtc.rodata.*)
_rtc_data_end = ABSOLUTE(.);
} > rtc_seg
.text : ALIGN(4)
{
_stext = .;
_text_start = ABSOLUTE(.);
LONG(_text_start)
. = ALIGN(16);
*(.DebugExceptionVector.text)
. = ALIGN(16);
*(.NMIExceptionVector.text)
. = ALIGN(16);
*(.KernelExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.UserExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN(16);
*(.DoubleExceptionVector.text)
LONG(0)
LONG(0)
LONG(0)
LONG(0)
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
*(.iram1 .iram1.*)
*libspi_flash.a:spi_flash_raw.*(.literal .text .literal.* .text.*)
#ifdef CONFIG_ESP8266_WIFI_DEBUG_LOG_ENABLE
*libpp_dbg.a:(.literal .text .literal.* .text.*)
#else
*libpp.a:(.literal .text .literal.* .text.*)
#endif
*libphy.a:(.literal .text .literal.* .text.*)
*(.literal .text .stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.fini.literal)
*(.fini)
*(.gnu.version)
#ifdef CONFIG_LWIP_GLOBAL_DATA_LINK_IRAM
*liblwip.a:(.bss .data .bss.* .data.* COMMON)
#endif
#ifdef CONFIG_TCPIP_ADAPTER_GLOBAL_DATA_LINK_IRAM
*libtcpip_adapter.a:(.bss .data .bss.* .data.* COMMON)
#endif
#ifdef CONFIG_ESP8266_CORE_GLOBAL_DATA_LINK_IRAM
#ifdef CONFIG_ESP8266_WIFI_DEBUG_LOG_ENABLE
*libcore_dbg.a:(.bss .data .bss.* .data.* COMMON)
#else
*libcore.a:(.bss .data .bss.* .data.* COMMON)
#endif
#endif
#ifdef CONFIG_FREERTOS_GLOBAL_DATA_LINK_IRAM
*libfreertos.a:tasks.*(.bss .data .bss.* .data.* COMMON)
*libfreertos.a:timers.*(.bss .data .bss.* .data.* COMMON)
*libfreertos.a:freertos_hooks.*(.bss .data .bss.* .data.* COMMON)
#endif
#ifdef CONFIG_LINK_ETS_PRINTF_TO_IRAM
*libesp8266.a:ets_printf.*(.literal .text .literal.* .text.* .rodata.* .rodata)
#endif
_text_end = ABSOLUTE(.);
_etext = .;
} >iram1_0_seg :iram1_0_phdr
.data : ALIGN(4)
{
_data_start = ABSOLUTE(.);
*(.data .data.*)
*(.dram0 .dram0.*)
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata .sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2 .sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
_data_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.rodata : ALIGN(4)
{
_rodata_start = ABSOLUTE(.);
#ifdef CONFIG_ESP8266_WIFI_DEBUG_LOG_ENABLE
*libpp_dbg.a:(.rodata.* .rodata)
#else
*libpp.a:(.rodata.* .rodata)
#endif
*liblog.a:(.rodata.* .rodata)
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE__ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
*(.eh_frame)
. = (. + 3) & ~ 3;
/* C++ constructor and destructor tables, properly ordered: */
__init_array_start = ABSOLUTE(.);
KEEP (*crtbegin.*(.ctors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .ctors))
KEEP (*(SORT(.ctors.*)))
KEEP (*(.ctors))
__init_array_end = ABSOLUTE(.);
KEEP (*crtbegin.*(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS__ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
. = ALIGN(4); /* this table MUST be 4-byte aligned */
_bss_table_start = ABSOLUTE(.);
LONG(_bss_start)
LONG(_bss_end)
_bss_table_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.UserExceptionVector.literal : AT(LOADADDR(.rodata) + (ADDR(.UserExceptionVector.literal) - ADDR(.rodata))) ALIGN(4)
{
_UserExceptionVector_literal_start = ABSOLUTE(.);
*(.UserExceptionVector.literal)
_UserExceptionVector_literal_end = ABSOLUTE(.);
} >dram0_0_seg :dram0_0_phdr
.bss ALIGN(8) (NOLOAD) : ALIGN(4)
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
*(.dynsbss)
*(.sbss .sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2 .sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.bss .bss.*)
*(.gnu.linkonce.b.*)
*(COMMON)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
_heap_start = ABSOLUTE(.);
/* _stack_sentry = ALIGN(0x8); */
} >dram0_0_seg :dram0_0_bss_phdr
/* __stack = 0x3ffc8000; */
.irom0.text : ALIGN(4)
{
_irom0_text_start = ABSOLUTE(.);
*(.user.data .user.data.*)
*(.rodata.* .rodata .irom0.literal .irom.literal .irom.text.literal .irom0.text .irom.text)
*(.literal.* .text.*)
*(.rodata2.* .rodata2 .literal2.* .literal2 .text2.* .text2)
_irom0_text_end = ABSOLUTE(.);
} >irom0_0_seg :irom0_0_phdr
.lit4 : ALIGN(4)
{
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
} >iram1_0_seg :iram1_0_phdr
}

View File

@ -1,34 +1,44 @@
/* user1.bin @ 0x1000, user2.bin @ 0x10000 */
/* ESP8266 Linker Script Memory Layout
/* Flash Map (1024KB + 1024KB), support 2MB/4MB SPI Flash */
/* |..|........................|.....|.....|..|........................|.....|....| */
/* ^ ^ ^ ^ ^ ^ ^ ^ */
/* |_boot start(0x0000) | | |_pad start(0x100000) | | */
/* |_user1 start(0x1000) |_user1 end |_user2 start(0x101000) |_user2 end */
/* |_system param symmetric area(0xfb000) |_system param area(0x1fb000) */
This file describes the memory layout (memory blocks).
/* NOTICE: */
/* 1. You can change irom0 len, but MUST make sure user1 end not overlap system param symmetric area. */
/* 2. Space between user1 end and pad start can be used as user param area. */
/* 3. Space between user2 end and system param area can be used as user param area. */
/* 4. Don't change any other seg. */
/* 5. user1.bin and user2.bin are same in this mode, so upgrade only need one of them. */
esp8266.project.ld contains output sections to link compiler output
into these memory blocks.
***
This linker script is passed through the C preprocessor to include
configuration options.
Please use preprocessor features sparingly! Restrict
to simple macros with numeric values, and/or #if/#endif blocks.
*/
#include "sdkconfig.h"
MEMORY
{
dport0_0_seg : org = 0x3FF00000, len = 0x10
/* All these values assume the flash cache is on, and have the blocks this uses subtracted from the length
of the various regions. */
/* All .data/.bss/heap are in this segment. */
dram0_0_seg : org = 0x3FFE8000, len = 0x18000
/* IRAM for cpu. The length is due to the cache mode which is able to be set half or full mode. */
iram0_0_seg (RX) : org = 0x40100000, len = CONFIG_SOC_IRAM_SIZE
/* Functions which are critical should be put in this segment. */
iram1_0_seg : org = 0x40100000, len = CONFIG_SOC_IRAM_SIZE
/* Even though the segment name is iram, it is actually mapped to flash and mapped constant data */
iram0_2_seg (RX) : org = 0x40200010 + APP_OFFSET,
len = APP_SIZE - 0x10
/* It is actually mapped to flash. */
irom0_0_seg : org = 0x40200010 + APP_OFFSET, len = APP_SIZE - 0x10
/*
(0x18 offset above is a convenience for the app binary image generation. The .bin file which is flashed
to the chip has a 0x10 byte file header. Setting this offset makes it simple to meet the flash cache.)
*/
/* RTC memory, persists over deep sleep. */
rtc_seg : org = 0x60001200, len = 0x200
/* Length of this section is 96KB */
dram0_0_seg (RW) : org = 0x3FFE8000, len = 0x18000
/* (See iram0_2_seg for meaning of 0x10 offset in the above.) */
/* RTC memory. Persists over deep sleep */
rtc_data_seg(RW) : org = 0x60001200, len = 0x200
}

View File

@ -0,0 +1,247 @@
/* Default entry point: */
ENTRY(call_start_cpu);
SECTIONS
{
/* RTC data section holds RTC wake data/rodata
marked with RTC_DATA_ATTR, RTC_RODATA_ATTR attributes.
*/
.rtc.data :
{
_rtc_data_start = ABSOLUTE(.);
mapping[rtc_data]
_rtc_data_end = ABSOLUTE(.);
} > rtc_data_seg
/* RTC bss */
.rtc.bss (NOLOAD) :
{
_rtc_bss_start = ABSOLUTE(.);
mapping[rtc_bss]
_rtc_bss_end = ABSOLUTE(.);
} > rtc_data_seg
/* This section holds data that should not be initialized at power up
and will be retained during deep sleep.
User data marked with RTC_NOINIT_ATTR will be placed
into this section. See the file "esp_attr.h" for more information.
*/
.rtc_noinit (NOLOAD):
{
. = ALIGN(4);
_rtc_noinit_start = ABSOLUTE(.);
*(.rtc_noinit .rtc_noinit.*)
. = ALIGN(4) ;
_rtc_noinit_end = ABSOLUTE(.);
} > rtc_data_seg
ASSERT(((_rtc_noinit_end - ORIGIN(rtc_data_seg)) <= LENGTH(rtc_data_seg)),
"RTC segment data does not fit.")
/* Send .iram0 code to iram */
.iram0.vectors :
{
_iram_start = ABSOLUTE(.);
/* Vectors go to IRAM */
_init_start = ABSOLUTE(.);
LONG(_iram_start)
. = 0x10;
KEEP(*(.DebugExceptionVector.text));
. = 0x20;
KEEP(*(.NMIExceptionVector.text));
. = 0x30;
KEEP(*(.KernelExceptionVector.text));
. = 0x50;
KEEP(*(.UserExceptionVector.text));
. = 0x70;
KEEP(*(.DoubleExceptionVector.text));
*(.text .literal)
*(.*Vector.literal)
*(.UserEnter.literal);
*(.UserEnter.text);
. = ALIGN (16);
*(.entry.text)
*(.init.literal)
*(.init)
_init_end = ABSOLUTE(.);
} > iram0_0_seg
.iram0.text :
{
/* Code marked as runnning out of IRAM */
_iram_text_start = ABSOLUTE(.);
mapping[iram0_text]
_iram_text_end = ABSOLUTE(.);
_iram_end = ABSOLUTE(.);
} > iram0_0_seg
ASSERT(((_iram_text_end - ORIGIN(iram0_0_seg)) <= LENGTH(iram0_0_seg)),
"IRAM0 segment data does not fit.")
.dram0.data :
{
_data_start = ABSOLUTE(.);
*(.gnu.linkonce.d.*)
*(.data1)
*(.sdata)
*(.sdata.*)
*(.gnu.linkonce.s.*)
*(.sdata2)
*(.sdata2.*)
*(.gnu.linkonce.s2.*)
*(.jcr)
*(.dram0 .dram0.*)
mapping[dram0_data]
_data_end = ABSOLUTE(.);
. = ALIGN(4);
} > dram0_0_seg
/*This section holds data that should not be initialized at power up.
The section located in Internal SRAM memory region. The macro _NOINIT
can be used as attribute to place data into this section.
See the esp_attr.h file for more information.
*/
.noinit (NOLOAD):
{
. = ALIGN(4);
_noinit_start = ABSOLUTE(.);
*(.noinit .noinit.*)
. = ALIGN(4) ;
_noinit_end = ABSOLUTE(.);
} > dram0_0_seg
/* Shared RAM */
.dram0.bss (NOLOAD) :
{
. = ALIGN (8);
_bss_start = ABSOLUTE(.);
mapping[dram0_bss]
*(.dynsbss)
*(.sbss)
*(.sbss.*)
*(.gnu.linkonce.sb.*)
*(.scommon)
*(.sbss2)
*(.sbss2.*)
*(.gnu.linkonce.sb2.*)
*(.dynbss)
*(.share.mem)
*(.gnu.linkonce.b.*)
. = ALIGN (8);
_bss_end = ABSOLUTE(.);
} > dram0_0_seg
ASSERT(((_bss_end - ORIGIN(dram0_0_seg)) <= LENGTH(dram0_0_seg)),
"DRAM segment data does not fit.")
.flash.text :
{
_stext = .;
_text_start = ABSOLUTE(.);
mapping[flash_text]
/* For ESP8266 library function */
*(.irom0.literal .irom0.text)
*(.irom.literal .irom.text .irom.text.literal)
*(.text2 .text2.* .literal2 .literal2.*)
*(.stub .gnu.warning .gnu.linkonce.literal.* .gnu.linkonce.t.*.literal .gnu.linkonce.t.*)
*(.irom0.text) /* catch stray ICACHE_RODATA_ATTR */
*(.fini.literal)
*(.fini)
*(.gnu.version)
_text_end = ABSOLUTE(.);
_etext = .;
/* Similar to _iram_start, this symbol goes here so it is
resolved by addr2line in preference to the first symbol in
the flash.text segment.
*/
_flash_cache_start = ABSOLUTE(0);
} >iram0_2_seg
.flash.rodata ALIGN(1) :
{
_rodata_start = ABSOLUTE(.);
/**
Insert 8 bytes data to make realy rodata section's link address offset to be 0x8,
esptool will remove these data and add real segment header
*/
. = 0x8;
*(.rodata_desc .rodata_desc.*) /* Should be the first. App version info. DO NOT PUT ANYTHING BEFORE IT! */
*(.rodata_custom_desc .rodata_custom_desc.*) /* Should be the second. Custom app version info. DO NOT PUT ANYTHING BEFORE IT! */
*(.rodata2 .rodata2.*) /* For ESP8266 library function */
mapping[flash_rodata]
*(.irom1.text) /* catch stray ICACHE_RODATA_ATTR */
*(.gnu.linkonce.r.*)
*(.rodata1)
__XT_EXCEPTION_TABLE_ = ABSOLUTE(.);
*(.xt_except_table)
*(.gcc_except_table .gcc_except_table.*)
*(.gnu.linkonce.e.*)
*(.gnu.version_r)
. = (. + 3) & ~ 3;
__eh_frame = ABSOLUTE(.);
KEEP(*(.eh_frame))
. = (. + 7) & ~ 3;
/* C++ constructor and destructor tables
Make a point of not including anything from crtbegin.o or crtend.o, as IDF doesn't use toolchain crt
*/
__init_array_start = ABSOLUTE(.);
KEEP (*(EXCLUDE_FILE (*crtend.* *crtbegin.*) .ctors .ctors.*))
__init_array_end = ABSOLUTE(.);
KEEP (*crtbegin.*(.dtors))
KEEP (*(EXCLUDE_FILE (*crtend.*) .dtors))
KEEP (*(SORT(.dtors.*)))
KEEP (*(.dtors))
/* C++ exception handlers table: */
__XT_EXCEPTION_DESCS_ = ABSOLUTE(.);
*(.xt_except_desc)
*(.gnu.linkonce.h.*)
__XT_EXCEPTION_DESCS_END__ = ABSOLUTE(.);
*(.xt_except_desc_end)
*(.dynamic)
*(.gnu.version_d)
/* Addresses of memory regions reserved via
SOC_RESERVE_MEMORY_REGION() */
soc_reserved_memory_region_start = ABSOLUTE(.);
KEEP (*(.reserved_memory_address))
soc_reserved_memory_region_end = ABSOLUTE(.);
_rodata_end = ABSOLUTE(.);
/* Literals are also RO data. */
_lit4_start = ABSOLUTE(.);
*(*.lit4)
*(.lit4.*)
*(.gnu.linkonce.lit4.*)
_lit4_end = ABSOLUTE(.);
. = ALIGN(4);
_thread_local_start = ABSOLUTE(.);
*(.tdata)
*(.tdata.*)
*(.tbss)
*(.tbss.*)
_thread_local_end = ABSOLUTE(.);
. = ALIGN(4);
} >iram0_2_seg
}

View File

@ -0,0 +1,89 @@
[sections:text]
entries:
.text+
.literal+
[sections:data]
entries:
.data+
[sections:bss]
entries:
.bss+
[sections:common]
entries:
COMMON
[sections:rodata]
entries:
.rodata+
[sections:rtc_text]
entries:
.rtc.text+
.rtc.literal
[sections:rtc_data]
entries:
.rtc.data+
[sections:rtc_rodata]
entries:
.rtc.rodata+
[sections:rtc_bss]
entries:
.rtc.bss
[sections:iram]
entries:
.iram1+
[sections:dram]
entries:
.dram1+
[sections:wifi_iram]
entries:
.wifi0iram+
[scheme:default]
entries:
text -> flash_text
rodata -> flash_rodata
data -> dram0_data
bss -> dram0_bss
common -> dram0_bss
iram -> iram0_text
dram -> dram0_data
rtc_text -> rtc_text
rtc_data -> rtc_data
rtc_rodata -> rtc_data
rtc_bss -> rtc_bss
wifi_iram -> flash_text
[scheme:rtc]
entries:
text -> rtc_text
data -> rtc_data
rodata -> rtc_data
bss -> rtc_bss
common -> rtc_bss
[scheme:noflash]
entries:
text -> iram0_text
rodata -> dram0_data
[scheme:noflash_data]
entries:
rodata -> dram0_data
[scheme:noflash_text]
entries:
text -> iram0_text
[scheme:wifi_iram]
entries:
wifi_iram -> iram0_text

View File

@ -0,0 +1,9 @@
[mapping:pp]
archive: libpp.a
entries:
* (noflash_text)
[mapping:phy]
archive: libphy.a
entries:
* (noflash_text)

View File

@ -55,6 +55,9 @@ static inline int should_load(uint32_t load_addr)
return 0;
}
if (IS_FLASH(load_addr))
return 0;
return 1;
}
@ -104,7 +107,7 @@ static void user_init_entry(void *param)
vTaskDelete(NULL);
}
void call_user_start(size_t start_addr)
void call_start_cpu(size_t start_addr)
{
int i;
int *p;

View File

@ -1543,8 +1543,8 @@ class ESP8266V3FirmwareImage(BaseFirmwareImage):
checksum = ESPLoader.ESP_CHECKSUM_MAGIC
# split segments into flash-mapped vs ram-loaded, and take copies so we can mutate them
flash_segments = [copy.deepcopy(s) for s in sorted(self.segments, key=lambda s:s.addr) if self.is_flash_addr(s.addr)]
ram_segments = [copy.deepcopy(s) for s in sorted(self.segments, key=lambda s:s.addr) if not self.is_flash_addr(s.addr)]
flash_segments = [copy.deepcopy(s) for s in sorted(self.segments, key=lambda s:s.addr) if self.is_flash_addr(s.addr) and len(s.data)]
ram_segments = [copy.deepcopy(s) for s in sorted(self.segments, key=lambda s:s.addr) if not self.is_flash_addr(s.addr) and len(s.data)]
IROM_ALIGN = 65536
@ -1559,6 +1559,7 @@ class ESP8266V3FirmwareImage(BaseFirmwareImage):
#print('%x' % last_addr)
for segment in flash_segments[1:]:
if segment.addr // IROM_ALIGN == last_addr // IROM_ALIGN:
print(segment)
raise FatalError(("Segment loaded at 0x%08x lands in same 64KB flash mapping as segment loaded at 0x%08x. " +
"Can't generate binary. Suggest changing linker script or ELF to merge sections.") %
(segment.addr, last_addr))
@ -1599,6 +1600,9 @@ class ESP8266V3FirmwareImage(BaseFirmwareImage):
checksum = self.save_segment(f, pad_segment, checksum)
total_segments += 1
else:
# remove 8 bytes empty data for insert segment header
if segment.name == '.flash.rodata':
segment.data = segment.data[8:]
# write the flash segment
#assert (f.tell() + 8) % IROM_ALIGN == segment.addr % IROM_ALIGN
checksum = self.save_segment(f, segment, checksum)

View File

@ -21,18 +21,18 @@ heap_region_t g_heap_region[HEAP_REGIONS_MAX];
*/
void heap_caps_init(void)
{
extern char _heap_start;
extern char _bss_end;
#ifndef CONFIG_SOC_FULL_ICACHE
extern char _lit4_end;
extern char _iram_end;
g_heap_region[0].start_addr = (uint8_t *)&_lit4_end;
g_heap_region[0].total_size = ((size_t)(0x4010C000 - (uint32_t)&_lit4_end));
g_heap_region[0].start_addr = (uint8_t *)&_iram_end;
g_heap_region[0].total_size = ((size_t)(0x4010C000 - (uint32_t)&_iram_end));
g_heap_region[0].caps = MALLOC_CAP_32BIT;
#endif
g_heap_region[HEAP_REGIONS_MAX - 1].start_addr = (uint8_t *)&_heap_start;
g_heap_region[HEAP_REGIONS_MAX - 1].total_size = ((size_t)(0x40000000 - (uint32_t)&_heap_start));
g_heap_region[HEAP_REGIONS_MAX - 1].start_addr = (uint8_t *)&_bss_end;
g_heap_region[HEAP_REGIONS_MAX - 1].total_size = ((size_t)(0x40000000 - (uint32_t)&_bss_end));
g_heap_region[HEAP_REGIONS_MAX - 1].caps = MALLOC_CAP_8BIT | MALLOC_CAP_32BIT | MALLOC_CAP_DMA;
esp_heap_caps_init_region(g_heap_region, HEAP_REGIONS_MAX);

View File

@ -1,4 +1,3 @@
set(COMPONENT_SRCDIRS ".")
set(COMPONENT_ADD_INCLUDEDIRS "include")
set(COMPONENT_REQUIRES)
register_component()
idf_component_register(SRCS "log.c"
INCLUDE_DIRS "include"
LDFRAGMENTS "linker.lf")

View File

@ -1,5 +1,2 @@
#
# Component Makefile
#
# (Uses default behaviour of compiling all source files in directory, adding 'include' to include path.)
COMPONENT_ADD_LDFRAGMENTS += linker.lf

4
components/log/linker.lf Normal file
View File

@ -0,0 +1,4 @@
[mapping:log]
archive: liblog.a
entries:
* (noflash_data)

View File

@ -1,14 +1,14 @@
set(srcs "src/partition"
"src/spi_flash_raw.c"
"src/spi_flash.c")
if(BOOTLOADER_BUILD)
# Bootloader needs SPIUnlock from this file, but doesn't
# need other parts of this component
set(COMPONENT_SRCDIRS "src" "port")
set(COMPONENT_PRIV_REQUIRES "bootloader_support")
set(srcs "${srcs}" "port/port.c")
set(priv_requires "bootloader_support")
else()
set(COMPONENT_SRCDIRS "src" "port")
set(COMPONENT_PRIV_REQUIRES "esp8266" "freertos" "bootloader_support")
set(priv_requires "esp8266" "freertos" "bootloader_support")
endif()
set(COMPONENT_ADD_INCLUDEDIRS include)
set(COMPONENT_REQUIRES)
register_component()
idf_component_register(SRCS "${srcs}"
PRIV_REQUIRES "${priv_requires}"
INCLUDE_DIRS "include"
LDFRAGMENTS "linker.lf")

View File

@ -8,6 +8,8 @@ ifdef IS_BOOTLOADER_BUILD
COMPONENT_OBJS := src/spi_flash.o src/spi_flash_raw.o
endif
COMPONENT_ADD_LDFRAGMENTS += linker.lf
CFLAGS += -DPARTITION_QUEUE_HEADER=\"sys/queue.h\"
ifdef IS_BOOTLOADER_BUILD

View File

@ -0,0 +1,4 @@
[mapping:spi_flash]
archive: libspi_flash.a
entries:
spi_flash_raw (noflash)