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feat(esp8266): support link firmware to all regions of 8MB flash

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This commit is contained in:
Dong Heng
2020-02-28 15:52:30 +08:00
parent c4f549dbc1
commit 6a22a95d72
5 changed files with 53 additions and 37 deletions
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8
components/bootloader/Kconfig.projbuild
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@ -150,6 +150,14 @@ config BOOTLOADER_HOLD_TIME_GPIO
The GPIO must be held low continuously for this period of time after reset
before a factory reset or test partition boot (as applicable) is performed.
config BOOTLOADER_STORE_OFFSET
hex "Bootloader store offset in the flash"
default 0x0
help
Bootloader store offset in the flash, if you have extra private bootloader to boot the
bootloader of the SDK's bootloader, you can set the option to store SDK's bootloader
to other space in the flash instead of "0x0".
endmenu # Bootloader

2
components/bootloader/Makefile.projbuild
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@ -18,7 +18,7 @@ SECURE_BOOT_SIGNING_KEY=$(abspath $(call dequote,$(CONFIG_SECURE_BOOT_SIGNING_KE
export SECURE_BOOT_SIGNING_KEY # used by bootloader_support component
# Has a matching value in bootloader_support esp_flash_partitions.h
BOOTLOADER_OFFSET := 0x0000
BOOTLOADER_OFFSET := $(CONFIG_BOOTLOADER_STORE_OFFSET)
# Custom recursive make for bootloader sub-project
#

51
components/bootloader_support/src/bootloader_flash.c
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@ -268,6 +268,12 @@ esp_err_t bootloader_flash_erase_sector(size_t sector)
#include "esp_spi_flash.h"
#endif
#ifdef CONFIG_SOC_FULL_ICACHE
#define SOC_CACHE_SIZE 1 // 32KB
#else
#define SOC_CACHE_SIZE 0 // 16KB
#endif
extern void Cache_Read_Disable();
extern void Cache_Read_Enable(uint8_t map, uint8_t p, uint8_t v);
@ -290,21 +296,48 @@ const void *bootloader_mmap(uint32_t src_addr, uint32_t size)
return NULL; /* can't map twice */
}
/* ToDo: Improve the map policy! */
/* 0: 0x000000 - 0x1fffff */
/* 1: 0x200000 - 0x3fffff */
/* 2: 0x400000 - 0x5fffff */
/* 3: 0x600000 - 0x7fffff */
uint32_t region;
uint32_t sub_region;
uint32_t mapped_src;
if (src_addr < 0x200000) {
region = 0;
} else if (src_addr < 0x400000) {
region = 1;
} else if (src_addr < 0x600000) {
region = 2;
} else if (src_addr < 0x800000) {
region = 3;
} else {
ESP_LOGE(TAG, "flash mapped address %p is invalid", (void *)src_addr);
while (1);
}
/* 0: 0x000000 - 0x0fffff \ */
/* \ */
/* 0x40200000 */
/* / */
/* 1: 0x100000 - 0x1fffff / */
mapped_src = src_addr & 0x1fffff;
if (mapped_src < 0x100000) {
sub_region = 0;
} else {
sub_region = 1;
mapped_src -= 0x100000;
}
Cache_Read_Disable();
/* 0 and 0x100000 address use same mmap addresss 0x40200000 */
if (src_addr < 0x100000) {
Cache_Read_Enable(0, 0, 0);
} else {
Cache_Read_Enable(1, 0, 0);
src_addr -= 0x100000;
}
Cache_Read_Enable(sub_region, region, SOC_CACHE_SIZE);
mapped = true;
return (void *)(0x40200000 + src_addr);
return (void *)(0x40200000 + mapped_src);
}
void bootloader_munmap(const void *mapping)

27
components/bootloader_support/src/bootloader_utility.c
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@ -495,15 +495,6 @@ static void set_cache_and_start_app(
#include "esp_flash_partitions.h"
#include "internal/esp_system_internal.h"
#ifdef CONFIG_SOC_FULL_ICACHE
#define SOC_CACHE_SIZE 1 // 32KB
#else
#define SOC_CACHE_SIZE 0 // 16KB
#endif
#define ESP_CACHE1_ADDR_MAX 0x100000
#define ESP_CACHE2_ADDR_MAX 0x200000
static const char* TAG = "boot";
bool bootloader_utility_load_partition_table(bootloader_state_t* bs)
@ -803,7 +794,6 @@ bool bootloader_utility_load_boot_image(const bootloader_state_t *bs, int start_
void bootloader_utility_load_image(const esp_image_metadata_t* image_data)
{
void (*user_start)(size_t start_addr);
extern void Cache_Read_Enable(uint8_t map, uint8_t p, uint8_t v);
#if defined(CONFIG_SECURE_BOOT_ENABLED) || defined(CONFIG_FLASH_ENCRYPTION_ENABLED)
esp_err_t err;
@ -848,22 +838,7 @@ void bootloader_utility_load_image(const esp_image_metadata_t* image_data)
copy loaded segments to RAM, set up caches for mapped segments, and start application
unpack_load_app(image_data);
#else
size_t map;
if (image_data->start_addr < ESP_CACHE1_ADDR_MAX
&& image_data->start_addr + image_data->image_len < ESP_CACHE1_ADDR_MAX) {
map = 0;
} else if (image_data->start_addr >= ESP_CACHE1_ADDR_MAX
&& image_data->start_addr < ESP_CACHE2_ADDR_MAX
&& image_data->start_addr + image_data->image_len < ESP_CACHE2_ADDR_MAX) {
map = 1;
} else {
ESP_LOGE(TAG, "ERROR: app bin error, start_addr %x image_len %d\n", image_data->start_addr, image_data->image_len);
/* Blocking here to let user judge. */
while (1);
}
Cache_Read_Enable(map, 0, SOC_CACHE_SIZE);
bootloader_mmap(image_data->start_addr, image_data->image_len);
user_start = (void *)image_data->image.entry_addr;
user_start(image_data->start_addr);

2
components/esp8266/ld/esp8266.ld
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@ -25,7 +25,7 @@ MEMORY
iram0_0_seg (RX) : org = 0x40100000, len = CONFIG_SOC_IRAM_SIZE
/* Even though the segment name is iram, it is actually mapped to flash and mapped constant data */
iram0_2_seg (RX) : org = 0x40200010 + APP_OFFSET,
iram0_2_seg (RX) : org = 0x40200010 + (APP_OFFSET & (0x100000 - 1)),
len = APP_SIZE - 0x10
/*