mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
synced 2025-07-08 18:40:52 +08:00
Merge branch 'bugfix/fix_bss_clear' into 'master'
Fix cached data is cleared by function of "clean bss" See merge request sdk/ESP8266_RTOS_SDK!378
This commit is contained in:
components
bootloader_support/src
esp8266/source
spi_flash/src
@ -494,6 +494,12 @@ static void set_cache_and_start_app(
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#include "esp_flash_partitions.h"
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#ifdef CONFIG_SOC_FULL_ICACHE
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#define SOC_CACHE_SIZE 1 // 32KB
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#else
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#define SOC_CACHE_SIZE 0 // 16KB
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#endif
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#define ESP_CACHE1_ADDR_MAX 0x100000
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#define ESP_CACHE2_ADDR_MAX 0x200000
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@ -777,7 +783,7 @@ bool bootloader_utility_load_boot_image(const bootloader_state_t *bs, int start_
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void bootloader_utility_load_image(const esp_image_metadata_t* image_data)
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{
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void (*user_start)(size_t start_addr, size_t map);
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void (*user_start)(size_t start_addr);
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extern void Cache_Read_Enable(uint8_t map, uint8_t p, uint8_t v);
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#if defined(CONFIG_SECURE_BOOT_ENABLED) || defined(CONFIG_FLASH_ENCRYPTION_ENABLED)
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@ -838,10 +844,10 @@ void bootloader_utility_load_image(const esp_image_metadata_t* image_data)
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while (1);
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}
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Cache_Read_Enable(map, 0, 0);
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Cache_Read_Enable(map, 0, SOC_CACHE_SIZE);
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user_start = (void *)image_data->image.entry_addr;
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user_start(image_data->start_addr, map);
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user_start(image_data->start_addr);
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#endif /* BOOTLOADER_UNPACK_APP */
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}
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@ -34,7 +34,7 @@ static const char *TAG = "chip_boot";
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* @brief initialize the chip including flash I/O and chip cache according to
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* boot parameters which are stored at the flash
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*/
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void chip_boot(size_t start_addr, size_t map)
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void chip_boot(size_t start_addr)
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{
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int ret;
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uint32_t freqdiv, flash_size;
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@ -91,9 +91,6 @@ void chip_boot(size_t start_addr, size_t map)
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}
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SET_PERI_REG_BITS(PERIPHS_SPI_FLASH_CTRL, 0xfff, freqbits, 0);
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ESP_EARLY_LOGD(TAG, "SPI flash cache map is %d\n", map);
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cache_init(map);
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if (fhdr.spi_mode == ESP_IMAGE_SPI_MODE_QIO) {
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ESP_EARLY_LOGD(TAG, "SPI flash enable QIO mode\n");
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user_spi_flash_dio_to_qio_pre_init();
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@ -1,39 +0,0 @@
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// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
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//
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// Licensed under the Apache License, Version 2.0 (the "License");
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// you may not use this file except in compliance with the License.
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// You may obtain a copy of the License at
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//
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// http://www.apache.org/licenses/LICENSE-2.0
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//
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// Unless required by applicable law or agreed to in writing, software
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// distributed under the License is distributed on an "AS IS" BASIS,
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// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
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// See the License for the specific language governing permissions and
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// limitations under the License.
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#include "sdkconfig.h"
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#include <stdint.h>
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#include "esp_attr.h"
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#include "esp8266/rom_functions.h"
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#ifdef CONFIG_SOC_FULL_ICACHE
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#define SOC_CACHE_SIZE 1 // 32KB
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#else
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#define SOC_CACHE_SIZE 0 // 16KB
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#endif
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static uint8_t s_cache_map;
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static uint8_t s_cache_size = SOC_CACHE_SIZE;
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void IRAM_ATTR Cache_Read_Enable_New(void)
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{
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Cache_Read_Enable(s_cache_map, 0, s_cache_size);
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}
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void cache_init(int map)
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{
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s_cache_map = map;
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Cache_Read_Enable_New();
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}
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@ -30,7 +30,7 @@
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#define FLASH_MAP_ADDR 0x40200000
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extern void chip_boot(size_t start_addr, size_t map);
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extern void chip_boot(size_t start_addr);
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extern int rtc_init(void);
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extern int mac_init(void);
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extern int base_gpio_init(void);
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@ -68,7 +68,7 @@ static void user_init_entry(void *param)
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wifi_task_delete(NULL);
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}
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void call_user_start(size_t start_addr, size_t map)
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void call_user_start(size_t start_addr)
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{
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int i;
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int *p;
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@ -98,7 +98,7 @@ void call_user_start(size_t start_addr, size_t map)
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"wsr a0, vecbase\n"
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: : :"memory");
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chip_boot(start_addr, map);
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chip_boot(start_addr);
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/* clear bss data */
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for (p = &_bss_start; p < &_bss_end; p++)
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@ -229,11 +229,12 @@ static void IRAM_ATTR Cache_Read_Disable_2(void)
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CLEAR_PERI_REG_MASK(PERIPHS_SPI_FLASH_CTRL,SPI_ENABLE_AHB);
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}
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static void IRAM_ATTR Cache_Read_Enable_2()
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void IRAM_ATTR Cache_Read_Enable_2()
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{
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SET_PERI_REG_MASK(PERIPHS_SPI_FLASH_CTRL,SPI_ENABLE_AHB);
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SET_PERI_REG_MASK(CACHE_FLASH_CTRL_REG,CACHE_READ_EN_BIT);
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}
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void Cache_Read_Enable_New(void) __attribute__((alias("Cache_Read_Enable_2")));
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static uint32_t IRAM_ATTR spi_flash_get_id(void)
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{
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