espressif/ESP8266_RTOS_SDK
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Merge branch 'bugfix/fix_bss_clear' into 'master'

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Fix cached data is cleared by function of "clean bss"

See merge request sdk/ESP8266_RTOS_SDK!378
This commit is contained in:
Wu Jian Gang
2018-08-10 11:26:31 +08:00
parent b3adc8cdea f602793a33
commit 4e15ca451a
5 changed files with 15 additions and 50 deletions
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5
components/esp8266/source/chip_boot.c
View File

@ -34,7 +34,7 @@ static const char *TAG = "chip_boot";
* @brief initialize the chip including flash I/O and chip cache according to
* boot parameters which are stored at the flash
*/
void chip_boot(size_t start_addr, size_t map)
void chip_boot(size_t start_addr)
{
int ret;
uint32_t freqdiv, flash_size;
@ -91,9 +91,6 @@ void chip_boot(size_t start_addr, size_t map)
}
SET_PERI_REG_BITS(PERIPHS_SPI_FLASH_CTRL, 0xfff, freqbits, 0);
ESP_EARLY_LOGD(TAG, "SPI flash cache map is %d\n", map);
cache_init(map);
if (fhdr.spi_mode == ESP_IMAGE_SPI_MODE_QIO) {
ESP_EARLY_LOGD(TAG, "SPI flash enable QIO mode\n");
user_spi_flash_dio_to_qio_pre_init();

39
components/esp8266/source/esp_cache.c
View File

@ -1,39 +0,0 @@
// Copyright 2018-2019 Espressif Systems (Shanghai) PTE LTD
//
// Licensed under the Apache License, Version 2.0 (the "License");
// you may not use this file except in compliance with the License.
// You may obtain a copy of the License at
//
// http://www.apache.org/licenses/LICENSE-2.0
//
// Unless required by applicable law or agreed to in writing, software
// distributed under the License is distributed on an "AS IS" BASIS,
// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.
// See the License for the specific language governing permissions and
// limitations under the License.
#include "sdkconfig.h"
#include <stdint.h>
#include "esp_attr.h"
#include "esp8266/rom_functions.h"
#ifdef CONFIG_SOC_FULL_ICACHE
#define SOC_CACHE_SIZE 1 // 32KB
#else
#define SOC_CACHE_SIZE 0 // 16KB
#endif
static uint8_t s_cache_map;
static uint8_t s_cache_size = SOC_CACHE_SIZE;
void IRAM_ATTR Cache_Read_Enable_New(void)
{
Cache_Read_Enable(s_cache_map, 0, s_cache_size);
}
void cache_init(int map)
{
s_cache_map = map;
Cache_Read_Enable_New();
}

6
components/esp8266/source/startup.c
View File

@ -30,7 +30,7 @@
#define FLASH_MAP_ADDR 0x40200000
extern void chip_boot(size_t start_addr, size_t map);
extern void chip_boot(size_t start_addr);
extern int rtc_init(void);
extern int mac_init(void);
extern int base_gpio_init(void);
@ -68,7 +68,7 @@ static void user_init_entry(void *param)
wifi_task_delete(NULL);
}
void call_user_start(size_t start_addr, size_t map)
void call_user_start(size_t start_addr)
{
int i;
int *p;
@ -98,7 +98,7 @@ void call_user_start(size_t start_addr, size_t map)
"wsr a0, vecbase\n"
: : :"memory");
chip_boot(start_addr, map);
chip_boot(start_addr);
/* clear bss data */
for (p = &_bss_start; p < &_bss_end; p++)