mirror of
https://github.com/espressif/ESP8266_RTOS_SDK.git
synced 2025-07-15 08:32:42 +08:00
fix(esp8266): fix system and wifi sleep/wake process error
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@ -25,6 +25,7 @@
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#include "esp8266/rom_functions.h"
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#include "driver/rtc.h"
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#include "rom/uart.h"
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#include "internal/phy_init_data.h"
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#define FRC2_LOAD (0x60000620)
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#define FRC2_COUNT (0x60000624)
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@ -36,8 +37,10 @@
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#define FRC2_TICKS_PER_US (5)
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#define FRC2_TICKS_MAX (UINT32_MAX / 4)
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#define MIN_SLEEP_US (3000)
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#define WAKEUP_EARLY_TICKS (272) // about 2620ms
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#define SLEEP_MIN_TIME (1000)
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#define SLEEP_PROC_TIME (4450)
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#define WAKEUP_EARLY_TICKS (264) // PLL and STAL wait ticks
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#define MIN_SLEEP_US (SLEEP_MIN_TIME + SLEEP_PROC_TIME)
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#define TAG "esp8266_pm"
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@ -113,12 +116,43 @@ static inline void update_soc_clk(pm_soc_clk_t *clk, uint32_t us)
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WdevTimOffSet += us;
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}
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void esp_wifi_hw_open(void)
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{
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phy_open_rf();
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}
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void esp_wifi_hw_close(void)
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{
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phy_close_rf();
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}
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rtc_cpu_freq_t rtc_clk_cpu_freq_get(void)
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{
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rtc_cpu_freq_t freq;
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uint32_t reg = REG_READ(DPORT_CTL_REG);
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if (reg & DPORT_CTL_DOUBLE_CLK)
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freq = RTC_CPU_FREQ_160M;
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else
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freq = RTC_CPU_FREQ_80M;
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return freq;
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}
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void rtc_clk_cpu_freq_set(rtc_cpu_freq_t cpu_freq)
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{
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if (RTC_CPU_FREQ_80M == cpu_freq)
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REG_CLR_BIT(DPORT_CTL_REG, DPORT_CTL_DOUBLE_CLK);
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else
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REG_SET_BIT(DPORT_CTL_REG, DPORT_CTL_DOUBLE_CLK);
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}
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esp_err_t esp_sleep_enable_timer_wakeup(uint32_t time_in_us)
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{
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if (time_in_us <= MIN_SLEEP_US)
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return ESP_ERR_INVALID_ARG;
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s_sleep_duration = time_in_us;
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s_sleep_duration = time_in_us - SLEEP_PROC_TIME;
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s_sleep_wakup_triggers |= RTC_TIMER_TRIG_EN;
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return ESP_OK;
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@ -126,14 +160,16 @@ esp_err_t esp_sleep_enable_timer_wakeup(uint32_t time_in_us)
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esp_err_t esp_light_sleep_start(void)
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{
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const uint32_t rtc_cal = esp_clk_cal_get(CRYSTAL_USED);
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const uint32_t sleep_rtc_ticks = rtc_time_us_to_clk(s_sleep_duration, rtc_cal);
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uint32_t period = pm_rtc_clock_cali_proc();
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const uint32_t sleep_rtc_ticks = pm_usec2rtc(s_sleep_duration, period);
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const rtc_cpu_freq_t cpu_freq = rtc_clk_cpu_freq_get();
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if (sleep_rtc_ticks > WAKEUP_EARLY_TICKS + 1) {
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rtc_light_sleep_start(sleep_rtc_ticks - WAKEUP_EARLY_TICKS, s_sleep_wakup_triggers, 0);
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rtc_lightsleep_init();
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pm_set_sleep_cycles(sleep_rtc_ticks - WAKEUP_EARLY_TICKS);
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rtc_light_sleep_start(s_sleep_wakup_triggers, 0);
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rtc_wakeup_init();
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rtc_clk_init();
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rtc_clk_cpu_freq_set(cpu_freq);
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return ESP_OK;
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@ -180,15 +216,17 @@ void esp_sleep_start(void)
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const uint32_t sleep_us = min_sleep_us(&clk);
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if (sleep_us > MIN_SLEEP_US) {
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const uint32_t rtc_cal = esp_clk_cal_get(CRYSTAL_USED);
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const uint32_t sleep_rtc_ticks = rtc_time_us_to_clk(sleep_us, rtc_cal);
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uint32_t period = pm_rtc_clock_cali_proc();
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const uint32_t sleep_rtc_ticks = pm_usec2rtc(sleep_us - SLEEP_PROC_TIME, period);
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if (sleep_rtc_ticks > WAKEUP_EARLY_TICKS + 1) {
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const rtc_cpu_freq_t cpu_freq = rtc_clk_cpu_freq_get();
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rtc_light_sleep_start(sleep_rtc_ticks - WAKEUP_EARLY_TICKS, s_sleep_wakup_triggers | RTC_TIMER_TRIG_EN, 0);
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rtc_lightsleep_init();
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pm_set_sleep_cycles(sleep_rtc_ticks - WAKEUP_EARLY_TICKS);
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rtc_light_sleep_start(s_sleep_wakup_triggers | RTC_TIMER_TRIG_EN, 0);
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rtc_wakeup_init();
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rtc_clk_init();
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rtc_clk_cpu_freq_set(cpu_freq);
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update_soc_clk(&clk, sleep_us);
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@ -31,6 +31,8 @@
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#include "internal/phy_init_data.h"
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#include "phy.h"
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#include "driver/rtc.h"
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static const char* TAG = "phy_init";
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static uint8_t phy_check_calibration_data(uint8_t* rf_cal_data)
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@ -105,6 +107,8 @@ esp_err_t esp_phy_rf_init(const esp_phy_init_data_t* init_data, esp_phy_calibrat
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uart_tx_wait_idle(1);
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uart_div_modify(1, UART_CLK_FREQ / uart_baudrate);
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rtc_init_2(local_init_data);
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int ret = register_chipv6_phy(local_init_data);
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if (ret) {
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ESP_LOGI(TAG, "phy register error, ret:%d", ret);
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