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feat(esp8266): Panic uses hardware restart instead of software restart

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This commit is contained in:
Dong Heng
2020-05-19 10:35:23 +08:00
parent 66ee73402a
commit 39c53b61dd
1 changed files with 23 additions and 5 deletions
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26
components/freertos/port/esp8266/panic.c
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@ -116,17 +116,35 @@ static inline void panic_frame(XtExcFrame *frame)
#endif /* ESP_PANIC_PRINT */ #endif /* ESP_PANIC_PRINT */
#ifdef ESP_PANIC_REBOOT #ifdef ESP_PANIC_REBOOT
static void hardware_restart(void)
{
CLEAR_WDT_REG_MASK(WDT_CTL_ADDRESS, BIT0);
WDT_REG_WRITE(WDT_OP_ADDRESS, 1);
WDT_REG_WRITE(WDT_OP_ND_ADDRESS, 1);
SET_PERI_REG_BITS(PERIPHS_WDT_BASEADDR + WDT_CTL_ADDRESS,
WDT_CTL_RSTLEN_MASK,
7 << WDT_CTL_RSTLEN_LSB,
0);
SET_PERI_REG_BITS(PERIPHS_WDT_BASEADDR + WDT_CTL_ADDRESS,
WDT_CTL_RSPMOD_MASK,
0 << WDT_CTL_RSPMOD_LSB,
0);
SET_PERI_REG_BITS(PERIPHS_WDT_BASEADDR + WDT_CTL_ADDRESS,
WDT_CTL_EN_MASK,
1 << WDT_CTL_EN_LSB,
0);
}
static void esp_panic_reset(void) static void esp_panic_reset(void)
{ {
uart_tx_wait_idle(0); uart_tx_wait_idle(0);
uart_tx_wait_idle(1); uart_tx_wait_idle(1);
rom_i2c_writeReg(0x67, 4, 1, 0x08);
rom_i2c_writeReg(0x67, 4, 2, 0x81);
esp_reset_reason_set_hint(ESP_RST_PANIC); esp_reset_reason_set_hint(ESP_RST_PANIC);
rom_software_reboot(); hardware_restart();
while (1);
} }
#endif #endif