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Merge branch 'feature/add_rtc_section' into 'master'
feat(esp8266): Add rtc segment and attribute support See merge request sdk/ESP8266_RTOS_SDK!213
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@ -38,4 +38,12 @@
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// Use as ets_printf(DRAM_STR("Hello world!\n"));
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#define DRAM_STR(str) (__extension__({static const DRAM_ATTR char __c[] = (str); (const char *)&__c;}))
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// Forces data into RTC memory.
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// Any variable marked with this attribute will keep its value
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// during a deep sleep / wake cycle.
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#define RTC_DATA_ATTR __attribute__((section(".rtc.data")))
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// Forces read-only data into RTC memory.
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#define RTC_RODATA_ATTR __attribute__((section(".rtc.rodata")))
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#endif /* __ESP_ATTR_H__ */
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@ -62,6 +62,15 @@ SECTIONS
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_dport0_data_end = ABSOLUTE(.);
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} >dport0_0_seg :dport0_0_phdr
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/* RTC memory holds user's data/rodata */
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.rtc.data :
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{
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_rtc_data_start = ABSOLUTE(.);
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*(.rtc.data)
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*(.rtc.rodata)
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_rtc_data_end = ABSOLUTE(.);
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} > rtc_seg
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.text : ALIGN(4)
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{
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_stext = .;
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@ -18,8 +18,17 @@
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MEMORY
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{
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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dram0_0_seg : org = 0x3FFE8000, len = 0x18000
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iram1_0_seg : org = 0x40100000, len = 0x8000
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irom0_0_seg : org = 0x40201010, len = 0xE0000
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dport0_0_seg : org = 0x3FF00000, len = 0x10
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/* All .data/.bss/heap are in this segment. */
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dram0_0_seg : org = 0x3FFE8000, len = 0x18000
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/* Functions which are critical should be put in this segment. */
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iram1_0_seg : org = 0x40100000, len = 0x8000
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/* It is actually mapped to flash. */
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irom0_0_seg : org = 0x40201010, len = 0xFF000 - 0x10
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/* RTC memory, persists over deep sleep. */
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rtc_seg : org = 0x60001200, len = 0x200
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}
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